CN113644993A - Big data signal calibration system - Google Patents

Big data signal calibration system Download PDF

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CN113644993A
CN113644993A CN202110935228.XA CN202110935228A CN113644993A CN 113644993 A CN113644993 A CN 113644993A CN 202110935228 A CN202110935228 A CN 202110935228A CN 113644993 A CN113644993 A CN 113644993A
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resistor
operational amplifier
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CN113644993B (en
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孟耀伟
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Xuchang University
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Xuchang University
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B17/00—Monitoring; Testing
    • H04B17/10—Monitoring; Testing of transmitters
    • H04B17/11—Monitoring; Testing of transmitters for calibration
    • H04B17/12—Monitoring; Testing of transmitters for calibration of transmit antennas, e.g. of the amplitude or phase
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B17/00—Monitoring; Testing
    • H04B17/20—Monitoring; Testing of receivers
    • H04B17/21—Monitoring; Testing of receivers for calibration; for correcting measurements

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Abstract

The invention discloses a big data signal calibration system, which comprises a big data signal transmitter, a big data signal receiver, a big data signal preamplifier, an amplitude detection calibration module and a big data signal demodulator, wherein the amplitude detection calibration module comprises a 2FSK frequency-selecting filter circuit, a first carrier frequency amplitude detection circuit, a second carrier frequency amplitude detection circuit, a voltage identification module, an amplitude distortion judgment circuit and an amplitude calibration circuit, the big data signal amplitude of a first carrier frequency band is detected by using the charging voltage of an operational amplifier C3, the big data signal amplitude of a second carrier frequency band is detected by using the charging voltage of an operational amplifier C6, the two amplitude voltages are subjected to differential operation by using an operational amplifier AR10 to judge the amplitude distortion existing state of a big data signal, and the frequency band of a big data signal with smaller amplitude is amplified and calibrated by using an amplitude amplification circuit 1 and an amplitude amplification circuit 2, the amplitude of the large data signal is unified, and the accuracy of data demodulation of the data signal demodulator is improved.

Description

Big data signal calibration system
Technical Field
The invention relates to the technical field of big data, in particular to a big data signal calibration system.
Background
With the rapid development of big data technology, big data is integrated into various industries, and the big data industry is rapidly developing into a new generation of information technology and service industry, namely, data with huge quantity, scattered sources and various formats are collected, transmitted, stored and associated analyzed, new knowledge is discovered from the data, new value is created, and new capability is improved;
at present, a big data signal transmitter is often adopted to modulate the acquired data into a big data signal, and then the big data signal is transmitted to a big data signal receiver after power amplification is carried out, so as toThe large data signal is modulated by 2FSK digital modulation, i.e. binary frequency shift keying, and the frequency of carrier wave is controlled by transmitted digital information to achieve the purpose of transmitting digital information by the frequency of carrier wave, and the 2FSK signal is a symbol "0" corresponding to the first carrier frequency f1And the symbol "1" corresponds to the second carrier frequency f2(and f)1A different carrier frequency), so that the 2FSK digital modulation scheme involves two carrier frequencies f1、f2；
After receiving the transmitted big data signal, a big data signal receiver in the big data signal receiver transmits the big data signal to a preamplifier for amplification, and then transmits the big data signal to a demodulator for demodulation, so as to obtain original data for storage and correlation analysis; however, since the circuit for amplifying the power of the big data signal in the big data signal transmitter and the preamplifier in the big data signal receiver often contain a linear reactance element, the big data signal output to the demodulator by the preamplifier in the big data signal receiver is prone to amplitude distortion, i.e. the first carrier frequency f in the big data signal output by the big data signal pre-demodulator1Signals of frequency band and second carrier frequency f2Signals of the frequency band have different amplitudes, which affect the demodulation result of the large data signal demodulator, so that the accuracy of the demodulated data is threatened.
Disclosure of Invention
In view of the above situation, an object of the present invention is to provide a large data signal calibration system, which can determine the amplitude distortion state of a large data signal output by a large data signal pre-demodulator, and perform amplitude calibration on the large data signal with amplitude distortion when amplitude distortion exists in the large data signal output by the pre-demodulator, so as to improve the accuracy of data demodulation by the data signal demodulator.
The technical scheme for solving the problem is that the device comprises a big data signal transmitter, a big data signal receiver, a big data signal preamplifier, an amplitude detection and calibration module and a big data signal demodulator, wherein the amplitude detection and calibration module comprises a 2FSK frequency-selecting filter circuit, a first carrier frequency amplitude detection circuit, a second carrier frequency amplitude detection circuit, a voltage identification module, an amplitude distortion judgment circuit and an amplitude calibration circuit;
the big data signal receiver receives a big data signal transmitted by a big data signal transmitter and transmits the big data signal to a big data signal preamplifier, the big data signal preamplifier amplifies the big data signal and transmits the big data signal to a 2FSK frequency-selecting filter circuit, the 2FSK frequency-selecting filter circuit samples the frequency of the big data signal by using a frequency transmitter J1, the frequency is converted into direct-current voltage and then is compared with the voltage division value of a resistor R1-R2, when an operational amplifier AR3 outputs positive voltage, the big data signal is output through a frequency-selecting network 1 consisting of a capacitor C1 and an inductor L1, when an operational amplifier AR3 outputs negative voltage, the big data signal is output through a frequency-selecting network 2 consisting of a capacitor C2 and an inductor L2, the first carrier frequency amplitude detection circuit charges a capacitor C3 to a peak value by using the big data signal output by the frequency-selecting network 1, a silicon controlled rectifier Q5 is conducted, and a relay K4 is conducted in the negative half cycle of the big data signal, similarly, the second carrier frequency amplitude detection circuit outputs a voltage on a capacitor C6 to the voltage identification module, the voltage identification module continuously outputs a dc voltage with the same value as the voltage on the capacitor C3 from an output port 1 of the voltage identification module to the amplitude distortion judgment circuit according to the received voltage on the capacitor C3, continuously outputs a dc voltage with the same value as the voltage on the capacitor C6 from an output port 2 of the voltage identification module to the amplitude distortion judgment circuit according to the received voltage on the capacitor C6, the amplitude distortion judgment circuit performs differential operation on the voltages output by two different ports of the voltage identification module by using an operational amplifier AR10, if the obtained difference is a positive level, the operational amplifier AR18 is used to compare the difference with resistors R17-R18, and if the obtained difference is a negative level, the phase of the data signal is inverted by an operational amplifier AR14, and then compared with resistors R19-R20 by an operational amplifier AR17, when the operational amplifier AR18 outputs a positive voltage, the amplitude calibration circuit amplifies and outputs the large data signal output by the frequency selection network 1, and when the operational amplifier AR17 outputs a positive voltage, the amplitude calibration circuit amplifies and outputs the large data signal output by the frequency selection network 2;
one end of a resistor R32 is connected with a cathode of a diode D5 in the amplitude distortion judging circuit, the other end of the resistor R32 is connected with a contact 4 of a relay K9, a contact 5 of a relay K9 is grounded, a contact 1 of a relay K9 is connected with one end of a resistor R38, the other end of the resistor R5 and an output end of an operational amplifier AR4 in the 2FSK frequency-selective filter circuit, a base of a triode Q3, a base of a triode Q6, a non-inverting input end of the operational amplifier AR6, one end of a resistor R8 and one end of a resistor R9 in the first carrier frequency amplitude detecting circuit, a contact 2 of a relay K9 is connected with a non-inverting input end of an operational amplifier AR23, an inverting input end of the operational amplifier AR23 is connected with an output end of the operational amplifier AR23, one end of the resistor R41 and an OUT pin of an analog multiplier A2, a contact 3 of the relay K9 is connected with an X pin of an analog multiplier A2 and an X pin of the analog multiplier A2, a Y pin of the analog multiplier A2 is connected with an output end of the analog multiplier A2 and an output end of the AR 72 of the operational multiplier A2, the OUT pin of the analog multiplier A1 is connected with one end of a resistor R33, the other end of the resistor R33 is connected with one end of a resistor R34 and the inverting input end of an operational amplifier AR19, the non-inverting input end of the operational amplifier AR19 is connected with one end of a resistor R35, the other end of a resistor R35 is grounded, the other end of a resistor R34 is connected with the contact 1 of a relay K10, the other end of the resistor R7 and the output end of the operational amplifier AR5 in the 2FSK frequency-selective filter circuit, the base of a transistor Q10 in the second carrier frequency amplitude detection circuit, the base of a transistor Q12, the non-inverting input end of the operational amplifier AR24 and one end of a resistor R44, the contact 4 of the relay K44 is connected with the other end of the resistor R44, one end of the resistor R44 is connected with the cathode of a diode D44 in the amplitude distortion judgment circuit, the contact 5 of the relay K44 is grounded, the contact 3 of the relay K44 is connected with the X pin of the analog multiplier A44 and the Y pin of the analog multiplier A44 and the output end of the operational amplifier AR 44, the Y pin of the analog multiplier A3 is connected with the Y pin of the analog multiplier A4 and the output end of the operational amplifier AR21, the OUT pin of the analog multiplier A3 is connected with one end of a resistor R37, the non-inverting input end of the operational amplifier AR21 is connected with one end of a resistor R39, the other end of the resistor R39 is grounded, the inverting input end of the operational amplifier AR21 is connected with the other ends of a resistor R37 and a resistor R38, the contact 2 of the relay K10 is connected with the non-inverting input end of the operational amplifier AR20, the inverting input end of the operational amplifier AR20 is connected with the output end of the operational amplifier AR20 and one end of the OUT pin of the analog multiplier A4 and one end of a resistor R40, the other end of the resistor R40 is connected with the other end of a resistor R41 and the non-inverting input end of the operational amplifier AR22, the inverting input end of the operational amplifier AR22 is connected with one end of a resistor R42 and one end of a resistor R43, the other end of the resistor R42 is grounded, and the other end of the resistor R43 is connected with the output end of the operational amplifier R22 and the input port of the demodulator.
Due to the adoption of the technical scheme, compared with the prior art, the invention has the following advantages:
1. separating the big data signal into a first carrier frequency band and a second carrier frequency band, respectively detecting the big data signal amplitude voltage of the first carrier frequency band and the big data signal amplitude voltage of the second carrier frequency band, carrying out differential operation on the big data signal amplitude voltage of the first carrier frequency band and the big data signal amplitude voltage of the second carrier frequency band, taking a positive value as a difference value obtained by the differential operation, and selecting the smaller amplitude voltage of the big data signal amplitude voltage of the first carrier frequency band and the big data signal amplitude voltage of the second carrier frequency band to attenuate to the original amplitude voltage
Figure BDA0003212770130000031
And comparing it with a positive value for differences greater than a voltage of lesser magnitude
Figure BDA0003212770130000032
And when amplitude distortion exists in the large data signal output by the pre-demodulator, amplitude calibration is carried out on the large data signal with amplitude distortion, so that the accuracy of data demodulation of the data signal demodulator is improved.
2. If no large data signal of the first carrier frequency band is input into the first carrier frequency amplitude detection circuit, the triode Q6 and the triode Q7 cannot be conducted, the relay K4 and the relay K5 are also not conducted, the voltage on the capacitor C3 cannot be output and is continuously maintained, so that the voltage on the capacitor C3 is inhibited from being discharged when no large data signal of the first carrier frequency band is input, and the accuracy of the large data signal amplitude voltage of the first carrier frequency band output to the voltage identification module is prevented from being reduced;
if no large data signal of the second carrier frequency band is input into the second carrier frequency amplitude detection circuit, the triode Q12 and the triode Q13 cannot be conducted, the relay K13 and the relay K12 are also not conducted, the voltage on the capacitor C6 cannot be output and is continuously maintained, so that the voltage on the capacitor C6 is inhibited from being discharged when no large data signal of the second carrier frequency band is input, and the accuracy of the large data signal amplitude voltage of the second carrier frequency band output to the voltage identification module is prevented from being reduced.
Drawings
FIG. 1 is a schematic diagram of a 2FSK frequency selective filter circuit of the present invention;
FIG. 2 is a schematic diagram of a first carrier frequency amplitude detection circuit of the present invention;
FIG. 3 is a schematic diagram of a second carrier frequency amplitude detection circuit of the present invention;
FIG. 4 is a schematic diagram of an amplitude distortion determination circuit of the present invention;
fig. 5 is a schematic diagram of an amplitude calibration circuit of the present invention.
Detailed Description
The foregoing and other technical matters, features and effects of the present invention will be apparent from the following detailed description of the embodiments, which is to be read in connection with the accompanying drawings of fig. 1 to 5. The structural contents mentioned in the following embodiments are all referred to the attached drawings of the specification.
A big data signal calibration system comprises a big data signal transmitter, a big data signal receiver, a big data signal preamplifier, an amplitude detection calibration module and a big data signal demodulator, wherein the amplitude detection calibration module comprises a 2FSK frequency-selecting filter circuit, a first carrier frequency amplitude detection circuit, a second carrier frequency amplitude detection circuit, a voltage identification module, an amplitude distortion judgment circuit and an amplitude calibration circuit; the big data signal receiver receives a big data signal transmitted by the big data signal transmitter and transmits the big data signal to the big data signal preamplifier, the big data signal preamplifier amplifies the big data signal and transmits the amplified big data signal to the amplitude detection and calibration module to judge the amplitude distortion existing state of the big data signal, the big data signal is calibrated when the amplitude distortion exists in the big data signal, and the calibrated big data signal is transmitted to the big data signal demodulator to be demodulated.
The system is only suitable for the mobile communication network in which the large data signal is modulated by adopting a 2FSK modulation mode.
In order to separate a big data signal according to the carrier frequency of the big data signal, filter the interference signal and reduce the influence of the interference signal on a first carrier frequency amplitude detection circuit and a second carrier frequency amplitude detection circuit at the later stage, the 2FSK frequency-selecting filter circuit selects the frequency of a frequency transmitter J1 with the model of WBF124U01 to sample the big data signal in real time, converts the frequency of the big data signal into direct current voltage and loads the direct current voltage on the non-inverting input end of an operational amplifier AR3, converts the two carrier frequency of the big data signal into the average value of two different direct current voltages through a frequency transmitter J1 to set the voltage division value of a resistor R1-R2, and compares the direct current voltage output by the frequency transmitter J1 with the voltage division value of the resistor R1-R2 in real time by using an operational amplifier AR 3;
if the direct-current voltage output by the frequency transmitter J1 is greater than the divided voltage value of the resistors R1-R2, namely the large data signal which is the highest frequency band carrier frequency and is output by the large data signal preamplifier is recorded as a first carrier frequency, the operational amplifier AR3 outputs a positive level, the triode Q1 is conducted, the relay K1 is conducted accordingly, the large data signal is transmitted to a first carrier frequency selection filter circuit consisting of the capacitor C1, the inductor L1, the operational amplifier AR4 and the resistors R4-R5 through the contact 1 and the contact 2 of the relay K1; the capacitor C1 and the inductor L1 form a frequency-selecting network 1, and the resonant frequency of the frequency-selecting network 1
Figure BDA0003212770130000051
By applying an LC parallel resonance principle, interference signals outside the central frequency of the large data signals of the first carrier frequency band are suppressed only through the large data signals of the first carrier frequency band, so that a filtering effect is realized, the proportionality coefficient of the operational amplifier AR4 is determined by the ratio of a resistor R5 to a resistor R4, and the proportionality coefficient is greater than 1, so that the attenuation of the large data signals of the first carrier frequency band through the frequency selection network 1 is compensated;
if the direct current voltage output by the frequency transmitter J1 is smaller than the divided voltage value of the resistors R1-R2, namely the large data signal with the lowest frequency band carrier frequency output by the large data signal preamplifier is marked as a second carrier frequency, the operational amplifier AR3 outputs a negative level, the triode Q2 is conducted, the relay K2 is conducted accordingly,
the big data signal is transmitted to a second carrier frequency-selecting filter circuit consisting of a capacitor C2, an inductor L2, an operational amplifier AR5 and resistors R6-R7 through a contact 3 and a contact 4 of a relay K2; the capacitor C2 and the inductor L2 form a frequency-selecting network 2, and the resonant frequency of the frequency-selecting network 2
Figure BDA0003212770130000061
By applying an LC parallel resonance principle, interference signals outside the central frequency of the large data signal of the second carrier frequency band are suppressed only through the large data signal of the second carrier frequency band, so as to realize a filtering effect, the proportionality coefficient of the operational amplifier AR5 is determined by the ratio of the resistor R7 to the resistor R6, and the proportionality coefficient is greater than 1, so as to compensate the attenuation of the large data signal of the second carrier frequency band through the frequency selection network 1;
the resistor R3 is a current-limiting resistor, the first carrier frequency-selecting filter circuit transmits the big data signal of the first carrier frequency band to the first carrier frequency amplitude detection circuit and the amplitude calibration circuit through the operational amplifier AR4, and the second carrier frequency-selecting filter circuit transmits the big data signal of the second carrier frequency band to the second carrier frequency amplitude detection circuit and the amplitude calibration circuit through the operational amplifier AR 5.
In order to detect the amplitude of the large data signal of the first carrier frequency band, a first carrier frequency amplitude detection circuit is adopted, if the large data signal of the first carrier frequency band is input into the non-inverting input end of the operational amplifier AR6, when the large data signal of the first carrier frequency band is in a positive half cycle, the diode D2 is conducted, the diode D3 is conducted, the capacitor C3 starts to charge, the triode Q3 is conducted, the thyristor Q4 is conducted, the relay K3 is conducted, the contact 2 is conducted with the contact 1, the contact 4 is conducted with the contact 3, the operational amplifier AR8 starts to compare the voltage on the capacitor C3 with the large data signal of the first carrier frequency band output by the operational amplifier AR6, until the voltage on the capacitor C3 reaches the peak value of the large data signal of the first carrier frequency band, the operational amplifier AR8 outputs a positive level, the thyristor Q5 is conducted, and simultaneously, the operational amplifier AR7 and the resistors R9-R11 form an inverter circuit 1, wherein the proportionality coefficient is determined by the ratio of the resistor R10 and the resistor R9, the proportionality coefficient is 1, a large data signal of the first carrier frequency band is inverted into a negative half cycle, the triode Q7 is conducted, the relay K5 is conducted, the voltage on the capacitor C3 is transmitted to the same-phase input end of the operational amplifier AR9 through the silicon controlled rectifier Q5 and the contact 1 and the contact 2 of the relay K5, the operational amplifier AR9 serves as a follower, and the inductor L3 and the capacitors C4-C5 form a filter network to filter the voltage on the capacitor C3 and output the filtered voltage to the voltage identification module; when the large data signal of the first carrier frequency band is in a negative half cycle, the triode Q6 is conducted, the relay K4 is conducted therewith, the voltage on the capacitor C3 is continuously transmitted to the non-inverting input end of the operational amplifier AR9 through the contact 3 and the contact 4 of the thyristor Q5 and the relay K4, the operational amplifier AR9 serves as a follower, the inductor L3 and the capacitors C4-C5 form a filter network 1 to filter the voltage on the capacitor C3, and then the filtered voltage is output to the voltage identification module until the large data signal of the first carrier frequency band of the next period comes, the above processes are repeated, and the operation is repeated in a circulating manner, so that the purpose of detecting the amplitude of the large data signal of the first carrier frequency band is achieved;
if no large data signal of the first carrier frequency band is input into the non-inverting input end of the operational amplifier AR6, the triode Q6 and the triode Q7 cannot be conducted, the relay K4 and the relay K5 are also not conducted, the voltage on the capacitor C3 cannot be output and is continuously maintained, so that the voltage on the capacitor C3 is inhibited from being discharged when no large data signal of the first carrier frequency band is input, and the accuracy of the amplitude voltage of the large data signal of the first carrier frequency band output to the voltage identification module is prevented from being reduced;
the resistor R8 and the resistor R12 are current-limiting resistors, and the operational amplifier AR6 and the operational amplifier AR8 are used as followers to play an isolation role; the filter network 1 has the function of enabling the amplitude voltage output to the voltage identification module to be smoother and closer to an ideal direct-current voltage, so that the accuracy of a post-stage amplitude distortion judgment circuit is improved; when the input big data signal of the first carrier frequency band is negative half cycle, the PNP triode Q6 is adopted to conduct the relay K4, so that the voltage on the capacitor C3 is output from the contact 3 of the relay K4 to be communicated with the contact 4, and when the input big data signal of the first carrier frequency band is positive half cycle, the inverting circuit 1 is adopted to invert the big data signal of the first carrier frequency band, then the PNP triode Q7 is adopted to conduct the relay K5, so that the voltage on the capacitor C3 is output from the contact 1 of the relay K5 to be communicated with the contact 2.
In order to detect the amplitude of the large data signal in the second carrier frequency band, a second carrier frequency amplitude detection circuit is adopted, if a large data signal in the second carrier frequency band is input into the non-inverting input end of the operational amplifier AR24, when the large data signal in the second carrier frequency band is in a positive half cycle, the diode D7 is turned on, the diode D8 is turned on, the capacitor C6 starts to charge, the triode Q10 is turned on, the thyristor Q9 is turned on, the relay K11 is turned on, the contact 2 is turned on, the contact 4 is turned on, the contact 3 is turned on, the operational amplifier AR26 starts to compare the voltage on the capacitor C6 with the large data signal in the second carrier frequency band output by the operational amplifier AR24, until the voltage on the capacitor C6 reaches the peak value of the large data signal in the second carrier frequency band, the operational amplifier AR26 outputs a positive level, the thyristor Q11 is turned on, and simultaneously, the operational amplifier AR25 and the resistors R45-R47 form an inverter circuit 2, the proportionality coefficient of which is determined by the ratio of the resistor 46 and the resistor R45, the proportionality coefficient is 1, a large data signal of the second carrier frequency band is inverted into a negative half cycle, the triode Q13 is conducted, the relay K12 is conducted, the voltage on the capacitor C6 is transmitted to the same-phase input end of the operational amplifier AR27 through the silicon controlled rectifier Q11 and the contact 1 and the contact 2 of the relay K12, the operational amplifier AR27 serves as a follower, the inductor L4 and the capacitors C7-C8 form a filter network 2 to filter the voltage on the capacitor C6, and then the filtered voltage is output to the voltage identification module; when the large data signal of the second carrier frequency band is in a negative half cycle, the triode Q12 is conducted, the relay K13 is conducted therewith, the voltage on the capacitor C6 is continuously transmitted to the non-inverting input end of the operational amplifier AR27 through the contact 3 and the contact 4 of the thyristor Q11 and the relay K13, the operational amplifier AR27 serves as a follower, the inductor L4 and the capacitors C7-C8 form a filter network 2 to filter the voltage on the capacitor C6, and then the filtered voltage is output to the voltage identification module until the large data signal of the second carrier frequency band of the next period comes, the above processes are repeated, and the operation is repeated in a circulating manner, so that the purpose of detecting the amplitude of the large data signal of the second carrier frequency band is achieved;
if no large data signal of the second carrier frequency band is input into the phase input end of the operational amplifier AR24, the triode Q12 and the triode Q13 cannot be conducted, the relay K13 and the relay K12 are also not conducted, the voltage on the capacitor C6 cannot be output and is continuously maintained, so that the voltage on the capacitor C6 is inhibited from being discharged when no large data signal of the second carrier frequency band is input, and the accuracy of the amplitude voltage of the large data signal of the second carrier frequency band output to the voltage identification module is prevented from being reduced;
the resistor R44 and the resistor R48 are current-limiting resistors, and the operational amplifier AR24 and the operational amplifier AR27 are used as followers to play an isolation role; the filter network 2 has the function of smoothing the amplitude voltage output to the voltage identification module and enabling the amplitude voltage to be closer to an ideal direct-current voltage, so that the accuracy of a post-stage amplitude distortion judgment circuit is improved; when the input big data signal of the second carrier frequency band is negative half cycle, the PNP triode Q12 is adopted to conduct the relay K4, so that the voltage on the capacitor C6 is output from the contact 3 of the relay K13 to be communicated with the contact 4, and when the input big data signal of the second carrier frequency band is positive half cycle, the inverting circuit 2 is firstly adopted to invert the big data signal of the second carrier frequency band, then the PNP triode Q13 is adopted to conduct the relay K12, so that the voltage on the capacitor C6 is output from the contact 1 of the relay K12 to be communicated with the contact 2, so that when the big data signal of the second carrier frequency band is input, the voltage on the capacitor C6 is output continuously, and the reaction time of the rear-stage voltage identification module is shortened.
The voltage identification module continuously outputs direct-current voltage with the same voltage value as that on the capacitor C3 to the amplitude distortion judgment circuit from an output port 1 of the voltage identification module according to the amplitude voltage of the large data signal of the first carrier frequency band output by the first carrier frequency amplitude detection circuit in real time; the voltage identification module continuously outputs a direct current voltage with the same voltage value as that of the capacitor C6 to the amplitude distortion judgment circuit from the output port 2 of the voltage identification module according to the amplitude voltage of the big data signal of the second carrier frequency band output by the second carrier frequency amplitude detection circuit in real time, so that the amplitude distortion judgment circuit at the later stage judges the existence state of the amplitude distortion of the big data signal.
In order to judge the amplitude distortion existing state of the large data signal, an amplitude distortion judging circuit is adopted to use a composition difference of an operational amplifier AR10 and resistors R13-R16The proportional coefficient of the sub-circuit is determined by the ratio of the resistor R14 to the resistor R13, the proportional coefficient is 1, and the differential circuit performs differential operation on the amplitude voltage of the large data signal of the first carrier frequency band output by the output port 1 of the voltage identification module and the amplitude voltage of the large data signal of the second carrier frequency band output by the output port 2 of the voltage identification module; meanwhile, the amplitude voltage of the first carrier frequency band big data signal output by the output port 1 of the voltage identification module passes through the attenuation circuit 1 consisting of the resistors R17-R18, the resistance of the resistor R17 is the same as that of the resistor R18, and the amplitude voltage of the first carrier frequency band big data signal is attenuated to the original amplitude voltage
Figure BDA0003212770130000091
Then, the voltage is loaded to a contact 3 of a relay K8, the amplitude voltage of the second data signal of the second carrier frequency band output by the output port 2 of the voltage identification module passes through an attenuation circuit 2 consisting of resistors R19-R20, the resistance of the resistor R19 is the same as that of the resistor R20, and the amplitude voltage of the second data signal of the second carrier frequency band is attenuated to the original amplitude voltage
Figure BDA0003212770130000092
Then, load to contact 6 of relay K7;
if the amplitude voltage of the big data signal of the first carrier frequency band is smaller than the amplitude voltage of the big data signal of the second carrier frequency band, the operational amplifier AR10 outputs a difference value of positive levels, which is the difference value between the amplitude voltage of the large data signal of the first carrier frequency band and the amplitude voltage of the large data signal of the second carrier frequency band, the diode D4 is cut off, the transistor Q8 is cut off, the relay K6 is cut off, the difference value of positive levels output by the operational amplifier AR10 is transmitted to the contact 6 of the relay K8 and the addition circuit 1 composed of the operational amplifier AR16 and the resistors R28-R31 through the contact 1 of the relay K6 and the contact 2, the proportionality coefficient of the adder circuit 1 is determined by the ratio of the resistor R31 and the resistor R30, the adder circuit adds the positive level difference value output by the operational amplifier AR10 to the +4.5V power supply voltage, the relay K8 with the on-state voltage of +5V is turned on accordingly, and the operational amplifier AR18 starts to sum the positive level difference value output by the operational amplifier AR 10.
Figure BDA0003212770130000093
The amplitude voltage of the big data signal of the first carrier frequency band is compared, and the positive level difference value output by the operational amplifier AR10 is larger than
Figure BDA0003212770130000094
When the amplitude voltage of the large data signal of the first carrier frequency band is detected, the large data signal is judged to have amplitude distortion, the operational amplifier AR18 outputs a positive level, the diode D5 is conducted, and the positive level output by the operational amplifier AR18 is transmitted to one end of a resistor R32 in the copy calibration circuit;
if the amplitude voltage of the large data signal of the second carrier frequency band is smaller than the amplitude voltage of the large data signal of the first carrier frequency band, the operational amplifier AR10 outputs a difference value of a negative level, the difference value is the difference value between the amplitude voltage of the large data signal of the first carrier frequency band and the amplitude voltage of the large data signal of the second carrier frequency band, the diode D4 is turned on, the transistor Q8 is turned on, the relay K6 is turned on, the negative level difference value output by the operational amplifier AR10 is transmitted to the inverter circuit 3 composed of the operational amplifier AR14 and the resistors R21-R22 through the contact 1 of the relay K6, the proportionality coefficient of the inverter circuit 3 is determined by the ratio of the resistor R23 to the resistor R21, the proportionality coefficient is 1, the inverter circuit 3 inverts the negative level difference value output by the operational amplifier AR10 to obtain a difference value of a positive level, and then loads the difference value to the adder circuit 2 composed of the contact 3 of the relay K7, the operational amplifier AR15 and the resistors R24-R27, the proportionality coefficient of the adder circuit 2 is determined by the ratio of the resistor R27 and the resistor R26, the adder circuit 2 adds the positive level difference output by the operational amplifier AR10 to the +4.5V power voltage, the relay K7 with the on-state voltage of +5V is turned on, and the operational amplifier AR17 starts to add the positive level difference output by the inverter circuit 3 to the positive level difference output by the inverter circuit 3
Figure BDA0003212770130000101
The amplitude voltage of the big data signal of the second carrier frequency band is compared, and the positive level difference value output by the inverter circuit 3 is larger than
Figure BDA0003212770130000102
When the amplitude voltage of the big data signal of the second carrier frequency band is detected, the big data signal is judged to have amplitude distortionThe operational amplifier AR17 outputs a positive level, the diode D6 is turned on, and the positive level output by the operational amplifier AR17 is transmitted to one end of the resistor R36 in the amplitude calibration circuit;
the operational amplifiers AR11-AR13 are followers and play an isolation role; the adder circuit 1 functions to help the positive level difference output from the operational amplifier AR10 turn on the relay K8, and the adder circuit 2 functions to help the positive level difference output from the inverter circuit 3 turn on the relay K7.
In order to perform amplitude calibration on a large data signal with amplitude distortion to improve the accuracy of data demodulation of a data signal demodulator, an amplitude calibration circuit is adopted, if neither an operational amplifier AR18 nor an operational amplifier AR17 in the amplitude distortion judging circuit outputs a positive level, the large data signal is defaulted to have no amplitude distortion, a relay K9 and a relay K10 are not conducted, the large data signal of a first carrier frequency band is transmitted to one end of a resistor R41 in an addition circuit 3 consisting of resistors R40-R43 and the operational amplifier AR22 through a contact 1 and a contact 2 of the relay K9, the large data signal of a second carrier frequency band is transmitted to one end of a resistor R40 in an addition circuit 3 consisting of the resistors R40-R43 and the operational amplifier AR22 through a contact 1 and the contact 2 of the relay K10, the addition circuit 3 adds the large data signal of the first carrier frequency band and the large data signal of the second carrier frequency band, recombining a big data signal which is the same as the output of the big data signal preamplifier and transmitting the big data signal to a big data signal demodulator for demodulation;
if the operational amplifier AR18 in the amplitude distortion determination circuit outputs a positive level and the operational amplifier AR17 does not output a positive level at the same time, it indicates that the large data signal has amplitude distortion, and the amplitude of the large data signal in the first carrier frequency band is smaller than that of the large data signal in the second carrier frequency band, at this time, the relay K9 is turned on, and the large data signal in the first carrier frequency band is transmitted to the amplitude amplification circuit 1 composed of the analog multiplier a1-a2, the resistors R33-R35, and the operational amplifier AR19 through the contact 1 of the relay K9, wherein the analog multiplier a1 and the resistors R33-R35 in the amplitude amplification circuit 1 constitute a division circuit 1, and the first input u of the division circuit 1 constitutes a division circuit 1i1Is input from the X pin of an analog multiplier A1, and the second input ui2Is inputted from one end of a resistor R34 connected with a contact 1 of a relay K10, and an output uoIs output from the Y pin of the analog multiplier A1, and the output thereof
Figure BDA0003212770130000111
Order to
Figure BDA0003212770130000112
Then
Figure BDA0003212770130000113
So that the output of the amplitude amplifying circuit 1
Figure BDA0003212770130000114
When the amplitude of the big data signal of the first carrier frequency band is smaller than that of the big data signal of the second carrier frequency band, the amplitude of the big data signal of the first carrier frequency band is calibrated and amplified to be the same as that of the big data signal of the second carrier frequency band, namely, the amplitude of the big data signal of the first carrier frequency band and that of the big data signal of the second carrier frequency band are unified, the big data signals are output to one end of a resistor R41 in an adding circuit 3, and after the big data signals are added by the adding circuit 3 and the big data signal of the second carrier frequency band, which is connected with a contact 2 through a contact 1 of a relay K10, the big data signals are recombined to be transmitted to a big data signal demodulator for demodulation;
if the operational amplifier AR17 in the amplitude distortion judging circuit outputs a positive level and the operational amplifier AR18 does not output a positive level, it indicates that the large data signal has amplitude distortion, and the amplitude of the large data signal in the second carrier frequency band is smaller than the amplitude of the large data signal in the first carrier frequency band,
at this time, the relay K10 is turned on, and the large data signal of the second carrier frequency band is transmitted to the amplitude amplifying circuit 2 composed of the analog multiplier A3-a4, the resistors R37-R39 and the operational amplifier AR21 through the contact 1 and the contact 3 of the relay K10, wherein the analog multiplier A3 and the resistors R37-R39 in the amplitude amplifying circuit 2 constitute the division circuit 2, and the first input U of the division circuit 2 is connected to the input U of the division circuit 2i1Is input from the X pin of an analog multiplier A3, and the second input Ui2Is inputted from one end of a resistor R38 connected with a contact 1 of a relay K9, and an output U is outputtedoIs output from the Y pin of the analog multiplier A3, and the output thereof
Figure BDA0003212770130000121
Order to
Figure BDA0003212770130000122
Then
Figure BDA0003212770130000123
So that the output of the amplitude amplifying circuit 1
Figure BDA0003212770130000124
When the amplitude of the big data signal of the second carrier frequency band is smaller than that of the big data signal of the first carrier frequency band, the amplitude of the big data signal of the second carrier frequency band is calibrated and amplified to be the same as that of the big data signal of the first carrier frequency band, namely, the amplitude of the big data signal of the first carrier frequency band is unified to that of the big data signal of the second carrier frequency band, the big data signal is output to one end of a resistor R40 in an adding circuit 3, and the big data signal is recombined to be transmitted to a big data signal demodulator for demodulation after being added by the adding circuit 3 and the big data signal of the first carrier frequency band which is connected with a contact 2 through a contact 1 of a relay K9;
the resistor R32 and the resistor R36 are current-limiting resistors, and the operational amplifier AR20 and the operational amplifier AR23 are used as followers and play a role in isolation.
The specific structure of the 2FSK frequency-selecting filter circuit comprises an IN pin of a frequency sensor J1 connected with an output port of a large data signal preamplifier and non-inverting input ends of an operational amplifier AR1 and an operational amplifier AR2, an inverting input end of the operational amplifier AR1 connected with an output end of an operational amplifier AR1 and a contact 1 of a relay K1, a contact 3 of a relay K1 connected with +5V of a power supply, an inverting input end of an operational amplifier AR2 connected with an output end of the operational amplifier AR2 and a contact 3 of a relay K2, a contact 1 of a relay K1 connected with ground, a GND pin of a frequency sensor J1, an anode of a voltage-stabilizing diode D1, a cathode of a voltage-stabilizing diode D1 connected with an OUT pin of a frequency sensor J1 and a non-inverting input end of the operational amplifier AR3, a VCC pin of the frequency sensor J1 connected with a power supply +12V and one end of a resistor R1, the other end of a resistor R1 connected with one end of a resistor R2 and a non-inverting input end of an output end of an operational amplifier AR 84 3, the other end of a resistor R2 connected with ground, and one end of an output end of an operational amplifier AR 8653 connected with an output end of an amplifier AR 8427, the other end of the resistor R3 is connected with the base of the triode Q1 and the base of the triode Q2, the collector of the triode Q2 is connected with the contact 2 of the relay K2, the emitter of the triode Q2 is connected with the +5V, the contact 4 of the relay K2 is connected with one end of the capacitor C2 and the inductor L2, the other end of the capacitor C2 is connected with the other end of the inductor L2 and the non-inverting input end of the operational amplifier AR5, the inverting input end of the operational amplifier AR5 is connected with one end of the resistor R5 and one end of the resistor R5, the other end of the resistor R5 is connected with the output end of the operational amplifier AR5, the base of the triode Q5 in the second carrier frequency amplitude detection circuit, the base of the triode Q5, the non-inverting input end of the operational amplifier AR5 and one end of the resistor R5, one end of the resistor R5 and the contact 1 of the relay K5 in the amplitude calibration circuit, the emitter of the triode Q5 is connected with the ground, the contact 3V, the relay K365V 3, a contact 2 of the relay K1 is connected with one end of a capacitor C1 and an inductor L1, the other end of the capacitor C1 is connected with the other end of the inductor L1 and the non-inverting input end of an operational amplifier AR4, the inverting input end of the operational amplifier AR4 is connected with one end of a resistor R4 and one end of a resistor R5, the other end of the resistor R4 is grounded, the other end of the resistor R5 is connected with the output end of the operational amplifier AR4, the base of a triode Q3 in the first carrier frequency amplitude detection circuit, the base of a triode Q6, the non-inverting input end of the operational amplifier AR6, a resistor R8, one end of a resistor R9, one end of a resistor R38 in the amplitude calibration circuit and a contact 1 of the relay K9.
The specific structure of the first carrier frequency amplitude detection circuit is that the non-inverting input end of an operational amplifier AR6 is connected with the base of a triode Q3, the base of a triode Q6, one end of a resistor R8, one end of a resistor R9, the other end of a resistor R5 in a 2FSK frequency-selecting filter circuit, the output end of an operational amplifier AR4, one end of a resistor R38 in an amplitude calibration circuit and a contact 1 of a relay K9, the inverting input end of an operational amplifier AR6 is connected with the output end of an operational amplifier AR6, a diode D2 and the anode of a diode D3, the cathode of a diode D2 is connected with a contact 4 of a relay K3, the cathode of a diode D3 is connected with one end of a capacitor C3, a contact 2 of a relay K3 and the anode of a thyristor Q5, the other end of the capacitor C5 is grounded, the collector of the triode Q5 is connected with a power supply +1.5V, the emitter of the triode Q5 is connected with the control electrode of the resistor R5 and the cathode 5 of the thyristor Q5, a contact 6 of the relay K3 is grounded, the other end of the resistor R9 is connected with one end of a resistor R10 and the inverting input end of an operational amplifier AR7, the other end of the resistor R10 is connected with the output end of the operational amplifier AR7 and the base of a triode Q7, the non-inverting input end of the operational amplifier AR7 is connected with one end of a resistor R11, the other end of the resistor R11 is grounded, the emitter of a triode Q7 is connected with +3.3V, the collector of a triode Q7 is connected with a contact 3 of a relay K5, a contact 4 of a relay K5 is grounded, a contact 1 of a relay K5 is connected with a contact 3 of the relay K4 and the cathode of a thyristor Q4, a contact 2 of the relay K4 is connected with a contact 4 of the relay K4 and the non-inverting input end of the operational amplifier AR4, a contact 2 of the relay K4 is grounded, a contact 1 of the relay K4 is connected with the collector of the relay Q4, the emitter of the triode Q4 is connected with a power supply +3.3V, the inverting input end of the relay K4, and the inverting input end of the relay AR4, the output end of the operational amplifier AR8 is connected with one end of a resistor R12, the other end of the resistor R12 is connected with the control electrode of a thyristor Q5, the inverting input end of the operational amplifier AR9 is connected with the output end of the operational amplifier AR9, one end of a capacitor C4 and one end of an inductor L3, the other end of the capacitor C4 is connected with the ground and one end of a capacitor C5, and the other end of the capacitor C5 is connected with the other end of an inductor L3 and the input port 1 of the voltage identification module.
The second carrier frequency amplitude detection circuit has the specific structure that the non-inverting input end of an operational amplifier AR24 is connected with the base of a triode Q10, the base of a triode Q12, one end of a resistor R44, one end of a resistor R45, the other end of a resistor R7 in a 2FSK frequency-selecting filter circuit, the output end of an operational amplifier AR5, one end of a resistor R34 in an amplitude calibration circuit and a contact 1 of a relay K10, the inverting input end of an operational amplifier AR24 is connected with the output end of an operational amplifier AR24, a diode D7 and the anode of a diode D8, the cathode of a diode D7 is connected with a contact 4 of a relay K11, the cathode of a diode D8 is connected with one end of a capacitor C6, a contact 2 of a relay K11 and the anode of a thyristor Q11, the other end of the capacitor C11 is grounded, the collector of the triode Q11 is connected with a power supply +1.5V, the emitter of the triode Q11 is connected with the control electrode of the resistor R11 and the cathode of the thyristor Q11, a contact 6 of the relay K11 is grounded, the other end of the resistor R45 is connected with one end of a resistor R46 and the inverting input end of an operational amplifier AR25, the other end of the resistor R46 is connected with the output end of the operational amplifier AR25 and the base of a triode Q13, the non-inverting input end of the operational amplifier AR25 is connected with one end of a resistor R47, the other end of the resistor R47 is grounded, the emitter of a triode Q13 is connected with +3.3V, the collector of a triode Q13 is connected with a contact 3 of a relay K12, a contact 4 of a relay K12 is grounded, a contact 1 of a relay K12 is connected with a contact 3 of the relay K13 and the cathode of a thyristor Q13, a contact 2 of the relay K13 is connected with a contact 4 of the relay K13 and the non-inverting input end of the operational amplifier AR13, a contact 2 of the relay K13 is grounded, a contact 1 of the relay K13 is connected with the collector of the relay Q13, the emitter of the triode Q13 is connected with a power supply +3.3V, the inverting input end of the relay K13, and the inverting input end of the relay AR13, the output end of the operational amplifier AR26 is connected with one end of a resistor R48, the other end of the resistor R48 is connected with the control electrode of a thyristor Q11, the inverting input end of the operational amplifier AR27 is connected with the output end of the operational amplifier AR27, one end of a capacitor C7 and one end of an inductor L4, the other end of the capacitor C7 is connected with the ground and one end of a capacitor C8, and the other end of the capacitor C8 is connected with the other end of an inductor L4 and the input port 2 of the voltage identification module.
The specific structure of the amplitude distortion judging circuit comprises that one end of a resistor R17 is connected with one end of a resistor R13 and an output port 1 of a voltage identification module, the other end of the resistor R17 is connected with one end of a resistor R18 and a non-inverting input end of an operational amplifier AR11, the other end of a resistor R18 is grounded, the other end of the resistor R13 is connected with one end of a resistor R14 and an inverting input end of an operational amplifier AR10, the other end of a resistor R68628 is connected with an anode of a diode D9, a non-inverting input end of an operational amplifier AR13 and an output end of an operational amplifier AR10, a cathode of a diode D4 is connected with a base of a triode Q8, an emitter of a triode Q8 is connected with a power supply +5V, a collector of a triode Q8 is connected with a contact 4 of a relay K6, an inverting input end of the operational amplifier AR13 is connected with an output end of the operational amplifier AR13 and a contact 1 of a relay K13, a contact 5 of the relay K13 is grounded with one end of the resistor R13, the other end of the resistor R13 is connected with an inverting input end of the amplifier R13, the other end of the resistor R21 is connected to one end of the resistor R23 and the inverting input end of the operational amplifier AR14, the other end of the resistor R23 is connected to the output end of the operational amplifier AR14, the contact 3 of the relay K7 and one end of the resistor R24, the other end of the resistor R24 is connected to one end of the resistor R25 and the non-inverting input end of the operational amplifier AR15, the other end of the resistor R15 is connected to +4.5V of the power supply, the inverting input end of the operational amplifier AR15 is connected to one end of the resistor R15, the other end of the resistor R15 is connected to the output end of the operational amplifier AR15 and the contact 7 of the relay K15, the contact 8 of the relay K15 is grounded, the contact 4 of the relay K15 is grounded, the contact 1 of the relay K15 is grounded, the non-inverting input end of the operational amplifier AR15 is connected to one end of the resistor R15 and one end of the non-inverting input end of the operational amplifier AR15, the resistor R15 is connected to the non-inverting input end of the amplifier AR15, the non-inverting input end of the resistor R15 and the non-inverting input end of the amplifier AR15, the other end of the resistor R20 is grounded, the inverting input end of the operational amplifier AR12 is connected with the output end of the operational amplifier AR12 and the contact 6 of the relay K7, the contact 2 of the relay K7 is connected with the non-inverting input end of the operational amplifier AR17, the contact 5 of the relay K7 is connected with the inverting input end of the operational amplifier AR17, the output end of the operational amplifier AR17 is connected with the anode of the diode D6, the cathode of the diode D6 is connected with one end of the resistor R36 in the amplitude calibration circuit, the inverting input end of the operational amplifier AR11 is connected with the output end of the operational amplifier AR11 and the contact 3 of the relay K8, the contact 1 of the relay K8 is grounded, the contact 4 of the relay K8 is grounded, the contact 8 of the relay K8 is grounded, one end of the contact 6 of the relay K8 and the contact 2 of the R8, one end of the other end of the resistor R8 is connected with the non-inverting input end of the relay K8, one end of the resistor R8 is connected with the non-inverting input end of the power supply +4.5V of the operational amplifier R8, and the inverting input end of the relay K8 is connected with the non-inverting input end of the relay K8, One end of the resistor R31 and the other end of the resistor R30 are grounded, the other end of the resistor R31 is connected with the output end of the amplifier AR16 and the contact 7 of the relay K8, the contact 2 of the relay K8 is connected with the inverting input end of the amplifier AR18, the contact 5 of the relay K8 is connected with the non-inverting input end of the amplifier AR18, the output end of the amplifier AR18 is connected with the anode of the diode D5, and the cathode of the diode D5 is connected with one end of the resistor R32 in the amplitude calibration circuit.
The specific structure of the amplitude calibration circuit comprises that one end of a resistor R32 is connected with the cathode of a diode D5 in the amplitude distortion judging circuit, the other end of a resistor R32 is connected with a contact 4 of a relay K9, a contact 5 of a relay K9 is grounded, a contact 1 of a relay K9 is connected with one end of a resistor R38, the other end of a resistor R5 and the output end of an operational amplifier AR4 in the 2FSK frequency-selective filter circuit, the base of a triode Q3, the base of a triode Q6, the non-inverting input end of an operational amplifier AR6 and one end of a resistor R8 and a resistor R9 in the first carrier frequency amplitude detection circuit, a contact 2 of a relay K9 is connected with the non-inverting input end of an operational amplifier AR23, the inverting input end of an operational AR23 is connected with the output end of an operational amplifier AR23, one end of a resistor R41 and the output pin of an analog multiplier A2, a contact 3 of a relay K9 is connected with the X pin of an analog multiplier A2 and the X pin of an analog multiplier A1, a Y1 of an analog multiplier A2 is connected with the output end of an analog multiplier 19, the OUT pin of the analog multiplier A1 is connected with one end of a resistor R33, the other end of the resistor R33 is connected with one end of a resistor R34 and the inverting input end of an operational amplifier AR19, the non-inverting input end of the operational amplifier AR19 is connected with one end of a resistor R35, the other end of a resistor R35 is grounded, the other end of a resistor R34 is connected with the contact 1 of a relay K10, the other end of the resistor R7 and the output end of the operational amplifier AR5 in the 2FSK frequency-selective filter circuit, the base of a transistor Q10 in the second carrier frequency amplitude detection circuit, the base of a transistor Q12, the non-inverting input end of the operational amplifier AR24 and one end of a resistor R44, the contact 4 of the relay K44 is connected with the other end of the resistor R44, one end of the resistor R44 is connected with the cathode of a diode D44 in the amplitude distortion judgment circuit, the contact 5 of the relay K44 is grounded, the contact 3 of the relay K44 is connected with the X pin of the analog multiplier A44 and the Y pin of the analog multiplier A44 and the output end of the operational amplifier AR 44, the Y pin of the analog multiplier A3 is connected with the Y pin of the analog multiplier A4 and the output end of the operational amplifier AR21, the OUT pin of the analog multiplier A3 is connected with one end of a resistor R37, the non-inverting input end of the operational amplifier AR21 is connected with one end of a resistor R39, the other end of the resistor R39 is grounded, the inverting input end of the operational amplifier AR21 is connected with the other ends of a resistor R37 and a resistor R38, the contact 2 of the relay K10 is connected with the non-inverting input end of the operational amplifier AR20, the inverting input end of the operational amplifier AR20 is connected with the output end of the operational amplifier AR20 and one end of the OUT pin of the analog multiplier A4 and one end of a resistor R40, the other end of the resistor R40 is connected with the other end of a resistor R41 and the non-inverting input end of the operational amplifier AR22, the inverting input end of the operational amplifier AR22 is connected with one end of a resistor R42 and one end of a resistor R43, the other end of the resistor R42 is grounded, and the other end of the resistor R43 is connected with the output end of the operational amplifier R22 and the input port of the demodulator.
When the invention is used, the big data signal receiver receives a big data signal transmitted by a big data signal transmitter and transmits the big data signal to the big data signal preamplifier, the big data signal preamplifier amplifies the big data signal and transmits the amplified big data signal to the 2FSK frequency-selecting filter circuit, the 2FSK frequency-selecting filter circuit samples the frequency of the big data signal by using the frequency transmitter J1, converts the frequency of the big data signal into direct-current voltage and compares the direct-current voltage with the voltage division value of the resistors R1-R2, when the operational amplifier AR3 outputs positive voltage, the big data signal is transmitted to the first carrier frequency-selecting filter circuit consisting of the capacitor C1, the inductor L1, the operational amplifier AR4 and the resistors R4-R5, and when the operational amplifier AR3 outputs negative voltage by using the LC parallel resonance principle, only through the big data signal of the first carrier frequency band, the interference signal outside the central frequency of the big data signal of the first carrier frequency band is inhibited, the large data signal is transmitted to a second carrier frequency selection filter circuit consisting of a capacitor C2, an inductor L2, an operational amplifier AR5 and a resistor R6-R7, and an LC parallel resonance principle is applied, so that interference signals outside the center frequency of the large data signal of the second carrier frequency band are suppressed only through the large data signal of the second carrier frequency band; the first carrier frequency amplitude detection circuit charges a capacitor C3 to a peak value by using a large data signal output by the first carrier frequency selection filter circuit, a silicon controlled rectifier Q5 is conducted, a relay K4 is conducted in the negative half cycle of the large data signal, a relay K5 is conducted in the positive half cycle of the large data signal, and a voltage is output to a voltage identification module on a capacitor C3; the voltage identification module continuously outputs direct-current voltage with the same voltage value as that on the capacitor C3 to the amplitude distortion judgment circuit from an output port 1 of the voltage identification module according to the amplitude voltage of the large data signal of the first carrier frequency band output by the first carrier frequency amplitude detection circuit in real time; the voltage identification module continuously outputs direct-current voltage with the same voltage value as that on the capacitor C6 to the amplitude distortion judgment circuit from an output port 2 of the voltage identification module according to the amplitude voltage of the large data signal of the second carrier frequency band output by the second carrier frequency amplitude detection circuit in real time;
the amplitude distortion judging circuit applies the operational amplifier AR10 to perform differential operation on the amplitude voltage of the first carrier frequency band big data signal and the amplitude voltage of the second carrier frequency band big data signal output by two different ports of the voltage identification module, and simultaneously, the amplitude voltage of the first carrier frequency band big data signal output by the output port 1 of the voltage identification module is attenuated to the original amplitude voltage of the first carrier frequency band big data signal by the attenuation circuit 1 consisting of resistors R17-R18
Figure BDA0003212770130000171
The amplitude voltage of the second carrier frequency band big data signal output by the output port 2 of the voltage identification module is attenuated to the original amplitude voltage of the second carrier frequency band big data signal through the attenuation circuit 2 consisting of the resistors R19-R20
Figure BDA0003212770130000172
If the output of the operational amplifier AR10 is a positive level, the operational amplifier AR18 is used to compare the difference with the resistors R17-R18, if the output of the operational amplifier AR10 is a negative level, the operational amplifier AR14 is used to invert the phase of the difference, then the operational amplifier AR17 is used to compare with the resistors R19-R20, when the operational amplifier AR18 outputs a positive level, the amplitude calibration circuit amplifies and calibrates the large data signal output by the first carrier frequency selective filter circuit to be consistent with the large data signal amplitude of the second carrier frequency band and outputs the amplified large data signal, and when the output of the operational amplifier AR17 is a positive level, the amplitude calibration circuit amplifies and calibrates the large data signal output by the second carrier frequency selective filter circuit to be consistent with the large data signal amplitude of the first carrier frequency band and outputs the amplified large data signal amplitude.
While the invention has been described in further detail with reference to specific embodiments thereof, it is not intended that the invention be limited to the specific embodiments thereof; for those skilled in the art to which the present invention pertains and related technologies, the extension, operation method and data replacement should fall within the protection scope of the present invention based on the technical solution of the present invention.

Claims (6)

1. A big data signal calibration system comprises a big data signal transmitter, a big data signal receiver, a big data signal preamplifier, an amplitude detection calibration module and a big data signal demodulator, and is characterized in that the amplitude detection calibration module comprises a 2FSK frequency-selecting filter circuit, a first carrier frequency amplitude detection circuit, a second carrier frequency amplitude detection circuit, a voltage identification module, an amplitude distortion judgment circuit and an amplitude calibration circuit;
the big data signal receiver receives a big data signal transmitted by a big data signal transmitter and transmits the big data signal to a big data signal preamplifier, the big data signal preamplifier amplifies the big data signal and transmits the big data signal to a 2FSK frequency-selecting filter circuit, the 2FSK frequency-selecting filter circuit samples the frequency of the big data signal by using a frequency transmitter J1, the frequency is converted into direct-current voltage and then is compared with the voltage division value of a resistor R1-R2, when an operational amplifier AR3 outputs positive voltage, the big data signal is output through a frequency-selecting network 1 consisting of a capacitor C1 and an inductor L1, when an operational amplifier AR3 outputs negative voltage, the big data signal is output through a frequency-selecting network 2 consisting of a capacitor C2 and an inductor L2, the first carrier frequency amplitude detection circuit charges a capacitor C3 to a peak value by using the big data signal output by the frequency-selecting network 1, a silicon controlled rectifier Q5 is conducted, and a relay K4 is conducted in the negative half cycle of the big data signal, similarly, the second carrier frequency amplitude detection circuit outputs a voltage on a capacitor C6 to the voltage identification module, the voltage identification module continuously outputs a dc voltage with the same value as the voltage on the capacitor C3 from an output port 1 of the voltage identification module to the amplitude distortion judgment circuit according to the received voltage on the capacitor C3, continuously outputs a dc voltage with the same value as the voltage on the capacitor C6 from an output port 2 of the voltage identification module to the amplitude distortion judgment circuit according to the received voltage on the capacitor C6, the amplitude distortion judgment circuit performs differential operation on the voltages output by two different ports of the voltage identification module by using an operational amplifier AR10, if the obtained difference is a positive level, the operational amplifier AR18 is used to compare the difference with resistors R17-R18, and if the obtained difference is a negative level, then the phase of the data signal is inverted by an operational amplifier AR14, and then compared with resistors R19-R20 by an operational amplifier AR17, when the operational amplifier AR18 outputs a positive voltage, the amplitude calibration circuit amplifies and outputs the large data signal output by the frequency selection network 1, and when the output of the operational amplifier AR17 is a positive voltage, the amplitude calibration circuit amplifies and outputs the large data signal output by the frequency selection network 2.
2. The large data signal calibration system as claimed IN claim 1, wherein the 2FSK frequency-selective filter circuit comprises a frequency sensor J1 of type WBF124U01, an IN pin of the frequency sensor J1 is connected to an output port of the large data signal preamplifier and to a non-inverting input port of an operational amplifier AR1 and an non-inverting input port of the operational amplifier AR2, an inverting input port of the operational amplifier AR1 is connected to an output port of the operational amplifier AR1 and a contact 1 of a relay K1, a contact 3 of the relay K1 is connected to the power supply +5V, an inverting input port of the operational amplifier AR2 is connected to an output port of the operational amplifier AR2 and a contact 3 of a relay K2, a contact 1 of the relay K1 is connected to the GND pin of the frequency sensor J1, an anode of a zener diode D1, a cathode of the zener diode D1 is connected to an OUT pin of the frequency sensor J1 and a non-inverting input port of the operational amplifier AR3, a VCC pin of the frequency sensor J1 is connected to a terminal of the VCC power supply +12V and a terminal of a resistor R1, and a non-inverting input terminal of the resistor R1 is connected to a non-inverting input terminal of the operational amplifier 3, the other end of the resistor R2 is grounded, the output end of the operational amplifier AR3 is connected with one end of the resistor R3, the other end of the resistor R3 is connected with the base of the triode Q1 and the base of the triode Q2, the collector of the triode Q2 is connected with the contact 2 of the relay K2, the emitter of the triode Q2 is connected with +5V, the contact 4 of the relay K2 is connected with one end of the capacitor C2 and the inductor L2, the other end of the capacitor C2 is connected with the other end of the inductor L2 and the non-inverting input end of the operational amplifier AR2, the inverting input end of the operational amplifier AR2 is connected with one end of the resistor R2 and the resistor R2, the other end of the resistor R2 is grounded, the other end of the resistor R2 is connected with the output end of the operational amplifier AR2, the base of the triode Q2 in the second carrier frequency amplitude detection circuit, the base of the triode Q2, the base of the transistor Q2, the non-inverting input end of the operational amplifier AR2, the non-inverting input end of the resistor R2 and the resistor R2, one end of the resistor R2 in the amplitude calibration circuit, the emitter of the transistor R2 and the contact 1 of the transistor K2 are grounded, the collector of the triode Q1 is connected with a contact 4 of a relay K1, a contact 3 of a relay K1 is connected with +5V of a power supply, a contact 2 of the relay K1 is connected with one end of a capacitor C1 and one end of an inductor L1, the other end of the capacitor C1 is connected with the other end of the inductor L1 and the non-inverting input end of an operational amplifier AR4, the inverting input end of the operational amplifier AR4 is connected with one end of a resistor R4 and one end of a resistor R5, the other end of the resistor R4 is grounded, the other end of the resistor R5 is connected with the output end of the operational amplifier AR4, the base of the triode Q3 in the first carrier frequency amplitude detection circuit, the base of the triode Q6, the non-inverting input end of the operational amplifier AR6 and the resistor R8, one end of a resistor R9, one end of a resistor R38 in the amplitude calibration circuit and a contact 1 of the relay K9.
3. The system as claimed in claim 1, wherein the first carrier frequency amplitude detection circuit comprises an operational amplifier AR6, a non-inverting input terminal of the operational amplifier AR6 is connected to a base of a transistor Q3, a base of a transistor Q6, one terminal of a resistor R8, one terminal of a resistor R9, the other terminal of a resistor R5 and an output terminal of an operational amplifier AR4 in the 2FSK frequency selective filter circuit, one terminal of a resistor R38 and a contact 1 of a relay K9 in the amplitude calibration circuit, an inverting input terminal of the operational amplifier AR6 is connected to an output terminal of an operational amplifier AR6 and an anode of a diode D2 and a diode D3, a cathode of the diode D2 is connected to a contact 4 of a relay K3, a cathode of the diode D3 is connected to one terminal of a capacitor C3, a contact 2 of a K3 and an anode of a thyristor Q5, the other terminal of the capacitor C3 is grounded, a collector of the transistor Q3 is connected to a +1.5V, and the other terminal of an emitter of a resistor Q3 is connected to a thyristor Q4 and a control terminal of a thyristor Q4, the anode of the thyristor Q4 is connected with +3.3V, the cathode of the thyristor Q4 is connected with the contact 5 of the relay K3, the contact 6 of the relay K3 is grounded, the other end of the resistor R9 is connected with one end of the resistor R10 and the inverting input end of the operational amplifier AR7, the other end of the resistor R10 is connected with the output end of the operational amplifier AR7 and the base of the triode Q7, the non-inverting input end of the operational amplifier AR7 is connected with one end of the resistor R11, the other end of the resistor R11 is grounded, the emitter of the triode Q7 is connected with +3.3V, the collector of the triode Q7 is connected with the contact 3 of the relay K5, the contact 4 of the relay K5 is grounded, the contact 1 of the relay K5 is connected with the contact 3 of the relay K4 and the cathode of the thyristor Q4, the contact 2 of the relay K4 is connected with the contact 4 of the relay K4 and the non-inverting input end of the relay K4, the emitter of the triode Q4 is connected with the power supply V3, a contact 3 of the relay K3 is connected with an inverting input end of the amplifier AR8, a contact 1 of the relay K3 is connected with an non-inverting input end of the amplifier AR8, an output end of the amplifier AR8 is connected with one end of a resistor R12, the other end of the resistor R12 is connected with a control electrode of a thyristor Q5, an inverting input end of the amplifier AR9 is connected with an output end of the amplifier AR9, one end of a capacitor C4 and one end of an inductor L3, the other end of the capacitor C4 is grounded and one end of a capacitor C5, and the other end of the capacitor C5 is connected with the other end of the inductor L3 and the input port 1 of the voltage identification module.
4. The system as claimed in claim 1, wherein the second carrier frequency amplitude detection circuit comprises an operational amplifier AR24, a non-inverting input terminal of the operational amplifier AR24 is connected to a base of a transistor Q10, a base of a transistor Q12, one terminal of a resistor R44, one terminal of a resistor R45, the other terminal of a resistor R7 and an output terminal of an operational amplifier AR5 in the 2FSK frequency selective filter circuit, one terminal of a resistor R34 and a contact 1 of a relay K10 in the amplitude calibration circuit, an inverting input terminal of the operational amplifier AR24 is connected to an output terminal of an operational amplifier AR24 and an anode of a diode D7 and a diode D8, a cathode of the diode D7 is connected to a contact 4 of a relay K11, a cathode of the diode D8 is connected to one terminal of a capacitor C6, a contact 2 of a K11 and an anode of a thyristor Q11, the other terminal of the capacitor C6 is grounded, a collector of the transistor Q10 is connected to a +1.5V, and the other terminal of an emitter of a resistor Q10 is connected to a thyristor Q9 and a control terminal of a thyristor Q9, the anode of the thyristor Q9 is connected with +3.3V, the cathode of the thyristor Q9 is connected with the contact 5 of the relay K11, the contact 6 of the relay K11 is grounded, the other end of the resistor R45 is connected with one end of the resistor R46 and the inverting input end of the operational amplifier AR25, the other end of the resistor R46 is connected with the output end of the operational amplifier AR25 and the base of the triode Q13, the non-inverting input end of the operational amplifier AR25 is connected with one end of the resistor R47, the other end of the resistor R47 is grounded, the emitter of the triode Q13 is connected with +3.3V, the collector of the triode Q13 is connected with the contact 3 of the relay K12, the contact 4 of the relay K12 is grounded, the contact 1 of the relay K12 is connected with the contact 3 of the relay K13 and the cathode of the thyristor Q13, the contact 2 of the relay K13 is connected with the contact 4 of the relay K13 and the non-inverting input end of the relay K13, the emitter of the triode Q13 is connected with the power supply V3, a contact 3 of the relay K11 is connected with an inverting input end of the amplifier AR26, a contact 1 of the relay K11 is connected with an non-inverting input end of the amplifier AR26, an output end of the amplifier AR26 is connected with one end of a resistor R48, the other end of the resistor R48 is connected with a control electrode of a thyristor Q11, an inverting input end of the amplifier AR27 is connected with an output end of the amplifier AR27, one end of a capacitor C7 and one end of an inductor L4, the other end of the capacitor C7 is grounded and one end of a capacitor C8, and the other end of the capacitor C8 is connected with the other end of the inductor L4 and the input port 2 of the voltage identification module.
5. The big data signal calibration system as claimed in claim 1, wherein the amplitude distortion determination circuit comprises a resistor R17, a terminal of the resistor R17 is connected to one terminal of the resistor R13 and the output port 1 of the voltage identification module, another terminal of the resistor R17 is connected to one terminal of the resistor R18 and the non-inverting input terminal of the operational amplifier AR11, another terminal of the resistor R18 is connected to ground, another terminal of the resistor R13 is connected to one terminal of the resistor R14 and the inverting input terminal of the operational amplifier AR10, another terminal of the resistor R14 is connected to the anode of the diode D4, the non-inverting input terminal of the operational amplifier AR13 and the output terminal of the operational amplifier AR10, the cathode of the diode D4 is connected to the base of the transistor Q8, the emitter of the transistor Q8 is connected to the power supply +5V, the collector of the transistor Q8 is connected to the contact 4 of the relay K6, the inverting input terminal of the operational amplifier 13 is connected to the output terminal of the operational amplifier AR13 and the contact 1 of the relay K828456, the contact 5 is connected to ground and the contact 5 of the relay 22, the other end of the resistor R22 is connected with a non-inverting input end of the amplifier AR14, a contact 3 of the relay K6 is connected with one end of a resistor R21, the other end of the resistor R21 is connected with one end of a resistor R23 and an inverting input end of an amplifier AR14, the other end of the resistor R23 is connected with an output end of an amplifier AR14, a contact 3 of the relay K7 and one end of a resistor R24, the other end of the resistor R24 is connected with one end of a resistor R25 and a non-inverting input end of the amplifier AR25, the other end of the resistor R25 is connected with a power supply +4.5V, the inverting input end of the amplifier AR25 is connected with one end of the resistor R25 and one end of the resistor R25, the other end of the resistor R25 is connected with ground, the other end of the resistor R25 is connected with an output end of the amplifier AR25 and a contact 7 of the relay K25, a contact 8 of the relay K25 is connected with ground, a contact 4 of the relay K25 is connected with ground, a contact 1 of the relay K25 is connected with ground, the non-inverting input end of the amplifier AR25 of the relay R25, the relay K25 is connected with the non-inverting input end of the relay R25, the relay R25 is connected with a non-inverting input end of the relay R25, the amplifier R25 is connected with a ground, the relay, the other end of the resistor R16 is connected with one end of a resistor R19 and an output port 2 of the voltage identification module, the other end of the resistor R19 is connected with one end of a resistor R20 and a non-inverting input end of an operational amplifier AR12, the other end of the resistor R20 is grounded, an inverting input end of the operational amplifier AR12 is connected with an output end of the operational amplifier AR12 and a contact 6 of a relay K7, a contact 2 of a relay K7 is connected with a non-inverting input end of the operational amplifier AR17, a contact 5 of the relay K7 is connected with an inverting input end of the operational amplifier AR17, an output end of the operational amplifier AR9 is connected with an anode of a diode D6, a cathode of a diode D6 is connected with one end of a resistor R36 in the amplitude calibration circuit, an inverting input end of the operational amplifier AR11 is connected with an output end of the operational amplifier AR11 and a contact 3 of a relay K8, a contact 1 of the relay K8 is grounded, a contact 4 of the relay K8 is grounded, a contact 8 of the relay K8 is connected with a contact 6 of the relay K8, the other end of the resistor R28 is connected with one end of a resistor R29 and the non-inverting input end of an operational amplifier AR15, one end of the resistor R29 is connected with +4.5V of a power supply, the inverting input end of the operational amplifier AR15 is connected with one end of a resistor R30 and one end of a resistor R31, the other end of the resistor R30 is grounded, the other end of the resistor R31 is connected with the output end of an operational amplifier AR16 and a contact 7 of a relay K8, a contact 2 of the relay K8 is connected with the inverting input end of the operational amplifier AR18, a contact 5 of the relay K8 is connected with the non-inverting input end of the operational amplifier AR18, the output end of the operational amplifier AR18 is connected with the anode of a diode D5, and the cathode of the diode D5 is connected with one end of a resistor R32 in the amplitude calibration circuit.
6. The large data signal calibration system as claimed in claim 1, wherein the amplitude calibration circuit comprises a resistor R32, one end of the resistor R32 is connected to the cathode of the diode D5 in the amplitude distortion determination circuit, the other end of the resistor R32 is connected to the contact 4 of the relay K9, the contact 5 of the relay K9 is grounded, the contact 1 of the relay K9 is connected to one end of the resistor R38, the other end of the resistor R5 and the output end of the operational amplifier AR4 in the 2FSK frequency selective filter circuit, the base of the transistor Q3, the base of the transistor Q6, the non-inverting input end of the operational amplifier AR6 and one end of the resistors R8 and R9 in the first carrier frequency amplitude detection circuit, the contact 2 of the relay K9 is connected to the non-inverting input end of the operational amplifier AR23, the inverting input end of the operational amplifier AR23 is connected to the output end of the operational amplifier Q23, one end of the resistor R41 and the OUT pin of the analog multiplier a2, the contact 3 of the relay K9 is connected to the analog multiplier a X pin of the analog multiplier a2 and the X pin of the analog multiplier a1, a Y pin of the analog multiplier A2 is connected with a Y pin of the analog multiplier A1 and an output end of the operational amplifier AR19, an OUT pin of the analog multiplier A1 is connected with one end of a resistor R33, the other end of the resistor R33 is connected with one end of a resistor R34 and an inverting input end of the operational amplifier AR19, a non-inverting input end of the operational amplifier AR19 is connected with one end of a resistor R35, the other end of a resistor R35 is grounded, the other end of a resistor R34 is connected with a contact 1 of a relay K10, the other end of a resistor R7 and an output end of the operational amplifier AR5 in the 2FSK frequency selective filter circuit, a base of a transistor Q10 in the second carrier frequency amplitude detection circuit, a base of the transistor Q10, a non-inverting input end of the transistor Q10, one end of the resistor R10, a contact 4 of the relay K10 is connected with the other end of the resistor R10, one end of the resistor R10 is connected with a cathode of a diode D10 in the amplitude distortion judgment circuit, a contact 5 of the analog multiplier K10 is grounded, a contact A pin of the relay K10 and an analog multiplier A pin of the multiplier A10 and an analog multiplier A pin 10, the Y pin of the analog multiplier A2 is connected with the Y pin of the analog multiplier A1 and the output end of the operational amplifier AR19, the Y pin of the analog multiplier A3 is connected with the Y pin of the analog multiplier A4 and the output end of the operational amplifier AR21, the OUT pin of the analog multiplier A3 is connected with one end of a resistor R37, the non-inverting input end of the operational amplifier AR21 is connected with one end of the resistor R39, the other end of the resistor R39 is grounded, the inverting input end of the operational amplifier AR21 is connected with the other ends of the resistor R37 and the resistor R38, the contact 2 of the relay K10 is connected with the non-inverting input end of the operational amplifier AR20, the inverting input end of the operational amplifier AR20 is connected with the output end of the operational amplifier AR20 and the OUT pin of the analog multiplier A4 and one end of the resistor R40, the other end of the resistor R40 is connected with the other end of the non-inverting input end of the resistor R41 and the non-inverting input end of the operational amplifier AR22, the inverting input end of the operational amplifier AR22 is connected with the resistor R42, one end of the resistor R43, the other end of the resistor R42 are grounded, and the other end of the resistor R43 is connected with the output end of the amplifier AR22 and the input port of the large data signal demodulator.
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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110445477A (en) * 2019-08-30 2019-11-12 郑州工程技术学院 A kind of data-signal distortion adjusting circuit
CN112104329A (en) * 2020-09-22 2020-12-18 唐有钢 Thing networking data security signal calibration system
CN112880748A (en) * 2021-03-16 2021-06-01 海南科技职业大学 Water environment monitoring device based on Internet of things
CN113125843A (en) * 2021-04-20 2021-07-16 郑州铁路职业技术学院 Railway communication signal calibration system

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110445477A (en) * 2019-08-30 2019-11-12 郑州工程技术学院 A kind of data-signal distortion adjusting circuit
CN112104329A (en) * 2020-09-22 2020-12-18 唐有钢 Thing networking data security signal calibration system
CN112880748A (en) * 2021-03-16 2021-06-01 海南科技职业大学 Water environment monitoring device based on Internet of things
CN113125843A (en) * 2021-04-20 2021-07-16 郑州铁路职业技术学院 Railway communication signal calibration system

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