CN113644919B - Method for improving Turbo decoding performance in DVB-RCS2 and decoding structure - Google Patents
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Abstract
The invention provides a method for improving Turbo decoding performance in DVB-RCS2 and a decoding structure, wherein the method adopts a dual binary Turbo decoding structure to decode a sequence to be decoded; the dual binary Turbo decoding structure comprises a SISO decoding core I and a SISO decoding core II based on a Max-log-MAP algorithm, a weighting table I and a weighting table II corresponding to the SISO decoding core I and the SISO decoding core II, a scrambling module I, a scrambling module II, a descrambling module I, a descrambling module II and a hard decision module based on the DVB-RCS2 standard. Compared with the traditional Max-Log-MAP algorithm, the method has the advantage that the decoding performance can be improved by 0.2-0.4 dB, so that the method can better compensate the degradation of the decoding performance of the Max-Log-MAP algorithm caused by approximate loss.
Description
Technical Field
The invention relates to the technical field of communication, in particular to a method for improving Turbo decoding performance in DVB-RCS2 and a decoding structure.
Background
The DVB-RCS2 is the latest standard of ETSI about satellite communication, and compared with the DVB-RCS of the previous generation, the new standard adopts a 16-state double binary Turbo code with better performance as the FEC code pattern of the physical layer. Compared with the traditional binary Turbo code, the binary Turbo code has the following advantages: (1) Two bits of codes are completed by one clock, so that the coding efficiency is higher; (2) the interleaving depth is halved, and the decoding delay is smaller; (3) lower error floor. Due to its excellent performance, the dual binary Turbo code has been widely used in wireless communication systems.
The classical Turbo decoding algorithm is mainly a Soft Output Viterbi (SOVA) algorithm and a maximum a posteriori probability (MAP) algorithm, and the latter algorithm gradually becomes an algorithm commonly adopted by a Turbo decoder due to better decoding performance. However, the algorithm involves a large number of exponentiation operations and multiplication operations, and has high complexity in hardware implementation, and becomes a significant short-circuit. To reduce the complexity of the operation, the modified log-MAP algorithm converts the operation into a log domain, converting the multiplication operation into an addition operation. The Max-Log-MAP algorithm further simplifies the Log-MAP, and the exponential operation is approximately equivalent to the comparison selection operation. To this end, the operation is reduced to involve only basic add-compare-select (ACS) units. But the Max-Log-MAP algorithm decoding performance deteriorates by 0.4 to 0.6dB due to the approximate loss. In order to reduce the approximate loss, J.Vogt and A.finger propose a fixed correction of the external information in Improving the Max-Log-MAP Turbo decoder, but only gain of about 0.1-0.2 dB can be obtained.
Disclosure of Invention
The invention aims to provide a method and a decoding structure for improving the Turbo decoding performance in DVB-RCS2 so as to better compensate the degradation of the decoding performance of a Max-Log-MAP algorithm caused by approximate loss.
The method for improving the Turbo decoding performance in DVB-RCS2 provided by the invention is to decode a sequence to be decoded by adopting a dual binary Turbo decoding structure; the dual binary Turbo decoding structure comprises a SISO decoding core I and a SISO decoding core II based on a Max-log-MAP algorithm, a weighting table I and a weighting table II corresponding to the SISO decoding core I and the SISO decoding core II, a scrambling module I, a scrambling module II, a descrambling module I, a descrambling module II and a hard decision module based on DVB-RCS2 standard;
the method comprises the following steps:
step S1, in the ith iterative decoding, the system bit soft information in the sequence to be decoded is decodedAnd->First check bit soft information->And->Prior probability->Input to SISO decoding coreCalculating to obtain the external probabilityAnd posterior probability->The sequence to be coded is u k =z, z e {00,01,10,11} represents the bits of the sequence to be decoded;
step S2, the external probability obtained in the step S1 is calculatedScrambling is carried out through a scrambling module I, and the scrambled external probability outputted by the scrambling module I is +.>Weight value of the output of the weighting table II>Multiplying to obtain the prior probability ++of SISO decoding kernel two>Wherein the weight->The method is obtained by checking a weighting table II through the RCS2 waveform ID number and the current iteration number i;
step S3, the system bit soft information in the sequence to be decodedAnd->Scrambling is carried out through a scrambling module II, and the output of the scrambling module II and second check bit soft information are added>And->And the prior probability obtained in step S2 +.>Inputting SISO decoding kernel two, calculating to obtain outer probability +.>And posterior probability->
Step S4, the external probability obtained in the step S3 is calculatedAnd posterior probability L (z) (u k ) Descrambling is carried out through a first descrambling module and a second descrambling module respectively, and the unscrambled external probability outputted by the first descrambling module is used>Weight value of output of weighting table>Multiplying to obtain the prior probability of SISO decoding kernel I>Wherein the weight->The method is obtained by checking a weighting table I through the RCS2 waveform ID number and the current iteration number i;
step S5, repeating the steps S1 to S4, and executing the step S6 when the iterative decoding times reach the set maximum iterative times;
step S6, the posterior probability L after the second descrambling by the descrambling module in the step S4 is calculated (z) (u k ) Input into hard decision module, after calculation by hard decision algorithm, output the bit of decoding result
Furthermore, the SISO decoding core I and the SISO decoding core II based on the Max-log-MAP algorithm have the same structure and each comprise a branch metric calculation module, a forward metric calculation module, a backward metric calculation module, a posterior probability calculation module and an external probability calculation module.
Further, in step S1, the SISO decoding core calculates an outer probabilityAnd posterior probability L (z) (u k ) The method of (2) comprises the following substeps:
step S11, the branch metric calculation module uses the systematic bit soft informationAnd->First check bit soft informationAnd->Prior probability->Calculating branch metric value for register state transition from s' to s->The calculation formula is as follows:
wherein:
is the symbol of the systematic bit map of the sequence to be decoded, < >>
Is the sign of the check bit map of the sequence to be decoded, < >>
k represents the sequence u to be decoded k N represents the sequence u to be decoded at the kth encoding time of (a) k Is a number of codes;
step S12, the forward metric calculation module uses the branch metric valuesCalculating a forward metric α k The calculation formula is as follows:
forward metric alpha k Initial value of (1)The method comprises the following steps:
step S13, the backward metric calculation module uses the branch metric valueCalculating a backward metric beta k The calculation formula is as follows:
backward metric beta k Initial value of (1)The method comprises the following steps:
step S14, the posterior probability calculation module uses the branch metricForward metric alpha k And backward metric beta k Calculating posterior probability L (z) (u k ) The calculation formula is as follows:
step S15, the extrinsic probability calculation module uses the posterior probability L (z) (u k ) Soft information of systematic bitsAnd->Calculating the probability +.>The calculation formula is as follows:
further, in step S1, at the time of iterative decoding 1 st time, the prior probabilityThe initial value is 0.
Further, the calculation formula of the hard decision algorithm in step S6 is as follows:
in the method, in the process of the invention,and a bit representing a decoding result of the sequence to be decoded, and z represents a bit of the sequence to be decoded.
Further, the weighting table one and the weighting table two have different weights when the same RCS2 waveform ID and iteration number.
The invention also provides a decoding structure for improving the Turbo decoding performance in DVB-RCS2, wherein the decoding structure is a dual binary Turbo decoding structure; the dual binary Turbo decoding structure comprises a SISO decoding core I and a SISO decoding core II based on a Max-log-MAP algorithm, a weighting table I and a weighting table II corresponding to the SISO decoding core I and the SISO decoding core II, a scrambling module I, a scrambling module II, a descrambling module I, a descrambling module II and a hard decision module based on DVB-RCS2 standard;
the output end of the SISO decoding core I is connected with the input end of the SISO decoding core II through a scrambling module and a multiplier connection; the output end of the SISO decoding core II is connected with the input end of the SISO decoding core I through the descrambling module I and the multiplier II on the one hand, and is connected with the hard decision module through the descrambling module II on the other hand; the input end of the SISO decoding core II is also connected with a scrambling module II; the first multiplier is also connected with the second weighting table, and the second multiplier is also connected with the first weighting table.
Furthermore, the SISO decoding core I and the SISO decoding core II based on the Max-log-MAP algorithm have the same structure and each comprise a branch metric calculation module, a forward metric calculation module, a backward metric calculation module, a posterior probability calculation module and an external probability calculation module; the branch measurement calculation module is respectively connected with the forward measurement calculation module and the posterior probability calculation module; the forward measurement calculation module is respectively connected with the backward measurement calculation module and the posterior probability calculation module; the backward measurement calculation module is connected with the posterior probability calculation module; the posterior probability calculation module is connected with the external probability calculation module.
In summary, due to the adoption of the technical scheme, the beneficial effects of the invention are as follows:
compared with the traditional Max-Log-MAP algorithm, the method has the advantage that the decoding performance can be improved by 0.2-0.4 dB, so that the method can better compensate the degradation of the decoding performance of the Max-Log-MAP algorithm caused by approximate loss.
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In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the following description will briefly describe the drawings in the embodiments, it being understood that the following drawings only illustrate some embodiments of the present invention and should not be considered as limiting the scope, and that other related drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a schematic diagram of a method for improving Turbo decoding performance in DVB-RCS2 according to the present invention.
Fig. 2 is a schematic diagram of SISO decoding core one and SISO decoding core two based on Max-log-MAP algorithm according to the present invention.
Detailed Description
For the purpose of making the objects, technical solutions and advantages of the embodiments of the present invention more apparent, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention, and it is apparent that the described embodiments are some embodiments of the present invention, but not all embodiments of the present invention. The components of the embodiments of the present invention generally described and illustrated in the figures herein may be arranged and designed in a wide variety of different configurations.
Thus, the following detailed description of the embodiments of the invention, as presented in the figures, is not intended to limit the scope of the invention, as claimed, but is merely representative of selected embodiments of the invention. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
Example 1
The embodiment provides a method for improving the Turbo decoding performance in DVB-RCS2, which adopts a dual binary Turbo decoding structure to decode a sequence to be decoded; as shown in fig. 1, the dual binary Turbo decoding structure includes a SISO decoding core one and a SISO decoding core two based on a Max-log-MAP algorithm, a weighting table one and a weighting table two corresponding to the SISO decoding core one and the SISO decoding core two, a scrambling module one, a scrambling module two, a descrambling module one and a descrambling module two based on a DVB-RCS2 standard, and a hard decision module;
the method comprises the following steps:
step S1, in the ith iterative decoding, the system bit soft information in the sequence to be decoded is decodedAnd->First check bit soft information->And->Prior probability->Inputting the probability information into SISO decoding kernel I, and calculating to obtain external probabilityAnd posterior probability L (z) (u k ) The method comprises the steps of carrying out a first treatment on the surface of the The sequence to be coded is u k When =z, z∈ {00,01,10,11} represents the sequence u to be decoded k And, at the 1 st iteration decoding, a priori probability ++>The initial value is 0.
As shown in fig. 2, the SISO coding core based on the Max-log-MAP algorithm includes a branch metric calculation module, a forward metric calculation module, a backward metric calculation module, a posterior probability calculation module and an outer probability calculation module. Thus, in step S1, the SISO decoding core calculates the outer probabilityAnd posterior probability L (z) (u k ) The method of (2) comprises the following substeps:
step S11, the branch metric calculation module uses the systematic bit soft informationAnd->First check bit soft informationAnd->Prior probability->Calculating branch metric value for register state transition from s' to s->The calculation formula is as follows:
wherein:
is the system of the sequences to be decodedSymbol of systematic bit map,/>
Is the sign of the check bit map of the sequence to be decoded, < >>
k represents the sequence u to be decoded k N represents the sequence u to be decoded at the kth encoding time of (a) k Is a number of codes;
step S12, the forward metric calculation module uses the branch metric valuesCalculating a forward metric α k The calculation formula is as follows:
forward metric alpha k Initial value of (1)The method comprises the following steps:
step S13, the backward metric calculation module uses the branch metric valueCalculating a backward metric beta k The calculation formula is as follows:
backward metric beta k Initial value of (1)The method comprises the following steps:
it can be seen that the present invention is applied to the sequence u to be decoded with the number of codes of N k The (n+1) th forward metric and the (1) st backward metric are added and combined, and the combined value is transferred to the decoder for the next iterative decoding as the initial values of the forward metric and the backward metric at the next iterative decoding.
Step S14, the posterior probability calculation module uses the branch metricForward metric alpha k And backward metric beta k Calculating posterior probability L (z) (u k ) The calculation formula is as follows:
step S15, the extrinsic probability calculation module uses the posterior probability L (z) (u k ) Soft information of systematic bitsAnd->Calculating the probability +.>The calculation formula is as follows:
step S2, the external probability obtained in the step S1 is calculatedScrambling is carried out through a scrambling module I, and the scrambled external probability outputted by the scrambling module I is +.>Weight value of the output of the weighting table II>Multiplying to obtain the prior probability ++of SISO decoding kernel two>Wherein the weight->The method is obtained by checking a weighting table II through the RCS2 waveform ID number and the current iteration number i; in other words, the weighting table two is formulated according to the RCS2 waveform ID number and the iteration number i, and examples are: RCS2 waveform id=3, and a weighting table two with a maximum number of iterations of 6 is shown in table 1.
Table 1:
the scrambled outer probability output by the scrambling module IWeight value of the output of the weighting table II>The formula for multiplication is expressed as follows:
step S3, the system in the sequence to be decodedBit soft informationAnd->Scrambling is carried out through a scrambling module II, and the output of the scrambling module II and second check bit soft information are added>And->And the prior probability obtained in step S2 +.>Inputting SISO decoding kernel two, calculating to obtain outer probability +.>And posterior probability L (z) (u k ) The method comprises the steps of carrying out a first treatment on the surface of the The SISO decoding core one and the SISO decoding core two based on the Max-log-MAP algorithm have the same structure and each comprise a branch metric calculation module, a forward metric calculation module, a backward metric calculation module, a posterior probability calculation module and an external probability calculation module, so that the specific process of the step S3 can be similar to that of the steps S11 to S15, and the detailed description thereof will be omitted.
Step S4, the external probability obtained in the step S3 is calculatedAnd posterior probability L (z) (u k ) Descrambling is carried out through a first descrambling module and a second descrambling module respectively, and the unscrambled external probability outputted by the first descrambling module is used>Weight value of output of weighting table>Multiplying to obtain the prior probability of SISO decoding kernel I>Wherein the weight->The method is obtained by checking a weighting table I through the RCS2 waveform ID number and the current iteration number i; similar to step S2, a weighting table is also formulated according to the RCS2 waveform ID number and the iteration number i, and an example is: RCS2 waveform id=3, and a weighting table two with a maximum number of iterations of 6 is shown in table 2.
Table 2:
as can be seen from tables 1 and 2, the weighting table one and the weighting table two have different weights for the same RCS2 waveform ID and iteration number. The unscrambled external probability output by the unscrambling module IAnd the weight value output by the weighting tableThe formula for multiplication is expressed as follows:
step S5, repeating the steps S1 to S4, and executing the step S6 when the iterative decoding times reach the set maximum iterative times;
step S6, the posterior probability L after the second descrambling by the descrambling module in the step S4 is calculated (z) (u k ) Input into hard decision module, after calculation by hard decision algorithm, output the bit of decoding resultThe hard decisionThe algorithm is calculated as follows:
in the method, in the process of the invention,and a bit representing a decoding result of the sequence to be decoded, and z represents a bit of the sequence to be decoded.
So far, the invention adopts the dual binary Turbo decoding structure to decode the sequence to be decoded, and compared with the traditional Max-Log-MAP algorithm, the invention can improve the decoding performance by 0.2-0.4 dB, so the invention can better compensate the degradation of the decoding performance of the Max-Log-MAP algorithm caused by approximate loss.
Example 2
Based on embodiment 1, this embodiment proposes a decoding structure for improving the Turbo decoding performance in DVB-RCS2, as shown in fig. 1, where the decoding structure is a dual binary Turbo decoding structure; the dual binary Turbo decoding structure comprises a SISO decoding core I and a SISO decoding core II based on a Max-log-MAP algorithm, a weighting table I and a weighting table II corresponding to the SISO decoding core I and the SISO decoding core II, a scrambling module I, a scrambling module II, a descrambling module I, a descrambling module II and a hard decision module based on DVB-RCS2 standard;
the output end of the SISO decoding core I is connected with the input end of the SISO decoding core II through a scrambling module and a multiplier connection; the output end of the SISO decoding core II is connected with the input end of the SISO decoding core I through the descrambling module I and the multiplier II on the one hand, and is connected with the hard decision module through the descrambling module II on the other hand; the input end of the SISO decoding core II is also connected with a scrambling module II; the first multiplier is also connected with the second weighting table, and the second multiplier is also connected with the first weighting table.
Wherein the multiplier I is used to implement the scrambled outer probability of the scrambling module I output in step S2 of embodiment 1And the second output of the weighting tableWeight of +.>Multiplying to obtain the prior probability ++of SISO decoding kernel two>Multiplier two is used to realize the unscrambled outer probability ++of the output of unscrambling module one in step S4 of embodiment 1>Weight value of output of weighting table>Multiplying to obtain the prior probability of SISO decoding kernel I>The working principle of the rest of the functional modules is executed by referring to the corresponding parts of embodiment 1, and will not be described herein.
As shown in fig. 2, the SISO decoding core one and the SISO decoding core two based on the Max-log-MAP algorithm have the same structure, and each of the SISO decoding core one and the SISO decoding core two comprises a branch metric calculation module, a forward metric calculation module, a backward metric calculation module, a posterior probability calculation module and an external probability calculation module;
the branch measurement calculation module is respectively connected with the forward measurement calculation module and the posterior probability calculation module; the forward measurement calculation module is respectively connected with the backward measurement calculation module and the posterior probability calculation module; the backward measurement calculation module is connected with the posterior probability calculation module; the posterior probability calculation module is connected with the external probability calculation module. Likewise, the working principles of the functional modules in the SISO decoding core one and the SISO decoding core two are only required to be executed by referring to the corresponding parts of embodiment 1, and are not described herein again.
The above description is only of the preferred embodiments of the present invention and is not intended to limit the present invention, but various modifications and variations can be made to the present invention by those skilled in the art. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention should be included in the protection scope of the present invention.
Claims (8)
1. A method for improving the Turbo decoding performance in DVB-RCS2 is characterized in that the method adopts a dual binary Turbo decoding structure to decode a sequence to be decoded; the dual binary Turbo decoding structure comprises a SISO decoding core I and a SISO decoding core II based on a Max-log-MAP algorithm, a weighting table I and a weighting table II corresponding to the SISO decoding core I and the SISO decoding core II, a scrambling module I, a scrambling module II, a descrambling module I, a descrambling module II and a hard decision module based on DVB-RCS2 standard;
the method comprises the following steps:
step S1, in the ith iterative decoding, the system bit soft information in the sequence to be decoded is decodedAnd->First check bit soft information->And->Prior probability->Inputting into SISO decoding kernel I, calculating to obtain external probability +.>And posterior probability L (z) (u k ) The method comprises the steps of carrying out a first treatment on the surface of the The sequence to be coded is u k =z, z e {00,01,10,11} represents the bits of the sequence to be decoded;
step S2, the external probability obtained in the step S1 is calculatedScrambling is carried out through a scrambling module I, and the scrambled external probability outputted by the scrambling module I is +.>Weight value of the output of the weighting table II>Multiplying to obtain the prior probability of SISO decoding kernel twoWherein the weight->The method is obtained by checking a weighting table II through the RCS2 waveform ID number and the current iteration number i;
step S3, the system bit soft information in the sequence to be decodedAnd->Scrambling is carried out through a scrambling module II, and the output of the scrambling module II and second check bit soft information are added>And->And the prior probability obtained in step S2 +.>Inputting SISO decoding kernel two, calculating to obtain outer probability +.>And posterior probability L (z) (u k );
Step S4, the external probability obtained in the step S3 is calculatedAnd posterior probability L (z) (u k ) Descrambling is carried out through a first descrambling module and a second descrambling module respectively, and the unscrambled external probability outputted by the first descrambling module is used>Weight value of output of weighting table>Multiplying to obtain the prior probability of SISO decoding kernel I>Wherein the weight->The method is obtained by checking a weighting table I through the RCS2 waveform ID number and the current iteration number i;
step S5, repeating the steps S1 to S4, and executing the step S6 when the iterative decoding times reach the set maximum iterative times;
step S6, the posterior probability L after the second descrambling by the descrambling module in the step S4 is calculated (z) (u k ) Input into hard decision module, after calculation by hard decision algorithm, output the bit of decoding result
2. The method for improving Turbo decoding performance in DVB-RCS2 according to claim 1, wherein the first SISO decoding core and the second SISO decoding core based on the Max-log-MAP algorithm have the same structure, and each of the first SISO decoding core and the second SISO decoding core comprises a branch metric calculation module, a forward metric calculation module, a backward metric calculation module, a posterior probability calculation module and an outer probability calculation module.
3. The method for improving Turbo decoding performance in DVB-RCS2 as claimed in claim 2, wherein the outer probability is calculated by SISO decoding core one in step S1And posterior probability L (z) (u k ) The method of (2) comprises the following substeps:
step S11, the branch metric calculation module uses the systematic bit soft informationAnd->First check bit soft information->And->Prior probability->Calculating register state slave s ′ Branch metric value to s +.>The calculation formula is as follows:
wherein:
is the symbol of the systematic bit map of the sequence to be decoded, < >> Is the sign of the check bit map of the sequence to be decoded, < >>
k represents the sequence u to be decoded k N represents the sequence u to be decoded at the kth encoding time of (a) k Is a number of codes;
step S12, the forward metric calculation module uses the branch metric valuesCalculating a forward metric α k The calculation formula is as follows:
forward metric alpha k Initial value of (1)The method comprises the following steps:
step S13, the backward metric calculation module uses the branch metric valueCalculating a backward metric beta k The calculation formula is as follows:
backward metric beta k Initial value of (1)The method comprises the following steps:
step S14, the posterior probability calculation module uses the branch metricForward metric alpha k And backward metric beta k Calculating posterior probability L (z) (u k ) The calculation formula is as follows:
step S15, the extrinsic probability calculation module uses the posterior probability L (z) (y k ) Soft information of systematic bitsAnd->Calculating the probability +.>The calculation formula is as follows:
4. the method for improving Turbo decoding performance in DVB-RCS2 as claimed in claim 1, wherein the prior probability is at 1 st iteration decoding in step S1The initial value is 0.
5. The method for improving Turbo decoding performance in DVB-RCS2 according to claim 1, wherein the calculation formula of the hard decision algorithm in step S6 is as follows:
in the method, in the process of the invention,and a bit representing a decoding result of the sequence to be decoded, and z represents a bit of the sequence to be decoded.
6. The method of claim 1 wherein the first and second weighting tables have different weights for the same RCS2 waveform ID and number of iterations.
7. A decoding device for improving the Turbo decoding performance in DVB-RCS2 for performing the method for improving the Turbo decoding performance in DVB-RCS2 according to any one of claims 1 to 6, wherein the decoding structure is a dual binary Turbo decoding structure; the dual binary Turbo decoding structure comprises a SISO decoding core I and a SISO decoding core II based on a Max-log-MAP algorithm, a weighting table I and a weighting table II corresponding to the SISO decoding core I and the SISO decoding core II, a scrambling module I, a scrambling module II, a descrambling module I, a descrambling module II and a hard decision module based on DVB-RCS2 standard;
the output end of the SISO decoding core I is connected with the input end of the SISO decoding core II through a scrambling module and a multiplier connection; the output end of the SISO decoding core II is connected with the input end of the SISO decoding core I through the descrambling module I and the multiplier II on the one hand, and is connected with the hard decision module through the descrambling module II on the other hand; the input end of the SISO decoding core II is also connected with a scrambling module II; the first multiplier is also connected with the second weighting table, and the second multiplier is also connected with the first weighting table.
8. The decoding device for improving Turbo decoding performance in DVB-RCS2 according to claim 7, wherein the SISO decoding core one and the SISO decoding core two based on the Max-log-MAP algorithm have the same structure, and each of the two has a branch metric calculation module, a forward metric calculation module, a backward metric calculation module, a posterior probability calculation module and an outer probability calculation module;
the branch measurement calculation module is respectively connected with the forward measurement calculation module and the posterior probability calculation module; the forward measurement calculation module is respectively connected with the backward measurement calculation module and the posterior probability calculation module; the backward measurement calculation module is connected with the posterior probability calculation module; the posterior probability calculation module is connected with the external probability calculation module.
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