CN113644104A - Manufacturing method of display substrate, display substrate and display device - Google Patents

Manufacturing method of display substrate, display substrate and display device Download PDF

Info

Publication number
CN113644104A
CN113644104A CN202110918717.4A CN202110918717A CN113644104A CN 113644104 A CN113644104 A CN 113644104A CN 202110918717 A CN202110918717 A CN 202110918717A CN 113644104 A CN113644104 A CN 113644104A
Authority
CN
China
Prior art keywords
via hole
film layer
substrate
display substrate
flexible substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202110918717.4A
Other languages
Chinese (zh)
Inventor
任怀森
高涛
王伟
彭旺旺
李硕
韩林倩
郭丹
杨鸣
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
BOE Technology Group Co Ltd
Chengdu BOE Optoelectronics Technology Co Ltd
Original Assignee
BOE Technology Group Co Ltd
Chengdu BOE Optoelectronics Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by BOE Technology Group Co Ltd, Chengdu BOE Optoelectronics Technology Co Ltd filed Critical BOE Technology Group Co Ltd
Priority to CN202110918717.4A priority Critical patent/CN113644104A/en
Publication of CN113644104A publication Critical patent/CN113644104A/en
Pending legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09FDISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
    • G09F9/00Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
    • G09F9/30Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
    • G09F9/301Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements flexible foldable or roll-able electronic displays, e.g. thin LCD, OLED
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10OLED displays
    • H10K59/12Active-matrix OLED [AMOLED] displays
    • H10K59/1201Manufacture or treatment
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10OLED displays
    • H10K59/12Active-matrix OLED [AMOLED] displays
    • H10K59/131Interconnections, e.g. wiring lines or terminals

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Electroluminescent Light Sources (AREA)

Abstract

The invention provides a manufacturing method of a display substrate, the display substrate and a display device. The manufacturing method of the display substrate comprises the following steps: sequentially forming a first flexible substrate, a metal layer, a second flexible substrate, a first film layer and a second film layer on a hard substrate; forming a first via hole penetrating through the second film layer so as to expose a part of one side surface of the first film layer, which is far away from the hard substrate; forming a second through hole penetrating through the first film layer and the second flexible substrate so as to expose a surface part of one side of the metal layer, which is far away from the hard base, wherein the orthographic projection of the second through hole on the hard base is positioned in the orthographic projection of the first through hole on the hard base; and opening a third via hole penetrating through the first film layer so as to partially expose one side surface of the second flexible substrate far away from the hard base. According to the embodiment of the invention, the first via hole, the second via hole and the third via hole are sequentially formed, so that the undercut phenomenon caused by forming the via holes on the second flexible substrate is avoided, and the reliability of wiring connection is improved.

Description

Manufacturing method of display substrate, display substrate and display device
Technical Field
The invention relates to the field of display, in particular to a manufacturing method of a display substrate, the display substrate and a display device.
Background
With the development of display technologies, functions integrated on electronic devices are increasing, for example, a display device generally needs to integrate various devices such as a touch module, an antenna, and a sensor on a display panel to meet the functions required to be provided. When the devices are integrated on the display panel, corresponding wires need to be arranged to provide electric signals, the wires are difficult to run along with the increase of the number of the wires, and the possibility of abnormal connection among the wires is high.
Disclosure of Invention
The embodiment of the invention provides a manufacturing method of a display substrate, the display substrate and a display device, and aims to solve the problem that the connection between wires is high in possibility of abnormity.
In a first aspect, an embodiment of the present invention provides a method for manufacturing a display substrate, including the following steps:
sequentially forming a first flexible substrate, a metal layer, a second flexible substrate, a first film layer and a second film layer on a hard substrate;
forming a first via hole penetrating through the second film layer so that a surface part of one side, away from the hard substrate, of the first film layer is partially exposed;
opening a second via hole penetrating through the first film layer and the second flexible substrate so as to expose a side surface part of the metal layer away from the hard base, wherein an orthographic projection of the second via hole on the hard base is positioned within an orthographic projection of the first via hole on the hard base;
and opening a third via hole penetrating through the first film layer so as to expose a side surface part of the second flexible substrate far away from the hard base, wherein an orthographic projection of the third via hole on the hard base is positioned in an orthographic projection of the first via hole on the substrate, and the orthographic projection of the third via hole on the hard base covers the orthographic projection of the second via hole on the hard base.
In some embodiments, before the opening the first via penetrating the second film layer, the method further comprises:
and manufacturing a semiconductor layer, wherein the semiconductor layer comprises a polycrystalline silicon material obtained by converting amorphous silicon through excimer laser annealing.
In some embodiments, the first film layer comprises one or more of a buffer layer and a second barrier layer; and/or
The second film layer includes one or more of a gate insulating layer and a dielectric layer.
In some embodiments, the second via includes a first sub-via and a second sub-via;
set up the second via hole, include:
opening a first sub-via hole penetrating through the first film layer so as to partially expose one side surface of the second flexible substrate far away from the hard base;
and taking the first film layer as a mask, and forming a second sub-via hole penetrating through the second flexible substrate so as to expose a part of one side surface of the metal layer, which is far away from the hard base.
In some embodiments, the first via, the third via, and the second via have successively decreasing apertures.
In some embodiments, after the opening the third via penetrating the first film layer, the method further comprises:
and manufacturing a conductive connecting line on one side of the second film layer far away from the hard substrate, wherein the conductive connecting line is electrically connected with the metal layer through the first via hole and the second via hole.
In a second aspect, an embodiment of the present invention provides a display substrate, which is manufactured by the manufacturing method of the display substrate according to any one of the first aspect.
In some embodiments, the display substrate includes a touch electrode pattern including a first electrode sub-pattern, and the metal layer includes the first electrode sub-pattern.
In some embodiments, the touch electrode pattern further comprises a second electrode subpattern located on a side of the second flexible substrate away from the first flexible substrate;
the display substrate comprises an edge area and a central area, wherein the first electrode sub-pattern is used for touch identification of the edge area, and the second electrode sub-pattern is used for touch identification of the central area.
In some embodiments, the metal layer comprises a near field communication coil.
In some embodiments, the metal layer includes at least one of a data line pattern or a power signal line pattern.
In a third aspect, an embodiment of the present invention provides a display device, including the display substrate according to any one of the second aspects.
The manufacturing method of the display substrate provided by the embodiment of the invention comprises the following steps: sequentially forming a first flexible substrate, a metal layer, a second flexible substrate, a first film layer and a second film layer on a hard substrate; forming a first via hole penetrating through the second film layer so that a surface part of one side, away from the hard substrate, of the first film layer is partially exposed; opening a second via hole penetrating through the first film layer and the second flexible substrate so as to expose a side surface part of the metal layer away from the hard base, wherein an orthographic projection of the second via hole on the hard base is positioned within an orthographic projection of the first via hole on the hard base; and opening a third via hole penetrating through the first film layer so as to expose a side surface part of the second flexible substrate far away from the hard base, wherein an orthographic projection of the third via hole on the hard base is positioned in an orthographic projection of the first via hole on the substrate, and the orthographic projection of the third via hole on the hard base covers the orthographic projection of the second via hole on the hard base. The thickness of the flexible substrate is generally thicker than that of other film layers, so that undercutting may occur when the via hole is formed in the flexible substrate.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required to be used in the description of the embodiments of the present invention will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without inventive exercise.
FIG. 1 is a partial electron microscope scan of a display substrate;
FIG. 2 is a flow chart of a method for fabricating a display substrate according to an embodiment of the present invention;
FIG. 3 is a schematic view of an intermediate process of a display substrate according to an embodiment of the present invention;
FIG. 4 is a schematic view of an intermediate process of a display substrate according to an embodiment of the present invention;
FIG. 5 is a schematic view of an intermediate process for manufacturing a display substrate according to an embodiment of the present invention;
FIG. 6 is a schematic view of an intermediate process for manufacturing a display substrate according to an embodiment of the present invention;
FIG. 7 is a schematic view of an intermediate process for manufacturing a display substrate according to an embodiment of the present invention;
FIG. 8 is a schematic view of an intermediate process for manufacturing a display substrate according to an embodiment of the present invention;
FIG. 9 is a schematic view of a display substrate according to another embodiment of the present invention;
FIG. 10 is a schematic view of a display substrate according to another embodiment of the present invention;
FIG. 11 is a schematic structural diagram of another display substrate according to an embodiment of the invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, not all, embodiments of the present invention. Without conflict, the embodiments described below and features of the embodiments may be combined with each other. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
With the development of display technology and electronic technology, users have more and more requirements on functions integrated on electronic devices, for example, for a display device, Near Field Communication (NFC) functions, touch functions, ambient light detection functions, and the like may need to be integrated, and meanwhile, different requirements, such as resolution requirements, may also be imposed on a display panel. Meanwhile, users have certain requirements on the size, shape and the like of the display device, such as narrow frame, high screen ratio, low weight and the like. In order to realize these requirements, it may be difficult to route the display device, for example, if an NFC function needs to be implemented, an NFC sensing coil needs to be disposed, and the NFC sensing coil may occupy a certain space, and if a high resolution needs to be implemented, the pixel routing arrangement needs to be tighter, and the like.
The inventor of this application discovers at the in-process that realizes the technical scheme of this application, can reduce the way of walking the line degree of difficulty through the metal between the double-deck basement, and the metal is walked the finger of line and is set up double-deck flexible substrate between the double-deck basement to walk the line setting of a part of metal between two-layer flexible substrate, thereby reduce the line density of arranging of other parts. The metal routing between the two layers of flexible substrates needs to be electrically connected with other structures through a via penetrating through one layer of flexible substrate, but the routing method is poor in reliability.
The inventor of the present application finds, through further research, that the reason for poor wiring reliability is that, in order to achieve electrical connection between the metal wiring between the two layers of flexible substrates and other structures, one layer of the flexible substrate needs to be etched, the thickness of the flexible substrate is much greater than that of other film layers, and the flexible substrate needs to be made of organic materials such as Polyimide (PI), so that when a via hole is formed in the flexible substrate, the photoresist cannot be directly used for performing barrier etching, and an inorganic layer on the flexible substrate is used for performing barrier etching. This process can result in undercutting of the flexible substrate material at the edge of the via as shown by the outlined area in fig. 1. Therefore, when the conductive connecting line is further manufactured through the via hole and is in lap joint with the metal wiring, lap joint is difficult, open circuit easily occurs, and reliability of the display substrate is reduced.
The embodiment of the invention provides a manufacturing method of a display substrate.
As shown in fig. 2, in one embodiment, the method for manufacturing the display substrate includes the following steps:
step S101: a first flexible substrate, a metal layer, a second flexible substrate, a first film layer and a second film layer are sequentially formed on a hard substrate.
In this embodiment, a material such as glass may be selected as the hard base 10, and as shown in fig. 3, a first flexible substrate 101, a metal layer 103, a second flexible substrate 104, a first film layer 105, and a second film layer 106 are sequentially formed on the hard base 10.
The first flexible substrate 101 may be made of an organic material such as PI, and the thickness of the first flexible substrate 101 may be controlled to be 5 to 20 μm. On the first flexible substrate 101, a first barrier layer 102 may be fabricated as desired.
Depositing a metal material on the first flexible substrate 101, wherein the metal material may be selected from metal materials including but not limited to molybdenum Mo, titanium Ti, aluminum Al, silver Ag, niobium aluminum alloy AlNb, etc., as required, and then patterning the metal material as required to form the metal layer 103.
A second flexible substrate 104 is fabricated on the metal layer 103, the second flexible substrate 104 may be made of an organic material such as PI, and the thickness of the second flexible substrate 104 may be smaller than that of the first flexible substrate 101, and may be controlled to be 1 to 10 micrometers, for example.
A first film layer 105 is fabricated on the second flexible substrate 104, the first film layer 105 including an inorganic layer, in some embodiments the inorganic layer specifically included by the first film layer 105 specifically refers to one or more of the second barrier layer 1051 and the buffer layer 1052.
A second film layer 106 is fabricated on the first film layer 105, in some embodiments, the second film layer 106 includes one or more of a gate insulating layer and a dielectric layer 1063.
It should be understood that when the second film layer 106 is formed, other film layers, such as the semiconductor layer 107 of a Thin Film Transistor (TFT), a gate metal layer, etc., may be formed as required, but these film layers and the via to be opened are located in different regions, and the existence of these film layers and structures does not affect the opening of the via, and therefore, is not further defined and described herein. The film layer and the process material thereof to be manufactured can be referred to the related technology to a certain extent, and are not described herein again.
Referring to fig. 3, in the present embodiment, the TFT has a dual-gate structure, and accordingly, the layers to be manufactured include a semiconductor layer 107, a first gate metal layer 108, and a second gate metal layer 109, and correspondingly, the second layer 106 specifically includes a first gate insulating layer 1061, a second gate insulating layer 1062, and a dielectric layer 1063. Obviously, the structure to be manufactured can be adapted according to the need, and is not further limited herein.
Step S102: and forming a first via hole penetrating through the second film layer so as to partially expose one side surface of the first film layer far away from the hard substrate.
As shown in fig. 4, a first via 201 is formed, and the first via 201 penetrates through the second film layer 106, so that after the first via 201 is formed, a portion of a side surface of the first film layer 105 away from the hard substrate 10 is exposed, in this embodiment, a portion of a side surface of the buffer layer 1052 away from the hard substrate 10 is exposed. The size of the first via 201 may be set as desired, and is not further limited herein.
Step S103: and opening a second via hole 202 penetrating through the first film layer 105 and the second flexible substrate 104 so as to expose a side surface part of the metal layer 103 far away from the hard base 10.
As shown in fig. 5 and 6, a second via 202 is opened, and an orthographic projection of the second via 202 on the hard substrate 10 is located within an orthographic projection of the first via 201 on the hard substrate 10. It is understood that the second via 202 is opened in the exposed region of the first film layer 105, and the second via 202 penetrates through the first film layer 105 and the second flexible substrate 104, so that a portion of the metal layer 103 is exposed.
In some embodiments, the second via 202 includes a first sub-via 2021 and a second sub-via 2022, and the step S103 specifically includes:
opening a first sub-via 2021 penetrating through the first film layer 105, so that a side surface portion of the second flexible substrate 104 away from the hard base 10 is partially exposed;
and taking the first film layer as a mask, and forming a second sub-via hole penetrating through the second flexible substrate so as to expose a part of one side surface of the metal layer, which is far away from the hard base.
As shown in fig. 5, a first sub-via 2021 is first opened, the first sub-via 2021 is a portion penetrating through the first film layer 105, as shown in fig. 6, a second sub-via 2022 is then opened, the second sub-via 2022 is a portion penetrating through the second flexible substrate 104, that is, the first sub-via 2021 and the second sub-via 2022 included in the second via 202 are opened respectively.
Referring to fig. 1 and fig. 6, when the second sub-via 2022 is opened, an undercut phenomenon may occur on the etched portion of the second flexible substrate 104.
Step S104: and opening a third via hole penetrating through the first film layer so as to partially expose one side surface of the second flexible substrate far away from the hard base.
As shown in fig. 7, next, a third via 203 is opened, an orthographic projection of the third via 203 on the hard base 10 is located within an orthographic projection of the first via 201 on the substrate, and the orthographic projection of the third via 203 on the hard base 10 covers an orthographic projection of the second via 202 on the hard base 10.
It can be understood that, the third via 203 is formed in the exposed area of the first film layer 105, and the range of the formed second via 202 is greater than that of the second via 202, since the thickness of the second flexible substrate 104 is relatively greater and the corrosion resistance is higher than that of the first film layer 105, by controlling the process parameters, the formed third via 203 can only penetrate through the first film layer 105 and cannot penetrate through the second flexible substrate 104. In this process, the metal layer 103 acts as an etch stop layer to prevent further etching.
Referring to fig. 6 and 7, after the third via hole 203 is opened, a side surface portion of the second flexible substrate 104 away from the hard base 10 can be exposed, so that the undercut phenomenon is eliminated.
According to the embodiment of the invention, the first via hole, the second via hole and the third via hole are sequentially formed, so that the undercut phenomenon caused by forming the via holes on the second flexible substrate is avoided, and the reliability of wiring connection is improved.
In some embodiments, after step S104, the method further comprises:
and manufacturing a conductive connecting line on one side of the second film layer far away from the hard substrate, wherein the conductive connecting line is electrically connected with the metal layer through the first via hole and the second via hole.
In some embodiments, the apertures of the first via 201, the third via 203, and the second via 202 are sequentially reduced. It should be noted that, in theory, the aperture of the first sub-via 2021 and the aperture of the second sub-via 2022 included in the second via 202 are equal, and there is a difference actually between the aperture of the first sub-via 2021 and the aperture of the second sub-via 2022, and the difference actually exists is caused by an undercut phenomenon generated by a process factor, so the aperture of the second via 202 in this embodiment actually refers to the aperture of the second sub-via 2022.
In this way, after the fabrication is completed, the size of the formed via hole is gradually reduced along the direction away from the hard substrate 10, which helps to improve the reliability of the electrical connection between the subsequently disposed conductive connection line and the metal layer 103. Here, the via hole specifically refers to the entirety of the via hole formed by the first via hole 201 and the third via hole 203.
After the via hole is formed, a conductive connection line may be manufactured, and the conductive connection line and the source drain metal layer 103 may be manufactured through a one-step patterning process.
In some embodiments, the via formed may be filled according to the same time the planarization layer 109 is fabricated.
In some embodiments, the display substrate may need to be bonded to other structures, for example, it may need to be bonded to a circuit board, and accordingly, the bonding area may be filled as needed while the via hole is filled.
In some embodiments, other subsequent structures may also be fabricated as needed, for example, when the display substrate is an OLED (organic light emitting diode) display substrate, structures such as the anode layer 110, the Pixel Definition Layer (PDL)111, the support structure (PS)112, and the like may be further fabricated, and may be specifically configured as needed, which is not further defined and described herein.
In some embodiments, the display substrate includes an LTPS-TFT (Low Temperature polysilicon Thin Film Transistor), and thus, in the process of fabricating the second Film layer 106, a step of fabricating the semiconductor layer 107 is further included, wherein the step of fabricating the semiconductor layer 107 includes a step of converting Amorphous Silicon (a-Si) into a polysilicon (p-Si) material obtained by Excimer Laser Annealing (ELA).
It should be understood that if the second flexible substrate 104 is etched before the ELA process, the sidewall of the second flexible substrate 104 is partially exposed at the second sub-via 2022, and there is no inorganic layer capable of protecting this region, where the inorganic layer refers to one or more of the second barrier layer 1051 and the buffer layer 1052 in the first film layer 105, and the curing temperature of PI is typically around 450 degrees celsius, so that the exposed portion of the second flexible substrate 104 may be burned in the ELA process.
According to the technical scheme of the embodiment, the step of etching the second flexible substrate 104 is arranged after the ELA process, so that the possibility that the second flexible substrate 104 after etching is burnt by the ELA process is completely avoided, and the reliability of the display substrate is improved.
The embodiment of the invention provides a display substrate which is manufactured by any one of the manufacturing methods of the display substrate.
Since the display substrate of this embodiment is manufactured by the method of this embodiment, at least all of the technical effects can be achieved, and details are not described here.
As shown in fig. 9, in some embodiments, the display substrate includes a touch electrode pattern including a first electrode sub-pattern 901, and the metal layer includes the first electrode sub-pattern 901.
In this embodiment, can make touch-control electrode figure between two-layer flexible substrate to reduce the occupation to the space, can keep away from first flexible substrate one side for the second flexible substrate and provide more line spaces, reduce the wiring degree of difficulty.
In some embodiments, the touch electrode pattern further includes a second electrode sub-pattern located on a side of the second flexible substrate away from the first flexible substrate, and the display substrate includes an edge area and a central area, where the first electrode sub-pattern 901 is used for touch recognition of the edge area and the second electrode sub-pattern is used for touch recognition of the central area. The first electrode subpattern 901 is connected with the conductive connecting line through the via 902 to realize the transmission of the touch signal.
In this embodiment, it can be understood that the first electrode sub-pattern 901 corresponding to the edge area of the display substrate moves to between the two layers of flexible substrates below the display area, which is beneficial to realizing a narrow frame, improving the screen occupation ratio, and improving the display effect.
As shown in fig. 10, in some embodiments, the metal layer comprises a Near Field Communication (NFC) coil 1001. According to the technical scheme of the embodiment, the NFC coil 1001 can be manufactured through the metal layer between the double-layer flexible substrates, and then the NFC coil 1001 is electrically connected with the conductive connecting line 1003 through the through hole 1002, so that the display substrate and the NFC coil 1001 are integrated, and the space occupation is reduced.
As shown in fig. 11, in some embodiments, the metal layer includes at least one of a data line pattern 1101 or a power signal line pattern.
In this embodiment, a part of the data line pattern 1101 or the power signal line is fabricated between the two flexible substrates, and the data line pattern 1101 or the power signal line is electrically connected to the driving circuit layer located on the side of the second flexible substrate far from the first flexible substrate through the opened via hole 1102, so as to implement signal transmission. The data line pattern 1101 or the power signal lines may be connected to the conductive connection lines 1104 connected to the signal source through the vias 1103 formed in the fan-out area of the display substrate to obtain data signals or power signals.
In this way, when the area of the display substrate is constant, more data line patterns 1101 or more power signal lines can be provided, and signals can be supplied to more pixel units, which contributes to an increase in the number of pixels per unit area.
It should be understood that, the more pixel units in a unit area, the more routing lines need to be provided, and in the related art, the number of routing lines is usually increased by controlling the line width or routing line layout to increase the resolution, but this method has a greater difficulty in routing, because the signal transmission effect is reduced when the line width is reduced, so that the routing design needs to be optimized, and the difficulty in the manufacturing process is increased, which may also increase the production cost. The technical scheme of this embodiment can improve the interior line quantity of walking of unit area under the condition that does not increase or do not increase the wiring degree of difficulty significantly, helps under the condition of the technology degree of difficulty that does not show significantly, effectual improvement shows resolution ratio.
An embodiment of the present invention provides a display device including the display substrate according to any one of the above embodiments.
Since this embodiment includes all the technical solutions of the display substrate embodiment, at least all the technical effects can be achieved, and details are not described here.
The above description is only for the specific embodiments of the present invention, but the scope of the present invention is not limited thereto, and any person skilled in the art can easily conceive of the changes or substitutions within the technical scope of the present invention, and the changes or substitutions should be covered within the scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.

Claims (12)

1. A manufacturing method of a display substrate is characterized by comprising the following steps:
sequentially forming a first flexible substrate, a metal layer, a second flexible substrate, a first film layer and a second film layer on a hard substrate;
forming a first via hole penetrating through the second film layer so that a surface part of one side, away from the hard substrate, of the first film layer is partially exposed;
opening a second via hole penetrating through the first film layer and the second flexible substrate so as to expose a side surface part of the metal layer away from the hard base, wherein an orthographic projection of the second via hole on the hard base is positioned within an orthographic projection of the first via hole on the hard base;
and opening a third via hole penetrating through the first film layer so as to expose a side surface part of the second flexible substrate far away from the hard base, wherein an orthographic projection of the third via hole on the hard base is positioned in an orthographic projection of the first via hole on the substrate, and the orthographic projection of the third via hole on the hard base covers the orthographic projection of the second via hole on the hard base.
2. The method for manufacturing a display substrate according to claim 1, wherein before the forming the first via penetrating the second film layer, the method further comprises:
and manufacturing a semiconductor layer, wherein the semiconductor layer comprises a polycrystalline silicon material obtained by converting amorphous silicon through excimer laser annealing.
3. The method of claim 1, wherein the first film layer comprises one or more of a buffer layer and a second barrier layer; and/or
The second film layer includes one or more of a gate insulating layer and a dielectric layer.
4. The method for manufacturing the display substrate according to claim 1 or 3, wherein the second via hole comprises a first sub-via hole and a second sub-via hole;
set up the second via hole, include:
opening a first sub-via hole penetrating through the first film layer so as to partially expose one side surface of the second flexible substrate far away from the hard base;
and taking the first film layer as a mask, and forming a second sub-via hole penetrating through the second flexible substrate so as to expose a part of one side surface of the metal layer, which is far away from the hard base.
5. The method for manufacturing the display substrate according to claim 4, wherein the first via hole, the third via hole and the second via hole have successively decreasing apertures.
6. The method for manufacturing a display substrate according to claim 1, wherein after the third via penetrating the first film layer is formed, the method further comprises:
and manufacturing a conductive connecting line on one side of the second film layer far away from the hard substrate, wherein the conductive connecting line is electrically connected with the metal layer through the first via hole and the second via hole.
7. A display substrate manufactured by the method for manufacturing a display substrate according to any one of claims 1 to 6.
8. The display substrate of claim 7, wherein the display substrate comprises a touch electrode pattern comprising a first electrode sub-pattern, and wherein the metal layer comprises the first electrode sub-pattern.
9. The display substrate of claim 7, wherein the touch electrode pattern further comprises a second electrode subpattern located on a side of the second flexible substrate away from the first flexible substrate;
the display substrate comprises an edge area and a central area, wherein the first electrode sub-pattern is used for touch identification of the edge area, and the second electrode sub-pattern is used for touch identification of the central area.
10. The display substrate of claim 7, wherein the metal layer comprises a near field communication coil.
11. The display substrate of claim 7, wherein the metal layer comprises at least one of a data line pattern or a power signal line pattern.
12. A display device comprising the display substrate according to any one of claims 7 to 10.
CN202110918717.4A 2021-08-11 2021-08-11 Manufacturing method of display substrate, display substrate and display device Pending CN113644104A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202110918717.4A CN113644104A (en) 2021-08-11 2021-08-11 Manufacturing method of display substrate, display substrate and display device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202110918717.4A CN113644104A (en) 2021-08-11 2021-08-11 Manufacturing method of display substrate, display substrate and display device

Publications (1)

Publication Number Publication Date
CN113644104A true CN113644104A (en) 2021-11-12

Family

ID=78420812

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202110918717.4A Pending CN113644104A (en) 2021-08-11 2021-08-11 Manufacturing method of display substrate, display substrate and display device

Country Status (1)

Country Link
CN (1) CN113644104A (en)

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107799538A (en) * 2017-10-26 2018-03-13 上海天马微电子有限公司 A kind of display panel and display device
CN109148541A (en) * 2018-08-30 2019-01-04 上海天马微电子有限公司 Display panel and preparation method thereof and display device
WO2020143396A1 (en) * 2019-01-10 2020-07-16 京东方科技集团股份有限公司 Flexible substrate and method for preparing same, and display device
CN111653196A (en) * 2020-06-12 2020-09-11 京东方科技集团股份有限公司 Display substrate, manufacturing method thereof and display device
CN113161394A (en) * 2021-01-22 2021-07-23 京东方科技集团股份有限公司 Display substrate, preparation method thereof and display device

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107799538A (en) * 2017-10-26 2018-03-13 上海天马微电子有限公司 A kind of display panel and display device
CN109148541A (en) * 2018-08-30 2019-01-04 上海天马微电子有限公司 Display panel and preparation method thereof and display device
WO2020143396A1 (en) * 2019-01-10 2020-07-16 京东方科技集团股份有限公司 Flexible substrate and method for preparing same, and display device
CN111653196A (en) * 2020-06-12 2020-09-11 京东方科技集团股份有限公司 Display substrate, manufacturing method thereof and display device
CN113161394A (en) * 2021-01-22 2021-07-23 京东方科技集团股份有限公司 Display substrate, preparation method thereof and display device

Similar Documents

Publication Publication Date Title
CN108376672B (en) Array substrate, preparation method thereof and display device
RU2510712C2 (en) Circuit board, manufacturing method of card, display panel and display device
CN110047899B (en) Display panel, display device and manufacturing method
WO2016141709A1 (en) Array substrate and manufacturing method therefor, and display device
US20200203455A1 (en) Array substrate and method for manufacturing array substrate
CN110808340B (en) Display substrate, manufacturing method thereof and display device
CN107302030B (en) Display device
CN108198825B (en) Array substrate, preparation method thereof and display panel
CN110867475B (en) Electroluminescent display substrate, preparation method thereof and electroluminescent display device
US11374033B2 (en) Thin film transistor, manufacturing method thereof, array substrate and display device
CN110289270B (en) Array substrate, manufacturing method thereof and display device
US9190430B2 (en) Method of fabricating display panel
CN108493216B (en) TFT array substrate, display device and preparation method of TFT array substrate
CN111834292B (en) Display substrate, manufacturing method thereof, display panel and display device
CN113835557B (en) Display panel and manufacturing method thereof
CN112951846B (en) Display panel, manufacturing method thereof and display device
JP2010097077A (en) Display device and manufacturing method thereof
KR102066623B1 (en) Display substrate and method of manufacturing display substrate
CN114270527A (en) Display panel, manufacturing method thereof and display device
CN113644104A (en) Manufacturing method of display substrate, display substrate and display device
CN105845692A (en) Display substrate, display apparatus and manufacture method of display substrate
CN113380863B (en) Display panel and electronic device
CN210668377U (en) Display substrate and display device
EP4145499A1 (en) Mirrored face display panel, manufacturing method therefor, and display apparatus
CN114447080A (en) Display panel

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination