CN113644003A - Patterned magnetic tunnel junction wafer magnetic resistance test structure and application method thereof - Google Patents
Patterned magnetic tunnel junction wafer magnetic resistance test structure and application method thereof Download PDFInfo
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Abstract
The invention discloses a magnetic resistance test structure of a patterned magnetic tunnel junction wafer and a use method thereof, relating to the field of magnetic resistance test of the patterned magnetic tunnel junction wafer and comprising the following steps: magnetic tunnel junction through holes, magnetic tunnel junctions, pad test points for testing and leading. And the test structure and the product device are integrated in the same layout to finish the tape-out process on the wafer to be operated together. The structure utilizes through holes with different intervals on the magnetic tunnel junction, the through holes are connected with external test pad points through test leads, the intervals of the through holes are screened and determined according to requirements, resistance values of multiple groups of magnetic tunnel junctions are measured, and finally MR and RA values are obtained through fitting. During the test process, the risk of measurement data distortion caused by device breakdown and the like in the test process can be reduced, and meanwhile due to the arrangement and combination relationship of multiple test point positions, the MR and RA values can be more accurately fitted, so that the accurate monitoring of core parameters such as the MR values and the like in the preparation process of the graphical wafer can be facilitated.
Description
Technical Field
The invention relates to the field of magnetic electronic devices, in particular to the field of patterned magnetic tunnel junction wafer magnetic resistance testing.
Background
With the continuous update and upgrade of the software and hardware performance of electronic equipment, the market puts higher requirements on the storage density and the storage speed of a memory. Electronic devices with a current stage of 28nm and below process technology often use Magnetic Random Access Memory (MRAM). The key to the fabrication of the Magnetic random access memory is the monitoring of the core parameter magneto-Resistivity (MR) and the product of the Resistance Area (RA) of the Magnetic Tunnel Junction (MTJ) of the core structure. The method is particularly important for inline and offline monitoring of MR and RA values, and two monitored objects respectively correspond to a wafer in a tape-out process and an unpatterned optical sheet. In the prior art, a common method for MR and RA monitoring, i.e., offline monitoring, of an unpatterned wafer is realized by using a Current-In-Plane-Tunneling (CIPT) device. The CIPT equipment adopts 12 micron-sized probes with different intervals, utilizes the principle of measuring resistance by a four-needle method, and obtains parameters of RA, MR and the like of the whole membrane in a fitting mode. For a patterned wafer, a product wafer needs to be processed into a single device through complete product processes such as photoetching, etching and the like, and an MR value is obtained by utilizing an R-H curve of a magnetic field probe station and a magnetic field testing device. Obtaining RA requires measuring the resistance R of the single device magnetic tunnel junctionJAccording to the formula RJAnd obtaining RA (the ratio of RA to S), wherein S is the area of the single-device magnetic tunnel junction. Unavoidable single device dimension errors necessarily affect the accuracy of RA. In addition, the single device has a small size, such as a micron junction, and there is a risk of device breakdown during the test process, and such damage directly affects the accuracy of the measurement result. In addition, in the manufacturing process, since the size of the Magnetic Tunnel Junction (MTJ) directly affects the data writing capability and the product reliability of the magnetic random access memory, the disturbance of external factors to the test device in the manufacturing process cannot be reduced by adjusting the sizes of the test device and the product to be tested。
Therefore, on the premise of not changing the size of the MTJ and ensuring the data retention capability and product reliability of the magnetic random access memory, it is important to find a measurement mode that can accurately cope with the magnetic resistance of the MTJ with multiple sizes and avoid the fluctuation of the test result caused by the self abnormality of the test device in the test process.
Disclosure of Invention
The embodiment of the invention provides a patterned magnetic tunnel junction wafer magnetic resistance test structure and a test use method thereof, which can realize accurate measurement fitting of RA and MR values of the patterned magnetic tunnel junction wafer magnetic resistance.
In order to solve the above problems, a first aspect of the present invention provides a magnetic tunnel junction wafer magnetoresistance test structure, which includes a magnetic tunnel junction through hole 1, a magnetic tunnel junction 2, a pad test point 3, and a test lead 4;
the magnetic tunnel junction 2 is arranged at the center of the testing device, and the pad testing point 3 is arranged around the magnetic tunnel junction 2;
the magnetic tunnel junction through hole 1 leads out the magnetic tunnel junction 2;
the test lead 4 connects the magnetic tunnel via 1 with the magnetic tunnel junction 2 and the pad test point 3.
In some embodiments, the pad test points 3 are at least 4 in number.
In some embodiments, the magnetic tunnel via 1 and the pad test point 3 have a one-to-one correspondence.
In some embodiments, the test structure further includes an external probe, the external probe contacts the pad test point 3 to implement a measurement action, and the pad test point 3 is selected according to a product requirement RA value.
In some embodiments, the selecting of the pad test point contacted by the external probe at least includes selecting a point corresponding to the CIPT probe type: nano, Narrow, Standard, Wide four types.
In some embodiments, the design selection rule of the magnetic tunnel junction via-hole 1 pitch includes:
λ/2＜x is less than 4 lambda, wherein x represents the average distance of the magnetic tunnel junction through holes 1, and the calculation formula is as follows: x ═ x1+x2+x3) (iii) x1Pin distance representing the forward current to forward potential of the electrode, said x2Pin distance representing positive to negative potential of an electrode, said x3Indicating the pin distance from the negative current of the electrode to the negative potential;
where λ represents the minimum distance between probes when current can just pass through the tunneling layer, RA represents the product of the magnetic tunnel junction resistance area, and RTExpressed as the top electrode resistance, R, of the magnetic tunnel junction wafer filmBExpressed as the bottom electrode resistance of the magnetic tunnel junction wafer film.
In another aspect of the present invention, a method for using a magnetic tunnel junction wafer magnetoresistance test structure is provided, including:
s1: the wafer to be operated completes the graphical preparation of the magnetic tunnel junction;
s2: determining the average distance x between the through holes of the magnetic tunnel junction according to the required range of the resistance area product value;
s3: selecting test pads corresponding to different intervals according to the magnetic tunnel junction through hole intervals corresponding to the current and the potential in the test electrode;
s4: and measuring the resistance values of the magnetic tunnel junctions corresponding to different pad test points and different distances, and fitting to obtain the product (RA) of the MR (magnetic resistance rate) and the resistance area.
In some embodiments, the wafer to be processed completes the magnetic tunnel junction growth construction by a sputtering method.
In some embodiments, the method for measuring the resistance between the pins adopts a four-needle method measurement mode.
In some embodiments, when the number of pad test points is greater than 4, the four-needle method may be combined with a permutation and combination method for measurement.
In some embodiments, the accuracy of the fit is positively correlated with the number of test data sets.
The embodiment of the invention provides a patterned magnetic tunnel junction wafer magnetic resistance test structure and a using method thereof. The test structure comprises a magnetic tunnel junction through hole, a magnetic tunnel junction, a pad test point and a test lead. And the test structure and the product device are integrated in the same layout to finish the tape-out process on the wafer to be operated together. The structure utilizes through holes with different intervals on the magnetic tunnel junction, the through holes are connected with external test pad points through test leads, the intervals of the through holes are screened and determined according to requirements, resistance values of multiple groups of magnetic tunnel junctions are measured, and finally MR and RA values are obtained through fitting. The test structure is provided with an external pad test point, the tested resistor is a large-size surface resistor, and the test is not easy to break down. Therefore, the device can reduce the risk of measurement data distortion caused by damage in the test process, and meanwhile, due to the arrangement combination relationship of multiple test points, the device can realize more accurate fitting of the required MR and RA values, and is beneficial to accurate monitoring of core parameters such as the MR value in the preparation process of the patterned wafer.
Drawings
In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings needed to be used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present application.
FIG. 1-a is a schematic diagram of a magnetic tunnel junction structure of a bottom pinned structure according to an embodiment of the present invention;
FIG. 1-b is a schematic diagram of resistance state distribution after the magnetic tunnel junction is switched in a magnetic field according to an embodiment of the present invention;
FIG. 1-c is a schematic diagram of a magnetic tunnel junction film structure of a top pinned structure according to an embodiment of the invention;
FIG. 2 is a schematic diagram of the test structure according to an embodiment of the present invention;
FIG. 3 is a schematic diagram of pin pitch for different types of probes according to an embodiment of the invention;
FIG. 4 is a schematic illustration of the dimensions of the test feature according to one embodiment of the present invention;
FIG. 5 is a schematic diagram of experimental data of average spacing between via holes of the magnetic tunnel junction of the test structure according to an embodiment of the present invention;
FIG. 6 is a graph illustrating the result of the magnetic tunnel junction resistance data corresponding to the average distance between the through holes of the magnetic tunnel junction of the test structure according to an embodiment of the present invention;
FIG. 7-a is a graph of the d-R fitted from measured resistance values according to one embodiment of the present inventionAPA curve;
FIG. 7-b is a graph of the d-R fitted from measured resistance values according to one embodiment of the present inventionPCurve line.
Detailed Description
In order to make the objects, features and advantages of the present invention more apparent and understandable, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is apparent that the described embodiments are only a part of the embodiments of the present application, and not all the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
It will be understood by those within the art that the terms "first", "second", etc. in this application are used only to distinguish one device, module, parameter, etc., from another, and do not denote any particular technical meaning or necessary order therebetween.
Magnetic tunnel junctions have an important role in information storage. As shown in fig. 1-a, the core portion of the magnetic tunnel junction is a sandwich structure formed by two ferromagnetic metal layers sandwiching a tunneling barrier layer. The tunneling magneto-resistance structure mainly comprises a bottom pinning structure and a top pinning structure, wherein the bottom pinning structure is shown in figure 1-a, and a Reference Layer, a magnetic tunneling barrier Layer and a Free Layer are respectively arranged from the bottom substrate to the top structure (detailed structure is divided into a substrate Layer, a seed Layer, a pinning Layer, an antiferromagnetic coupling Layer, a fixed Layer, a nonmagnetic Layer, a Free Layer and a covering Layer); top pinned structures such asThe structures from bottom to top shown in fig. 1-c are a free layer, a magnetic tunneling barrier layer and a reference layer (the detailed structure is divided into a base layer, a seed layer, a free layer, a nonmagnetic layer, a fixed layer, an antiferromagnetic coupling layer, a pinning layer and a covering layer). The magnetization of the free layer has two stable orientations, parallel or anti-parallel to the reference layer, respectively. As shown in FIG. 1-b, when the magnetic tunnel junction is in the magnetic field-in state, if the magnetization orientation of the free layer is parallel to the magnetization direction of the reference layer, the tunneling magnetoresistance is in the low resistance state, and the resistance at this moment is denoted as RP(ii) a If the magnetization orientation of the free layer is antiparallel to the magnetization direction of the reference layer, the tunneling magnetoresistance is in a high-resistance state, and the resistance is recorded as RAP. In MRAM devices, the more important parameters are the Magnetic Resistance (MR) and the Resistive Area (RA). Where the expression for MR is: MR ═ RAP-RP)/RPWherein the magnitude of the MR effect is characterized by the magnitude of the MR value.
In the process of manufacturing the MRAM device, in order to ensure effective monitoring and improvement of the yield of the MRAM device and the process capability, the process monitoring and measuring processes of the parameters MR and RA are very important. For the film stack before patterning, i.e. the optical sheet, the current-phase MR and RA measurements are usually performed with in-plane current tunneling measurement equipment (CIPT). The CIPT equipment adopts 12 micron-sized probes with different intervals, and utilizes a four-needle method resistance measuring principle to fit to obtain parameters of RA, MR and the like of the whole membrane. For a patterned wafer, the resistance values of the top and bottom electrodes are tested by adopting interconnection lines connected to the top and bottom of the junction in a current-stage measurement mode, and an MR value is obtained in an R-H curve (a resistance magnetic field curve used for representing a basic test of MTJ (magnetic tunnel junction) electric transport performance) of a test device under a magnetic field. Obtaining RA requires measuring the resistance R of the single device magnetic tunnel junctionJAccording to the formula RJAnd obtaining RA (the ratio of RA to S), wherein S is the area of the single-device magnetic tunnel junction. Unavoidable single device dimension errors necessarily affect the accuracy of RA. In addition, the single device has a small size, such as a micron junction, and there is a risk of device breakdown during the test process, and such damage directly affects the accuracy of the measurement result. Because the MTJ size directly influences the data writing capability and product feasibility of the magnetic random access memoryAnd the disturbance of external factors to the test device in the preparation process cannot be reduced by adjusting the sizes of the test device and the product to be tested. Therefore, the current method for measuring and monitoring the MR and RA values of the patterned wafer is not ideal.
In an embodiment of the application, in order to realize accurate measurement of an MR value and an RA value of a patterned wafer, the invention provides a magnetic tunnel junction wafer magnetoresistance test structure, the structure composition of which is shown in fig. 2, the structure comprises a magnetic tunnel junction through hole 1, a magnetic tunnel junction 2, a pad test point 3 and a test lead 4;
the magnetic tunnel junction 2 is arranged at the center of the testing device, and the pad testing point 3 is arranged around the magnetic tunnel junction 2;
the magnetic tunnel junction through hole 1 leads out the magnetic tunnel junction 2;
the test lead 4 connects the magnetic tunnel junction 2 with the pad test point 3 through the magnetic tunnel junction through hole 1.
Optionally, the test structure further includes an external probe for contacting the pad test point 3 to measure the resistance, and the pad test point 3 is selected according to the product requirement RA value.
Optionally, the number of pad test points 3 is at least 4.
Because the test mechanism is based on four-needle method resistance measurement, and the MR value is fitted through the resistance value, the more the point location number is, the more the experiment group number which can be used for fitting is, and the better the fitting effect is.
Optionally, the magnetic tunnel junction through holes 1 and the pad test points 3 have a one-to-one correspondence relationship.
Optionally, the selection rule of the test pad3 is selected according to the size of the RA value of the product requirement, and the selecting of the pad3 at least includes: and selecting pads corresponding to the model numbers of the four probes Nano, Narrow, Standard and Wide.
The four probe models are the probe models used by the CIPT equipment at the present stage and belong to the existing standard parts.
In an embodiment of the present application, there is provided a rule for selecting a design of a pitch of the magnetic tunnel junction via holes 1, the rule including:
λ/2 < x < 4 λ, wherein x represents the average distance of the magnetic tunnel junction through holes 1, and the calculation formula is as follows: x ═ x1+x2+x3) (iii) x1The pin distance of the positive current of the electrode to the positive potential, x2Pin distance representing positive to negative potential of an electrode, said x3Indicating the pin distance from the negative current to the negative potential of the electrode.
Where λ represents the minimum distance between probes when current can just pass through the tunneling layer, RA represents the product of the magnetic tunnel junction resistance area, and RTExpressed as the top electrode resistance, R, of the magnetic tunnel junction wafer filmBExpressed as the bottom electrode resistance of the magnetic tunnel junction wafer film.
In one embodiment of the present application, a method for using a patterned magnetic tunnel junction wafer magnetoresistance test device is provided, the method comprising:
s1: the wafer to be operated completes the graphical preparation of the magnetic tunnel junction;
the test structure and the product device are located in the same layout, and the wafer to be operated is subjected to multi-step photoetching, etching and other processes to complete the whole tape-out process.
S2: determining the average distance x between the through holes of the magnetic tunnel junction according to the required range of the resistance area product value;
s3: selecting test pads corresponding to different intervals according to the magnetic tunnel junction through hole intervals corresponding to the current and the potential in the test electrode;
s4: and measuring the resistance values of the magnetic tunnel junctions corresponding to different pad test points and different distances, and fitting to obtain the product (RA) of the MR (magnetic resistance rate) and the resistance area.
Optionally, the to-be-operated wafer completes the growth and construction of the magnetic tunnel junction in a sputtering mode.
The sputtering process is a process of bombarding the surface of a solid with particles (particles or neutral atoms, molecules) with certain energy to make the atoms or molecules near the surface of the solid obtain enough energy to finally escape from the surface of the solid, and the sputtering process can be performed only under a certain vacuum state, and the magnetic tunnel junction growth is constructed as the preferred sputtering process, but not limited to this scheme, and other modes are also applicable.
Optionally, the mtj sputtering process includes, but is not limited to, two-level sputtering, three-level sputtering or four-level sputtering, magnetron sputtering, target sputtering, rf sputtering, bias sputtering, asymmetric ac rf sputtering, ion beam sputtering, reactive sputtering, and the like.
Optionally, the method for measuring the resistance between the pins adopts a four-needle method.
Optionally, before the four-needle method measurement, a specific magnetic field condition is applied to the object to be measured.
Optionally, when the number of the pad test points 3 is greater than 4, a permutation and combination mode may be used in combination with a four-needle method to perform measurement, so as to obtain multiple sets of data.
The four-needle method is used as a common technical means for measuring the resistivity of semiconductor materials or metal materials and the like at the present stage, and the resistivity of a sample is greatly convenient to measure. The four-needle method can measure the section resistivity of the sample distributed along the radial direction, so that the uniformity of the resistivity can be observed. The method realizes rapid, convenient and nondestructive testing of the ground resistivity of samples in any shapes, thereby being suitable for testing mass samples in actual production.
Optionally, the fitting result and the number of the test result data sets have a positive correlation.
In a preferred embodiment of the present application, taking the top pinned structure as shown in fig. 1-c as an example, the magnetic tunnel junction film layer structure sequentially comprises, from top to bottom: reference layer, barrier layer, free layer. The reference layer material is selected to be CoFeB (cobalt iron boron), the barrier layer material is selected to be MgO (magnesium oxide) and has the thickness of about 1nm, and the free layer material is selected to be CoFeB. The magnetization direction of the reference layer is unchanged along the direction of the easy magnetization axis, and the magnetization direction of the free layer is the same as or opposite to the magnetization direction of the reference layer to correspond to a low state or a high state of the resistance value of the magnetic tunnel junction. According to the known CIPT (random access transistor) for the RA value test result of the MgO magnetic tunnel junction with the thickness of 1nm (RA value test is carried out on an unpatterned film stack before the formal patterning preparation process, the RA value of the magnetic tunnel junction of the optical sheet piece can be obtained in the test process), the distance between narrow type probes is selected to realize the test of the MR value of the patterned magnetic tunnel junction wafer.
Preferably, in order to ensure that the fitting effect is accurate enough, the test structure described in the present application is sufficient to participate in fitting data sets, as shown in fig. 4 (the numbers 1-12 in fig. 4 only represent the serial numbers of pads of external connection test points, and are unrelated to the serial numbers of the structural components), 12 pad test points 3 are set in the test structure, so that the external connection device can measure the resistance values between different pin distances. In addition, the pad size of the pad test point 3 is designed to be 100 μm by 100 μm, the spacing between adjacent transverse pads is 10 μm, and the longitudinal spacing is 110 μm. And because the model of the probe 1 is fixedly selected as narrow, designing a pin pitch and resistance value experimental group according to the model of the probe shown in figure 3.
Combining the permutation and combination, randomly selecting 9 groups of experimental sequences from the natural sequences, and the corresponding pin distance relationship is shown in FIG. 5. Wherein, I + -V + is denoted as x1，x1Pin distance representing the forward current to forward potential of the electrode; v + -V-is denoted as x2，x2Pin distance representing positive to negative potential of the electrode; V-I-is denoted as x3，x3Indicating the pin distance from the negative current to the negative potential of the electrode. The rule for selecting the pin distance x is as follows: x ═ x1+x2+x3) And/3, therefore, the values of the corresponding pin distances x are solved by combining the actual experimental measurement data, and the detailed results are shown in fig. 5.
Solving the MR value of the magnetic tunnel junction after the imaging, according to the relation between the pad test points and the corresponding pin distances shown in the figure 5 (for example, the first group selects 4, 5, 6, 7, number pad test points, the corresponding pin distances are solved to obtain 1.5 mu m), carrying a universal meter to measure the resistance value R of the magnetic tunnel junction corresponding to the through hole of the magnetic tunnel junction by using a four-needle methodPAnd RAPThe resistance results are shown in FIG. 6. Obtaining the average distance of the through holes of the magnetic tunnel junction and the low resistance and the high resistance of the magnetic tunnel junction respectivelyCurve d-R in phasePAnd curve d-RAPAs shown in fig. 7-a and 7-b. From the curve, R can be knownPAnd RAPA variable relationship with respect to an average pitch of magnetic tunnel junction vias. Subsequently MR% (R) according to the formulaAP-RP)/RPMR was found to be 34% by 100.
Solving the RA value of the patterned magnetic tunnel junction according to the following formula, and solving the resistance R of the top electrodeTAnd bottom electrode resistance RBFitting is carried out, and a fitting result RTAnd RB29 Ω and 5 Ω, respectively. Wherein K0To test the coefficients, K0Values can be derived from CIPT equipment testing prior to membrane stack patterning, and are used herein as known quantities.
Combination formula
And (5) solving the RA value by reverse deduction. And finishing the MR and RA numerical monitoring and measurement of the patterned wafer tunnel junction.
The embodiment of the invention provides a patterned magnetic tunnel junction wafer magnetic resistance testing device and a using method thereof. The device structure comprises a magnetic tunnel junction through hole, a magnetic tunnel junction, a pad test point and a test lead. And the test structure and the product device are integrated in the same layout to finish the tape-out process on the wafer to be operated together. The structure utilizes through holes with different intervals in the magnetic tunnel junction, external test pad point positions are connected through test leads, the through hole intervals are screened and determined according to requirements, multiple groups of resistance values are measured, and finally MR and RA values are obtained through fitting. The test structure is provided with an external pad test point, the tested resistor is a large-size surface resistor, and the test is not easy to break down. Therefore, the device can reduce the risk of measurement data distortion caused by damage in the test process, and meanwhile, due to the arrangement combination relationship of multiple test points, the device can realize more accurate fitting of the required MR and RA values, and is beneficial to accurate monitoring of core parameters such as the MR value in the preparation process of the patterned wafer.
The above description is only exemplary of the present invention and should not be taken as limiting the scope of the present invention, and any modifications, equivalents, improvements, etc. that are within the spirit and principle of the present invention should be included in the present invention.
Claims (10)
1. A patterned magnetic tunnel junction wafer magnetic resistance test structure is characterized by comprising a magnetic tunnel junction through hole (1), a magnetic tunnel junction (2), pad test points (3) and test leads (4);
the magnetic tunnel junction (2) is arranged in the center of the testing device, and the pad testing point (3) is surrounded around the magnetic tunnel junction (2);
the magnetic tunnel junction through hole (1) leads out the magnetic tunnel junction (2);
the test lead (4) connects the magnetic tunnel junction (2) with the pad test point (3) through the magnetic tunnel through hole (1).
2. Test structure in accordance with claim 1 characterized in that the pad test points (3) are at least 4 in number.
3. The test structure according to claim 1, characterized in that the magnetic tunnel junction via (1) has a one-to-one correspondence with the pad test point (3).
4. The test structure of claim 1, further comprising an external probe, wherein the external probe contacts the pad test point (3) to perform a measurement action, and the pad test point (3) is selected according to a product requirement RA value.
5. The test structure according to claim 1, wherein the rule for selecting the pitch design of the magnetic tunnel junction via holes (1) comprises:
λ/2 < x < 4 λ, wherein x represents the differenceThe average distance between the magnetic tunnel junction through holes (1) is calculated according to the formula: x ═ x1+x2+x3) (iii) x1Pin distance representing the forward current to forward potential of the electrode, said x2Pin distance representing positive to negative potential of an electrode, said x3Indicating the pin distance from the negative current of the electrode to the negative potential;
where λ represents the minimum distance between probes when current can just pass through the tunneling layer, RA represents the product of the magnetic tunnel junction resistance area, and RTExpressed as the top electrode resistance, R, of the magnetic tunnel junction wafer filmBExpressed as the bottom electrode resistance of the magnetic tunnel junction wafer film.
6. A method for using a test structure of a patterned magnetic tunnel junction wafer is characterized by comprising the following steps:
s1: the wafer to be operated completes the graphical preparation of the magnetic tunnel junction;
s2: determining the average distance x between the through holes of the magnetic tunnel junction according to the required range of the resistance area product value;
s3: selecting test pads corresponding to different intervals according to the magnetic tunnel junction through hole intervals corresponding to the current and the potential in the test electrode;
s4: and measuring the resistance values of the magnetic tunnel junctions corresponding to different pad test points and different distances, and fitting to obtain the product of the magnetic resistance rate and the resistance area.
7. The method as claimed in claim 6, wherein the wafer to be processed is subjected to magnetic tunnel junction growth construction by sputtering.
8. The method according to claim 6, wherein the method for measuring the resistance between the pins adopts a four-needle method.
9. The method of claim 6, wherein when the number of pad test points is greater than 4, the four-needle method is combined with permutation and combination for measurement.
10. The method of claim 6, wherein the accuracy of the fit is positively correlated with the number of sets of test data.
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