CN113644002B - Method for testing minority carrier end contact resistance of solar cell - Google Patents

Abstract

A testing method of minority carrier terminal contact resistance of solar cell is to draw dV/d (lnI) -I curve through dark state I-V curve corresponding to different front electrode areas S of sample, to combine double (diode + resistance) equivalent circuit model to conduct sectional analysis to the curve, to calculate resistance-electrode area reciprocal curve, to obtain slope of straight line by curve fitting, namely minority carrier terminal specific contact resistance of undoped heterojunction cell sample with passivation layer. According to the method, a corresponding equivalent circuit diagram is established by combining a carrier transmission model of the minority carrier terminal of the undoped heterojunction solar cell with the passivation layer, so that the minority carrier terminal contact resistance of the undoped heterojunction solar cell with the passivation layer is extracted.

Description

Test method for minority carrier terminal contact resistance of solar cells

Technical field

The invention relates to the technical field of performance testing of doping-free heterojunction solar cells. Specifically, it is a method for extracting the minority carrier terminal contact resistance of doping-free heterojunction solar cells with passivation layers based on a dual (diode + resistor) model. Test Methods.

Background technique

The key to solar cells is to have good passivation contacts. Excellent passivation contacts require good passivation and low contact resistance. The problem that affects the efficiency of dopant-free heterojunction cells is more prominent in their contact resistance. Their contact resistance is usually 2 to 5 orders of magnitude higher than that of homojunction solar cells, which largely offsets the impact of heterojunction solar cells. Junction cells have accumulated advantages in passivation. Therefore, how to effectively and accurately test the contact resistance value will be extremely critical to judge the quality of doping-free heterojunctions. In doping-free heterojunction cells, taking an n-type silicon substrate as an example, the contact resistance of the minority carrier terminal (the hole transport terminal of n-type silicon) of the battery is often greater than the majority carrier terminal under the same circumstances. (electron transmission end of n-type silicon) 1 to 2 orders of magnitude, becoming an important factor affecting battery series resistance.

However, the current contact resistance testing method is mainly CS (Cox and Strack) testing method using different disk sizes (Cox R H, Strack H. Ohmic contacts for GaAs devices [J]. Solid State Electronics, 1966, 10 (12): 36 -36) and the test method using transmission line matrix TLM (Transfer Length Method) (Reeves G K, Harrison H B. Obtaining the specific contact resistance from transmission line model measurements[J]. IEEE Electron Device Letters, 2005, 3(5):111 -113). Both test methods are suitable for ohmic contact situations. The contact resistance test at the majority carrier end is mainly ohmic contact, so the above methods can be used to accurately measure it. However, minority carrier ends are typically non-ohmic contacts and traditional contact resistance testing has become ineffective.

In the early days, Wang Wei et al. successfully extracted the specific contact resistance of the minority carrier end of heterojunction transition metal oxide/n-Si by improving the CS method (Wang W, Lin H, Yang Z, et al. An Expanded Cox and Strack Method for Precise Extraction of Specific Contact Resistance of Transition MetalOxide/n-Silicon Heterojunction[J]. IEEE Journal ofPhotovoltaics,2019,9:1113-1120). However, in order to achieve good passivation quality, a passivation layer is usually introduced between the transition metal oxide/n-Si. The insertion of the passivation layer complicates the I-V curve of the heterojunction. The method of Wang Wei et al. has been used It is impossible to explain the changes in the curve, let alone extract the accurate contact resistance.

Contents of the invention

In view of the existing simulation process that requires the input of at least a dozen physical parameters and the difficulty of fitting the doping-free heterojunction transmission model, the present invention proposes a testing method for the contact resistance of the minority carrier end of the solar cell, combined with The minority carrier terminal carrier transport model of doping-free heterojunction solar cells with passivation layer is established to establish a double (diode + resistor) equivalent circuit diagram, which can quickly obtain the key parameters of the heterojunction and achieve accurate and effective The contact resistance of the minority carrier terminal of the doping-free heterojunction with passivation layer is extracted.

The present invention is achieved through the following technical solutions:

The invention relates to a method for testing the contact resistance of the minority carrier end of a solar cell. The dV/d(lnI)-I curve is drawn through the dark-state I-V curve corresponding to the different front electrode areas S of the sample, and combined with a double (diode + resistor ) Equivalent circuit model analyzes the curve segmentally, and then calculates the resistance-electrode area reciprocal curve. After curve fitting, the slope of the straight line is the minority carrier of the doping-free heterojunction battery sample with a passivation layer. Terminal ratio contact resistance.

The sample is a doping-free heterojunction minority carrier end test sample with a passivation layer, including an n-type or p-type single crystal silicon layer as a substrate and an ohmic contact layer provided on one side of the substrate. As well as a passivation layer and a functional layer including electrodes arranged on the other side of the substrate in sequence. The sample is obtained by preparing an isolation layer using photolithography. During the preparation process, different front electrode areas S are set in the functional layer.

The passivation layer uses, but is not limited to, materials such as SiO _x , a-Si:H(i) or AlO _x .

The functional layer, when the substrate is an n-type silicon wafer, the functional layer uses but is not limited to high work function materials such as MoO _x , PEDOT:PSS or VO _x ; when the substrate is a p-type silicon wafer, the functional layer uses But it is not limited to low work function materials such as TaO _x , TiO _x or MgO.

The ohmic contact layer is the majority carrier transmission area. For n-type silicon, it is the transmission of majority carriers (electrons), but is not limited to low work function materials or n+ layers; for p-type silicon, it is the majority carrier. The transport of flow holes uses, but is not limited to, high work function materials or p+ layers.

The different front electrode areas S refer to: discs with different diameters or square discs with different side lengths, preferably discs with different diameters d and d=0.06, 0.08, 0.10, 0.12, 0.16, 0.20, 0.24cm .

The dark-state I-V curve test refers to using the four-wire method or the two-wire method to connect lines, and test to obtain the dark-state I-V curve of the sample.

The total resistance R _T of the sample is specifically: the sum of contact resistance R _C , diffusion resistance R _S and residual resistance R ₀ , where: contact resistance R _C includes the contact resistance of the heterojunction interface, functional layers, metal electrodes and The bulk resistance of a-Si:H(i); the diffusion resistance _RS is related to the thickness and resistivity of silicon; the residual resistance R ₀ is a constant value.

The double (diode + resistor) equivalent circuit model, that is, the equivalent circuit of the minority carrier terminal interface of a doping-free heterojunction with a passivation layer, includes a parallel hole current branch and an electron current branch. , where the hole current branch includes a series-connected hole diode _DP and a hole resistor _RP , and the electron current branch includes a series-connected electron diode _DN and an electronic resistor _RN .

The segmented analysis is specifically as follows: the current flowing through the test sample I= _IN + _IP , where: V is the total voltage of the equivalent circuit; I _0P and I _0N represent the currents of saturated holes and electrons respectively; R _P and _RN represent the resistance encountered in the transmission of holes and electrons respectively, q is the unit charge, and k is Boltzmann's constant, T is the absolute temperature; use the equivalent circuit to fit the dark-state IV curve of the measured doping-free heterojunction battery, and then extract the total resistance R _T from the formula:/> Where: V is the voltage applied to the test sample and n is the ideality factor. According to the equivalent circuit, it is confirmed that the slope of the first half of the linear curve of the dV/d(lnI)-I curve corresponds to the resistance during hole transmission. Therefore, the total resistance R _T is obtained by fitting the slope of the first half of the linear curve.

The resistance-electrode area reciprocal curve is the diffusion resistance _RS calculated from the total resistance _RT of the sample, and a linear curve is drawn where r= _RT - _RS changes with the reciprocal 1/S of the electrode area.

The minority carrier terminal specific contact resistance, the slope of the straight line obtained by fitting the reciprocal curve of resistance-electrode area, is the minority carrier terminal specific contact resistance ρ of the doping-free heterojunction battery sample with a passivation layer _C , specifically:

The specific steps of the photolithography method are: ① After preparing the passivation layer on the front side of the sample, continue to deposit an isolation layer; ② Spin-coat a layer of photoresist on the isolation layer; ③ Use a mask after the photoresist is dried Cover the sample for UV exposure; ④ form disk arrays of different area sizes through development; ⑤ use HF to remove the isolation layer under these disks; ⑥ use a mask to deposit functional layers/electrodes on the exposed passivation layer.

The mask method refers to: preparing a passivation layer on the front side of the sample and then using metal masks with different area sizes to align the sample to deposit functional layers/electrodes.

Technical effect

The present invention optimizes the traditional CS method, because the traditional CS and TLM methods can only be applied in the case of ohmic contact. At the same time, the improved CS method is further improved. The main reason is that the improved CS method is only suitable for extracting the specific contact resistance of the heterojunction transition metal oxide/n-Si minority carrier end. After introducing a passivation layer (such as intrinsic amorphous silicon or silicon oxide) into the heterojunction, the conductive characteristics of the heterojunction will become extremely complex, and the quality of the minority carrier end is very susceptible to the heterojunction interface characteristics. , the conductivity and work function of heterojunction materials are affected, and it is very easy to form problems such as S-shaped curves and poor thermal stability. If we blindly observe the characteristics of heterojunctions by preparing full cells, it will not only greatly increase the experimental period and difficulty, but also fail to characterize its characteristics well. The present invention can effectively test the contact characteristics of the minority carrier end of the heterojunction with a passivation layer by adopting the expanded CS method and combining it with the analysis method of the dark state I-V curve.

Compared with the existing technology, the contact resistance of the minority carrier terminal can be extracted more effectively and accurately through the present invention, and the method is simple and easy to implement, providing a new way to measure the electrical characteristics of doping-free heterojunction solar cells. At the same time, the present invention re-modifies and improves the contact resistance testing method around the characteristics of doping-free heterojunctions, so that it can be effectively used in material screening and heterojunction research, shortening the research cycle and improving battery efficiency.

Description of drawings

Figure 1 is a schematic diagram of carrier transmission at the minority carrier terminal interface of a doping-free heterojunction with a passivation layer;

Figure 2 is the equivalent circuit diagram of the minority carrier terminal interface of a doping-free heterojunction with a passivation layer;

Figure 3 is a schematic diagram of a sample obtained by photolithography using a metal mask;

Figure 4 is a schematic diagram of the four-probe method for testing the minority carrier terminal ratio contact resistance sample of a doping-free heterojunction;

Figure 5 is the result of fitting the device test sample (d=0.08cm) and the equivalent circuit of the embodiment;

Figure 6 shows the r-1/S curve and fitting results obtained from the device test of the embodiment;

Figure 7 is a flow chart of an embodiment.

Detailed ways

As shown in Figure 7, this embodiment involves a method for testing the contact resistance of the minority carrier terminal of a doping-free heterojunction solar cell with a passivation layer, using n-type silicon as the substrate and using Ag/MoO _x /a-Si:H(i)/n-Si heterojunction is used as a sample for the minority carrier end contact resistance test of doping-free heterojunction cells, including the following steps:

Step 1, select a single-sided polished n-type (1Ω.cm) silicon wafer with a thickness of 250 μm as the substrate, clean the silicon wafer using the standard RCA process, and use 4% HF to remove the oxide layer on the surface of the wafer;

Step 2: Use the plasma enhanced chemical vapor deposition (PECVD) method to deposit a 4nm thick a-Si:H(i) film on the n-type silicon substrate as a passivation layer;

Step 3: Deposit a 75nm SiNx film as an isolation layer on the amorphous silicon film through plasma enhanced chemical vapor deposition (PECVD) equipment.

Step 4: Spin-coat photoresist on the isolation layer, pattern the disk array using a metal mask using photolithography, and then use a dilute 4wt% HF solution to remove the SiN _x film under these disks, and a-Si: H(i) film is exposed (as shown in Figure 3);

Step 5, using a mask with a photolithographic pattern, deposit a _10nm /200nm thick MoO :H(i) film to form Ag/MoO _x /a-Si:H(i)/n-Si heterojunction as shown in Figure 4;

Step 6: Deposit a LiF/Al (0.5nm/400nm) film on the back side of n-type silicon by thermal evaporation to form an ohmic contact;

Step 7: Use the KEITHLEY2400 parameter analyzer to test the sample using the four-probe method to test the dark state I-V curves corresponding to different disk areas S;

Step 8, by taking the dark state IV curve data of d=0.08cm, obtain the corresponding JV curve according to S=πd ² /4, and fit the obtained data to the equivalent circuit, as shown in Figure 5. According to the fitting curve, the linear curve A and point B of the first half of the dV/d(lnJ)-J curve are obtained, which correspond to when the hole current dominates in the JV curve. Therefore, the linear curve of the first half of the dV/d(lnJ)-J curve is taken. The slope of can reflect the transmission resistance of holes at the minority carrier end;

Step 9: Draw the dV/d(lnI)-I curve according to different disk areas S, and obtain the total resistance R _T according to the slope of the first half of the linear curve of the curve fitting. n is the disk serial number, and d is the diameter of the disk. , R _T is the corresponding resistance value, and the results are shown in Table 1.

Table 1

n 1 2 3 4 5 6 7 d(cm) 0.06 0.08 0.10 0.12 0.16 0.20 0.24 R _T (Ω) 90.00 48.59 27.82 19.60 10.83 7.85 5.33

Step 10, the resistivity of the n-type single crystal silicon wafer used is 1Ω·cm and the thickness is 250μm, so the diffusion resistance is calculated

Then use r = R _T - R _S to obtain the r value, and the results are shown in Table 2.

Table 2

n 1 2 3 4 5 6 7 R _S (Ω) 5.47 3.57 2.50 1.84 1.11 0.74 0.52 r(Ω) 84.53 45.03 25.33 17.76 9.73 7.11 4.81

Step 11: Calculate the reciprocal disk area 1/S corresponding to different disk diameters d according to S=πd ² /4.

As shown in Figure 6, the r values obtained for each disk are sequentially changed according to the reciprocal 1/S of the area of each disk to form a linear curve r=A(1/S)+B. The slope of the fitted straight line A=0.256Ω·cm ² is obtained, so the minority carrier terminal contact resistance ρ _C of the doping-free heterojunction battery is calculated to be 0.256Ω·cm ² .

Compared with the existing technology, the present invention adopts an expanded CS method combined with the analysis method of the dark state I-V curve to effectively test the contact characteristics of the minority carrier end of the heterojunction with a passivation layer. This invention combines the formula of the transmission model to establish an equivalent circuit diagram of the transmission model, and combines the experimental results to accurately obtain the characterization of the contact characteristics of the minority terminal with a passivation layer.

The above-mentioned specific implementations can be partially adjusted in different ways by those skilled in the art without departing from the principles and purposes of the present invention. The scope of protection of the present invention is subject to the claims and is not limited by the above-mentioned specific implementations. Each implementation within the scope is subject to this invention.

Claims (7)

1. A testing method for the contact resistance of the minority carrier end of a solar cell, which is characterized in that the dV/d(lnJ)-J curve is drawn through the dark state I-V curve corresponding to the different front electrode areas S of the sample, and combined with the double ( Diode + resistor) equivalent circuit model performs segmental analysis on the curve, and then calculates the resistance-electrode area reciprocal curve. The slope of the straight line obtained by curve fitting is the minority of doping-free heterojunction battery samples with passivation layer. Carrier terminal ratio contact resistance, where: J is the current density; The sample is a doping-free heterojunction minority carrier end test sample with a passivation layer, including an n-type or p-type single crystal silicon layer as a substrate and an ohmic contact layer provided on one side of the substrate. As well as a passivation layer and a functional layer including electrodes arranged on the other side of the substrate in sequence. The sample is obtained by preparing an isolation layer using photolithography. During the preparation process, different front electrode areas S are set in the functional layer; The double (diode + resistor) equivalent circuit model, that is, the equivalent circuit of the minority carrier terminal interface of a doping-free heterojunction with a passivation layer, includes a parallel hole current branch and an electron current branch. , where the hole current branch includes a series-connected hole diode D _P and a hole resistor R _P , and the electron current branch includes a series-connected electron diode D _N and an electronic resistor R _N ; The segmented analysis is specifically as follows: the current flowing through the test sample I= _IN + _IP , where: V is the total voltage of the equivalent circuit; I _0P and I _0N represent the currents of saturated holes and electrons respectively; R _P and _RN represent the resistance encountered in the transmission of holes and electrons respectively, q is the unit charge, and k is Boltzmann's constant, T is the absolute temperature; use the equivalent circuit to fit the dark-state IV curve of the measured doping-free heterojunction battery, and then extract the total resistance R _T from the formula:/> Among them: V is the voltage applied to the test sample, n is the ideal factor. According to the equivalent circuit, it is confirmed that the slope of the first half of the linear curve of the dV/d(lnJ)-J curve corresponds to the resistance during hole transmission, so the first half of the linear curve is fitted The slope of the curve gives the total resistance R _T ; For the reciprocal curve of resistance-electrode area, a linear curve of r= _RT - _RS changes with the reciprocal 1/S of the electrode area is drawn through the total resistance R _T of the sample and the diffusion resistance R _S. 2. The testing method of minority carrier terminal contact resistance of solar cells according to claim 1, characterized in that, when the substrate is an n-type silicon wafer, the functional layer adopts MoO _x and PEDOT: PSS or VO _x material; when the substrate is a p-type silicon wafer, the functional layer uses TaO _x , TiO _x or MgO material; The passivation layer adopts SiO _x , a-Si:H(i) or AlO _x materials. 3. The testing method of minority carrier end contact resistance of solar cells according to claim 1, characterized in that the ohmic contact layer is a majority carrier transmission area, and for n-type silicon, it is a majority carrier or For the transmission of electrons, low work function materials or n+ layers are used; for the transmission of majority carrier holes in p-type silicon, high work function materials or p+ layers are used. 4. The method for testing the contact resistance of the minority carrier terminal of a solar cell according to claim 1, wherein the different front electrode areas S refer to: disks with different diameters or square disks with different side lengths. . 5. The testing method of minority carrier end contact resistance of solar cells according to claim 1 or 4, characterized in that the different front electrode areas S are disks with different diameters d and d=0.06, 0.08 ,0.10,0.12,0.16,0.20,0.24cm. 6. The testing method of minority carrier terminal contact resistance of solar cells according to claim 1 or 2, characterized in that the dark state I-V curve test refers to: using a four-wire method or a two-wire method to connect lines and test Obtain the dark state I-V curve of the sample; The total resistance R _T of the sample is specifically: the sum of contact resistance R _C , diffusion resistance R _S and residual resistance R ₀ , where: contact resistance R _C includes the contact resistance of the heterojunction interface, functional layers, metal electrodes and The bulk resistance of a-Si:H(i); the diffusion resistance _RS is related to the thickness and resistivity of silicon; the residual resistance R ₀ is a constant value. 7. The testing method of minority carrier terminal contact resistance of solar cells according to claim 6, characterized in that the minority carrier terminal contact resistance is obtained by fitting a straight line according to the resistance-electrode area reciprocal curve. The slope is the minority carrier terminal specific contact resistance ρ _C of the doping-free heterojunction battery sample with a passivation layer, specifically: Among them: S is the front electrode area, and d is the diameter.