CN113630954A - Circuit board - Google Patents
Circuit board Download PDFInfo
- Publication number
- CN113630954A CN113630954A CN202010462288.XA CN202010462288A CN113630954A CN 113630954 A CN113630954 A CN 113630954A CN 202010462288 A CN202010462288 A CN 202010462288A CN 113630954 A CN113630954 A CN 113630954A
- Authority
- CN
- China
- Prior art keywords
- circuit board
- alignment mark
- circuit
- solder mask
- width
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000002184 metal Substances 0.000 claims abstract description 59
- 229910052751 metal Inorganic materials 0.000 claims abstract description 59
- 229910000679 solder Inorganic materials 0.000 claims abstract description 41
- 239000000758 substrate Substances 0.000 claims abstract description 23
- 230000005540 biological transmission Effects 0.000 claims description 10
- 238000000059 patterning Methods 0.000 claims 1
- 238000000034 method Methods 0.000 description 12
- 238000001514 detection method Methods 0.000 description 5
- 238000007639 printing Methods 0.000 description 5
- 238000012937 correction Methods 0.000 description 3
- 239000000463 material Substances 0.000 description 3
- 150000002739 metals Chemical class 0.000 description 3
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 2
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 2
- 239000004642 Polyimide Substances 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 2
- 239000010949 copper Substances 0.000 description 2
- 230000002950 deficient Effects 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- 238000005259 measurement Methods 0.000 description 2
- 229920000139 polyethylene terephthalate Polymers 0.000 description 2
- 239000005020 polyethylene terephthalate Substances 0.000 description 2
- 229920001721 polyimide Polymers 0.000 description 2
- 229910045601 alloy Inorganic materials 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- 230000004075 alteration Effects 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 238000001465 metallisation Methods 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- -1 polyethylene terephthalate Polymers 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 238000007650 screen-printing Methods 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
- 238000012360 testing method Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0266—Marks, test patterns or identification means
- H05K1/0269—Marks, test patterns or identification means for visual or optical inspection
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/28—Applying non-metallic protective coatings
- H05K3/282—Applying non-metallic protective coatings for inhibiting the corrosion of the circuit, e.g. for preserving the solderability
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09818—Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
- H05K2201/09918—Optically detected marks used for aligning tool relative to the PCB, e.g. for mounting of components
Abstract
The invention relates to a circuit board. The circuit board is provided with a substrate, a patterned metal layer and a solder mask layer, wherein the patterned metal layer is formed on the substrate, the solder mask layer is formed on the patterned metal layer, a first part and a second part of the solder mask layer are respectively used for covering a plurality of circuits and alignment marks of the patterned metal layer, whether the solder mask layer deviates or not can be judged according to the overlapping degree of the alignment marks and the second part, and when the second part completely covers the alignment marks, the first part can be judged to be correctly covered on a preset area.
Description
Technical Field
The present invention relates to a circuit board, and more particularly, to a circuit board capable of detecting the offset of a solder mask layer quickly and accurately.
Background
The method comprises the steps of coating solder-resisting ink on a circuit board by a screen printing technology to prevent a circuit from being damaged in a subsequent bonding process, wherein the circuit pattern of the circuit board is very fine, the solder-resisting ink is offset when printed, the solder-resisting ink can cover inner pins and outer pins for bonding other electronic components to cause bonding failure, a technician needs to test and print the solder-resisting ink in a small amount before continuous printing, measure the offset of the solder-resisting ink and carry out process correction to avoid producing a large amount of defective products, and the precision of manual measurement is too coarse, so that the precision of the manual measurement cannot meet the specification of fine products after correction.
Disclosure of Invention
The invention aims to provide a circuit board with alignment marks, and detection equipment can quickly and accurately analyze the offset of solder resist ink through the alignment marks so as to facilitate subsequent correction.
The invention discloses a circuit board which comprises a substrate, a patterned metal layer and a solder mask layer, wherein the patterned metal layer is formed on the substrate and is provided with a plurality of circuits and at least one alignment mark, the alignment mark is positioned on the outer side of the circuits, the solder mask layer is formed on the patterned metal layer and is provided with a first part and at least one second part, the first part covers the circuits, and the second part completely covers the alignment mark.
Preferably, the alignment mark has a first width, and the second portion of the solder mask has a second width, wherein the second width is greater than the first width.
Preferably, the difference between the second width and the first width is not less than 80 μm.
Preferably, the patterned metal layer has two alignment marks, and the alignment marks are respectively located on two sides of the circuit.
Preferably, the alignment marks are located on the same horizontal line.
Preferably, the alignment marks are located on different horizontal lines.
Preferably, the patterned metal layer further has at least one supporting metal, the supporting metal is located outside the circuit, and the alignment mark is located between the supporting metal and the circuit.
Preferably, the alignment mark is not connected to the supporting metal.
Preferably, the alignment mark is not connected to the circuit.
Preferably, the patterned metal layer further has at least one supporting metal, the supporting metal is located outside the circuit, a side surface of the supporting metal faces the circuit, a groove is recessed in the side surface, and the alignment mark is located in the groove.
Preferably, the substrate has a plurality of transmission holes, the transmission holes are arranged on two sides of the substrate, the supporting metal has a plurality of exposed openings, the exposed openings respectively expose the transmission holes, and the groove is not communicated with the exposed openings.
Preferably, the groove is located between two of the exposed openings.
The detection equipment automatically captures an image to judge the overlapping degree of the second part and the alignment mark, whether the first part correctly covers the preset area can be known according to the overlapping degree, when the second part cannot completely cover the alignment mark, the offset of the solder mask layer is beyond the specification, the first part does not correctly cover the preset area, the processing parameters are required to be corrected to adjust the position of the solder mask layer, otherwise, when the second part completely covers the alignment mark, the solder mask layer correctly covers the preset area.
Drawings
FIG. 1: according to the first embodiment of the present invention, a top view of a circuit board.
FIG. 2: according to a second embodiment of the present invention, a top view of a circuit board.
FIG. 3: according to a third embodiment of the present invention, a top view of a circuit board.
FIG. 4: according to the fourth embodiment of the present invention, a top view of a circuit board.
[ description of main element symbols ]
100: circuit board 110: substrate
111, drive hole 120, patterned metal layer
121, circuit 122, alignment mark
123 supporting metal 123a side face
130 solder mask layer 131 first portion
132 second portion W1 first width
W2 second Width
Detailed Description
Referring to fig. 1, which is a first embodiment of the present invention, a circuit board 100 has a substrate 110 and a patterned metal layer 120, the patterned metal layer 120 is formed on the substrate 110 and has a plurality of lines 121 and at least one alignment mark 122, the lines 121 are arranged on the substrate 110, the alignment mark 122 is located outside the lines 121, wherein the substrate 110 may be made of flexible or inflexible materials such as Polyimide (PI), polyethylene terephthalate (PET), metal, glass, or ceramic, the patterned metal layer 120 is selected from copper, nickel, gold, and other metals or alloys, in this embodiment, a fine pattern is transferred to the substrate through a conventional metal etching process, so that the lines 121 and the alignment mark 122 are formed on the substrate 110 through the same metal etching process, both of the materials are copper, in other embodiments, the lines 121 and the alignment marks 122 can be sequentially formed on the substrate 110 by different metal deposition processes, and are made of different metals.
Referring to fig. 1, the circuit board 100 further has a solder mask layer (solder resist)130 formed on the patterned metal layer 120, the solder mask layer 130 has a first portion 131 and a second portion 132, the first portion 131 is used to cover the circuit 121 to prevent the circuit 121 from being damaged in the subsequent bonding process, but the first portion 131 does not cover the inner leads and the outer leads for bonding other electronic components, the second portion 132 is used to cover the alignment mark 122, the first portion 131 and the second portion 132 of the solder mask layer 130 are printed on the patterned metal layer 120 through the same solder mask printing process, but are not connected to each other, before large-batch continuous printing, a small amount of solder mask ink can be printed, and the overlapping degree of the second portion 132 of the solder mask layer 130 and the alignment mark 122 can be known by a detection device to determine whether the solder mask layer 130 is offset, if the second portion 132 completely covers the alignment mark 122, indicating that the solder mask 130 is shifted to cause the first portion 131 not to cover the predetermined area correctly, the detecting system can correct the process parameters according to the shift of the second portion 132 to make the second portion 132 completely cover the alignment mark 122, when the second portion 132 completely covers the alignment mark 122, indicating that the first portion 132 also covers the predetermined area correctly, and in addition, the detecting equipment can also be used for detecting the overlapping degree of the second portion 132 and the alignment mark 122 in the continuous printing process to correct the process parameters in real time, thereby avoiding generating a large amount of defective products.
Preferably, the patterned metal layer 120 has two alignment marks 122 and the solder mask 130 has two second portions 132, the alignment marks 122 are located on two sides of the circuit 121, and the second portions 132 respectively cover the alignment marks 122, in this embodiment, the alignment marks 122 are located on the same horizontal line and are not connected to the circuit 121, so that the alignment marks 122 are electrically insulated from the circuit 121.
The detection equipment of the solder mask ink printing workstation comprises a CCD camera and analysis software, the CCD camera can automatically capture images after being positioned, and the analysis software is provided to calculate the overlapping degree of the alignment mark 122 and the second portion 132 of the solder mask layer 130, so that the alignment marks 122 on both sides of the circuit 121 need to be simultaneously located within the image capture range of the CCD camera, and then the offset on both sides of the solder mask layer 130 can be simultaneously analyzed.
Through the alignment mark 122 and the second portion 132 of the solder mask layer 130, the CCD camera can be quickly positioned to capture an image, and compared with manual detection, the analysis software can accurately analyze whether the second portion 132 in the image is shifted, and when the solder mask ink is tried, if the second portion 132 does not completely cover the alignment mark 122, the analysis software can calculate the offset of the solder mask layer 130 according to the distance between the edges of the two, and adjust the position of the screen plate according to the offset and the offset direction of the second portion 132, so that the solder mask layer 130 is formed within a predetermined range.
Referring to fig. 1, along the same direction, the alignment mark 122 has a first width W1, the second portion 132 of the solder mask layer 130 has a second width W2, preferably, the second width W2 is greater than the first width W1, the invention is not limited to the shapes of the alignment mark 122 and the second portion 132, the alignment mark 122 and the second portion 132 of the solder mask layer 130 can have the same shape, such as a circle, an ellipse, a triangle, a rectangle, or a polygon, but the size of the alignment mark 122 needs to be smaller than the size of the second portion 132 of the solder mask layer 130, the size difference between the alignment mark 122 and the second portion 132 can be designed according to an allowable error range, when the second portion 132 completely covers the alignment mark 122, it indicates that the solder mask layer 130 is located at a correct position or its offset is within an allowable error range, preferably, the difference between the second width W2 and the first width W1 is not smaller than 80 μm, when the second portion 132 and the alignment mark 122 are circular, the radius difference between the two is not less than 40 μm, in this embodiment, the alignment mark 122 is a circular metal dot with a diameter of 0.25mm, and the second portion 132 of the solder mask 130 is a circular solder mask ink dot with a diameter of 0.4 mm.
Referring to fig. 2, a second embodiment of the present invention is different from the first embodiment in that the patterned metal layer 120 further has at least one supporting metal 123, the supporting metal 123 is located outside the circuit 121, and the alignment mark 122 is located between the supporting metal 123 and the circuit 121, when the substrate 110 is made of a flexible material, the supporting metal 123 is used to support the substrate 110 to prevent the substrate 110 from twisting, slipping or wrinkling during roll-to-roll (roll) process, and preferably, the patterned metal layer 120 has two supporting metals 123 symmetrically located at two sides of the circuit 121.
Referring to fig. 2, the supporting metal 123 has a side surface 123a, the side surface 123a faces the circuit 122, in this embodiment, a semicircular groove 123b is recessed in the side surface 123a, an opening of the groove 123b faces the first portion 131 of the solder mask layer 130, the alignment mark 122 is located in the groove 123b, the alignment mark 122 is not connected to the supporting metal 123, the size of the groove 123b is adjusted according to different requirements, and after the solder mask layer 130 is printed on the patterned metal layer 120, the second portion 132 of the solder mask layer 130 may protrude from the side surface 123a or not protrude from the side surface 123 a.
Referring to fig. 2, the substrate 110 has a plurality of transmission holes 111, the transmission holes 111 are arranged on two sides of the substrate 110, preferably, the supporting metal 123 has a plurality of exposed openings 123c, the exposed openings 123c respectively expose the transmission holes 111, wherein the recess 123b is not connected to the exposed openings 123c, and the recess 123b is located between two of the exposed openings 123 c.
Please refer to fig. 3, which is a third embodiment of the present invention, the difference between the third embodiment and the second embodiment is that the groove 123b is a rectangular groove, which is different from the semicircular groove of the second embodiment, but the present invention does not limit the shape of the groove 123b, and different shapes of grooves can be formed on the supporting metal 123 to accommodate the alignment mark 122 according to various design requirements.
Please refer to fig. 4, which is a fourth embodiment of the present invention, and the difference between the second embodiment and the fourth embodiment is that the supporting metal 123 is located between the transmission hole 111 and the circuit 121, and the alignment marks 122 are located on different horizontal lines, wherein the supporting metal 123 of the fourth embodiment does not have the exposed opening 123 c.
Although the present invention has been described with reference to a preferred embodiment, it should be understood that various changes, substitutions and alterations can be made herein without departing from the spirit and scope of the invention as defined by the appended claims.
Claims (12)
1. A circuit board, comprising:
a substrate;
the patterning metal layer is formed on the substrate and provided with a plurality of circuits and at least one alignment mark, and the alignment mark is positioned on the outer side of the circuits; and
the solder mask layer is formed on the patterned metal layer and has a first portion and at least one second portion, the first portion covers the circuit, and the second portion completely covers the alignment mark.
2. The circuit board of claim 1, wherein the alignment mark has a first width, and the second portion of the solder mask has a second width, the second width being greater than the first width.
3. The circuit board of claim 2, wherein the difference between the second width and the first width is not less than 80 μm.
4. The circuit board of claim 1, wherein the patterned metal layer has two alignment marks, and the alignment marks are respectively located on two sides of the circuit.
5. The circuit board of claim 4, wherein the alignment marks are located on the same horizontal line.
6. The circuit board of claim 4, wherein the alignment marks are located on different horizontal lines.
7. The circuit board of claim 1, wherein the patterned metal layer further comprises at least one supporting metal, the supporting metal is located outside the circuit, and the alignment mark is located between the supporting metal and the circuit.
8. The circuit board of claim 7, wherein the alignment mark is not connected to the supporting metal.
9. The wiring board of claim 7 or 8, wherein the alignment mark is not connected to the circuit.
10. The circuit board of claim 1, wherein the patterned metal layer further comprises at least one supporting metal, the supporting metal is located outside the circuit, a side surface of the supporting metal faces the circuit, a groove is recessed in the side surface, and the alignment mark is located in the groove.
11. The circuit board of claim 10, wherein the substrate has a plurality of transmission holes, the transmission holes are arranged on two sides of the substrate, the supporting metal has a plurality of exposed openings, the exposed openings respectively expose the transmission holes, and the recess is not connected to the exposed openings.
12. The circuit board of claim 11, wherein the recess is located between two of the exposed openings.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW109115463 | 2020-05-08 | ||
| TW109115463A TWI715492B (en) | 2020-05-08 | 2020-05-08 | Circuit board |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN113630954A true CN113630954A (en) | 2021-11-09 |
Family
ID=75237368
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202010462288.XA Pending CN113630954A (en) | 2020-05-08 | 2020-05-27 | Circuit board |
Country Status (2)
| Country | Link |
|---|---|
| CN (1) | CN113630954A (en) |
| TW (1) | TWI715492B (en) |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH11307890A (en) * | 1998-04-17 | 1999-11-05 | Sony Corp | Printed wiring board |
| JP2003264349A (en) * | 2003-03-03 | 2003-09-19 | Canon Inc | Alignment mark structure in electric circuit board |
| TW200810046A (en) * | 2006-08-07 | 2008-02-16 | Chipmos Technologies Inc | Tape structure for packaging |
| US20130075135A1 (en) * | 2011-09-26 | 2013-03-28 | Jee-Soo Mok | Printed circuit board and manufacturing method thereof |
| TW201322399A (en) * | 2011-11-29 | 2013-06-01 | Powertech Technology Inc | Wiring substrate for optically detecting opening shift of solder mask within tolerance range |
| CN106061108A (en) * | 2016-08-12 | 2016-10-26 | 广德新三联电子有限公司 | Printed circuit board welding prevention counterpoint structure |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1265691C (en) * | 1996-12-19 | 2006-07-19 | 揖斐电株式会社 | Printed wiring board and method for manufacturing the same |
| JP3492350B2 (en) | 2002-04-12 | 2004-02-03 | 新藤電子工業株式会社 | Circuit board and method of manufacturing circuit board |
| TWI491333B (en) * | 2014-04-17 | 2015-07-01 | Chipmos Technologies Inc | Film package structure |
-
2020
- 2020-05-08 TW TW109115463A patent/TWI715492B/en active
- 2020-05-27 CN CN202010462288.XA patent/CN113630954A/en active Pending
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH11307890A (en) * | 1998-04-17 | 1999-11-05 | Sony Corp | Printed wiring board |
| JP2003264349A (en) * | 2003-03-03 | 2003-09-19 | Canon Inc | Alignment mark structure in electric circuit board |
| TW200810046A (en) * | 2006-08-07 | 2008-02-16 | Chipmos Technologies Inc | Tape structure for packaging |
| US20130075135A1 (en) * | 2011-09-26 | 2013-03-28 | Jee-Soo Mok | Printed circuit board and manufacturing method thereof |
| TW201322399A (en) * | 2011-11-29 | 2013-06-01 | Powertech Technology Inc | Wiring substrate for optically detecting opening shift of solder mask within tolerance range |
| CN106061108A (en) * | 2016-08-12 | 2016-10-26 | 广德新三联电子有限公司 | Printed circuit board welding prevention counterpoint structure |
Also Published As
| Publication number | Publication date |
|---|---|
| TW202143803A (en) | 2021-11-16 |
| TWI715492B (en) | 2021-01-01 |
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|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| WD01 | Invention patent application deemed withdrawn after publication | ||
| WD01 | Invention patent application deemed withdrawn after publication |
Application publication date: 20211109 |