CN113630184A - Optical fiber communication network system - Google Patents

Optical fiber communication network system Download PDF

Info

Publication number
CN113630184A
CN113630184A CN202110971806.5A CN202110971806A CN113630184A CN 113630184 A CN113630184 A CN 113630184A CN 202110971806 A CN202110971806 A CN 202110971806A CN 113630184 A CN113630184 A CN 113630184A
Authority
CN
China
Prior art keywords
optical fiber
communication card
data
cpu
fiber communication
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202110971806.5A
Other languages
Chinese (zh)
Inventor
张�林
童强
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Beijing Huazhixin Technology Development Co ltd
Original Assignee
Beijing Huazhixin Technology Development Co ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Beijing Huazhixin Technology Development Co ltd filed Critical Beijing Huazhixin Technology Development Co ltd
Priority to CN202110971806.5A priority Critical patent/CN113630184A/en
Publication of CN113630184A publication Critical patent/CN113630184A/en
Pending legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B10/00Transmission systems employing electromagnetic waves other than radio-waves, e.g. infrared, visible or ultraviolet light, or employing corpuscular radiation, e.g. quantum communication
    • H04B10/25Arrangements specific to fibre transmission
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04QSELECTING
    • H04Q11/00Selecting arrangements for multiplex systems
    • H04Q11/0001Selecting arrangements for multiplex systems using optical switching
    • H04Q11/0005Switch and router aspects

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Signal Processing (AREA)
  • Optical Communication System (AREA)

Abstract

The application provides an optical fiber communication network system, which comprises an optical fiber communication card, a PCIE switching module and a plurality of CPUs, wherein one of the CPUs is a master CPU, and the other CPUs are slave CPUs; the master CPU is connected with the RC end of the PCIE switching module, the slave CPU is connected with the EP end of the PCIE switching module, the PCIE switching module is connected with the optical fiber communication card, and the optical fiber communication card is used for realizing data interaction with an optical fiber switch; the slave CPU performs data interaction with the main CPU through the PCIE switching module; and the main CPU performs data interaction with the optical fiber communication card through the PCIE switching module. The resource idle time of the optical fiber communication card can be reduced, and the utilization rate of the optical fiber communication card is improved.

Description

Optical fiber communication network system
Technical Field
The present application relates to the field of communications technologies, and in particular, to an optical fiber communication network system.
Background
The degree of integration of modern avionics systems is continuously increasing, from discrete avionics systems in the 70 s of the 20 th century to combined avionics systems and then to the now advanced integrated avionics systems, the original single-node communication is gradually replaced by multi-node complex communication and the original single communication link is gradually replaced by a unified communication network. The difference between an avionic network and a general commercial storage area network is that the avionic network mainly operates in extremely severe environments such as aerospace and the like, and high reliability and stability are required to be adopted when designing equipment and networks according to the particularity of the working environment. The formulation of the fibre Channel Protocol (fibre Channel Protocol) greatly meets this requirement, and as a result fibre Channel networks (FC networks) are becoming more and more widely used in modern avionics systems. Currently, optical fiber networks are rapidly developed in the aviation industry of China and have been applied to various machine types.
However, in the existing optical fiber network system, in order to ensure timeliness and independence of data transmission, the optical fiber network system usually adopts a physical structure that one CPU accesses one optical fiber communication card, and directly transmits data, and cannot support multiple CPUs to access one optical fiber communication card at the same time, which results in low utilization rate of the optical fiber communication card, resource waste and higher system cost. Therefore, in order to solve the problem of resource scheduling of data sharing by using one optical fiber communication card, the problem of implementing high-speed optical fiber transmission channel sharing is a problem that needs to be solved by those skilled in the art at present.
Disclosure of Invention
In view of the above, a main objective of the present application is to provide an optical fiber communication network system, which can reduce the resource idle time of an optical fiber communication card and improve the utilization rate of the optical fiber communication card.
The application provides an optical fiber communication network system, which comprises an optical fiber communication card, a PCIE switching module and a plurality of CPUs, wherein one of the CPUs is a master CPU, and the other CPUs are slave CPUs;
the master CPU is connected with the RC end of the PCIE switching module, the slave CPU is connected with the EP end of the PCIE switching module, the PCIE switching module is connected with the optical fiber communication card, and the optical fiber communication card is used for realizing data interaction with an optical fiber switch;
the slave CPU performs data interaction with the main CPU through the PCIE switching module; and the main CPU performs data interaction with the optical fiber communication card through the PCIE switching module.
Therefore, according to the application, the optical fiber communication card is hung on the main CPU through the PCIE switching module, the rest of the slave CPUs access the main CPU through the PCIE switching module and realize data interaction with the main CPU through the PCIE switching module, and the main CPU realizes data interaction with the optical fiber communication card through the PCIE switching module, so that the purpose that a plurality of CPUs share one optical fiber communication card is realized, the resource idle time of the optical fiber communication card is reduced, and the utilization rate of the optical fiber communication card is improved.
Optionally, when the master CPU sends data, the data is sent to the PCIE switch module in a DMA transfer manner, and the data is sent to the optical fiber communication card or the slave CPU through the transfer of the PCIE switch module.
The main CPU serves as an RC end of the PCIE switch module, so that data read/write operation can be achieved, and data can be transmitted in a DMA transmission manner.
Optionally, the main CPU reads data from the optical fiber communication card or the memory of the CPU through the PCIE switch module according to the received MSI interrupt.
Optionally, the MSI interrupt carries an MSI address, and the master CPU reads data of the optical fiber communication card or the slave CPU connected to the port of the PCIE switch module corresponding to the MSI address according to a correspondence between a preconfigured MSI address and the port of the PCIE switch module.
Therefore, when the main CPU needs to receive data, the optical fiber communication card or the slave CPU sends an MSI interrupt to the main CPU, the MSI interrupt carries an MSI address, and the MSI address and the port of the PCIE switch module have a pre-configured corresponding relationship, so that the main CPU can read data in the memory of the optical fiber communication card or the slave CPU connected to the port of the PCIE switch module corresponding to the MSI address according to the MSI interrupt, thereby implementing data reception of the main CPU.
Optionally, when the slave CPU sends data to the optical fiber communication card, the master CPU reads data from the memory of the slave CPU through the PCIE switch module according to the MSI interrupt by sending an MSI interrupt to the master CPU, and sends the data to the optical fiber communication card through the PCIE switch module.
Optionally, when the slave CPU receives the data of the optical fiber communication card, the optical fiber communication card sends an MSI interrupt to the master CPU, and the master CPU reads data from the memory of the optical fiber communication card through the PCIE switch module according to the MSI interrupt, and sends the data to the CPU through the PCIE switch module.
Therefore, data interaction between the slave CPU and the optical fiber communication card needs to be completed through the PCIE switching module and the master CPU, when the slave CPU needs to send data to the optical fiber communication card, the master CPU reads the data needing to be sent by the slave CPU through the PCIE switching module by sending MSI interruption to the master CPU, and sends the data to the optical fiber communication card through the PCIE switching module. On the contrary, when the slave CPU needs to receive the data of the optical fiber communication card, the optical fiber communication card sends the MSI interrupt to the master CPU, and the master CPU reads the data of the optical fiber communication card through the PCIE switch module and sends the data to the slave CPU through the PCIE switch module. Through the PCIE switching module, data interaction between a plurality of slave CPUs and the optical fiber communication card is realized.
These and other aspects of the present application will be more readily apparent from the following description of the embodiment(s).
Drawings
Fig. 1 is an architecture diagram of a fiber optic communication network system according to an embodiment of the present disclosure;
fig. 2 is a communication flow chart of a plurality of CPUs and an optical fiber communication card according to an embodiment of the present application.
It should be understood that the dimensions and forms of the various blocks in the block diagrams described above are for reference only and should not be construed as exclusive of the embodiments of the present application. The relative positions and the inclusion relations among the blocks shown in the structural schematic diagram are only used for schematically representing the structural associations among the blocks, and do not limit the physical connection manner of the embodiment of the application.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all the embodiments. The components of the embodiments of the present application, generally described and illustrated in the figures herein, can be arranged and designed in a wide variety of different configurations. Thus, the following detailed description of the embodiments of the present application, presented in the accompanying drawings, is not intended to limit the scope of the claimed application, but is merely representative of selected embodiments of the application. All other embodiments, which can be derived by a person skilled in the art from the embodiments of the present application without making any creative effort, shall fall within the protection scope of the present application.
The term "comprising" as used in the specification and claims should not be construed as being limited to the contents listed thereafter; it does not exclude other elements or steps. It should therefore be interpreted as specifying the presence of the stated features, integers, steps or components as referred to, but does not preclude the presence or addition of one or more other features, integers, steps or components, and groups thereof. Thus, the expression "an apparatus comprising the devices a and B" should not be limited to an apparatus consisting of only the components a and B.
Reference in the specification to "one embodiment" or "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment of the application. Thus, appearances of the phrases "in one embodiment" or "in an embodiment" in various places throughout this specification are not necessarily all referring to the same embodiment, but may. Furthermore, the particular features, structures, or characteristics may be combined in any suitable manner in one or more embodiments, as would be apparent to one of ordinary skill in the art from this disclosure.
The embodiments of the present application will be described in detail below with reference to the accompanying drawings.
Fig. 1 is an architecture diagram of an optical fiber communication network system according to an embodiment of the present application, where the optical fiber communication network system is based on a PCIE switching technology, and can enable a plurality of CPUs to share resources of an optical fiber communication card, reduce resource idle time of the optical fiber communication card, and increase utilization rate of the optical fiber communication card. As shown in fig. 1, the optical fiber communication network system includes: a plurality of CPUs 100 (including CPU1, CPU2, CPU3 … … CPUn), a PCIE switch module 200, a fiber communication card 300;
in this embodiment, the PCIE switch module 200 has an RC port and an EP port, where the RC (root complex) port is a root node in the PCIE tree structure, and the EP (end point) port is a leaf node in the PCIE tree structure. In the embodiment of the present application, a CPU1 in a plurality of CPUs 100 is connected to an RC end of a PCIE switch module 200, the remaining CPUs 2 and 3 … CPUn are connected to an EP end of the PCIE switch module 200, one EP end of the PCIE switch module 200 is further connected to an optical fiber communication card 300, and the optical fiber communication card 300 is connected to an external optical fiber switch 400.
The CPU1 is used as an RC end device of the PCIE switch module 200 to implement data interaction with the optical fiber communication card 300 or the CPUs 2 to CPUn, and the CPUs 2 to CPUn are used as EP end devices of the PCIE switch module 200 to implement data interaction with the CPU1 through the PCIE switch module 200. When the CPU1 sends data to the outside, the data may be sent to the PCIE switch module 200 in a dma (direct Memory access) transmission manner, and then forwarded to the corresponding fiber communication card 300 or other CPUs 2 to CPUn through the PCIE switch module 200; when the CPU1 receives data, an MSI interrupt mode may be adopted, and data in the memory of the fiber-optic communication card 300 or other CPUs 2 to CPUn is read by the PCIE switch module 200, specifically, the MSI interrupt is sent by the fiber-optic communication card 300 or other CPUs 2 to CPUn, where the MSI interrupt carries an MSI address, the MSI address has a preconfigured correspondence with a port of the PCIE switch module 200, and the CPU1 may determine, according to the MSI address, which port of the PCIE switch module 200 the MSI interrupt comes from, so as to read data in the memory of the fiber-optic communication card 300 or other CPUs 2 to CPUn connected to the port through the PCIE switch module 200.
Based on the fiber communication network system shown in fig. 1, as shown in fig. 2, in the communication flow diagram of multiple CPUs and fiber communication cards provided in the embodiment of the present application, data interaction between the CPUs 1 to CPUn and the fiber communication cards can be realized in the following manner.
When the CPU1 is used as an RC-side device of the PCIE switch module 200 to send data to the optical fiber communication card 300, the CPU can send data to the PCIE switch module 200 in a DMA transmission manner, and transmit the data to the optical fiber communication card 300 through the PCIE switch module 200 after transferring, and the optical fiber communication card 300 implements internal and external data sharing through the optical fiber switch 400.
When the CPU1 serving as an RC side device of the PCIE switch device 200 receives data of the optical fiber communication card 300, the CPU may receive the MSI interrupt sent by the optical fiber communication card 300, and read data through the 4M space at the end of the memory of the optical fiber communication card 300 in the PCIE switch module 200 according to the MSI interrupt.
When the CPUs 2 to CPUn are used as EP side devices of the PCIE switch module 200 to receive data of the fiber communication card 300, the fiber communication card 300 sends MSI interrupt to the CPU1, and the CPU1 reads data in the 4M space at the end of the memory of the fiber communication card 300 in the PCIE switch module 200 according to the MSI interrupt, sends the data to the PCIE switch module 200 in a DMA transmission manner, and transfers the data to the corresponding CPUs 2 to CPUn through the PCIE switch module 200.
When the CPUs 2 to CPUn are used as EP side devices of the PCIE switch module 200 to send data to the optical fiber communication card 300, the CPUs 2 to CPUn can send MSI interrupts to the CPU1 at the RC side, the CPU1 reads data from the 4M space at the end of the memories of the CPUs 2 to CPUn in the PCIE switch module 200 according to the MSI interrupts, sends the data to the PCIE switch module 200 in a DMA transmission manner, and transfers the data to the optical fiber communication card 300 in the PCIE switch module 200, and the optical fiber communication card 300 realizes data sharing between the inside and the outside through the optical fiber switch 400.
In addition, data internal sharing can be realized among multiple CPUs through the PCIE switch module 200, a CPU at an RC end can send data through a DMA transmission mode through a CPU turned to an EP end in the PCIE switch module 200, and a CPU at an EP end can also read data through a 4M space turned to the end of a memory of the CPU at the EP end in the PCIE switch module 200 by sending MSI interrupt to the CPU at the RC end.
To sum up, this application is based on the PCIE switching technology, and configures the port of the PCIE switching module, so that the optical fiber communication card is fixedly hung on the CPU at the RC end through this PCIE switching module, the CPUs at other EP ends can all realize forwarding of data through this PCIE switching module and the CPU at this RC end, the CPU at this RC end can perform data input and output with the optical fiber communication card through this PCIE switching module, and then the optical fiber communication card and an external optical fiber switch realize sharing of internal and external optical fiber data. The optical fiber communication network system is based on the PCIE switching technology, so that the purpose that a plurality of CPUs share one optical fiber communication card is achieved, the resource idle time of the optical fiber communication card is reduced, hardware equipment resources are saved, and the design cost is reduced.
It should be noted that the foregoing is only illustrative of the preferred embodiments of the present application and the technical principles employed. It will be understood by those skilled in the art that the present application is not limited to the particular embodiments described herein, but is capable of various obvious changes, rearrangements and substitutions as will now become apparent to those skilled in the art without departing from the scope of the application. Therefore, although the present application has been described in more detail with reference to the above embodiments, the present application is not limited to the above embodiments, and may include other equivalent embodiments without departing from the spirit of the present application.

Claims (6)

1. An optical fiber communication network system is characterized by comprising an optical fiber communication card, a PCIE switching module and a plurality of CPUs, wherein one CPU is a master CPU, and the other CPUs are slave CPUs;
the master CPU is connected with the RC end of the PCIE switching module, the slave CPU is connected with the EP end of the PCIE switching module, the PCIE switching module is connected with the optical fiber communication card, and the optical fiber communication card is used for realizing data interaction with an optical fiber switch;
the slave CPU performs data interaction with the main CPU through the PCIE switching module; and the main CPU performs data interaction with the optical fiber communication card through the PCIE switching module.
2. The system according to claim 1, wherein when the master CPU sends data, the data is sent to the PCIE switch module by a DMA transfer manner, and the data is sent to the fiber-optic communication card or the slave CPU by being transferred by the PCIE switch module.
3. The system of claim 1, wherein when the master CPU receives data, the PCIE switch module reads data from a memory of the fiber-optic communication card or the slave CPU according to MSI interrupt sent by the fiber-optic communication card or the slave CPU.
4. The system of claim 3, wherein the MSI interrupt carries an MSI address, and the master CPU reads, according to a correspondence between a preconfigured MSI address and a port of the PCIE switch module, data of the fiber-optic communication card or the slave CPU connected to the port of the PCIE switch module corresponding to the MSI address.
5. The system of claim 1, wherein when the slave CPU sends data to the fiber-optic communications card, the master CPU reads data from the memory of the slave CPU through the PCIE switch module according to the MSI interrupt by sending an MSI interrupt to the master CPU, and sends the data to the fiber-optic communications card through the PCIE switch module.
6. The system of claim 1, wherein when the slave CPU receives the data of the fiber-optic communication card, the fiber-optic communication card sends an MSI interrupt to the master CPU, and the master CPU reads the data in the memory of the fiber-optic communication card through the PCIE switch module according to the MSI interrupt, and sends the data to the slave CPU through the PCIE switch module.
CN202110971806.5A 2021-08-19 2021-08-19 Optical fiber communication network system Pending CN113630184A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202110971806.5A CN113630184A (en) 2021-08-19 2021-08-19 Optical fiber communication network system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202110971806.5A CN113630184A (en) 2021-08-19 2021-08-19 Optical fiber communication network system

Publications (1)

Publication Number Publication Date
CN113630184A true CN113630184A (en) 2021-11-09

Family

ID=78387366

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202110971806.5A Pending CN113630184A (en) 2021-08-19 2021-08-19 Optical fiber communication network system

Country Status (1)

Country Link
CN (1) CN113630184A (en)

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1248021A (en) * 1999-08-23 2000-03-22 张科峰 Super-Internet server with exchanging multi-processor
CN102033768A (en) * 2010-12-10 2011-04-27 杭州海康威视数字技术股份有限公司 Multi-CPU system and starting method thereof
CN109614357A (en) * 2018-12-06 2019-04-12 天津津航计算技术研究所 It unites when a kind of VPX of high bandwidth multibus module
CN110515869A (en) * 2018-05-22 2019-11-29 杭州海康威视数字技术股份有限公司 More Host CPU level linked methods and system

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1248021A (en) * 1999-08-23 2000-03-22 张科峰 Super-Internet server with exchanging multi-processor
CN102033768A (en) * 2010-12-10 2011-04-27 杭州海康威视数字技术股份有限公司 Multi-CPU system and starting method thereof
CN110515869A (en) * 2018-05-22 2019-11-29 杭州海康威视数字技术股份有限公司 More Host CPU level linked methods and system
CN109614357A (en) * 2018-12-06 2019-04-12 天津津航计算技术研究所 It unites when a kind of VPX of high bandwidth multibus module

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
毕城等: "基于PCIe总线的多处理器数据交换技术", 《电子科技》 *
韩强: "基于PCI Express总线架构的多处理器模块设计", 《信息通信》 *

Similar Documents

Publication Publication Date Title
US5502719A (en) Path allocation system and method having double link list queues implemented with a digital signal processor (DSP) for a high performance fiber optic switch
AU2007278728B2 (en) Method and apparatus for distributing usb hub functions across a network
CN109033004B (en) Dual-computer memory data sharing system based on Aurora bus
CN106648896B (en) Method for dual-core sharing of output peripheral by Zynq chip under heterogeneous-name multiprocessing mode
CN113485823A (en) Data transmission method, device, network equipment and storage medium
CN103353861B (en) Realize method and the device of distributed I/O resource pool
CN106534178B (en) System and method for realizing RapidIO network universal socket
GB2409073A (en) Dedicated connection between CPU and network interface in multi-processor systems
CN100452757C (en) Message transferring method and device
CN113691397A (en) Low-delay 5G wireless transparent transmission method for industrial control data transmission
CN101917318A (en) High-low speed bus systems and connection device thereof
CN114168520A (en) Optical fiber communication bus device, equipment and system
Ahuja S/Net: A high-speed interconnect for multiple computers
CN101106504A (en) Distributed communication system for intelligent independent robot based on CAN bus
CN106844263B (en) Configurable multiprocessor-based computer system and implementation method
US20100228901A1 (en) Input output control apparatus with a plurality of ports and single protocol processing circuit
US11394583B2 (en) Ethernet interconnection circuit and apparatus
CN101447988A (en) A FPGA-based kilomega data communication card
CN107683593B (en) Communication device and related method
CN113630184A (en) Optical fiber communication network system
CN114445260B (en) Distributed GPU communication method and device based on FPGA
CN111190840A (en) Multi-party central processing unit communication architecture based on field programmable gate array control
WO2012058875A1 (en) Method and system for serial communication
CN220290210U (en) USB bandwidth expansion device, system and equipment
CN220855653U (en) High-precision high-performance serial communication device

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
RJ01 Rejection of invention patent application after publication

Application publication date: 20211109

RJ01 Rejection of invention patent application after publication