CN113629022A - Packaging structure and packaging method of six-axis integrated sensor - Google Patents

Packaging structure and packaging method of six-axis integrated sensor Download PDF

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Publication number
CN113629022A
CN113629022A CN202110956292.6A CN202110956292A CN113629022A CN 113629022 A CN113629022 A CN 113629022A CN 202110956292 A CN202110956292 A CN 202110956292A CN 113629022 A CN113629022 A CN 113629022A
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China
Prior art keywords
semiconductor wafer
back surface
front surface
bonding
packaging
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Pending
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CN202110956292.6A
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Chinese (zh)
Inventor
郭亚
刘尧清
凌方舟
刘海东
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Memsic Semiconductor Wuxi Co Ltd
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Memsic Semiconductor Wuxi Co Ltd
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Priority to CN202110956292.6A priority Critical patent/CN113629022A/en
Publication of CN113629022A publication Critical patent/CN113629022A/en
Pending legal-status Critical Current

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01CMEASURING DISTANCES, LEVELS OR BEARINGS; SURVEYING; NAVIGATION; GYROSCOPIC INSTRUMENTS; PHOTOGRAMMETRY OR VIDEOGRAMMETRY
    • G01C19/00Gyroscopes; Turn-sensitive devices using vibrating masses; Turn-sensitive devices without moving masses; Measuring angular rate using gyroscopic effects
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01PMEASURING LINEAR OR ANGULAR SPEED, ACCELERATION, DECELERATION, OR SHOCK; INDICATING PRESENCE, ABSENCE, OR DIRECTION, OF MOVEMENT
    • G01P15/00Measuring acceleration; Measuring deceleration; Measuring shock, i.e. sudden change of acceleration
    • G01P15/18Measuring acceleration; Measuring deceleration; Measuring shock, i.e. sudden change of acceleration in two or more dimensions
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56Encapsulations, e.g. encapsulation layers, coatings
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/315Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed the encapsulation having a cavity

Abstract

The invention provides a six-axis integrated sensor packaging structure and a packaging method thereof, wherein the six-axis integrated sensor packaging structure comprises the following components: the front surface of the first semiconductor wafer is provided with an acceleration sensor and a first metal bonding pad, and the back surface of the first semiconductor wafer is provided with a gyroscope and a second metal bonding pad; the second semiconductor wafer is bonded with the front surface of the first semiconductor wafer, the back surface of the second semiconductor wafer is opposite to the front surface of the first semiconductor wafer, and a first cavity is arranged at the position, opposite to the acceleration sensor, of the back surface of the second semiconductor wafer; and the front surface of the third semiconductor wafer is opposite to the back surface of the first semiconductor wafer, and a second cavity is arranged at the position, opposite to the gyroscope, of the front surface of the third semiconductor wafer. Compared with the prior art, the acceleration sensor and the gyroscope are integrated into one packaging body, so that the integration level of a product is higher, and the processing cost is lower.

Description

Packaging structure and packaging method of six-axis integrated sensor
[ technical field ] A method for producing a semiconductor device
The invention relates to the technical field of integrated sensors, in particular to a six-axis sensor packaging structure integrating an acceleration sensor and a gyroscope and a packaging method thereof.
[ background of the invention ]
In recent years, consumer electronics have been rapidly developed, and along with the hot market of smart phones, the application field of sensors is more and more extensive. Generally, sensors with different functions are independently used to realize the functions. With the gradual development of consumer electronics in the directions of lightness, thinness and smallness and the higher and higher requirements on sensitivity, the conventional three-axis sensor cannot meet the requirements.
Therefore, a six-axis sensor with higher integration is needed to meet the market demand.
[ summary of the invention ]
One of the objectives of the present invention is to provide a six-axis integrated sensor package structure and a six-axis integrated sensor packaging method, which integrates an acceleration sensor and a gyroscope into a single package, thereby achieving higher integration of products and lower processing cost.
According to one aspect of the present invention, there is provided a six-axis integrated sensor package structure, comprising: the front surface of the first semiconductor wafer is provided with an acceleration sensor and a first metal bonding pad, and the back surface of the first semiconductor wafer is provided with a gyroscope and a second metal bonding pad; a second semiconductor wafer bonded to the front surface of the first semiconductor wafer, the back surface of the second semiconductor wafer being opposite to the front surface of the first semiconductor wafer, and a first cavity being provided at a position where the back surface of the second semiconductor wafer is opposite to the acceleration sensor; and the front surface of the third semiconductor wafer is opposite to the back surface of the first semiconductor wafer, and a second cavity is arranged at the position, opposite to the gyroscope, of the front surface of the third semiconductor wafer.
According to another aspect of the present invention, there is provided a method of packaging a six-axis integrated sensor package structure, comprising: providing a first semiconductor wafer, wherein an acceleration sensor and a first metal bonding pad are arranged on the front surface of the first semiconductor wafer, and a gyroscope and a second metal bonding pad are arranged on the back surface of the first semiconductor wafer; providing a second semiconductor wafer, wherein a first cavity and a non-through groove are formed in the back surface of the second semiconductor wafer; providing a third semiconductor wafer, wherein a second cavity is formed in the front surface of the third semiconductor wafer; bonding the back surface of the second semiconductor wafer with the front surface of the first semiconductor wafer in a bonding mode of glue, metal or the like, bonding the front surface of the third semiconductor wafer with the back surface of the first semiconductor wafer in a bonding mode of glue, metal or the like, wherein after bonding, the back surface of the second semiconductor wafer is opposite to the front surface of the first semiconductor wafer, and a first cavity and a groove in the back surface of the second semiconductor wafer are respectively opposite to the acceleration sensor and the first metal pad in the front surface of the first semiconductor wafer; after bonding, the front surface of the third semiconductor wafer is opposite to the back surface of the first semiconductor wafer, and the second cavity on the front surface of the third semiconductor wafer is opposite to the gyroscope on the back surface of the first semiconductor wafer.
Compared with the prior art, the acceleration sensor and the gyroscope are integrated into one packaging body, so that the processing period of a product can be shortened, and the processing cost is reduced; on the other hand, the product has higher integration level, reduces the packaging volume and has wider application prospect.
[ description of the drawings ]
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings needed to be used in the description of the embodiments will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without inventive exercise. Wherein:
FIG. 1 is a schematic longitudinal cross-sectional view of a six-axis integrated sensor package structure in one embodiment of the invention;
FIG. 2 is a flow chart illustrating a method for packaging a six-axis integrated sensor package structure in accordance with one embodiment of the present invention;
fig. 3-12 are longitudinal cross-sectional views corresponding to the steps shown in fig. 2 in one embodiment of the present invention.
[ detailed description ] embodiments
In order to make the aforementioned objects, features and advantages of the present invention comprehensible, embodiments accompanied with figures are described in further detail below.
Reference herein to "one embodiment" or "an embodiment" means that a particular feature, structure, or characteristic may be included in at least one implementation of the invention. The appearances of the phrase "in one embodiment" in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments. Unless otherwise specified, the terms connected, and connected as used herein mean electrically connected, directly or indirectly.
Fig. 1 is a schematic longitudinal cross-sectional view of a six-axis integrated sensor package structure according to an embodiment of the invention, which integrates an acceleration sensor and a gyroscope into a package. The six-axis integrated sensor package structure shown in fig. 1 includes a first semiconductor wafer 1, a second semiconductor wafer 2, a third semiconductor wafer 3, a substrate 6 and a molding compound 7. After the semiconductor wafer level packaging, a semiconductor wafer cutting step is performed to form a plurality of mutually independent packaging structures, i.e. independent chips. The first semiconductor wafer, the second semiconductor wafer and the third semiconductor wafer are three individual semiconductor wafers in a view before the semiconductor wafers are cut, i.e., in a view at a semiconductor wafer level, and the first semiconductor wafer, the second semiconductor wafer and the third semiconductor wafer can be understood as wafers of the respective semiconductor wafers in a view after the semiconductor wafers are cut, i.e., in a view at a chip level.
The front surface of the first semiconductor wafer 1 is provided with an acceleration sensor (which includes a structural circuit of the acceleration sensor and a driving circuit thereof) 101 and a first metal pad 103, and the back surface thereof is provided with a gyroscope (which includes a structural circuit of the gyroscope and a driving circuit thereof) 102 and a second metal pad 104.
The second semiconductor wafer 2 is a package Cap (Cap) of the acceleration sensor 101, and is bonded to the front surface of the first semiconductor wafer 1, the back surface of the second semiconductor wafer 2 is opposite to (or adjacent to) the front surface of the first semiconductor wafer 1, and a first cavity 201 which is processed in advance is provided at a position where the back surface of the second semiconductor wafer 2 is opposite to the acceleration sensor 101. Wherein the first metal pad 103 is exposed (or the first metal pad 103 is not covered or shielded by the second semiconductor wafer 2).
The third semiconductor wafer 3 is a package cover (Cap) of the gyroscope 102, and is bonded to the back surface of the first semiconductor wafer 1, the front surface of the third semiconductor wafer 3 is opposite to (or adjacent to) the back surface of the first semiconductor wafer 1, and a prefabricated second cavity 301 is arranged at a position where the front surface of the third semiconductor wafer 3 is opposite to the gyroscope 102.
In the embodiment shown in fig. 1, a bonding layer 4 is disposed between the back surface of the second semiconductor wafer 2 and the front surface of the first semiconductor wafer 1; another bonding layer 4 is disposed between the front side of the third semiconductor wafer 3 and the back side of the first semiconductor wafer 1. In one embodiment, the bonding of the first semiconductor wafer 1 and the second semiconductor wafer 2, and the bonding of the first semiconductor wafer 1 and the third semiconductor wafer 3 can be realized by glue bonding, metal bonding or anodic bonding.
In the embodiment shown in fig. 1, a redistribution layer 302 is disposed on the back side of the bonded third semiconductor wafer 3 (or the side of the third semiconductor wafer 3 away from the first semiconductor wafer 1), and is led out from the second metal pads 104 and redistributed to the back side of the third semiconductor wafer 3, wherein the led out manner of the second metal pads 104 is implemented in the third semiconductor wafer 3 by a ramp metal redistribution process (or a sidewall wire process), specifically: the second metal pad 104 is exposed (or the second metal pad 104 is not covered or shielded by the third semiconductor wafer 3); a passivation layer 303 and a rewiring layer 302 are formed on the back surface and the slope of the third semiconductor wafer 3, and the second metal pads 104 are led to the back surface of the third semiconductor wafer 3 along the slope. In another embodiment, the second metal pads 104 are led out through the wiring metal that is punched on the third semiconductor wafer 3 and passes through the hole wall, and the via hole process is used for the lead-out.
Solder balls 304 are provided on the back surface of the third semiconductor wafer 3. The metal pads 103, 104 and the solder balls 304 may serve as signal contacts.
The bonded third semiconductor wafer 3, the first semiconductor wafer 1 and the second semiconductor wafer 2 are sequentially stacked from the front side to the top side of the substrate 6, wherein the solder balls 304 on the back side of the third semiconductor wafer 3 are connected with the substrate 6 through a flip-chip process; the first metal pad 103 is connected with the substrate 6 by a bonding process using a bonding wire 5, so that the first semiconductor wafer 1, the second semiconductor wafer 2, the third semiconductor wafer 3 and the substrate 6 are integrated.
And (3) plastically packaging the integrated first semiconductor wafer 1, second semiconductor wafer 2, third semiconductor wafer 3 and substrate 6 by using a plastic packaging material 7 through a plastic packaging process to form a final packaging body.
Fig. 2 is a schematic flow chart illustrating a method for packaging a six-axis integrated sensor package structure according to an embodiment of the invention; referring to fig. 3-12, which are longitudinal sectional views corresponding to the steps shown in fig. 2 according to an embodiment of the present invention. The packaging method of the six-axis integrated sensor package structure shown in fig. 2 includes the following steps.
Step 210, as shown in fig. 3, providing a first semiconductor wafer 1, wherein an acceleration sensor (which includes a structural circuit of the acceleration sensor and a driving circuit thereof) 101 and a first metal pad 103 are disposed on a front surface of the first semiconductor wafer 1, and a gyroscope (which includes a structural circuit of the gyroscope and a driving circuit thereof) 102 and a second metal pad 104 are disposed on a back surface thereof.
Step 220, as shown in fig. 4, providing a second semiconductor wafer 2, where a first cavity 201 and a non-through groove 202 are provided on a back surface of the second semiconductor wafer 2, and the groove 202 is etched into the second semiconductor wafer 2 from the back surface of the second semiconductor wafer 2.
Step 230, as shown in fig. 5, a third semiconductor wafer 3 is provided, and a front surface of the third semiconductor wafer 3 is provided with a second cavity 301.
Step 240, as shown in fig. 6, bonding the second semiconductor wafer 2 to the front surface of the first semiconductor wafer 1, and bonding the third semiconductor wafer 3 to the back surface of the first semiconductor wafer 1. After bonding, the back surface of the second semiconductor wafer 2 is opposite to the front surface of the first semiconductor wafer 1, and the first cavity 201 and the groove 202 on the back surface of the second semiconductor wafer 2 are respectively opposite to the acceleration sensor 101 and the first metal pad 103 on the front surface of the first semiconductor wafer 1; after bonding, the front surface of the third semiconductor wafer 3 is opposite to the back surface of the first semiconductor wafer 1, and the second cavity 301 on the front surface of the third semiconductor wafer 3 is opposite to the gyroscope 102 on the back surface of the first semiconductor wafer 1. Wherein, a bonding layer 4 is arranged between the back surface of the second semiconductor wafer 2 and the front surface of the first semiconductor wafer 1; another bonding layer 4 is disposed between the front side of the third semiconductor wafer 3 and the back side of the first semiconductor wafer 1. In one embodiment, the bonding of the first semiconductor wafer 1 and the second semiconductor wafer 2, and the bonding of the first semiconductor wafer 1 and the third semiconductor wafer 3 can be realized by glue bonding, metal bonding or anodic bonding.
In step 250, as shown in fig. 7 and 8, a redistribution layer 302 is formed on the back surface of the bonded third semiconductor wafer 3, and the redistribution layer 302 is led out from the second metal pad 104 and redistributed to the back surface of the third semiconductor wafer 3. In the embodiment shown in fig. 7, the second metal pads 104 are led out in the third semiconductor wafer 3 by a ramp metal rewiring process (or a sidewall wiring process). The method specifically comprises the following steps: as shown in fig. 7, etching is performed from the back surface of the bonded third semiconductor wafer 3, and a slope is formed on the side surface, so that the second metal pad 104 is exposed; as shown in fig. 8, a passivation layer 303 and a rewiring layer 302 are formed on the back surface and the slope of the third semiconductor wafer 3, and the second metal pads 104 are led to the back surface of the third semiconductor wafer 3 along the slope. In another embodiment, the second metal pads 104 are led out through the wiring metal that is punched on the third semiconductor wafer 3 and passes through the hole wall, and the via hole process is used for the lead-out.
Step 260, as shown in fig. 9, lapping the front surface of the bonded first semiconductor wafer 1 to remove the bottom of the groove 202 and expose the second metal pad 104.
In step 270, as shown in fig. 10, solder balls 304 are provided on the back surface of the third semiconductor wafer 3 on which the redistribution layer 302 is formed, so that the bonded first semiconductor wafer 1, second semiconductor wafer 2, and third semiconductor wafer 3 form a wafer structure. Wherein, the metal pads 103 and 104 and the solder balls 304 can be used as signal contacts.
Step 280, as shown in fig. 11, cutting the wafer structure to obtain a single chip structure shown in fig. 10, and connecting the solder balls 304 on the back surface of the third semiconductor wafer 3 with the substrate 6 through a flip-chip process; the first metal pad 103 is connected with the substrate 6 by a bonding process using a bonding wire 5, so that the first semiconductor wafer 1, the second semiconductor wafer 2, the third semiconductor wafer 3 and the substrate 6 are integrated.
Step 290, as shown in fig. 12, the first semiconductor wafer 1, the second semiconductor wafer 2, the third semiconductor wafer 3 and the substrate 6 which are integrated together are subjected to plastic packaging by using a plastic packaging material 7 through a plastic packaging process to form a final package body.
In summary, the acceleration sensor and the gyroscope are integrated into one package, so that the processing period of a product can be shortened, and the processing cost is reduced; on the other hand, the product has higher integration level, reduces the packaging volume and has wider application prospect.
In the present invention, the terms "connected", "connecting", and the like mean electrical connections, and direct or indirect electrical connections unless otherwise specified.
The above description is only a preferred embodiment of the present invention, and the scope of the present invention is not limited to the above embodiment, but equivalent modifications or changes made by those skilled in the art according to the present disclosure should be included in the scope of the present invention as set forth in the appended claims.

Claims (11)

1. A six-axis integrated sensor package structure, comprising:
a first semiconductor wafer (1) having an acceleration sensor (101) and a first metal pad (103) on the front surface thereof, and a gyroscope (102) and a second metal pad (104) on the back surface thereof;
a second semiconductor wafer (2) bonded to the front surface of the first semiconductor wafer (1), wherein the back surface of the second semiconductor wafer (2) is opposite to the front surface of the first semiconductor wafer (1), and a first cavity (201) is arranged at a position where the back surface of the second semiconductor wafer (2) is opposite to the acceleration sensor (101);
and a third semiconductor wafer (3) bonded to the back surface of the first semiconductor wafer (1), wherein the front surface of the third semiconductor wafer (3) is opposite to the back surface of the first semiconductor wafer (1), and a second cavity (301) is arranged at a position where the front surface of the third semiconductor wafer (3) is opposite to the gyroscope (102).
2. The six-axis integrated sensor package structure of claim 1, further comprising:
and a rewiring layer (302) which is led out from the second metal pad (104) and redistributed to the back surface of the third semiconductor wafer (3).
3. The six-axis integrated sensor package structure of claim 2,
the lead-out mode of the second metal bonding pad (104) is realized in the third semiconductor wafer 3 through a slope metal rewiring process; or the second metal pad (104) is led out by a wiring metal which is punched on the third semiconductor wafer 3 and passes through a hole wall, and the lead-out mode is realized by a through hole process.
4. The six-axis integrated sensor package structure of claim 2, further comprising:
and solder balls (304) disposed on the back surface of the third semiconductor wafer 3.
5. The six-axis integrated sensor package structure according to claim 4, characterized in that it further comprises a substrate (6),
the bonded third semiconductor wafer (3), the bonded first semiconductor wafer (1) and the bonded second semiconductor wafer (2) are sequentially stacked from the front side of the substrate (6) to the upper side;
connecting the solder balls (304) on the back surface of the third semiconductor wafer (3) with the substrate (6) through a flip-chip process;
-connecting the first metal pad (103) with the substrate (6) by means of a pressure welding process using a bonding wire (5).
6. The six-axis integrated sensor package structure of claim 5, further comprising:
and the plastic packaging material (7) is used for carrying out plastic packaging on the first semiconductor wafer (1), the second semiconductor wafer (2), the third semiconductor wafer (3) and the substrate (6) which are integrated together.
7. A packaging method of a six-axis integrated sensor packaging structure is characterized by comprising the following steps:
providing a first semiconductor wafer (1), wherein an acceleration sensor (101) and a first metal pad (103) are arranged on the front surface of the first semiconductor wafer (1), and a gyroscope (102) and a second metal pad (104) are arranged on the back surface of the first semiconductor wafer;
providing a second semiconductor wafer (2), wherein a first cavity (201) and a non-penetrating groove (202) are arranged on the back surface of the second semiconductor wafer (2);
providing a third semiconductor wafer (3), wherein a second cavity (301) is arranged on the front surface of the third semiconductor wafer (3);
bonding the second semiconductor wafer (2) with the front surface of the first semiconductor wafer (1) through glue or metal (4) bonding, bonding a third semiconductor wafer (3) with the back surface of the first semiconductor wafer (1) through glue or metal (4) bonding, wherein after bonding, the back surface of the second semiconductor wafer (2) is opposite to the front surface of the first semiconductor wafer (1), and a first cavity (201) and a groove (202) on the back surface of the second semiconductor wafer (2) are respectively opposite to the acceleration sensor (101) and the first metal pad (103) on the front surface of the first semiconductor wafer (1); after bonding, the front surface of the third semiconductor wafer (3) is opposite to the back surface of the first semiconductor wafer (1), and the second cavity (301) on the front surface of the third semiconductor wafer (3) is opposite to the gyroscope (102) on the back surface of the first semiconductor wafer (1).
8. The method of packaging a six-axis integrated sensor package structure according to claim 7, comprising:
forming a rewiring layer (302) on the back of the bonded third semiconductor wafer (3), wherein the rewiring layer (302) is led out from the second metal bonding pad (104) and is redistributed to the back of the third semiconductor wafer (3);
lapping the front side of the bonded first semiconductor wafer (1) to grind off the bottom of the groove (202) to expose the second metal pad 104;
and solder balls are arranged on the back surface of the third semiconductor wafer (3) on which the rewiring layer (302) is formed, so that the first semiconductor wafer (1), the second semiconductor wafer (2) and the third semiconductor wafer (3) after bonding are electrically connected.
9. The packaging method of the six-axis integrated sensor packaging structure according to claim 8, wherein the step of forming a rewiring layer (302) on the back side of the bonded third semiconductor wafer (3) comprises:
etching the back surface of the bonded third semiconductor wafer (3), and forming a slope on the side surface to expose the second metal pad (104);
and forming a passivation layer (303) and a rewiring layer (302) on the back surface and the slope of the third semiconductor wafer (3), and leading the second metal pad (104) to the back surface of the third semiconductor wafer (3) along the slope.
10. The method of packaging a six-axis integrated sensor package structure of claim 9, further comprising:
cutting the wafer structure to obtain a single chip structure;
connecting the solder balls on the back of the third semiconductor wafer (3) in the single chip structure with the substrate (6) through a flip-chip process; and connecting the first metal bonding pad (103) in the single chip structure with the substrate (6) by using a bonding wire (5) through a pressure welding process.
11. The method of packaging a six-axis integrated sensor package structure of claim 10, further comprising:
and (3) plastically packaging the integrated first semiconductor wafer (1), second semiconductor wafer (2), third semiconductor wafer (3) and substrate (6) by using a plastic packaging material (7) through a plastic packaging process.
CN202110956292.6A 2021-08-19 2021-08-19 Packaging structure and packaging method of six-axis integrated sensor Pending CN113629022A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113998660A (en) * 2021-11-26 2022-02-01 美新半导体(无锡)有限公司 Packaging structure and packaging method of six-axis sensor

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113998660A (en) * 2021-11-26 2022-02-01 美新半导体(无锡)有限公司 Packaging structure and packaging method of six-axis sensor
CN113998660B (en) * 2021-11-26 2024-01-30 美新半导体(无锡)有限公司 Packaging structure and packaging method of six-axis sensor

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