CN113628398A - Novel alarm based on digital pulse drive - Google Patents
Novel alarm based on digital pulse drive Download PDFInfo
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- CN113628398A CN113628398A CN202110771670.3A CN202110771670A CN113628398A CN 113628398 A CN113628398 A CN 113628398A CN 202110771670 A CN202110771670 A CN 202110771670A CN 113628398 A CN113628398 A CN 113628398A
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- digital pulse
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- 230000000087 stabilizing effect Effects 0.000 claims abstract description 26
- 238000006243 chemical reaction Methods 0.000 claims abstract description 8
- 230000009467 reduction Effects 0.000 claims abstract description 7
- 239000003990 capacitor Substances 0.000 claims description 22
- 230000000694 effects Effects 0.000 claims description 3
- 238000001914 filtration Methods 0.000 claims description 3
- 238000010586 diagram Methods 0.000 description 12
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012544 monitoring process Methods 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
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Classifications
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- G—PHYSICS
- G08—SIGNALLING
- G08B—SIGNALLING OR CALLING SYSTEMS; ORDER TELEGRAPHS; ALARM SYSTEMS
- G08B3/00—Audible signalling systems; Audible personal calling systems
- G08B3/10—Audible signalling systems; Audible personal calling systems using electric transmission; using electromagnetic transmission
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B60—VEHICLES IN GENERAL
- B60Q—ARRANGEMENT OF SIGNALLING OR LIGHTING DEVICES, THE MOUNTING OR SUPPORTING THEREOF OR CIRCUITS THEREFOR, FOR VEHICLES IN GENERAL
- B60Q9/00—Arrangement or adaptation of signal devices not provided for in one of main groups B60Q1/00 - B60Q7/00, e.g. haptic signalling
- B60Q9/002—Arrangement or adaptation of signal devices not provided for in one of main groups B60Q1/00 - B60Q7/00, e.g. haptic signalling for parking purposes, e.g. for warning the driver that his vehicle has contacted or is about to contact an obstacle
Abstract
The invention relates to the technical field of alarms, in particular to a novel alarm based on digital pulse driving, which comprises a voltage division circuit, a voltage reduction circuit, a driving circuit and a processor, wherein the voltage division circuit introduces partial voltage of a power supply into an A/D conversion module in the processor and calculates voltage data to monitor the power supply voltage, the power supply voltage is converted into 3.3V through a voltage stabilizing circuit to supply power for the processor, a potentiometer is externally connected with the processor to adjust the pulse frequency of the processor, and a high-power second triode is arranged between the pulse output end of the processor and a loudspeaker and is matched with a feedback circuit to realize the interruption of the loudspeaker. In a power supply system of a power supply, an anti-reverse diode is arranged at an input end and is matched with a high-voltage protection circuit to realize the disconnection of a driving circuit under the state of overhigh voltage; the stability and reliability of the interruption time of the warning sound are ensured, and the digital pulse type alarm also has the advantages of low price, low power consumption and low surge current.
Description
Technical Field
The invention relates to the technical field of alarms, in particular to a novel alarm based on digital pulse driving.
Background
The driving safety of the vehicle is improved gradually along with the continuous development of automotive electronics, and in the reversing process of the vehicle, the reversing alarm is indispensable for ensuring the safety of the vehicle and pedestrians behind the vehicle. At present, most automobile alarms are made of analog circuits, are circuits with single functions and are composed of a plurality of capacitors and resistors, the voltage duty ratio of the circuits cannot be adjusted, the precision of driving sounding signals is low, the sounding is the same at any time, and the intermittent occurrence of warning sounds and the adjustment of audio frequencies cannot be realized.
Compared with the alarm of a common analog circuit, the digital pulse reverse alarm has the advantages that the sound stability and the safety reliability are further improved, and the damage of surge current can be effectively reduced by comparing with the alarm of the common digital circuit.
In view of the above problems, the designer is actively making research and innovation based on the practical experience and professional knowledge that the product engineering is applied for many years, so as to create a novel alarm based on digital pulse driving, and make the alarm more practical.
Disclosure of Invention
The invention aims to provide a novel alarm based on digital pulse driving aiming at the defects in the prior art, and the stability and reliability of the interruption time of the warning sound are enhanced.
In order to achieve the purpose, the invention adopts the technical scheme that: a novel alarm based on digital pulse drive includes: the voltage-reducing circuit comprises a voltage-dividing circuit, a voltage-reducing circuit, a driving circuit and a processor, wherein the voltage-dividing circuit, the voltage-reducing circuit and the driving circuit are respectively connected with the processor and are all powered by the same power supply, and a diode is arranged at the output end of the power supply;
the voltage division circuit introduces partial voltage of the power supply into an A/D conversion module in the processor, and monitors the power supply voltage by converting calculated voltage data;
the voltage reduction circuit comprises a first triode, the base electrode of the first triode is connected with a first voltage stabilizing tube, the emitter electrode of the first triode is connected with a voltage stabilizing circuit and supplies power to the processor through the voltage stabilizing circuit, and a biasing circuit is connected between the first voltage stabilizing tube and the base electrode of the first triode and used for stabilizing the base electrode voltage of the first triode;
the pulse output end of the processor is connected with a base electrode of a second triode in the driving circuit, the second triode is controlled to be blocked at high frequency through low frequency, an emitter of the second triode is connected with a feedback circuit, and the intermittent generation effect of the horn is achieved.
Furthermore, a high-voltage protection circuit and a first filter circuit are further arranged in the voltage reduction circuit, the high-voltage protection circuit is grounded, and the first filter circuit is arranged between the emitter of the first triode and the voltage stabilizing circuit.
Furthermore, the high-voltage protection circuit comprises a second voltage-regulator tube, a first current-limiting circuit and a fourth triode which are reversely arranged, when the voltage is overlarge, the second voltage-regulator tube is broken down, and the broken-down voltage is led in through the base electrode of the fourth triode and then led out through the emitter of the fourth triode in a grounding mode;
the first filter circuit comprises a plurality of capacitors arranged in parallel and used for filtering ripple voltage, and the bias circuit comprises a plurality of pull-up resistors arranged in parallel.
Furthermore, the voltage dividing circuit comprises a first voltage dividing resistor and a second voltage dividing resistor, and a second filter circuit is arranged at the second voltage dividing resistor and connected with the processor;
the second filter circuit comprises a third voltage-regulator tube and a plurality of capacitors, wherein the third voltage-regulator tube and the plurality of capacitors are connected in parallel with the second voltage-dividing resistor.
Furthermore, the processor is externally connected with a reset circuit, the reset circuit comprises a reset resistor and a reset capacitor which are connected in series, a connection node of the processor and the reset circuit is arranged between the reset resistor and the reset capacitor, the other end of the reset resistor is connected with the voltage stabilizing circuit, and the other end of the reset capacitor is grounded.
Furthermore, a third filter circuit is arranged between the pulse output end of the processor and the driving circuit, the third filter circuit comprises two capacitors connected in parallel, the capacitance value of the third filter circuit is adjusted to ensure that EMC passes through, and the other end of the third filter circuit is grounded.
Furthermore, the feedback circuit comprises a third triode and a third voltage dividing resistor, wherein an emitter of the third triode is connected with the third voltage dividing resistor and then grounded, a base of the third triode is connected with an emitter of the second triode, and a connecting node of a collector of the third triode is arranged between a pulse output end of the processor and the base of the second triode.
Furthermore, the emitter of the second triode is connected with the second current limiting circuit and then grounded;
the second current limiting circuit includes a plurality of resistors arranged in parallel.
Furthermore, the voltage stabilizing circuit is a low-dropout linear voltage stabilizing circuit and supplies power to the processor.
The invention has the beneficial effects that:
in the invention, the pulse frequency of the processor is adjusted by externally connecting a potentiometer at the processor, and a high-power triode is arranged between the pulse output end of the processor and the horn and is matched with a feedback circuit to realize the intermittent generation of the horn;
the power supply is led into the voltage division circuit and then connected with an A/D conversion module in the processor, and voltage data are obtained through conversion calculation by acquiring signals at the voltage division circuit in real time so as to monitor the power supply voltage.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments described in the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
FIG. 1 is a schematic circuit diagram of an alarm in an embodiment of the present invention;
FIG. 2 is a schematic diagram of a circuit configuration of an alarm device according to an embodiment of the present invention;
FIG. 3 is a schematic diagram of a voltage step-down circuit according to an embodiment of the present invention;
FIG. 4 is a schematic diagram of a voltage divider circuit according to an embodiment of the present invention;
FIG. 5 is a schematic diagram of a voltage regulator circuit according to an embodiment of the present invention;
FIG. 6 is a schematic diagram of a driving circuit according to an embodiment of the present invention;
FIG. 7 is a circuit diagram of a processor according to an embodiment of the invention;
FIG. 8 is a schematic diagram of a buck circuit according to an embodiment of the present invention;
FIG. 9 is a schematic diagram of a voltage divider circuit according to an embodiment of the present invention;
FIG. 10 is a schematic diagram of a voltage regulator circuit according to an embodiment of the present invention;
FIG. 11 is a circuit diagram of a processor according to an embodiment of the invention;
fig. 12 is a schematic diagram of a driving circuit according to an embodiment of the invention.
Reference numerals: 1. a voltage dividing circuit; 11. a first voltage dividing resistor; 12. a second voltage dividing resistor; 13. a second filter circuit; 2. a voltage reduction circuit; 21. a first triode; 22. a first voltage regulator tube; 23. a voltage stabilizing circuit; 24. a bias circuit; 25. a high voltage protection circuit; 251. a fourth triode; 26. a first filter circuit; 27. a first current limiting circuit; 3. a drive circuit; 31. a second triode; 32. a feedback circuit; 321. a third triode; 33. a third voltage dividing resistor; 34. a third filter circuit; 35. a second current limiting circuit; 4. a processor; 41. a potentiometer; 42. a reset circuit; 5. a power source; 51. a diode; 6. a horn.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments.
It will be understood that when an element is referred to as being "secured to" another element, it can be directly on the other element or intervening elements may also be present. When an element is referred to as being "connected" to another element, it can be directly connected to the other element or intervening elements may also be present. The terms "vertical," "horizontal," "left," "right," and the like as used herein are for illustrative purposes only and do not represent the only embodiments.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. The terminology used in the description of the invention herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used herein, the term "and/or" includes any and all combinations of one or more of the associated listed items.
As shown in fig. 1 to 12, the novel alarm based on digital pulse driving includes a voltage dividing circuit 1, a voltage reducing circuit 2, a driving circuit 3 and a processor 4, wherein the voltage dividing circuit 1, the voltage reducing circuit 2 and the driving circuit 3 are respectively connected with the processor 4 and are powered by a same power supply 5, and a diode 51 is arranged at an output end of the power supply 5; the voltage division circuit 1 introduces part of the voltage of the power supply 5 into an A/D conversion module in the processor 4, and monitors the voltage of the power supply 5 by converting the calculated voltage data; the voltage reduction circuit 2 comprises a first triode 21, the base electrode of the first triode 21 is connected with a first voltage regulator tube 22, the emitter electrode of the first triode 21 is connected with a voltage stabilizing circuit 23 and supplies power for the processor 4 through the voltage stabilizing circuit 23, and a biasing circuit 24 is connected between the first voltage regulator tube 22 and the base electrode of the first triode 21 and used for stabilizing the base electrode voltage of the first triode 21; the processor 4 is internally provided with a timer and is externally connected with a potentiometer 41, after the pulse frequency is obtained through the programming of the external device of the timer, the counting period of the potentiometer 41 is adjusted to lock the pulse frequency, the pulse output end of the processor 4 is connected with the base electrode of the second triode 31 in the driving circuit 3, the second triode 31 controls the high-frequency to be blocked through the low-frequency, the emitter of the second triode 31 is connected with a feedback circuit 32, and the intermittent generation effect of the horn 6 is realized.
In the digital pulse alarm circuit disclosed by the invention, the voltage of a power supply 5 is converted into 3.3V by a voltage stabilizing circuit 23 to supply power for a processor 4, the pulse frequency of the processor 4 is adjusted by an external potentiometer 41 of the processor 4, and a high-power second triode 31 is arranged between the pulse output end of the processor 4 and a loudspeaker 6 and is matched with a feedback circuit 32 to realize the intermittent generation of the loudspeaker 6. In the power supply system of the power supply 5, an anti-reverse diode 51 is arranged at the output end of the power supply 5 and is matched with the high-voltage protection circuit 25 to realize the disconnection of the driving circuit 3 in an over-high voltage state.
Further, the step-down circuit 2 is further provided with a high-voltage protection circuit 25 and a first filter circuit 26, the high-voltage protection circuit 25 is grounded, and the first filter circuit 26 is provided between the emitter of the first transistor 21 and the regulator circuit 23. The high-voltage protection circuit 25 comprises a second voltage-regulator tube, a first current-limiting circuit 27 and a fourth triode 251 which are reversely arranged, when the voltage is overlarge, the second voltage-regulator tube is broken down, the voltage is led in through the base electrode of the fourth triode 251 and then led out through the emitter of the fourth triode 251; the first filter circuit 26 includes a plurality of capacitors arranged in parallel for filtering the ripple voltage, and the bias circuit 24 includes a plurality of pull-up resistors arranged in parallel. The voltage stabilizing circuit 23 is provided as a low dropout linear voltage stabilizing circuit 23 for supplying power to the processor 4.
Specifically, in the step-down circuit 2, as shown in fig. 9 and 10, according to the characteristics of the transistor, a 6.8V first voltage regulator 22 is connected to the base of the first transistor 21, so that the voltage output by the first transistor 21 from the emitter thereof is 6.1V, and the voltage of 6.1V is converted into 3.3V by the LDO voltage chip in the voltage regulator 23 to supply power to the processor 4 chip.
Further, the voltage dividing circuit 1 includes a first voltage dividing resistor 11 and a second voltage dividing resistor 12, and a second filter circuit 13 is disposed at the second voltage dividing resistor 12 and connected to the processor 4; the second filter circuit 13 includes a third regulator tube and a plurality of capacitors arranged in parallel with the second voltage-dividing resistor 12.
Specifically, as shown in fig. 8, the power supply 5 is divided by the first voltage dividing resistor 11 and the second voltage dividing resistor 12 and then introduced to the ADC peripheral in the processor 4, where the first filter circuit 26 is disposed, and includes a filter capacitor and a third 3.3V voltage regulator tube, so as to improve the accuracy of the input analog quantity. After 3.3V voltage stabilization, the voltage is converted into a digital signal by an A/D conversion module of the processor 4, and the voltage of the voltage data monitoring power supply 5 is obtained by acquiring the signal in real time and performing conversion calculation.
In this embodiment, the processor 4 is externally connected with a reset circuit 42, the reset circuit 42 includes a reset resistor and a reset capacitor connected in series, a connection node between the processor 4 and the reset circuit 42 is disposed between the reset resistor and the reset capacitor, the other end of the reset resistor is connected to the voltage stabilizing circuit 23, and the other end of the reset capacitor is grounded. And a third filter circuit 34 is arranged between the pulse output end of the processor 4 and the drive circuit 3, and comprises two capacitors connected in parallel, the capacitance value of the third filter circuit is adjusted to ensure that EMC passes through, and the other end of the third filter circuit 34 is grounded.
As a preferred embodiment of the present invention, the feedback circuit 32 includes a third transistor 321 and a third voltage dividing resistor 33, an emitter of the third transistor 321 is connected to the third voltage dividing resistor 33 and then grounded, and a base thereof is connected to an emitter of the second transistor 31, and a connection node of a collector of the third transistor 321 is disposed between the pulse output terminal of the processor 4 and the base of the second transistor 31. The emitter of the second triode 31 is connected with the second current limiting circuit 35 and then grounded; the second current limiting circuit 35 includes a plurality of resistors arranged in parallel.
Specifically, as shown in fig. 6 and 12, the connection point between the third transistor 321 and the driving circuit 3 is set as a first node, when the voltage passing through the first node is a high-frequency voltage, the second transistor 31 is turned on, the voltage is introduced from the base thereof, the voltage is led out from the emitter thereof, passes through the second current limiting circuit 35, and then is grounded, so that the driving circuit 3 is connected, and the horn 6 is generated; when the driving circuit 3 is connected, the voltage output from the emitter of the second triode 31 is input to the base of the third triode 321, so that the first node is connected with the feedback circuit 32, and at this time, the third voltage dividing resistor 33 plays a role of voltage division, so that the high frequency input to the base of the second triode 31 is reduced, the driving circuit 3 is disconnected, the loudspeaker 6 stops sounding, and therefore the interruption of the loudspeaker 6 is realized.
It will be understood by those skilled in the art that the present invention is not limited to the embodiments described above, which are described in the specification and illustrated only to illustrate the principle of the present invention, but that various changes and modifications may be made therein without departing from the spirit and scope of the present invention, which fall within the scope of the invention as claimed. The scope of the invention is defined by the appended claims and equivalents thereof.
Claims (9)
1. A novel alarm based on digital pulse drive, its characterized in that includes: the voltage-reducing circuit comprises a voltage-dividing circuit, a voltage-reducing circuit, a driving circuit and a processor, wherein the voltage-dividing circuit, the voltage-reducing circuit and the driving circuit are respectively connected with the processor and are all powered by the same power supply, and a diode is arranged at the output end of the power supply;
the voltage division circuit introduces partial voltage of the power supply into an A/D conversion module in the processor, and monitors the power supply voltage by converting calculated voltage data;
the voltage reduction circuit comprises a first triode, the base electrode of the first triode is connected with a first voltage stabilizing tube, the emitter electrode of the first triode is connected with a voltage stabilizing circuit and supplies power to the processor through the voltage stabilizing circuit, and a biasing circuit is connected between the first voltage stabilizing tube and the base electrode of the first triode and used for stabilizing the base electrode voltage of the first triode;
the pulse output end of the processor is connected with a base electrode of a second triode in the driving circuit, the second triode is controlled to be blocked at high frequency through low frequency, an emitter of the second triode is connected with a feedback circuit, and the intermittent generation effect of the horn is achieved.
2. The novel alarm based on digital pulse driving as claimed in claim 1, wherein a high voltage protection circuit and a first filter circuit are further disposed in the voltage reduction circuit, the high voltage protection circuit is grounded, and the first filter circuit is disposed between the emitter of the first triode and the voltage regulation circuit.
3. The novel alarm based on the digital pulse driving as claimed in claim 2, wherein the high voltage protection circuit comprises a second voltage regulator tube, a first current limiting circuit and a fourth triode which are arranged in reverse, the second voltage regulator tube is broken down when the voltage is too high, the high voltage protection circuit is led in through the base electrode of the fourth triode and then led out through the emitter of the fourth triode;
the first filter circuit comprises a plurality of capacitors arranged in parallel and used for filtering ripple voltage, and the bias circuit comprises a plurality of pull-up resistors arranged in parallel.
4. The novel alarm based on digital pulse driving according to claim 1, wherein the voltage dividing circuit comprises a first voltage dividing resistor and a second voltage dividing resistor, and a second filter circuit is arranged at the second voltage dividing resistor and connected with the processor;
the second filter circuit comprises a third voltage-regulator tube and a plurality of capacitors, wherein the third voltage-regulator tube and the plurality of capacitors are connected in parallel with the second voltage-dividing resistor.
5. The novel alarm based on the digital pulse driving as claimed in claim 1, wherein the processor is externally connected with a reset circuit, the reset circuit comprises a reset resistor and a reset capacitor which are connected in series, a connection node of the processor and the reset circuit is arranged between the reset resistor and the reset capacitor, the other end of the reset resistor is connected with the voltage stabilizing circuit, and the other end of the reset capacitor is grounded.
6. The novel alarm based on digital pulse driving as claimed in claim 1, wherein a third filter circuit is arranged between the pulse output end of the processor and the driving circuit, the third filter circuit comprises two capacitors connected in parallel, the capacitance value of the third filter circuit is adjusted to ensure that EMC passes through, and the other end of the third filter circuit is grounded.
7. The novel alarm based on digital pulse driving as claimed in claim 1, wherein the feedback circuit comprises a third triode and a third voltage dividing resistor, an emitter of the third triode is connected with the third voltage dividing resistor and then grounded, a base of the third triode is connected with an emitter of the second triode, and a connection node of a collector of the third triode is arranged between the pulse output end of the processor and the base of the second triode.
8. The novel alarm based on digital pulse driving according to claim 7, wherein the emitter of the second triode is connected with the second current limiting circuit and then grounded;
the second current limiting circuit includes a plurality of resistors arranged in parallel.
9. The novel alarm device based on digital pulse driving according to claim 1, wherein the voltage stabilizing circuit is configured as a low dropout linear voltage stabilizing circuit for supplying power to the processor.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110771670.3A CN113628398A (en) | 2021-07-08 | 2021-07-08 | Novel alarm based on digital pulse drive |
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| Application Number | Priority Date | Filing Date | Title |
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| CN202110771670.3A CN113628398A (en) | 2021-07-08 | 2021-07-08 | Novel alarm based on digital pulse drive |
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| CN113628398A true CN113628398A (en) | 2021-11-09 |
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| CN202110771670.3A Pending CN113628398A (en) | 2021-07-08 | 2021-07-08 | Novel alarm based on digital pulse drive |
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2021
- 2021-07-08 CN CN202110771670.3A patent/CN113628398A/en active Pending
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| CN103163871A (en) * | 2013-04-08 | 2013-06-19 | 江苏大学 | Electronic type pulse width modulation (PWM) intermittence spray type variable spraying controller |
| US20150256013A1 (en) * | 2014-03-04 | 2015-09-10 | Shenzhen Hello Tech Energy Co., Ltd. | Portable power supply |
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Application publication date: 20211109 |
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