CN113594219A - OLED substrate, preparation method thereof and display device - Google Patents
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
- H10K59/122—Pixel-defining structures or layers, e.g. banks
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
- H10K59/1201—Manufacture or treatment
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Abstract
The present invention provides an OLED substrate, a method of manufacturing the OLED substrate, and a display device including the same. Wherein, this OLED base plate includes: the pixel structure comprises a substrate, and a first electrode, a pixel defining layer, an organic light emitting layer and a second electrode which are sequentially formed on the substrate; the pixel defining layer comprises a plurality of sub-pixel defining units, and a metal layer and an insulating layer covering the metal layer are formed on the surface of each sub-pixel defining unit, which is far away from the substrate base plate. The OLED substrate has a special pixel defining layer structure, so that the phenomenon of low gray scale crosstalk between pixels can be reduced.
Description
Technical Field
The present disclosure relates to the field of display technologies, and in particular, to an OLED substrate, a method of manufacturing the substrate, and a display device including the substrate.
Background
In recent years, Organic Light-Emitting diodes (OLEDs) have been receiving more attention as a new flat panel display technology. Since the OLED has the characteristics of active light emission, high light-emitting brightness, high resolution, wide viewing angle, high response speed, low energy consumption, flexibility and the like, the OLED becomes a next generation display technology which can possibly replace liquid crystal display.
In most OLED device structures today, the commonly used colors red, green andthe blue (RGB) light emitting unit structures all share a Hole Injection Layer (HIL) and a Hole Transport Layer (HTL). In general, as shown in fig. 1, the lighting voltage of the RGB three-color pixels, the voltage of B (blue pixel) is the largest, and the voltage of G (green pixel) and the voltage of R (red pixel) are smaller. When a lighting voltage is applied to a unit device of one color, most of the current I is applied when a large voltage is applied across the blue organic light emitting material B due to the large carrier mobility of the hole injection layer HILbWill flow to the blue organic luminescent material B, light the blue picture element; but also a partial current IgAnd IrWill flow through the hole injection layer HIL to the green organic light emitting material G and the red organic light emitting material R, respectively, as shown in fig. 3, and the arrow direction indicates the hole transport direction, whereby the green pixel and the red pixel will be lit as well, eventually resulting in low gray-scale crosstalk (crosstalk), and fig. 2 shows a low gray-scale lighting result picture when only R, G, B sub-pixels are lit, respectively.
Disclosure of Invention
In order to solve the crosstalk problem among the low gray-scale sub-pixels, the invention provides an OLED substrate, which prevents the lateral flow of holes by arranging a pixel defining layer with a metal layer, thereby improving the low gray-scale crosstalk phenomenon.
According to an aspect of the present invention, there is provided an OLED substrate including: the pixel structure comprises a substrate base plate, and a first electrode, a pixel defining layer, an organic light emitting layer and a second electrode which are sequentially arranged on the substrate base plate.
A metal layer and an insulating layer covering the metal layer are arranged on the surface of the pixel defining layer, which is far away from the substrate base plate; and is
The metal layer and the insulating layer are positioned on one side of the organic light-emitting layer close to the substrate, and the metal layer is used for being applied with voltage so as to at least partially block the flow of carriers in the organic light-emitting layer.
According to one embodiment, a pixel defining layer surface between two adjacent pixels is provided with one metal layer or a plurality of metal layers spaced apart from and parallel to each other.
According to a specific embodiment, the metal layer is connected to a power supply provided at a peripheral region of the substrate base.
According to a specific embodiment, the metal layers are connected to form a metal trace, and the metal trace forms a plurality of closed patterns.
According to a specific embodiment, each closed figure encloses one blue pixel.
According to a specific embodiment, the metal layer is formed of a metal material having a resistivity of 2 to 20 μ Ω · cm. Preferably, the metal layer is formed of one or more metals selected from molybdenum, aluminum, copper, titanium, tungsten, and alloy materials thereof.
Preferably, the thickness of the metal layer is 100-500 nm.
According to a specific embodiment, the width of the metal layer is greater than or equal to 3 μm and not greater than the width of the surface of the pixel defining layer.
According to a specific embodiment, the insulating layer is formed of an organic insulating material or an inorganic insulating material.
According to a specific embodiment, the organic insulating material is selected from one or more of polyimide, epoxy resin, polyacrylic resin and phenolic resin, and the inorganic insulating material is selected from one or more of silicon oxide, silicon nitride and silicon oxynitride.
According to another aspect of the present invention, there is provided a display device including the OLED substrate described above.
According to still another aspect of the present invention, there is provided a method of manufacturing an OLED substrate, including the steps of:
sequentially forming a first electrode, a pixel defining layer, an organic light emitting layer and a second electrode on a substrate;
the pixel defining layer includes a plurality of sub-pixel defining units each having a metal layer and an insulating layer covering the metal layer disposed thereon.
According to a specific embodiment, a line width of the metal layer is 3 μm or more, and an orthogonal projection of the metal layer on the substrate base plate is within an orthogonal projection range of the sub-pixel defining unit.
The OLED substrate plays a role of switching through the metal layer formed on the surface of the pixel defining layer, and lateral leakage is blocked and crosstalk is improved by preventing transverse flow of holes in the hole injection layer.
The foregoing summary is provided for the purpose of description only and is not intended to be limiting in any way. In addition to the illustrative aspects, embodiments, and features described above, further aspects, embodiments, and features of the present disclosure will be readily apparent by reference to the drawings and following detailed description.
Drawings
In the drawings, like reference numerals refer to the same or similar parts or elements throughout the several views unless otherwise specified. The figures are not necessarily to scale. It is appreciated that these drawings depict only some embodiments in accordance with the disclosure and are not to be considered limiting of its scope.
Fig. 1 shows a graph of the turn-on voltages of RGB three-color pixels in an OLED device;
FIG. 2 shows the low gray-scale lighting result when only R, G, B subpixels are lit;
FIG. 3 is a schematic diagram of conventional inter-sub-pixel crosstalk;
fig. 4 is a cross-sectional view of a device structure of a depletion MOSFET type in accordance with one embodiment of the present invention;
FIG. 5 is a graph of gate voltage and current in the channel;
fig. 6 is a top view of a device structure of depletion MOSFET type according to an embodiment of the present invention;
FIG. 7 is a schematic diagram of a device structure of a depletion MOSFET type in accordance with one embodiment of the present invention;
FIG. 8 is an equivalent schematic diagram of an OLED substrate structure (top view) and a conventional depletion MOSFET structure (bottom view) according to one embodiment of the present invention;
fig. 9 is a cross-sectional view of a device structure of a depletion MOSFET type in accordance with another embodiment of the present invention;
fig. 10 is a top view of a device structure of a depletion MOSFET type in accordance with another embodiment of the present invention;
fig. 11 is a flowchart of a method of manufacturing an OLED substrate according to an embodiment of the present invention.
Detailed Description
In the following, only certain exemplary embodiments are briefly described. As those skilled in the art can appreciate, the described embodiments can be modified in various different ways, without departing from the spirit or scope of the present disclosure. Accordingly, the drawings and description are to be regarded as illustrative in nature, and not as restrictive.
According to one embodiment of the present invention, there is provided an OLED substrate including a pixel defining layer of a metal layer for blocking lateral flow of holes, which is similar to a structure of a bottom gate depletion MOSFET. As shown in fig. 3, the conventional bottom gate depletion type MOSFET includes an SD metal layer 110, a planarization layer 120 covering the SD metal layer, a first electrode (anode) 130 formed on the planarization layer and contacting the SD metal layer through the planarization layer, a Pixel Defining Layer (PDL)140, a common hole injection layer and hole transport layer (HIL/HTL)150, RGB three-color emission layers (EMLs) 171, 173, 172 formed on the HIL/HTL 150, and a common hole blocking layer, emission layer, and second electrode (cathode) 160 covering the emission layers. When no voltage is applied to the metal layer (Gate), a small fraction of the current I will flow if a turn-on voltage is applied to the B pixelgAnd IrThe current crosstalk is generated by the hole injection layer HIL flowing to the green organic light emitting material G and the red organic light emitting material R, respectively. The arrows in fig. 3 indicate that holes flow from the blue sub-pixel to the green and red sub-pixels.
For depletion MOSFET, at VGAt 0, the channel between the drain and the source is already present, i.e. when no voltage is applied to the gate, the channel is on and current flows. For a P-type depletion MOSFET, holes are conducting in the channel, and the voltage applied to the gate and the current in the channel satisfy the following relationship (1):
(1) I＝I0*(1-VG/Voff)2
wherein I is the current in the channel; i is0Is a VGWhen the voltage is not applied to the grid electrode, the current in the channel is 0V; vGIs the gate voltage; voffIs I0When the current is equal to 0mA, the channel is pinched off, and no current flows through the gate voltage.
In conjunction with the above analysis, it can be understood by analogy: the HIL/HTL Layer on the EL device structure PDL is similar to a conducting channel (Active Layer), and therefore the idea of the present invention is to build a metal Layer on the Pixel Definition Layer (PDL) comparable to the Gate (Gate). As shown in fig. 4, a metal layer 180 and an insulating layer 190 covering the metal layer 180 are disposed on each of pixel defining layers (also referred to as sub-pixel defining units) between adjacent two pixels.
The above structure is simulated to obtain the curve of fig. 5, where the simulation conditions are: i is0＝0.5mA；Voff2V. As shown in FIG. 5, when the voltage is 0, I0When the gate voltage Vg is increased, the channel current I is gradually reduced to reach the pinch-off voltage V of 2VoffWhen this occurs, the channel is not conducting, i.e., the current I is 0. That is, when the gate voltage is greater than or equal to the pinch-off voltage, the channel does not conduct. Therefore, if a proper gate voltage, for example, a gate voltage within 1-10V, is applied to the pixel defining layer PDL, the lateral current in the HIL/HTL can be blocked, thereby improving the crosstalk phenomenon between pixels.
In the OLED substrate of the present invention, the metal layer 180 disposed on the pixel defining layer PDL between two adjacent pixels may be formed of a metal material, particularly, a metal material having a resistivity of 2 to 20 μ Ω · cm. Preferably, the metal material usable in the present invention may be a metal of molybdenum, aluminum, copper, titanium, tungsten, and/or an alloy material thereof. The thickness of the metal layer may be 100-500nm, preferably 150-400nm, and more preferably 200-350 nm. The width of the metal layer is greater than or equal to 3 μm and is not greater than the width of the surface of the pixel defining layer.
The insulating layer 190 covering the metal layer 180 may be formed of an organic insulating material or an inorganic insulating material. The organic insulating material may be one or more of Polyimide (PI), epoxy resin, polyacrylic resin and phenolic resin, and the inorganic insulating material may be one or more of silicon oxide, silicon nitride and silicon oxynitride.
A metal layer and an insulating layer are also present at the side of the organic light-emitting layer close to the substrate, and the metal layer is intended to be subjected to a voltage in order to at least partially block the flow of carriers in the organic light-emitting layer, in particular the HIL/HTL layer.
Fig. 6 shows a top view of a device structure of a depletion MOSFET type according to the present invention, in which a metal layer is provided on a sub-pixel defining unit in the area of a blue pixel 173. The metal layers are arranged to form a plurality of closed patterns, and each closed pattern surrounds one blue pixel. In principle, it is also possible to form a metal layer pattern that encloses the red pixels or the green pixels.
Fig. 7 shows a schematic view of a structure in which the PDL surface of the OLED substrate according to fig. 6 is provided with a metal layer. On the OLED substrate 200, metal layers 180 in a step shape, and metal wirings 210 connecting these metal layers 180 on the PDL are formed. The metal layer and the metal wiring are connected to a power supply (not shown) provided in a peripheral region of the substrate base.
Fig. 8 shows the correspondence of a sub-pixel defining cell (upper part) of a metal layer and an insulating layer provided according to the present invention to a conventional bottom-gate depletion MOSFET structure (lower part). The metal layer and the insulating layer formed on the sub-pixel defining unit of the present invention, and the common hole injection layer and the hole transport layer (HIL/HTL) covering the metal layer and the insulating layer correspond to a channel layer in a bottom gate structure, and the metal layer and the insulating layer correspond to a gate and a gate insulating layer in the bottom gate structure.
Fig. 9 and 10 each show an OLED substrate according to a further embodiment of the invention, in which two metal layers which are spaced apart and run side by side are formed on the surface of the PDL between two adjacent pixels facing away from the substrate. More metal layers may be provided, spaced apart and running side by side, as desired.
Therefore, in the OLED substrate of the present invention, by the above pixel defining layer structure having the metal layer and the insulating layer covering the metal layer, when the gate voltage is increased to the pinch-off voltage, the lateral current in the HIL/HTL functioning as a channel can be blocked, thereby improving the crosstalk phenomenon between different pixels.
According to an embodiment of the present invention, there is provided a display panel including the OLED substrate having the above-described structure.
According to an embodiment of the present invention, there is provided a display device including the OLED substrate having the above-described structure.
According to another aspect of the present invention, there is provided a method of preparing the above OLED substrate, including the steps of:
sequentially forming a first electrode, a pixel defining layer, an organic light emitting layer and a second electrode on a substrate;
the pixel defining layer includes a plurality of sub-pixel defining units each having a metal layer and an insulating layer covering the metal layer disposed thereon.
Wherein, the orthographic projection of the metal layer on the substrate base plate is within the orthographic projection range of the sub-pixel defining unit.
According to one embodiment, as shown in fig. 11, a method of preparing an OLED substrate includes:
(1) first, a Backplane (BP) is prepared to a pixel definition layer PDL according to a conventional process. Conventional processes for preparing the backplate may include, for example, forming an SD metal layer, a planarization layer, a first electrode, a pixel defining layer, and the like on a substrate base plate.
(2) The preparation of the patterned metal layer is carried out on the PDL film layer through the processes of sputtering, gluing, exposure, development, etching and the like, the material can be any low-resistance metal material or alloy thereof, such as molybdenum, aluminum, copper, titanium, tungsten and other metals or alloy materials thereof, the thickness is 100 plus one nm and 500nm, and the line width needs to meet the following requirements: a line width of 3 μm or less and a PDL width (about several tens of micrometers); the insulating layer (corresponding to an interlayer insulating layer, GI in the depletion MOSFET) is prepared on the metal layer by a glue coating process (or a PECVD process), exposure, development, etching, and the like. The material for forming the insulating layer may be an organic insulating material or an inorganic insulating material, such as PI, SiO2Etc. with a thickness of 50-300 nm.
(3) And (3) continuously preparing films such as HIL/HTL/EBL/EML/HBL/ETL/EIL/cathode/CPL (dielectric capping layer)/LiF and the like on the film layer in the step (2) according to a conventional evaporation process.
(4) And (4) finishing thin film packaging (TFE) on the film layer in the step (3) according to a conventional packaging process.
(5) And finally, completing the conventional module process.
In the description of the present specification, it is to be understood that the terms "center," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," "counterclockwise," "axial," "radial," "circumferential," and the like are used in the orientations and positional relationships indicated in the drawings for convenience in describing the present disclosure and to simplify the description, but are not intended to indicate or imply that the referenced devices or elements must have a particular orientation, be constructed and operated in a particular orientation, and are therefore not to be considered limiting of the present disclosure.
Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of the present disclosure, "a plurality" means two or more unless specifically limited otherwise.
In the present disclosure, unless otherwise expressly stated or limited, the terms "mounted," "connected," "secured," and the like are to be construed broadly and can, for example, be fixedly connected, detachably connected, or integral; the connection can be mechanical connection, electrical connection or communication; either directly or indirectly through intervening media, either internally or in any other relationship. The specific meaning of the above terms in the present disclosure can be understood by those of ordinary skill in the art as appropriate.
In the present disclosure, unless expressly stated or limited otherwise, the first feature "on" or "under" the second feature may comprise the first and second features being in direct contact, or may comprise the first and second features being in contact, not directly, but via another feature in between. Also, the first feature being "on," "above" and "over" the second feature includes the first feature being directly on and obliquely above the second feature, or merely indicating that the first feature is at a higher level than the second feature. A first feature being "under," "below," and "beneath" a second feature includes the first feature being directly above and obliquely above the second feature, or simply meaning that the first feature is at a lesser level than the second feature.
The above disclosure provides many different embodiments or examples for implementing different features of the disclosure. In order to simplify the disclosure of the present disclosure, specific example components and arrangements are described above. Of course, they are merely examples and are not intended to limit the present disclosure. Moreover, the present disclosure may repeat reference numerals and/or reference letters in the various examples, which have been repeated for purposes of simplicity and clarity and do not in themselves dictate a relationship between the various embodiments and/or arrangements discussed.
While the present disclosure has been described with reference to specific embodiments, it will be understood by those skilled in the art that various changes and modifications may be made without departing from the spirit and scope of the disclosure. Therefore, the protection scope of the present disclosure shall be subject to the protection scope of the claims.
Claims (14)
1. An OLED substrate, comprising: the pixel structure comprises a substrate, and a first electrode, a pixel defining layer, an organic light emitting layer and a second electrode which are sequentially arranged on the substrate;
a metal layer and an insulating layer covering the metal layer are arranged on the surface of the pixel defining layer, which is far away from the substrate base plate; and is
The metal layer and the insulating layer are positioned on one side of the organic light-emitting layer close to the substrate, and the metal layer is used for being applied with voltage so as to at least partially block the flow of carriers in the organic light-emitting layer.
2. The OLED substrate of claim 1, wherein a surface of the pixel defining layer between two adjacent pixels is provided with one metal layer or a plurality of metal layers spaced apart from and parallel to each other.
3. The OLED substrate according to claim 1 or 2, wherein the metal layer is connected to a power supply disposed at a peripheral region of the substrate.
4. The OLED substrate according to claim 1 or 2, wherein the metal layers are connected to form a metal trace, and the metal trace forms a plurality of closed patterns.
5. The OLED substrate of claim 4, wherein each closed figure surrounds one blue pixel.
6. The OLED substrate according to claim 1 or 2, wherein the metal layer is formed of a metal material having a resistivity of 2-20 μ Ω -cm.
7. The OLED substrate according to claim 1 or 2, wherein the metal layer is formed of one or more of metals selected from molybdenum, aluminum, copper, titanium, tungsten, and alloy materials thereof.
8. The OLED substrate of claim 1 or 2, wherein the metal layer has a thickness of 100-500 nm.
9. The OLED substrate of claim 1 or 2, wherein the width of the metal layer is greater than or equal to 3 μm and not greater than the width of the surface of the pixel defining layer.
10. The OLED substrate according to claim 1 or 2, wherein the insulating layer is formed of an organic insulating material or an inorganic insulating material.
11. The OLED substrate of claim 1, wherein the organic insulating material is selected from one or more of polyimide, epoxy, polyacrylic resin, and phenolic resin, and the inorganic insulating material is selected from one or more of silicon oxide, silicon nitride, and silicon oxynitride.
12. A display device comprising an OLED substrate according to any one of claims 1 to 11.
13. A method of making an OLED substrate comprising the steps of:
sequentially forming a first electrode, a pixel defining layer, an organic light emitting layer and a second electrode on a substrate;
the pixel defining layer includes a plurality of sub-pixel defining units each having a metal layer and an insulating layer covering the metal layer disposed thereon.
14. The method of claim 13, wherein the metal layer has a line width of 3 μm or more, and an orthogonal projection of the metal layer on the substrate is within an orthogonal projection range of the pixel defining layer.
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