CN113589013A - Signal excitation device of oscilloscope probe and oscilloscope calibration system - Google Patents
Signal excitation device of oscilloscope probe and oscilloscope calibration system Download PDFInfo
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Abstract
The application relates to a signal excitation device of an oscilloscope probe and an oscilloscope calibration system, wherein the signal excitation device comprises a power supply circuit, a driving circuit and a test circuit, the driving circuit is used for generating PWM driving signals with preset frequency and/or preset duty ratio, the test circuit is used for generating first calibration signals with current period change under the action of the PWM driving signals and outputting the first calibration signals from a current test end, and generating second calibration signals with voltage period change and outputting the second calibration signals from a voltage test end. In the technical scheme, because the first calibration signal and the second calibration signal generated by the signal excitation device have aligned phases, the two calibration signals can be used for respectively and effectively exciting the current detection probe and the voltage detection probe of the oscilloscope with zero phase delay, so that the oscilloscope can accurately measure and obtain the phase change conditions of the current signal and the voltage signal generated by the probes, and the phase compensation can be performed on the signals with the phase delay.
Description
Technical Field
The application relates to the technical field of oscilloscopes, in particular to a signal excitation device of an oscilloscope probe and an oscilloscope calibration system.
Background
Oscilloscopes are indispensable tools for designing, manufacturing and maintaining electronic equipment, most of the existing oscilloscopes mainly use digital oscilloscopes, are increasingly popularized due to functions of waveform triggering, storing, displaying, measuring, analyzing and the like, and with rapid development of scientific and market requirements, the digital oscilloscopes are considered to be eyes of engineers and are used as necessary tools for meeting measurement challenges of the engineers.
When the oscilloscope is used for testing and measuring the tested circuit, the probe of the oscilloscope is also needed to execute the testing and measuring task, the probe of the oscilloscope is a device for connecting the tested signal to the input of the oscilloscope, the performance of the probe of the oscilloscope is very important for the accuracy and the correctness of the measuring result, and the probe of the oscilloscope is essentially an electronic component for connecting the tested circuit and the input end of the oscilloscope.
In the measurement process of the switching power supply circuit, an oscilloscope is often used to match with a voltage probe and a current probe to measure the switching loss of a switching tube in the circuit, however, the phase delay caused by certain inconsistency of the probe performances of the voltage probe and the current probe will affect the measurement accuracy of the switching loss. In the measurement process of the alternating current power grid, the phase delay of the voltage probe and the current probe also influences the measurement result of the active power, and the situation that the measurement precision is reduced is inevitably caused.
Disclosure of Invention
The technical problem that this application mainly solved is: how to carry out phase calibration on a voltage detection probe and a current detection probe of an oscilloscope. In order to solve the above problems, the present application provides a signal excitation device of an oscilloscope probe and an oscilloscope calibration system.
According to a first aspect, an embodiment of the present application provides a signal excitation apparatus for an oscilloscope probe, including: the power supply circuit is used for generating direct current of a preset grade; the driving circuit is connected with the power circuit and is used for generating a PWM driving signal with preset frequency and/or preset duty ratio; the test circuit is connected with the power circuit and the drive circuit and comprises a current test end and a voltage test end; the current testing end is used for connecting a current detection probe of an oscilloscope, and the voltage testing end is used for connecting a voltage detection probe of the oscilloscope; the test circuit is used for generating a first calibration signal with periodically changed current under the action of the PWM driving signal and outputting the first calibration signal from the current test terminal, and generating a second calibration signal with periodically changed voltage and outputting the second calibration signal from the voltage test terminal; the first calibration signal and the second calibration signal have aligned phases and are capable of signal excitation of the current detection probe and the voltage detection probe, respectively.
The driving circuit comprises a time base chip U1, resistors R4 and R5, capacitors C1, C2, C3 and C4; the time base chip U1 comprises a power supply end, a grounding end, a release end, a critical end, a voltage control end, a trigger end, a reset end and an output end; the power supply end is connected with direct current of a preset grade and is grounded through a capacitor C2, and the power supply end is connected with the release end through a resistor R4; the release end is connected with one end of a resistor R5, the other end of a resistor R5 is connected with the trigger end and the critical end, and the other end of the resistor R5 is grounded through a capacitor C3; the voltage control end is grounded through a capacitor C4, and the reset end is connected with direct current of a preset grade and grounded through a capacitor C1; the output end is used for outputting a PWM driving signal with preset frequency or preset duty ratio.
The preset frequency of the PWM driving signal output by the time-base chip U1 is expressed as f ═ 1.44/[ (R4+2 × R5) × C3 ]; and/or the preset duty ratio of the PWM driving signal output by the time base chip U1 is expressed by a formula D-R5/(R4 +2 xR 5).
The test circuit comprises a triode Q1, a coil ID, a resistor R2, a resistor R3 and a port J1; the triode Q1 comprises a first end, a second end and a control end, the first end of the triode Q1 is connected with one end of the coil ID, the other end of the coil ID is connected with a port J1, and the triode Q1 is connected to direct current of a preset grade through a resistor R2; the second end of the transistor Q1 is grounded, and the control end of the transistor Q1 is connected with the driving circuit through a resistor R3 and used for receiving the PWM driving signal; multiple windings are formed on one side of the coil ID, and an induction port surrounding the multiple windings is formed and serves as a current test end of the test circuit; a potential difference is formed between the port J1 and the second terminal of the transistor Q1, and the port J1 serves as a voltage test terminal of the test circuit.
The test circuit further comprises a switch S1 and a resistor R1; the switch S1 is connected in series with the resistor R1 and then connected in parallel with the resistor R2; the switch S1 is used for closing when the range of the current detection probe of the oscilloscope is larger than a preset range threshold.
The power circuit comprises a power receiving port J3 and a capacitor C5; the power receiving port J3 is used for accessing an external direct current power supply, and a capacitor C5 is connected in series between the positive terminal and the grounding terminal of the power receiving port J3; the preset level of the direct current generated by the power supply circuit is any voltage level of 5V to 3.3V.
According to a second aspect, an embodiment of the present application provides an oscilloscope calibration system, including the signal excitation device in the first aspect, further including an oscilloscope, and a current detection probe and a voltage detection probe for the oscilloscope; the oscilloscope comprises a first signal channel, a second signal channel and a processor; the current detection probe is connected with a current test end of a test circuit in the signal excitation device and can transmit a detected current signal to a first signal channel of the oscilloscope; the first signal channel is used for converting the current signal into digital first waveform data and sending the digital first waveform data to the processor; the voltage detection probe is connected with a voltage test end of a test circuit in the signal excitation device and can transmit a detected voltage signal to a second signal channel of the oscilloscope; the second signal channel is used for converting the voltage signal into digital second waveform data and sending the digital second waveform data to the processor; the processor is configured to perform phase compensation on the first waveform data and the second waveform data, and store a phase difference value required for the phase compensation.
The processor includes: an obtaining module, configured to obtain first waveform data and second waveform data generated from the first signal channel and the second signal channel, respectively; the waveform comparison module is used for performing time domain comparison on waveforms corresponding to the first waveform data and the second waveform data respectively and determining a phase difference value of a rising edge position or a falling edge position in the two waveforms; and the phase compensation module is used for performing phase compensation on the waveform with the delayed phase according to the phase difference value so as to enable the waveforms corresponding to the first waveform data and the second waveform data to be phase-aligned at the rising edge position or the falling edge position respectively.
The oscilloscope further comprises a power supply port; the power supply port is connected with a power circuit in the signal excitation device and used for supplying direct current to the power circuit.
The oscilloscope further comprises a display, and the display is used for displaying waveforms corresponding to the first waveform data and the second waveform data before and/or after the phase compensation.
The beneficial effect of this application is:
the signal excitation device of the oscilloscope probe and the oscilloscope calibration system provided by the above embodiments, wherein the signal excitation device includes a power circuit, a driving circuit and a testing circuit, the driving circuit is configured to generate a PWM driving signal with a preset frequency and/or a preset duty ratio, the testing circuit is configured to generate a first calibration signal with a current period varying under the action of the PWM driving signal and output the first calibration signal from the current testing terminal, and generate a second calibration signal with a voltage period varying and output the second calibration signal from the voltage testing terminal. In the technical scheme, because the first calibration signal and the second calibration signal generated by the signal excitation device have aligned phases, the two calibration signals can be used for respectively and effectively exciting the current detection probe and the voltage detection probe of the oscilloscope with zero phase delay, so that the oscilloscope is ensured to accurately measure and obtain the phase delay change of the current signal and the voltage signal. In the oscilloscope calibration system, the signal excitation device is connected to the oscilloscope through the current detection probe and the voltage detection probe, technical realization conditions are provided for the oscilloscope to acquire the phase difference value of the current waveform and the voltage waveform, and phase compensation can be performed on a signal with a lagging phase, so that the aim of phase calibration of the current detection probe and the voltage detection probe is fulfilled.
Drawings
FIG. 1 is a block diagram of a signal driver of an oscilloscope probe according to one embodiment of the present application;
FIG. 2 is a circuit diagram of a power circuit;
FIG. 3 is a circuit diagram of a driving circuit;
FIG. 4 is a circuit diagram of a test circuit;
FIG. 5 is a block diagram of a coil in a test circuit;
FIG. 6 is a block diagram of an oscilloscope calibration system in one embodiment of the present application;
FIG. 7 is a block diagram of a current sensing probe;
FIG. 8 is a block diagram of a voltage sensing probe;
FIG. 9 is a block diagram of a processor;
fig. 10 is a schematic diagram of the principle of phase compensation.
Detailed Description
The present application will be described in further detail below with reference to the accompanying drawings by way of specific embodiments. Wherein like elements in different embodiments are numbered with like associated elements. In the following description, numerous details are set forth in order to provide a better understanding of the present application. However, those skilled in the art will readily recognize that some of the features may be omitted or replaced with other elements, materials, methods in different instances. In some instances, certain operations related to the present application have not been shown or described in detail in order to avoid obscuring the core of the present application from excessive description, and it is not necessary for those skilled in the art to describe these operations in detail, so that they may be fully understood from the description in the specification and the general knowledge in the art.
Furthermore, the features, operations, or characteristics described in the specification may be combined in any suitable manner to form various embodiments. Also, the various steps or actions in the method descriptions may be transposed or transposed in order, as will be apparent to one of ordinary skill in the art. Thus, the various sequences in the specification and drawings are for the purpose of describing certain embodiments only and are not intended to imply a required sequence unless otherwise indicated where such sequence must be followed.
The numbering of the components as such, e.g., "first", "second", etc., is used herein only to distinguish the objects as described, and does not have any sequential or technical meaning. The term "connected" and "coupled" when used in this application, unless otherwise indicated, includes both direct and indirect connections (couplings).
The first embodiment,
Referring to fig. 1, in the present embodiment, a signal driver for an oscilloscope probe is disclosed, where the signal driver 1 mainly includes a power circuit 11, a driving circuit 12, and a testing circuit 13, which are described below.
The power circuit 11 is used as a voltage-stabilizing power supply component for dc power, and is mainly used for generating dc power of a preset level, so as to provide dc power required by the operation of the driving circuit 12 and the testing circuit 13.
The driving circuit 12 is connected with the power circuit 11, and the power circuit 11 provides direct current required by work; the driving circuit 12 is a PWM signal generating unit, and is mainly used for generating a PWM driving signal with a preset frequency and/or a preset duty ratio. Pulse Width Modulation (PWM) is an analog control method, in which on/off of a switching device of an inverter circuit is controlled to obtain a series of pulses with equal amplitude but inconsistent width at an output end, and the pulses are used to replace a sine wave or a required waveform.
The test circuit 13 is connected to the power supply circuit 11 and the drive circuit 12, and supplies a dc power necessary for operation from the power supply circuit 11 and a PWM drive signal necessary for operation from the drive circuit 12. The test circuit 13 includes a current test end and a voltage test end, wherein the current test end is used for connecting a current detection probe of the oscilloscope, and the voltage test end is used for connecting a voltage detection probe of the oscilloscope, so that calibration signals used as excitation are respectively provided for the current detection probe and the voltage detection probe of the oscilloscope through the current test end and the voltage test end.
In the present embodiment, the test circuit 13 mainly generates a first calibration signal with a periodically varying current under the action of the PWM driving signal and outputs the first calibration signal from the current test terminal, and generates a second calibration signal with a periodically varying voltage and outputs the second calibration signal from the voltage test terminal. The first calibration signal and the second calibration signal have aligned phases and can respectively perform signal excitation on the current detection probe and the voltage detection probe, so that the current detection probe generates a current signal under the excitation action of the first calibration signal, and the voltage detection probe generates a voltage signal under the excitation action of the second calibration signal.
In a particular embodiment, referring to fig. 1 and 2, the power circuit 11 may include a power receiving port J3 and a capacitor C5. The power receiving port J3 is used for accessing an external dc power supply (such as a battery, a dc switching power supply, an oscilloscope, and other devices capable of transmitting power to the outside); the power receiving port J3 may have a positive terminal and a ground terminal, and in order to ensure the stability of power receiving, a capacitor C5 may be connected in series between the positive terminal and the ground terminal of the power receiving port J3, so as to perform reactive compensation on voltage fluctuation in the power receiving process by using the capacitor C5, and eliminate fluctuation interference. It should be noted that the preset level of the direct current generated by the power circuit 11 is any voltage level from 5V to 3.3V, so that the power supply requirement of most chips in the circuit can be met.
In one embodiment, referring to fig. 1 and 3, the driving circuit 12 includes a time base chip U1, resistors R4, R5, and capacitors C1, C2, C3, C4. The time-base chip U1 includes a power supply terminal (+ Vcc), a ground terminal (GND), a release terminal (DISCHARGE), a critical Terminal (THRESHOLD), a VOLTAGE CONTROL terminal (CONTROL VOLTAGE), a TRIGGER Terminal (TRIGGER), a RESET terminal (RESET), and an OUTPUT terminal (OUTPUT), for example, the time-base chip U1 may be an LM555 type chip. The power supply terminal (+ Vcc) is connected to a direct current (such as Vcc5V) of a preset level and is grounded through a capacitor C2, and the power supply terminal (+ Vcc) is connected with a release terminal (DISCHARGE) through a resistor R4; the release terminal (DISCHARGE) is connected with one end of the resistor R5, the other end of the resistor R5 is connected with the TRIGGER Terminal (TRIGGER) and the critical Terminal (THRESHOLD), and the other end of the resistor R5 is grounded through the capacitor C3; the VOLTAGE CONTROL terminal (CONTROL VOLTAGE) is grounded through a capacitor C4, and the RESET terminal (RESET) is connected to a direct current (such as VCC5V) of a preset level and grounded through a capacitor C1; the OUTPUT end (OUTPUT) is used for outputting a PWM driving signal with a preset frequency or a preset duty ratio; of course, the wiring contact T1 connected to the OUTPUT terminal (OUTPUT) may be used to connect the test circuit 13 of the subsequent stage.
It should be noted that, in the circuit of fig. 3, the purpose of the power supply terminal (+ Vcc) accessing the predetermined level of direct current (e.g., Vcc5V) is to provide the time base chip U1 with direct current required for operation, and the purpose of the RESET terminal (RESET) accessing the predetermined level of direct current (e.g., Vcc5V) is to enable the time base chip U1 to automatically RESET when powered on. The release terminal (DISCHARGE), the THRESHOLD Terminal (THRESHOLD), and the TRIGGER Terminal (TRIGGER) cooperate with each other and can be used to adjust a preset frequency and a preset duty ratio of the PWM driving signal.
For example, the preset frequency of the PWM driving signal outputted from the time base chip U1 can be formulated as
f＝1.44/[(R4+2×R5)×C3]。
For example, the preset duty ratio of the PWM driving signal outputted from the time base chip U1 can be formulated
D＝R5/(R4+2×R5)。
R4 and R5 in the formula refer to resistance values of the relevant resistors, and C3 refers to capacitance values of the relevant capacitors. Of course, the magnitude of the resistance of R3 can affect the rising and falling edges of the output signal, with the larger R3, the slower the rising and falling edges.
It can be understood that the frequency and duty ratio of the PWM driving signal can be configured by only properly setting the resistance values of the resistors R4 and R5 and the capacitance value of the capacitor C3. Here, for the PWM driving signal, one or more of a preset frequency and a preset duty ratio may be used as a configuration parameter of the signal, and is not particularly limited. Of course, the PWM driving signal may be a rectangular wave PWM signal, or may be a triangular wave, sawtooth wave, trapezoidal wave, sine wave, or other types of PWM signals.
In one embodiment, referring to fig. 1 and 4, test circuit 13 may include transistor Q1, coil ID, resistor R2, resistor R3, and port J1. The transistor Q1 includes a first end, a second end, and a control end, the first end of the transistor Q1 is connected to one end of the coil ID, and the other end of the coil ID is connected to the port J1, and is connected to a dc power of a predetermined level (e.g., VCC5V) via a resistor R2. In addition, the second terminal of the transistor Q1 is grounded, and the control terminal of the transistor Q1 is connected to the driving circuit 12 through the resistor R3 and is configured to receive the PWM driving signal; for example, the terminal of the resistor R3 not connected to the transistor Q1 is formed with a connection contact T2, and only the connection contact T2 needs to be connected to the connection contact T1 in fig. 3, so that the PWM driving signal can be transmitted to the test circuit 13.
The coil ID has a multiple winding (for example, two or more windings) formed on one side thereof, and has an induction port surrounding the multiple winding, wherein the induction port serves as a current test terminal of the test circuit 13, and the induction port mainly serves as a clamping position of the current detection probe having the hall element. It should be noted that, in order to facilitate the generation of the coil ID by the wiring form, the wiring design can be performed on one PCB board, and the spiral structure in fig. 5 is formed, and the arrow indicates the current direction and passes through IIDThe left rectangle T3 is the sensing port required for clamping the current detection probe on the multi-winding wire. Then, if the current detection probe is held in a rectangular shape at the sensing port T3, the magnitude of the current signal detected by the mutual inductance is Itest＝N×IIDWhere N is the number of turns of the multiple winding (e.g., the four-turn winding in fig. 5). It can be understood that the detected current value can be increased by setting the number of winding turns of the coil ID so that the current I is small in the lineIDThe current detection result is multiplied, and the current flowing through the line can be accurately measured even if a wide-range current detection probe is used. As can be appreciated, the first and second,the structure of coil ID can play the multiplication effect of electric current, no matter to heavy current, still can both the precision measurement to undercurrent to be fit for the calibration task of the current detection probe of various electric current ranges.
In fig. 4, a potential difference is formed between the port J1 and the second terminal of the transistor Q1, that is, a potential difference is formed between the port J1 and the other ground port J2, so that when the voltage of the port J1 is measured, the voltage detection probe can be connected to the port J1 and the port J2, and the port J1 is used as a voltage testing terminal of the test circuit 12.
In fig. 4, the transistor Q1 may be an NMOS transistor, and a drain and a source of the NMOS transistor are respectively used as the first end and the second end of the transistor Q1, and a gate of the NMOS transistor is used as the control end of the transistor Q1. Of course, the transistor Q1 may also be a PMOS transistor, and will not be described in detail here.
It should be noted that, since the PWM driving signal has the characteristic of periodic variation of high level and low level, the input to the control terminal of the transistor Q1 inevitably causes periodic on and off between the first terminal and the second terminal of the transistor Q1, so as to intermittently change the voltage at the port J1 and intermittently change the current flowing through the coil ID. For example, when the control terminal of the transistor Q1 is low, the transistor Q1 is not turned on, and V is set toJ1＝VID5V and no current on coil ID, i.e. IID0. For example, when the control terminal of the transistor Q1 is high, the transistor Q1 is turned on, and V is turned onJ1＝VID0V and current, i.e. I, on coil IDID＝5V/R2。
Further, referring to fig. 1 and 4, the test circuit 13 further includes a switch S1 and a resistor R1; the switch S1 is connected in series with the resistor R1 and then connected in parallel with the resistor R2. Then, the switch S1 is closed when the range of the current detection probe of the oscilloscope is greater than a preset range threshold (e.g. 1A), and the current flowing through the coil ID is I when the transistor Q1 is turned onID5V/(R1| | | R2); moreover, the switch S1 can be used to detect the current of the current probe of the oscilloscope is less than or equal to the preset range threshold (such as 1A)Is off, and when the transistor Q1 is on, the current flowing through the coil ID is IID＝5V/R2。
It will be appreciated that the purpose of the switch S1 is to change the amount of series resistance in the line, when a small range (e.g. 0-1A) current sensing probe is used to measure the coil ID, it is necessary to reduce the current in the line to allow current measurement in a smaller range, and that switching off the switch S1 allows only the resistor R2 to be connected to the line, and R2 allows only the resistor R2 to be connected to the line>(R1| | R2), then I is calculatedIDWill be relatively small. When a large-range (such as 0-10A) current detection probe is used for measuring the coil ID, the current in the line needs to be increased to measure the current in a large range, and when the switch S1 is closed, the resistors R1 and R2 are connected into the line in parallel (R1| | | R2)<R2, then calculating the resultant IIDWill be relatively large.
It can be understood that the current in the line can be flexibly adjusted by opening or closing the switch S1, and the measurement requirements of the current detection probes with different ranges are met, so that the measurement accuracy of the current detection probes is ensured, and the phase calibration task of the probes is better realized.
It should be noted that the switch S1 in fig. 4 may be a manual switch, and whether to close the switch S1 is manually selected by the user; of course, the switch S1 may be an electronic switch, which is connected to a control panel through a signal, the range of the current detection probe of the oscilloscope is configured on the control panel, the control panel is opened through the signal control switch S1 in the small range, and the control panel is closed through the signal control switch S1 in the large range.
Example II,
Referring to fig. 6, the present embodiment discloses an oscilloscope calibration system, which mainly includes a signal excitation device 1, an oscilloscope 2, and a current detection probe 31 and a voltage detection probe 32 for the oscilloscope 2, which are respectively described below.
The oscilloscope 2 comprises a first signal channel CH1, a second signal channel CH2 and a processor 21, wherein the first signal channel CH1 and the second signal channel CH2 are both connected with the processor 21.
The current detecting probe 31 is connected to a current testing terminal (e.g., a sensing port T3 in fig. 5) of the testing circuit 13 in the signal driver 1, and is capable of transmitting a detected current signal to a first signal channel CH1 of the oscilloscope 2. It will be appreciated that the first signal path CH1 has a standard interface into the current sensing probe 31 capable of receiving a current signal from the current sensing probe 31, and the first signal path CH1 is capable of converting the received current signal into digitized first waveform data and sending the first waveform data to the processor 21.
The voltage detection probe 32 is connected to a voltage test terminal (e.g., port J1 in fig. 4) of the test circuit 13 in the signal driver 1, and is capable of transmitting a detected voltage signal to the second signal channel CH2 of the oscilloscope 2. It will be appreciated that the second signal path CH2 has a standard interface into the voltage detection probe 32, is capable of receiving a voltage signal from the voltage detection probe 32, and the second signal path CH2 is capable of converting the received voltage signal into digitized second waveform data and sending the second waveform data to the processor 21.
In one embodiment, fig. 7 is a schematic structural view of the current detection probe 31, and the current detection probe 31 has a jaw T4, and a jaw T4 is used for clamping the sensing port T3 in fig. 5 and sensing the current flowing through the conductor L in a mutual inductance manner. For example, if the lead L is regarded as the multiple winding on the coil ID side in fig. 5, the magnitude of the current sensed by the current detection probe 31 is the sum of instantaneous currents flowing through the multiple windings on the coil ID side. It will be appreciated that the current sensing probe 31 may be a magnetic loop designed according to faraday's principle to measure a disturbing current signal in the conductor L, the current flowing through the conductor L causing an electromagnetic flux field to form around the conductor L, and the current sensing probe 31 is an assembly designed to induce a field strength of this flux field and to convert the flux into a corresponding current signal.
In one embodiment, fig. 8 is a schematic structural diagram of the voltage detection probe 32, and the voltage detection probe 32 has probes 321 and 322, wherein the probe 321 is used for contacting the port J1 in fig. 4, and the probe 322 is used for contacting the port J2 in fig. 4, and the corresponding voltage signal is generated by converting and measuring the potential difference between the port J1 and the port J2. As for the voltage detection probe 32, it may be a passive type or an active type probe, and is not particularly limited herein.
In this embodiment, the processor 21 is a logic processing unit with data operation capability, such as a CPU, an FPGA, a single chip, a microprocessor, and the like, and the processor 21 is mainly configured to perform phase compensation on the first waveform data and the second waveform data and store a phase difference value required by the phase compensation.
In one embodiment, referring to fig. 9, the processor includes an acquisition module 211, a waveform comparison module 212, and a phase compensation module 213, each described below.
The obtaining module 211 is connected to the first signal channel CH1 and the second signal channel CH2 in fig. 6, and is configured to obtain the generated first waveform data and second waveform data from the first signal channel CH1 and the second signal channel CH2, respectively.
The waveform comparing module 212 is connected to the obtaining module 211, and configured to perform time domain comparison on waveforms corresponding to the first waveform data and the second waveform data, and determine a phase difference value between a rising edge position and a falling edge position in the two waveforms.
For example, fig. 10 shows the fluctuation of the PWM waveform corresponding to the PWM driving signal, the current waveform corresponding to the first waveform data, and the voltage waveform corresponding to the second waveform data in the time domain. In fig. 10, when the voltage waveform and the PWM waveform reach phase alignment at the rising edge position (or the falling edge position), the voltage waveform is not phase-delayed with respect to the PWM waveform, and it can be shown that the voltage detection probe 32 does not generate a phase deviation with respect to the signal of the excitation input. Also, in fig. 10, if the current waveform and the voltage waveform do not reach the phase alignment at the rising edge position (or the falling edge position), the current waveform has a certain phase delay with respect to the voltage waveform, and it can be shown that the current detection probe 31 has some phase deviation to the signal of the excitation input, and the phase difference value can be represented by x in fig. 10.
The phase compensation module 213 is connected to the waveform comparison module 212 and the obtaining module 211, and the phase compensation module 213 is configured to perform phase compensation on the waveform with the delayed phase according to the phase difference value, so that the waveforms corresponding to the first waveform data and the second waveform data are phase-aligned at the rising edge position or the falling edge position, respectively.
For example, in fig. 10, the phase difference between the current waveform and the voltage waveform is x, and the voltage waveform undergoes phase lag, so that the voltage waveform can be phase-compensated by the phase difference x. For example, x is added to each of the second waveform data in the time distribution, so that the waveforms corresponding to the first waveform data and the second waveform data can be phase-aligned at the rising edge position or the falling edge position, respectively.
It can be understood that, since the processor 21 stores the phase difference value required for phase compensation, the measurement results of the current detection probe and the voltage detection probe can be conveniently calibrated when the oscilloscope, the current detection probe and the voltage detection probe thereof are used for testing and measuring the electronic circuit to be tested. For example, the phase compensation is performed on the voltage waveform or the current waveform with the lagging phase by calling the phase difference value, so that the waveforms corresponding to the current and the voltage can achieve the alignment effect in the time domain, the interference of the phase deviation of the probe is avoided, and the measurement accuracy of the oscilloscope on the current and the voltage is improved.
In some embodiments, referring to fig. 6, the oscilloscope 2 further comprises a power supply port 22, and the power supply port 22 is connected to the power circuit 11 in the signal excitation device 1 and is used for supplying direct current to the power circuit 11, so that the power circuit 11 can supply direct current of a preset level to the driving circuit 12 and the test circuit 13. For example, the power supply port 22 of the oscilloscope 2 may be a USB interface, and then the 5V dc power can be transmitted to the power circuit 11 of the signal excitation device 1 through the USB interface.
In some embodiments, referring to fig. 6, the oscilloscope 2 further includes a display 23 connected to the processor 21, wherein the display 23 is configured to display waveforms corresponding to the first waveform data and the second waveform data before and/or after the phase compensation, respectively, so that a user can observe the waveform change before and after the phase compensation in real time.
Those skilled in the art will appreciate that all or part of the functions of the various methods in the above embodiments may be implemented by hardware, or may be implemented by computer programs. When all or part of the functions of the above embodiments are implemented by a computer program, the program may be stored in a computer-readable storage medium, and the storage medium may include: a read only memory, a random access memory, a magnetic disk, an optical disk, a hard disk, etc., and the program is executed by a computer to realize the above functions. For example, the program may be stored in a memory of the device, and when the program in the memory is executed by the processor, all or part of the functions described above may be implemented. In addition, when all or part of the functions in the above embodiments are implemented by a computer program, the program may be stored in a storage medium such as a server, another computer, a magnetic disk, an optical disk, a flash disk, or a removable hard disk, and may be downloaded or copied to a memory of a local device, or may be version-updated in a system of the local device, and when the program in the memory is executed by a processor, all or part of the functions in the above embodiments may be implemented.
The technical solutions of the present application are described above by using specific examples, which are only used to help understanding of the present application and are not intended to limit the present application. For a person skilled in the art to which the application pertains, several simple deductions, modifications or substitutions may be made according to the idea of the application.
Claims (10)
1. A signal driver for an oscilloscope probe, comprising:
the power supply circuit is used for generating direct current of a preset grade;
the driving circuit is connected with the power circuit and is used for generating a PWM driving signal with preset frequency and/or preset duty ratio;
the test circuit is connected with the power circuit and the drive circuit and comprises a current test end and a voltage test end; the current testing end is used for connecting a current detection probe of an oscilloscope, and the voltage testing end is used for connecting a voltage detection probe of the oscilloscope;
the test circuit is used for generating a first calibration signal with periodically changed current under the action of the PWM driving signal and outputting the first calibration signal from the current test terminal, and generating a second calibration signal with periodically changed voltage and outputting the second calibration signal from the voltage test terminal; the first calibration signal and the second calibration signal have aligned phases and are capable of signal excitation of the current detection probe and the voltage detection probe, respectively.
2. The signal driver apparatus as claimed in claim 1, wherein said driving circuit comprises a time base chip U1, resistors R4, R5, capacitors C1, C2, C3, C4;
the time base chip U1 comprises a power supply end, a grounding end, a release end, a critical end, a voltage control end, a trigger end, a reset end and an output end; the power supply end is connected with direct current of a preset grade and is grounded through a capacitor C2, and the power supply end is connected with the release end through a resistor R4; the release end is connected with one end of a resistor R5, the other end of a resistor R5 is connected with the trigger end and the critical end, and the other end of the resistor R5 is grounded through a capacitor C3; the voltage control end is grounded through a capacitor C4, and the reset end is connected with direct current of a preset grade and grounded through a capacitor C1; the output end is used for outputting a PWM driving signal with preset frequency or preset duty ratio.
3. The signal excitation device as claimed in claim 1, wherein the predetermined frequency of the PWM driving signal outputted from the time base chip U1 is formulated as
f＝1.44/[(R4+2×R5)×C3]；
And/or the preset duty ratio of the PWM driving signal output by the time base chip U1 is expressed by formula
D＝R5/(R4+2×R5)。
4. The signal driver apparatus of claim 1, wherein the test circuit includes a transistor Q1, a coil ID, a resistor R2, a resistor R3, a port J1;
the triode Q1 comprises a first end, a second end and a control end, the first end of the triode Q1 is connected with one end of the coil ID, the other end of the coil ID is connected with a port J1, and the triode Q1 is connected to direct current of a preset grade through a resistor R2; the second end of the transistor Q1 is grounded, and the control end of the transistor Q1 is connected with the driving circuit through a resistor R3 and used for receiving the PWM driving signal;
multiple windings are formed on one side of the coil ID, and an induction port surrounding the multiple windings is formed and serves as a current test end of the test circuit;
a potential difference is formed between the port J1 and the second terminal of the transistor Q1, and the port J1 serves as a voltage test terminal of the test circuit.
5. The signal driver apparatus of claim 4, wherein the test circuit further comprises a switch S1 and a resistor R1;
the switch S1 is connected in series with the resistor R1 and then connected in parallel with the resistor R2; the switch S1 is used for closing when the range of the current detection probe of the oscilloscope is larger than a preset range threshold.
6. The signal excitation device according to any one of claims 1 to 5, wherein the power circuit comprises a power receiving port J3 and a capacitor C5;
the power receiving port J3 is used for accessing an external direct current power supply, and a capacitor C5 is connected in series between the positive terminal and the grounding terminal of the power receiving port J3;
the preset level of the direct current generated by the power supply circuit is any voltage level of 5V to 3.3V.
7. An oscilloscope calibration system, comprising the signal excitation device according to any one of claims 1 to 6, further comprising an oscilloscope and a current detection probe and a voltage detection probe for the oscilloscope;
the oscilloscope comprises a first signal channel, a second signal channel and a processor;
the current detection probe is connected with a current test end of a test circuit in the signal excitation device and can transmit a detected current signal to a first signal channel of the oscilloscope; the first signal channel is used for converting the current signal into digital first waveform data and sending the digital first waveform data to the processor;
the voltage detection probe is connected with a voltage test end of a test circuit in the signal excitation device and can transmit a detected voltage signal to a second signal channel of the oscilloscope; the second signal channel is used for converting the voltage signal into digital second waveform data and sending the digital second waveform data to the processor;
the processor is configured to perform phase compensation on the first waveform data and the second waveform data, and store a phase difference value required for the phase compensation.
8. The oscilloscope calibration system according to claim 7, wherein said processor comprises:
an obtaining module, configured to obtain first waveform data and second waveform data generated from the first signal channel and the second signal channel, respectively;
the waveform comparison module is used for performing time domain comparison on waveforms corresponding to the first waveform data and the second waveform data respectively and determining a phase difference value of a rising edge position or a falling edge position in the two waveforms;
and the phase compensation module is used for performing phase compensation on the waveform with the delayed phase according to the phase difference value so as to enable the waveforms corresponding to the first waveform data and the second waveform data to be phase-aligned at the rising edge position or the falling edge position respectively.
9. The oscilloscope calibration system according to claim 7, wherein said oscilloscope further comprises a power supply port; the power supply port is connected with a power circuit in the signal excitation device and used for supplying direct current to the power circuit.
10. The oscilloscope calibration system according to claim 7, wherein the oscilloscope further comprises a display connected to the processor, the display being configured to display waveforms corresponding to the first waveform data and the second waveform data before and/or after the phase compensation, respectively.
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| CN117250386A (en) * | 2023-11-17 | 2023-12-19 | 深圳青铜剑技术有限公司 | Method and device for correcting delay of voltage and current probe of oscilloscope |
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| CN111965404A (en) * | 2020-10-23 | 2020-11-20 | 杭州飞仕得科技有限公司 | Phase delay acquisition device and method of oscilloscope |
| CN112684394A (en) * | 2020-12-04 | 2021-04-20 | 威创集团股份有限公司 | Multi-probe time sequence calibration jig and calibration method |
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