CN113572458B - Voltage comparison unit and voltage comparator - Google Patents
Voltage comparison unit and voltage comparator Download PDFInfo
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- CN113572458B CN113572458B CN202111106376.7A CN202111106376A CN113572458B CN 113572458 B CN113572458 B CN 113572458B CN 202111106376 A CN202111106376 A CN 202111106376A CN 113572458 B CN113572458 B CN 113572458B
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/22—Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral
- H03K5/24—Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral the characteristic being amplitude
- H03K5/2472—Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral the characteristic being amplitude using field effect transistors
- H03K5/2481—Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral the characteristic being amplitude using field effect transistors with at least one differential stage
Abstract
The application provides a voltage comparison unit and voltage comparator, voltage comparison unit, including multistage amplification module, every grade of amplification module includes first transistor submodule piece in the multistage amplification module, second transistor submodule piece, first load device and second load device, and first load device and second load device in the first grade amplification module are passive device, voltage comparison unit still includes first capacitor module and second capacitor module, and first grade amplification module is used for obtaining first voltage signal and the second voltage signal who is used for comparing according to first input and second input, and multistage amplification module is used for enlargiing the difference of first voltage signal and second voltage signal step by step to obtain the comparison result. Therefore, the voltage comparison unit is simple in structure, equivalent input offset voltage and equivalent input noise power can be reduced, and comparison accuracy is improved.
Description
Technical Field
The application relates to the technical field of electronics, in particular to a voltage comparison unit and a voltage comparator.
Background
The comparator circuit is a circuit for judging the magnitude of an input signal and a reference signal and outputting a comparison result, and the open-loop voltage comparator is one of the comparator circuits, and is widely applied to integrated circuit design because of the advantages of simple structure, high response speed, low noise and the like. The working principle of the static open-loop voltage comparator is that an operational amplifier circuit is used in an open loop mode, a small signal at an input end is amplified by utilizing high gain of the operational amplifier, and the amplified signal is directly output at an output end, so that the purpose of rapidly outputting a comparison result is achieved.
However, due to the defects of the manufacturing process, devices in the circuit that should be perfectly matched are not matched, and thus, a certain error exists. These device mismatches in actual production will cause false flip of the circuit output result. The error can be equated to the input of the voltage comparator circuit as the input offset voltage. In order to reduce the input offset voltage, many circuit configurations are proposed, such as an auto zero circuit (ATZ), a comparator circuit with chopping technology (chopping), and the like. However, these techniques add many auxiliary circuits to the original comparator circuit, which increases the complexity, power consumption and area of the chip. In addition, the variation of the common mode voltage of the input signal will also affect the matching accuracy of the devices in the comparison circuit.
Disclosure of Invention
Based on the deficiency of prior art, this application provides a voltage comparison unit and voltage comparator to reduce device structure complexity, and can reduce input offset voltage and input noise, improve comparison accuracy.
In a first aspect, an embodiment of the present application provides a voltage comparison unit, which includes a plurality of stages of amplification modules, where each stage of amplification module in the plurality of stages of amplification modules includes a first transistor submodule, a second transistor submodule, a first load device, and a second load device;
the first transistor sub-module in each stage of amplification module is sequentially connected with the first transistor sub-modules in other stages of amplification modules, the second transistor sub-module in each stage of amplification module is sequentially connected with the second transistor sub-modules in the other stages of amplification modules, and the other stages of amplification modules are adjacent amplification modules in the multi-stage amplification modules;
in each stage of amplification module, the first transistor submodule and the second transistor submodule form a differential pair, in each stage of amplification module, the output end of the first transistor submodule is connected with the first load device, and the output end of the second transistor submodule is connected with the second load device;
in a first-stage amplification module of the multi-stage amplification module, the first transistor submodule is connected with a first input end, and the second transistor submodule is connected with a second input end, wherein the first load device and the second load device included in the first-stage amplification module are passive devices;
the voltage comparison unit further comprises a first capacitor module and a second capacitor module;
in a second-stage amplification module of the multi-stage amplification module, the input end and the output end of the first transistor submodule are also respectively connected with the first capacitor module, and the input end and the output end of the second transistor submodule are also respectively connected with the second capacitor module;
the first capacitor module and the second capacitor module are used for reducing equivalent input noise power of the voltage comparison unit, the first-stage amplification module is used for acquiring a first voltage signal and a second voltage signal for comparison according to the first input end and the second input end, and the multi-stage amplification module is used for amplifying a difference value of the first voltage signal and the second voltage signal step by step and acquiring a comparison result.
In a second aspect, an embodiment of the present application provides a chip including the voltage comparison unit as described in the first aspect.
In a third aspect, an embodiment of the present application provides a voltage comparator, including the voltage comparison unit according to the first aspect or the chip according to the second aspect.
In this example, the voltage comparing unit includes a multi-stage amplifying module, each stage of amplifying module in the multi-stage amplifying module includes a first transistor submodule, a second transistor submodule, a first load device and a second load device, the first load device and the second load device in the first stage amplifying module are passive devices, the first stage amplifying module is configured to obtain a first voltage signal and a second voltage signal for comparison according to the first input end and the second input end, and the multi-stage amplifying module is configured to amplify a difference between the first voltage signal and the second voltage signal step by step and obtain a comparison result. Therefore, the voltage comparison unit is simple in structure, equivalent input offset voltage and equivalent input noise power can be reduced, and comparison accuracy is improved.
Drawings
In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present application, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
Fig. 1 is a schematic structural diagram of a voltage comparing unit according to an embodiment of the present disclosure;
FIG. 2 is a schematic structural diagram of another voltage comparison unit provided in the embodiments of the present application;
FIG. 3 is a schematic structural diagram of another voltage comparison unit provided in the embodiments of the present application;
FIG. 4 is a schematic structural diagram of another voltage comparison unit provided in the embodiments of the present application;
FIG. 5 is a schematic structural diagram of another voltage comparison unit provided in the embodiments of the present application;
fig. 6 is a circuit schematic diagram of a voltage comparing unit according to an embodiment of the present disclosure;
fig. 7 is a schematic structural diagram of a chip provided in an embodiment of the present application;
fig. 8 is a schematic structural diagram of a voltage comparator according to an embodiment of the present application;
fig. 9 is a schematic structural diagram of another voltage comparator according to an embodiment of the present application.
Detailed Description
In order to make the technical solutions better understood by those skilled in the art, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some embodiments of the present invention, but not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The terms "first," "second," and the like in the description and claims of the present application and in the above-described drawings are used for distinguishing between different objects and not for describing a particular order. Furthermore, the terms "include" and "have," as well as any variations thereof, are intended to cover non-exclusive inclusions. For example, a process, method, system, article, or apparatus that comprises a list of steps or elements is not limited to only those steps or elements listed, but may alternatively include other steps or elements not listed, or inherent to such process, method, article, or apparatus.
Reference herein to "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment can be included in at least one embodiment of the application. The appearances of the phrase in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments. It is explicitly and implicitly understood by one skilled in the art that the embodiments described herein can be combined with other embodiments.
The traditional low offset comparator circuit generally adopts the techniques of automatic zero calibration, chopping and the like to reduce the inherent input offset voltage of the circuit. The implementation of these techniques requires not only the comparator circuit itself but also other circuits, which increases the complexity, power consumption and area of the chip. Furthermore, the performance of the prior art will also deteriorate for input signals with widely varying common mode voltages.
To solve the above problems, an embodiment of the present application provides a voltage comparing unit, please refer to fig. 1, where fig. 1 is a schematic structural diagram of the voltage comparing unit provided in the embodiment of the present application. As shown, the voltage comparison unit 10 includes a plurality of stages of amplification modules, each of which includes a first transistor submodule 101, a second transistor submodule 102, a first load device 201, and a second load device 202;
the first transistor submodule 101 in each stage of amplification module is sequentially connected with the first transistor submodule 101 in other stages of amplification modules, the second transistor submodule 102 in each stage of amplification module is sequentially connected with the second transistor submodule 102 in the other stages of amplification modules, and the other stages of amplification modules are amplification modules adjacent to each stage of amplification module in the multi-stage amplification modules;
in each stage of the amplification module, the first transistor submodule 101 and the second transistor submodule 102 form a differential pair, in each stage of the amplification module, an output end of the first transistor submodule 101 is connected with the first load device 201, and an output end of the second transistor submodule 102 is connected with the second load device 202;
in the first stage amplification module 20 of the multi-stage amplification module, the first transistor sub-module 101 is connected to the first input terminal Vin1The second transistor submodule 102 is connected to a second input terminal Vin2Wherein, the first load device 201 and the second load device 202 included in the first-stage amplification module 20 are passive devices;
the first stage amplifying module 20 is configured to amplify the input signal according to the first input terminal Vin1And said second input terminal Vin2The multi-stage amplification module is used for amplifying the difference value of the first voltage signal and the second voltage signal step by step and obtaining a comparison result.
The amplifying modules adjacent to each stage of amplifying module are a previous stage amplifying module and a next stage amplifying module of the current amplifying module. The voltage comparison unit may be an open-loop voltage comparison unit. Because the first transistor submodule and the second transistor submodule in each stage of the amplification module form a differential pair, the first end of the first transistor submodule is also connected with one end of the second transistor submodule. And each stage of amplification modules in the multistage amplification module are connected in sequence through the first transistor submodule and the second transistor submodule to form cascade connection. The first transistor submodule and the second transistor submodule form a differential pair, the first transistor submodule and the second transistor submodule in the first-stage amplification module respectively acquire two voltage signals to be compared through input ends, and then the difference value of the two voltage signals is amplified step by step through the differential pair in each stage of amplification module, and a comparison result is obtained.
In a specific implementation, the voltage comparing unit may further include a current source module, where the current source module may include a plurality of tail current sources, and each tail current source is connected to its corresponding amplifying module, and is configured to provide a bias current for the amplifying module. For example, the first-stage amplification module corresponds to a first tail current source, a first transistor submodule and a second transistor submodule in the first-stage amplification module are respectively connected to the first tail current source, the first tail current source is used for providing a bias current for the first-stage amplification module, and other stages of amplification modules and their corresponding tail current sources are the same as the above connection method, and are not described herein again. In a specific implementation, output ends of a first load device and a second load device of each stage of the amplification module in the multi-stage amplification module are respectively grounded.
In specific implementation, the first load device and the second load device in the first-stage amplification module are both passive devices, that is, when the first-stage amplification module works normally, a power supply is not required to be additionally provided for the first-stage amplification module. In the process production, the mismatch of the passive device under the same area is smaller than that of the active device, so that the input offset voltage of the voltage comparison unit can be effectively reduced, and compared with the mode that the active device is used as a load and the resistor device is used as the load, the input common-mode voltage range of the open-loop voltage comparator can be effectively expanded.
Mismatch with a circuit can be equivalent to input offset voltage, noise in the circuit can be equivalent to an input end to be used as input noise, noise of each stage of amplification module is inhibited by gain of a preceding stage amplification module when being equivalent to the input end, equivalent output noise of a first stage amplification module has the largest influence on equivalent input noise of the static open-loop voltage comparison circuit, compared with the case that an active device is used as a load, the case that a passive device is used as the load of the first stage amplification module can reduce equivalent input noise density of the circuit, and the case that integral of the noise density on a working frequency domain is noise power, the case that the passive device is used can reduce equivalent input noise power of the circuit.
In this example, the voltage comparing unit includes a multi-stage amplifying module, each stage of amplifying module in the multi-stage amplifying module includes a first transistor submodule, a second transistor submodule, a first load device and a second load device, the first load device and the second load device in the first stage amplifying module are passive devices, the first stage amplifying module is configured to obtain a first voltage signal and a second voltage signal for comparison according to the first input end and the second input end, and the multi-stage amplifying module is configured to amplify a difference between the first voltage signal and the second voltage signal step by step and obtain a comparison result. Therefore, the voltage comparison unit is simple in structure, equivalent input offset voltage and equivalent input noise power can be reduced, and comparison accuracy is improved.
In one possible example, as shown in fig. 2, fig. 2 is a schematic structural diagram of another voltage comparison unit provided in the embodiment of the present application. As shown, the voltage comparison unit 10 further includes a first capacitance module 301 and a second capacitance module 302; in the second-stage amplification module 30 of the multi-stage amplification module, the input end and the output end of the first transistor submodule 101 are further connected to the first capacitor module 301, and the input end and the output end of the second transistor submodule 102 are further connected to the second capacitor module 302; the first capacitance module 301 and the second capacitance module 302 are used for reducing the equivalent input noise power of the voltage comparison unit 10.
Wherein the noise is widely existed in the working frequency band, therefore, the equivalent input noise power of the circuit can be effectively reduced by reducing the bandwidth of the working frequency band. According to the Miller effect, a capacitor module is respectively connected between the input end and the output end of the first transistor submodule and the second transistor submodule of the second-stage amplification module, and the equivalent capacitance of the input end of the capacitor module can be amplified, so that the load capacitance of the output end of the first-stage amplification module is increased, the working bandwidth is reduced, and the purpose of reducing equivalent input noise power is achieved. In particular, each stage of the amplification module herein is an inverting amplification module, for example when the first and second transistor sub-modules each comprise bipolar transistors, the emitters of these two transistors are coupled, and when the first and second transistor sub-modules each comprise field effect transistors, the sources of these two transistors are coupled.
In this example, a capacitor module is connected between the input end and the output end of the first transistor and the second transistor of the second-stage amplification module respectively according to the miller effect, so that the input noise power in the circuit can be reduced, and compared with a method of directly adding a load capacitor, the chip area can be reduced by using the miller capacitor.
In one possible example, please refer to fig. 3, wherein fig. 3 is a schematic structural diagram of another voltage comparing unit according to an embodiment of the present disclosure. As shown, the first load device in the last stage amplification block 40 of the multi-stage amplification block includes a first transistor 401, and the second load device includes a second transistor 402; an input terminal of the first transistor 401 is connected to an input terminal of the second transistor 402, and an output terminal of the first transistor 401 is further connected to an input terminal of the first transistor 401.
The first transistor is a triode, the base electrode and the collector electrode of the triode are connected, so that the voltage of the input end of the first transistor is equal to the voltage of the output end, the last-stage amplification module comprises a differential pair, the input end of the first transistor is connected with the input end of the second transistor, the output end of the first transistor is also connected with the input end of the first transistor, so that the first transistor and the second transistor form a current mirror structure, and the voltage comparison circuit can convert differential output into single-ended output through the first transistor and the second transistor. The first transistor may be a field effect transistor or a bipolar transistor.
Therefore, in the embodiment, the voltage comparator circuit can be converted from differential output to single-ended output according to actual requirements, and the flexibility of the circuit application is improved.
In one possible example, as shown in fig. 4, fig. 4 is a schematic structural diagram of another voltage comparison unit provided in the embodiment of the present application. As shown, the voltage comparison unit 10 further includes a third transistor submodule 103 and a third load device 203; the input end of the third transistor submodule 103 is connected to the output end of the second transistor submodule 102 of the last stage amplification module 40, and the output end of the third transistor submodule 103 is combined with the output end of the third load device 203 and then connected to the output end Vout of the voltage comparison unit 10; the third transistor submodule 103 is configured to amplify and output a comparison result of the multi-stage amplification module.
Wherein the third load device may comprise a current source. And the last stage of amplification module in the multi-stage amplification module amplifies the difference value of the first voltage signal and the second voltage signal amplified step by step again through the third transistor submodule, and then the comparison result is output through the third transistor submodule.
Therefore, in this example, the structure can make the circuit structure simpler on the premise that single-ended output is required and the preceding-stage common mode rejection is sufficient.
In one possible example, the multi-stage amplification module includes a three-stage amplification module, the first load device and the second load device in the second stage amplification module are both passive devices, and the first load device and the second load device in the last stage amplification module in the multi-stage amplification module are both active devices.
When the multi-stage amplification module comprises a three-stage amplification module, the difference value of the first voltage signal and the second voltage signal to be compared in the voltage comparison unit needs to be amplified for 4 times and then output. In particular, the third load device is an active load, such as a current source. And the first load device and the second load device of the second-stage amplification module are the same as the first amplification module and are still passive devices, so that the output offset voltage of the second-stage amplification module can be reduced, and the output precision of the whole voltage comparator is ensured. Because the three-stage amplification module is shared, the first two stages of loads adopt passive loads, and the influence caused by device mismatch in the voltage comparison unit can be restrained, the first load device and the second load device of the last stage of amplification module can adopt active loads, and the third load device is also an active load, so that the gain of the voltage comparison unit is increased.
Therefore, in this example, the voltage comparison unit includes four stages of amplification circuits, the load included in the first two stages of amplification circuits is a passive load, and the load included in the second two stages of amplification circuits is an active load, so that the structural complexity of the device can be reduced, the input offset voltage can be reduced, and the comparison accuracy can be improved.
In one possible example, the passive device includes a resistor and the active device includes a first field effect transistor.
Wherein the type of active device in the third stage amplification module may be different from the type of active device included in the third transistor sub-module. For example, the third stage amplification module may include P-type field effect transistors, and the third transistor sub-module includes N-type field effect transistors, or the third transistor sub-module may be bipolar transistors.
Therefore, in the embodiment, the resistors are used as the loads of the first-stage amplification module and the second-stage amplification module, so that the input offset voltage of the voltage comparison unit can be effectively reduced, and the first field effect transistor is used as the resistor of the third-stage amplification module, so that the circuit gain can be ensured, the equivalent input offset voltage is reduced, and the comparison precision is improved.
In one possible example, please refer to fig. 5, where fig. 5 is a schematic structural diagram of another voltage comparing unit provided in the embodiment of the present application. As shown, the voltage comparison unit 10 further includes a third capacitance module 303 and a fourth capacitance module 304; in the last-stage amplification module 40, the input end and the output end of the first transistor submodule 101 are further connected to the third capacitor module 303, and the input end and the output end of the second transistor submodule 102 are further connected to the fourth capacitor module 304; the third capacitance module 303 and the fourth capacitance module 304 are used for reducing the equivalent input noise power of the voltage comparison unit.
The third capacitor module and the fourth capacitor module may respectively include a capacitor, and the two capacitors are respectively connected to the input end and the output end of the first transistor submodule or the second transistor submodule of the third-stage amplification module. And the third transistor submodule and the fourth transistor submodule in the third-stage amplification module are inverting amplification submodules, so that the capacitors in the third capacitor module and the fourth capacitor module are also Miller capacitors.
In this example, according to the miller effect, a capacitor module is respectively connected between the input end and the output end of the first transistor and the second transistor of the third-stage amplification module, and the equivalent capacitance of the input end of the capacitor module can be amplified, so that the output end of the second-stage amplification module generates a larger load, the working bandwidth is reduced, and the purpose of reducing the input equivalent noise power is achieved.
In one possible example, the first transistor sub-module in the multi-stage amplification module comprises a second field effect transistor, and the second transistor sub-module in the multi-stage amplification module comprises a third field effect transistor; the types of the second field effect transistor and the third field effect transistor in the first-stage amplification module are respectively preset types, and the preset types comprise a P-type field effect transistor or an N-type field effect transistor; determining the types of the second field effect transistor and the third field effect transistor in the other amplification modules except the first amplification module of the plurality of amplification modules comprises: determining a first voltage value of an output node of the second field effect transistor of a preceding-stage amplification module of a current amplification module, wherein the current amplification module is any one of the other stages of amplification modules except the first-stage amplification module; determining the type of the second field effect transistor of the current amplification module according to the first voltage value; determining a second voltage value of an output node of the third field effect transistor of a preceding stage amplification module of the current amplification module; and determining the type of the second field effect transistor of the current amplifying module according to the second voltage value.
The first transistor sub-module and the second transistor sub-module both comprise field effect transistors, but the types of the field effect transistors included in different stages of amplification modules can be different, and the first field effect transistor and the second field corresponding transistor in the same stage of amplification module are the same type of transistor. First, in the first stage amplification module, the N-type field effect transistor may be used as a comparator circuit for the input differential pair, or the P-type transistor may be used as a comparator circuit for the differential pair. After the working voltage of the output node of the preceding stage amplification module is determined, the subsequent stage amplification module may determine that the subsequent stage amplification module is an N-type field effect transistor or a P-type field effect transistor according to the working voltage, that is, the field effect transistors included in the first transistor and the second transistor in the second stage amplification module are the N-type field effect transistor or the P-type field effect transistor, and the working voltage of the output node of the first stage amplification module determines the working voltage of the output node of the second stage amplification module. In a specific implementation, the type of the field effect transistor included in the first transistor sub-module and the type of the field effect transistor included in the second transistor sub-module in the same-stage amplification module are the same.
In this example, the type of the field effect transistor included in the post-stage method module is determined according to the operating voltage of the output node of the pre-stage amplification module, so that the flexibility of the circuit can be improved.
In one possible example, the first load device in the first-stage amplification module includes a first resistor, and the method for calculating the value range of the first resistor includes: obtaining the minimum voltage value V of the input common mode range0(ii) a Obtaining a threshold voltage V of the first transistor sub-module in the first stage amplification module1(ii) a Obtaining the input current I of the first-stage amplification module0(ii) a According to the minimum voltage value V0The threshold voltage V1And the input current I0And acquiring the first resistance value R in the first-stage amplification module.
Wherein the input current I0The current of the differential pair is input, namely the current value of the first transistor submodule and the second transistor submodule of the first-stage amplification module is input simultaneously. Particularly, the second load device in the first-stage amplification module may also include a resistor, and a value range of the resistor of the second load device is the same as a value range of the resistor of the first load device, and particularly, resistance values of the two resistors may be the same. The first transistor sub-module may comprise a field effect transistor.
In a specific implementation, the first load device and the second load device of the second-stage amplification module may also include a second power supply respectivelyThe calculating of the value range of the second resistor included in the first load device in the second-stage amplification module may include: obtaining the output node voltage V of the first transistor submodule of the first-stage amplification module3(ii) a Obtaining a threshold voltage V of the first transistor sub-module in the second stage amplification module4(ii) a Obtaining the input current I of the second stage amplification module1(ii) a According to the output node voltage V3The threshold voltage V4And the input current I1Obtaining the second resistance value R in the second stage amplification module1. In particular, the value range of the resistor of the second load device in the second-stage amplification module is the same as that of the resistor of the first load device, and the resistance values of the two second resistors may also be the same.
Specifically, when the first load device and the second load device of the other amplification modules in the multi-stage amplification module are also resistors, the output node voltage of the corresponding preceding amplification module may be obtained according to the above description, and the amplification module may correspond to the input current and the threshold voltage of the first transistor submodule or the second transistor submodule included in the amplification module, so as to determine the resistance value.
Therefore, in the embodiment, the resistor is used as the load, so that the equivalent input offset voltage and the equivalent input noise power can be reduced, and the comparison precision is improved.
In one possible example, the range of values of the first resistance value R is calculated by the following formula, including: r<(V0+V1)÷（0.5×I0) (ii) a Wherein R is greater than zero and V1Greater than zero.
The first-stage amplification module uses a passive device resistor to replace an active device as a load, because the mismatch of the passive device is far smaller than that of the active device under the same area, the lower limit of the input common-mode voltage can be lower than zero volt, and the use of the active device as the load brings about larger mismatch and generates huge area loss. The input common mode range of the first stage of the amplifying circuit is as follows:
wherein, VDDIs the supply voltage, VcurrentsourceIs the voltage drop at two ends of the input current of the first-stage amplification module, i.e. if the first transistor submodule and the second transistor submodule of the first-stage amplification module are field effect transistors, the source electrode of the first transistor submodule is coupled with the source electrode of the second transistor submodule and is simultaneously connected with a current source for increasing the bias current of the first transistor submodule, and at the moment, V is the voltage drop at two ends of the input current of the first-stage amplification modulecurrentsourceIs the voltage drop across the current source. The first transistor submodule and the second transistor submodule of the first-stage amplification module are field effect transistors, VSGPIs the potential difference between the gate and source of the field effect transistor, and VTHPThe threshold voltage of the differential pair transistor of the first-stage amplification module is the threshold voltage of the first transistor submodule or the second transistor submodule. VinCMIs the voltage value of the input common mode range. The first load device and the second load device of the first-stage amplification module are both resistors, R0or1Then the resistance value corresponding to the first load device or the resistance value corresponding to the second load device.
Therefore, the value of the first resistor must satisfy:
wherein VinCM_smallestFor the lower limit of the input common-mode range, i.e. V0，VTHP0or1The threshold voltage of the first transistor submodule or the second transistor submodule in the first-stage amplification module is obtained. When the value of the first-stage load resistor is determined, the output node voltage V of the first transistor submodule or the second transistor submodule in the first-stage amplification module can be obtainedAorBComprises the following steps:
the output node voltage is also the input common mode voltage of the second stage amplification module. In order to ensure that the input differential pair transistors of the second-stage amplification module, namely the transistors in the first transistor sub-module and the transistors in the second transistor sub-module, work in a saturation region, the load resistance of the second-stage amplification module should satisfy the following conditions:
wherein, the first load device or the second load device of the second stage amplification module is a resistor, R2or3Is its corresponding resistance value, VTHP2or3The threshold voltage of the differential pair transistor of the second-stage amplification module is the threshold voltage of the first transistor submodule or the second transistor submodule. I is1Is the input current of the second stage amplification module. Because the limitation of the input common-mode voltage range is not enough to provide very large output impedance, the output impedance of the passive device is small when the passive device is used as a load, and further the circuit gain is insufficient, so that the circuit gain can be improved by adopting the cascade connection of multiple stages of amplifying modules in the later stage.
In this example, the size of the resistor as the load is determined according to the circuit structure, and therefore, an appropriate resistor is selected as the load of the first-stage amplification module.
In one possible example, the first capacitance module includes a capacitance, and the method of calculating the capacitance value of the capacitance includes: obtaining an equivalent output noise power P of an output end of the first transistor submodule in the first-stage amplification module; acquiring a working temperature value T of the first capacitor module; and calculating the capacitance value C of the capacitor according to the output noise power P and the working temperature value T.
The capacitance value of the first capacitor module and the capacitance value of the second capacitor module are calculated in the same manner, and the working temperature value T is the working temperature value of the second capacitor module only when the second capacitor module is calculated. For example, the capacitance values of the first and second capacitive modules may be the same. Particularly, the input end and the output end of the first transistor submodule of the third-stage amplification module in the multi-stage amplification module are also connected with the third capacitance module, and the input end and the output end of the second transistor submodule of the third-stage amplification module in the multi-stage amplification module are also connected with the fourth capacitance module. Calculating capacitance values of a fourth capacitance module and a third capacitance module in the same way, namely obtaining equivalent output noise power P of the output end of the first transistor submodule or the second capacitance submodule in the second-stage amplification module; acquiring a working temperature value T of the third capacitor module or the fourth capacitor module; and calculating a capacitance value C of the third capacitor module or the fourth capacitor module according to the output noise power P and the working temperature value T.
Therefore, in the embodiment, the method of increasing the capacitance value by the gain of the amplification module through the miller effect effectively reduces the whole area of the circuit layout while ensuring the signal-to-noise ratio.
In one possible example, the capacitance value C is calculated by the following formula: c = kxtp; wherein k is the boltzmann constant and T is the absolute temperature.
However, the accuracy of the comparator cannot be improved by merely increasing the gain of the circuit due to the presence of noise. To improve the accuracy of the comparator, it is a necessary choice to improve the signal-to-noise ratio of the circuit. The equivalent input noise SNR of the circuit is as follows:
wherein P issignalIs the power of the input signal, PnoiseThe power of the input noise is equivalent to the circuit.
When the multi-stage amplification modules in the voltage comparison unit have three stages in common, the equivalent input noise V of the circuit2 n,inThe following were used:
wherein, the mismatched equivalent input voltage can be applied to the equivalent input noise, V2 n,out1Is firstEquivalent noise, V, at the output of a stage amplification module2 n,out2Equivalent noise, V, at the output of the second stage amplification block2 n,out3Equivalent noise, V, at the output of the third stage amplification module2 n,out4The equivalent noise of the output end of the third transistor submodule is obtained, wherein the third transistor submodule can be regarded as a fourth-stage amplification module. A. the1Is the gain of the first stage amplification block, A2Is the gain of the second stage amplification block, A3Is the gain of the third stage amplification block, A4The gain of the third transistor sub-module.
So that the power P of the equivalent input noise of the circuitnoiseComprises the following steps:
wherein P isinMP0or1Equivalent input noise power, P, of a first transistor submodule or a second transistor submodule, respectively, of a transistor first stage amplification moduleAorBAnd the equivalent output noise power of the output node of the first transistor submodule or the second transistor submodule of the first-stage amplification module is obtained. PCorDAnd the equivalent output noise power of the output node of the first transistor submodule or the second transistor submodule of the second-stage amplification module is obtained. The individual noise powers may be calculated as a percentage of the total noise power. Equivalent output noise power P at the output node of the first or second transistor sub-module of each stage of the amplification modulenodeAre as follows:
therefore, the capacitance value C of the capacitor included in the first capacitor module is:
where k is the boltzmann constant and T is the absolute temperature. Therefore, the capacitance value of the output node is improved, so that the equivalent input noise of the first two stages of amplifying circuits can be effectively reduced, and the signal-to-noise ratio of the comparator circuit is improved.
Therefore, in the embodiment, the method of increasing the capacitance value by the gain of the amplification module through the miller effect effectively reduces the whole area of the circuit layout while ensuring the signal-to-noise ratio.
The following example is provided to explain the present solution in detail.
Referring to fig. 6, fig. 6 is a circuit schematic diagram of a voltage comparing unit according to an embodiment of the present disclosure. As shown in the figure, the multi-stage amplification module in fig. 6 includes three stages, wherein the tail current source I0, the differential pair of P-type field effect transistors PMOS transistor Mp0 and Mp1, and the load resistors R0 and R1 constitute a first stage amplification module; the tail current source I1, the differential pair PMOS transistors Mp2 and Mp3, and the load resistors R2 and R3 form a second-stage amplification module; a tail current source I2, differential pair PMOS transistors Mp4 and Mp5, and load N-type field effect transistors NMOS transistors Mn0 and Mn1 form a third-stage amplification module; the NMOS transistor Mn2 is the third transistor sub-module, and the third load device is the load current source I3.
In the scheme, the resistor is selected to be used as the load of the first-stage amplification module, and the mismatching delta R of the load resistor generates the offset voltage delta V at the output end of the load resistoroutComprises the following steps:
△Vout=I×△R，
therefore, the input offset voltage DeltaV of the voltage comparison unitosComprises the following steps:
where I is the current through the load resistor, gmIs transconductance of differential pair transistors, R is impedance of load resistor, and Δ VGSThe mismatch of the transistor grid source voltage of the differential pair of the amplifying modules at each stage is realized. Since the mismatch of the passive device is smaller compared to the active device for the same area, using the resistor as the load can be doneEffectively reducing the input offset voltage of the voltage comparison unit. On the other hand, using a resistor as a load, the input common mode range of the voltage comparison unit is:
wherein, VDDIs the supply voltage, VcurrentsourceIs the voltage drop across the current source, VSGPIs the value of the voltage between the gate and the source of the field effect transistor, and VTHPIs the threshold voltage of the differential pair transistors, VinCMIs the voltage value of the input common mode range. Compared with the active device used as a load, the input common-mode voltage range of the voltage comparison unit can be effectively expanded by using the resistor as the impedance.
Gain A of the first stage amplification moduleVComprises the following steps:
AV=gm×Rout
Routusing a resistor as the first load device or the second load device for the impedance of the load resistor of the first-stage amplification module will reduce the gain of the first-stage amplification module, which means that the capability of the first-stage amplification module to suppress the offset voltage caused by the mismatch of the later-stage circuit is reduced. According to the expression of the input mismatch voltage of the voltage comparison unit, the output offset voltage and the gain A of the second-stage amplification module at the moment can be found2The specific gravity on the influence of the input offset voltage increases. Therefore, the second stage amplification module of the voltage comparison unit also adopts the resistor as a load, and the purpose of the second stage amplification module is to reduce the output offset voltage of the second stage amplification module. Input offset voltage V of open-loop voltage comparator circuit at the momentoffsetComprises the following steps:
wherein, I1Is the current flowing through the load of the first stage amplification module, gm1Transconductance of a differential pair transistor of a first stage amplification module, R1Being a first stage amplifying blockLoad impedance,. DELTA.R1For mismatch of the first stage amplification module load, Δ VGS1For the mismatch of the gate-source voltages of the differential pair transistors of the first stage amplification block, A1Is the gain of the first stage amplification block, I2Is the current flowing through the load of the second stage amplification module, gm2Transconductance of the differential pair transistor of the second stage amplification module, R2Is the load impedance of the second stage amplification module, DeltaR2For the second stage amplification of module load mismatch, Δ VGS2For the mismatch of the gate-source voltages of the transistors of the differential pair of the second stage amplification block, VOS3Is input offset voltage of the third stage amplification module, VOS4The input offset voltage of the fourth-stage amplification module.
Therefore, the first two stages of amplifying modules all adopt resistors as loads, so that offset voltage generated at the input end of the voltage comparison unit is relatively small. And the gain A of the preceding stage circuit is obtained by superposition of the first two stages of amplification modules1And A2Already quite considerable, enough to suppress the effects of mismatch in the voltage comparison unit. Therefore, an active device can be used as a load in the post-amplification module to increase the gain of the voltage comparison unit.
Mismatch of voltage comparison units derives from Δ VGS1And Δ VGS2. Due to Delta VGS2Suppressed by the gain of the first stage amplifier block, the most dominant source of mismatch is Δ VGS1. Therefore, the input offset voltage of the voltage comparison unit can be significantly reduced only by adjusting the area of the differential pair transistors in the first stage amplification module and the overdrive voltage thereof.
Similarly to the circuit mismatch, which can be equivalent to the input offset voltage, the noise in the circuit can also be equivalent to the input as the input noise. The equivalent input noise of the voltage comparison unit in the scheme is as follows:
wherein, V2 n,out1Is equivalent noise, V, at the output of the first stage amplification module2 n,out2Equivalent noise, V, at the output of the second stage amplification block2 n,out3Equivalent noise, V, at the output of the third stage amplification module2 n,out4Is the equivalent noise at the output of the third transistor sub-module. A. the1Is the gain of the first stage amplification block, A2Is the gain of the second stage amplification block, A3Is the gain of the third stage amplification block, A4The gain of the third transistor sub-module.
The expression shows that the noise of each stage of amplification module is inhibited by the gain of the preceding stage amplification module when the noise is equivalent to the input end. The equivalent output noise of the first-stage amplification module has the largest influence on the equivalent input noise of the static open-loop voltage comparison circuit. For an amplifier circuit using a resistor as a load, the equivalent input noise is:
wherein Vn,T,MOSIs the thermal noise equivalent voltage, V, of a MOS transistorn,T,RESFor thermal noise equivalent voltage, V, of the resistive devicen,F,MOSIs MOS transistor flicker noise equivalent voltage. K is Boltzmann constant, T is the thermodynamic temperature, gmIs transconductance of MOS transistor, R is resistance of resistor device, CoxIs the unit thickness oxide layer capacitance, W is the MOS transistor gate width, L is the MOS transistor gate length, and f is the frequency.
For an amplifier circuit using a MOS transistor as a load (taking a third-stage amplifier module as an example), the equivalent input noise is:
wherein g ismnIs the transconductance of an NMOS transistor, gmpIs a PMOS transistor transconductance. It is found from the above expression about the equivalent output noise that the resistance device does not have flicker noise. Using resistors in comparison to using MOS transistors as loadsThe low-frequency equivalent noise power at the output end of the amplifying circuit can be reduced as a load.
In addition, noise is widely present in the operating frequency band, so that reducing the bandwidth of the operating frequency band can effectively reduce the equivalent input noise power of the circuit. The working bandwidth of the circuit can be effectively reduced by adding a large number of capacitors at the output nodes of the amplifying modules at all levels, so that the equivalent input noise power is reduced, but the area consumption of a chip is huge. According to the Miller effect, a capacitor device is connected between the input end and the output end of the inverting amplifier, and the equivalent capacitance of the input end of the capacitor device can be amplified by the gain of the inverting amplifier. Therefore, the Miller capacitors C0, C1, C2 and C3 are used for generating larger loads at the output end of the front two stages of amplifying modules, so that the aim of reducing the input equivalent noise power is fulfilled.
The voltage comparison unit provided by the scheme does not need to construct an auxiliary circuit, has a simple structure, reduces the noise, power consumption and area of the circuit, and obviously improves the input common-mode voltage range. Compared with the conventional comparator circuit, the voltage comparison unit in the scheme can significantly reduce the input offset voltage of the voltage comparison unit only by adjusting the area and the driving voltage of the differential pair transistor in the first-stage amplification module.
An embodiment of the present application further provides a chip, as shown in fig. 7, fig. 7 is a schematic structural diagram of the chip provided in the embodiment of the present application. As shown, the chip 70 includes the voltage comparing unit 701 according to any of the embodiments.
An embodiment of the present application further provides a voltage comparator, as shown in fig. 8, fig. 8 is a schematic structural diagram of the voltage comparator provided in the embodiment of the present application. As shown, the voltage comparator 80 includes a voltage comparing unit 801 according to any of the embodiments.
The embodiment of the present application further provides a voltage comparator, as shown in fig. 9, fig. 9 is a schematic structural diagram of another voltage comparator provided in the embodiment of the present application. As shown, the voltage comparator 90 includes a chip 901 as described in any of the above embodiments.
The above embodiments are merely representative of the centralized embodiments of the present invention, and the description thereof is specific and detailed, but it should not be understood as the limitation of the scope of the present invention, and it should be noted that those skilled in the art can make various changes and modifications without departing from the spirit of the present invention, and these changes and modifications all fall into the protection scope of the present invention. Therefore, the protection scope of the present patent should be subject to the appended claims.
Claims (9)
1. A voltage comparison unit is characterized by comprising a plurality of stages of amplification modules, wherein each stage of amplification module in the plurality of stages of amplification modules comprises a first transistor submodule, a second transistor submodule, a first load device and a second load device;
the first transistor sub-module in each stage of amplification module is sequentially connected with the first transistor sub-modules in other stages of amplification modules, the second transistor sub-module in each stage of amplification module is sequentially connected with the second transistor sub-modules in the other stages of amplification modules, and the other stages of amplification modules are adjacent amplification modules in the multi-stage amplification modules;
in each stage of amplification module, the first transistor submodule and the second transistor submodule form a differential pair, in each stage of amplification module, the output end of the first transistor submodule is connected with the first load device, and the output end of the second transistor submodule is connected with the second load device;
in a first-stage amplification module of the multi-stage amplification module, the first transistor submodule is connected with a first input end, and the second transistor submodule is connected with a second input end, wherein the first load device and the second load device included in the first-stage amplification module are passive devices;
the voltage comparison unit further comprises a first capacitor module and a second capacitor module;
in a second-stage amplification module of the multi-stage amplification module, the input end and the output end of the first transistor submodule are also respectively connected with the first capacitor module, and the input end and the output end of the second transistor submodule are also respectively connected with the second capacitor module;
the first capacitor module and the second capacitor module are used for reducing equivalent input noise power of the voltage comparison unit, the first-stage amplification module is used for acquiring a first voltage signal and a second voltage signal for comparison according to the first input end and the second input end, and the multi-stage amplification module is used for amplifying a difference value between the first voltage signal and the second voltage signal step by step and acquiring a comparison result;
the first load device in a last stage amplification block of the multi-stage amplification block comprises a first transistor, and the second load device comprises a second transistor; the input end of the first transistor is connected with the input end of the second transistor, and the output end of the first transistor is also connected with the input end of the first transistor;
the voltage comparison unit further comprises a third transistor submodule and a third load device; the input end of the third transistor submodule is connected with the output end of the second transistor submodule of the last-stage amplification module, and the output end of the third transistor submodule is combined with the output end of the third load device and then connected with the output end of the voltage comparison unit; the third transistor submodule is used for amplifying and outputting the comparison result of the multistage amplification module.
2. The cell of claim 1, wherein the multi-stage amplification module comprises a three-stage amplification module, wherein the first load device and the second load device in the second stage amplification module are both passive devices, and wherein the first load device and the second load device in the last stage amplification module in the multi-stage amplification module are both active devices.
3. The cell of claim 2, wherein the passive device comprises a resistor and the active device comprises a first field effect transistor.
4. The cell of claim 2, wherein the voltage comparison cell further comprises a third capacitive module and a fourth capacitive module;
in the last-stage amplification module, the input end and the output end of the first transistor submodule are also respectively connected with the third capacitor module, and the input end and the output end of the second transistor submodule are also respectively connected with the fourth capacitor module;
the third capacitor module and the fourth capacitor module are used for reducing the equivalent input noise power of the voltage comparison unit.
5. The cell of claim 1, wherein the first transistor sub-module of the multi-stage amplification module comprises a second field effect transistor, and the second transistor sub-module of the multi-stage amplification module comprises a third field effect transistor;
the types of the second field effect transistor and the third field effect transistor in the first-stage amplification module are respectively preset types, and the preset types comprise a P-type field effect transistor or an N-type field effect transistor;
determining the types of the second field effect transistor and the third field effect transistor in the other amplification modules except the first amplification module of the plurality of amplification modules comprises:
determining a first voltage value of an output node of the second field effect transistor of a preceding-stage amplification module of a current amplification module, wherein the current amplification module is any one of the other stages of amplification modules except the first-stage amplification module;
determining the type of the second field effect transistor of the current amplification module according to the first voltage value;
determining a second voltage value of an output node of the third field effect transistor of a preceding stage amplification module of the current amplification module;
and determining the type of the second field effect transistor of the current amplifying module according to the second voltage value.
6. The unit of claim 1, wherein the first load device in the first stage amplification module comprises a first resistor, and wherein the method of calculating the range of values of the first resistor comprises:
obtaining the minimum voltage value V of the input common mode range0；
Obtaining a threshold voltage V of the first transistor sub-module in the first stage amplification module1；
Obtaining the input current I of the first-stage amplification module0；
According to the minimum voltage value V0The threshold voltage V1And the input current I0And acquiring the first resistance value R in the first-stage amplification module.
7. The cell of claim 6, wherein the range of the first resistance value R is calculated by the following formula, including:
R<(V0+V1)÷（0.5×I0）；
wherein R is greater than zero and V1Greater than zero.
8. A chip comprising a voltage comparison unit as claimed in any one of claims 1 to 7.
9. A voltage comparator comprising a voltage comparison unit as claimed in any one of claims 1 to 7, or comprising a chip as claimed in claim 8.
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| JP3839027B2 (en) * | 2004-04-09 | 2006-11-01 | Ｎｅｃエレクトロニクス株式会社 | AD converter |
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| CN101562441A (en) * | 2008-10-08 | 2009-10-21 | 西安电子科技大学 | Ultrahigh-speed comparator with low offset |
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