CN113568229B - Array substrate, display panel and display device - Google Patents

Array substrate, display panel and display device Download PDF

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Publication number
CN113568229B
CN113568229B CN202110831123.XA CN202110831123A CN113568229B CN 113568229 B CN113568229 B CN 113568229B CN 202110831123 A CN202110831123 A CN 202110831123A CN 113568229 B CN113568229 B CN 113568229B
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Prior art keywords
substrate
array substrate
opening area
region
area
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CN202110831123.XA
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CN113568229A (en
Inventor
刘弘
徐敬义
黄波
刘鹏
张永强
李志明
梁朝
霍培荣
肖振宏
丁爱宇
李波
王国栋
韩帅
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BOE Technology Group Co Ltd
Ordos Yuansheng Optoelectronics Co Ltd
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BOE Technology Group Co Ltd
Ordos Yuansheng Optoelectronics Co Ltd
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Priority to CN202110831123.XA priority Critical patent/CN113568229B/en
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    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/136204Arrangements to prevent high voltage or static electricity failures

Abstract

The present disclosure relates to an array substrate, a display panel and a display device, the array substrate comprising: a first substrate having an open area; the second substrate is oppositely overlapped with the first substrate, at least one side edge of the second substrate is provided with an opening area, the opening area surrounds the opening area, and at least part of the edge of the opening area is tangent to at least part of the edge of the opening area. According to the array substrate, the array substrate is arranged to be the first substrate and the second substrate which are overlapped up and down, the opening area is formed in the first substrate respectively, the opening area which can surround the opening area and is tangent to at least part of the edge of the opening area is formed in the second substrate, only one set of process design is needed, different product structure requirements of users can be met, the alignment problem during different special-shaped cutting is solved, the product machining precision is improved, the design pressure and the material pressure during product design machining are greatly relieved, and the machining cost is effectively reduced.

Description

Array substrate, display panel and display device
Technical Field
The disclosure relates to the technical field of display, in particular to an array substrate, a display panel and a display device.
Background
The existing full-screen mobile phone generally designs a transparent area for placing a camera at the middle position of the upper end of the screen, at present, the area is most popular as a round hole (commonly called a blind hole) or a Notch (comprising a commonly called a U-shaped groove with an aligned bang, a V-shaped groove with a beautiful tip and a water drop-shaped groove), along with the diversified and diversified development of electronic products such as mobile phones, the requirements of users on the product structure are more and more increased, the prior art cannot simultaneously meet the diversified structural requirements of the users, and the processing cost is higher.
In addition, in the conventional product design process, blind holes or notches are generally in a form of unilaterally driving GOAs (Gate Drive On Array, gate driving circuits arranged on an array substrate), that is, two-stage GOAs on the left and right respectively drive Gate (Gate) pixels of different rows, and when one-stage GOAs or one-row Gate has a problem (for example, when the Notch is formed by performing special-shaped cutting), the pixels of the row have no signal transmission, and a Y-Line half-cut Line defect occurs.
Disclosure of Invention
The embodiment of the disclosure provides an array substrate, a display panel and a display device, which can solve the problems in the prior art.
According to one aspect of the present disclosure, there is provided an array substrate including:
a first substrate having an open area;
the second substrate is oppositely overlapped with the first substrate, at least one side edge of the second substrate is provided with an opening area, the opening area surrounds the opening area, and at least part of the edge of the opening area is tangent to at least part of the edge of the opening area.
In some embodiments, the opening area and the opening area are symmetrically arranged along the Y-axis direction of the array substrate, and the symmetry axis of the opening area coincides with the symmetry axis of the opening area.
In some embodiments, the opening area is an arc-shaped groove, and two side edges of the arc-shaped groove smoothly transition with the edge of the second substrate.
In some embodiments, the first substrate is provided with at least two first alignment marks to align with two side edges of the opening area.
In some embodiments, the array substrate includes a display area and a non-display area located inside and around the display area, the opening area and the opening area are both located in the non-display area, and the first alignment mark is located above the opening area and located in the non-display area.
In some embodiments, the first alignment mark is formed on an SD layer of the first substrate, and the SD layer has a structure of Ti/Al/Ti.
In some embodiments, the first alignment mark is a cross mark or a rice mark.
In some embodiments, the array substrate further includes a plurality of gate signal lines and a gate driving circuit for driving the gate signal lines, the gate driving circuit includes a first gate driving unit and a second gate driving unit respectively disposed at left and right sides of the gate signal lines, and the first gate driving unit and the second gate driving unit respectively drive the gate signal lines from the left and right sides of the gate signal lines to the open hole region or the opening region at the same time.
In some embodiments, the array substrate further includes electrostatic discharge protection units respectively disposed at left and right sides of the opening region, the electrostatic discharge protection units are connected with the gate signal lines disposed near the opening region, and a connection portion between the electrostatic discharge protection units and edges of the opening region and the second substrate has a first distance.
In some embodiments, the electrostatic discharge protection unit includes a thin film transistor having a width to length ratio of less than 6 and a transistor pitch of less than 5.
According to one of the schemes of the present disclosure, a display panel is further provided, including the above array substrate.
In some embodiments, the display panel further includes a color film substrate disposed opposite to the array substrate, and a sealant frame for connecting the color film substrate and the array substrate.
In some embodiments, the edge of the opening area is formed with a cutting line for cutting, and the cutting line has a second distance from the outer edge of the first sealant frame provided at the opening area.
According to one aspect of the present disclosure, there is also provided a display device including the above display panel.
According to the array substrate, the display panel and the display device provided by the various embodiments of the disclosure, the array substrate is arranged as the first substrate and the second substrate which are overlapped up and down, the opening area is arranged on the first substrate, the opening area which can surround the opening area and is tangential to at least part of the edge of the opening area is arranged on the second substrate, and only one set of process design is needed, so that the requirements of different product structures of users can be met, the diversification of products is realized, regular products such as hole digging screens can be processed and obtained, and different special-shaped products such as V-Notch, water drop screens and Liu Haibing can be processed and obtained; meanwhile, the alignment problem during cutting of different special shapes can be solved, the product processing precision is improved, the design pressure and the material pressure during product design and processing are greatly relieved, and the processing cost is effectively reduced.
Drawings
Fig. 1 illustrates a schematic structural diagram of an array substrate according to an embodiment of the present disclosure;
FIG. 2 shows a schematic structural view of a first substrate of an embodiment of the present disclosure;
FIG. 3 illustrates a schematic diagram of a first alignment mark of an embodiment of the present disclosure;
fig. 4 shows a schematic structural diagram of a gate signal line and a gate driving circuit of an embodiment of the present disclosure;
FIG. 5 shows a scanning schematic of a gate signal line of an embodiment of the present disclosure;
FIG. 6 is a schematic diagram of a portion of an array substrate (including an ESD protection unit) according to an embodiment of the disclosure;
fig. 7 is an enlarged schematic view of the sealant frame and the dicing line of the opening area in fig. 4.
Reference numerals:
1-a first substrate, 11-an open area; 2-a second substrate, 21-an opening region; 31-first alignment mark, 32-second alignment mark, 33-third alignment mark; 4-cutting lines; a 5-gate signal line; 61-a first gate driving unit, 62-a second gate driving unit; 7-an electrostatic discharge protection unit; 8-sealant frame, 81-first sealant frame.
Detailed Description
Various aspects and features of the disclosure are described herein with reference to the drawings.
It should be understood that various modifications may be made to the embodiments of the application herein. Therefore, the above description should not be taken as limiting, but merely as exemplification of the embodiments. Other modifications within the scope and spirit of this disclosure will occur to persons of ordinary skill in the art.
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments of the disclosure and, together with a general description of the disclosure given above and the detailed description of the embodiments given below, serve to explain the principles of the disclosure.
These and other characteristics of the present disclosure will become apparent from the following description of a preferred form of embodiment, given as a non-limiting example, with reference to the accompanying drawings.
It should also be understood that, although the present disclosure has been described with reference to some specific examples, those skilled in the art can certainly realize many other equivalent forms of the present disclosure.
The above and other aspects, features and advantages of the present disclosure will become more apparent in light of the following detailed description when taken in conjunction with the accompanying drawings.
Specific embodiments of the present disclosure will be described hereinafter with reference to the accompanying drawings; however, it is to be understood that the disclosed embodiments are merely examples of the disclosure, which may be embodied in various forms. Well-known and/or repeated functions and constructions are not described in detail to avoid obscuring the disclosure in unnecessary or unnecessary detail. Therefore, specific structural and functional details disclosed herein are not intended to be limiting, but merely serve as a basis for the claims and as a representative basis for teaching one skilled in the art to variously employ the present disclosure in virtually any appropriately detailed structure.
Fig. 1 shows a schematic structural diagram of a display device according to an embodiment of the present disclosure. As shown in fig. 1, an embodiment of the present disclosure provides an array substrate, including:
a first substrate 1 having an open area 11;
the second substrate 2 is arranged opposite to the first substrate 1 in a superposed manner, at least one side edge of the second substrate 2 is provided with an opening area 21, the opening area 21 surrounds the opening area 11, and at least part of the edge of the opening area 11 is tangent to at least part of the edge of the opening area 21.
Specifically, the opening region 11 is formed by digging a hole at a position of the first substrate 1 near the upper edge; the opening region 21 is formed by grooving from the upper edge of the second substrate 2.
The hole digging requirement of a user can be directly met by arranging the hole opening region 11 on the first substrate 1, and the special-shaped cutting requirement of the user can be met by arranging the opening region 21 on the second substrate 2, so that different special-shaped panel products such as V-Notch, water drop screen and Liu Haibing are obtained. In particular, the opening area 21 surrounds the opening area 11, so that the second substrate 2 is not affected when the first substrate 1 is subjected to special-shaped cutting, at least part of the edge of the opening area 11 is tangent to at least part of the edge of the opening area 21, and the edge tangent to the opening area 21 of the opening area 11 can be utilized to align when the second substrate 2 is subjected to special-shaped cutting, so that the accuracy of special-shaped cutting is ensured, and the processing quality of a product is improved.
According to the array substrate provided by the embodiment of the disclosure, by arranging the first substrate 1 and the second substrate 2 which are overlapped up and down, and arranging the open area 11 on the first substrate 1 respectively, and arranging the open area 21 which can surround the open area 11 and is tangential to at least part of the edge of the open area 11 on the second substrate 2, different product structure requirements of users can be met by adopting a set of MASK (MASK) exposure and etching process design, the diversification of products is realized, regular products such as a hole digging screen can be processed and obtained, and different special-shaped products such as V-Notch, a water drop screen and Liu Haibing can be processed and obtained; meanwhile, the alignment problem during cutting of different special shapes can be solved, the product processing precision is improved, the design pressure and the material pressure during product design and processing are greatly relieved, and the processing cost is effectively reduced.
In some embodiments, as shown in fig. 1, the open area 11 and the open area 21 are symmetrically disposed along the Y-axis direction of the array substrate, and the symmetry axis of the open area 11 coincides with the symmetry axis of the open area 21. Namely, the open hole area 11 and the open hole area 21 are of bilateral symmetry structures so as to process regular blind holes or special-shaped structures, thereby being beneficial to attractive appearance of products; and the symmetry axis of the open area 11 coincides with the symmetry axis of the open area 21, so that the lower edge of the open area 11 is tangent to the lower edge of the open area 21 (the tangent point is A), and the open area 11 is utilized for alignment when the special-shaped structure product is processed later, thereby ensuring the product precision.
In this embodiment, the open area 11 and the open area 21 that are matched with each other are disposed in the middle of the array substrate, and in a specific implementation, the open area 11 and the open area 21 may also be disposed on the left side or the right side of the array substrate.
In other embodiments, the symmetry axis of the open area 11 and the symmetry axis of the open area 21 may not coincide, for example, when the open area 21 is larger, one open area 11 may be disposed on the left side and the right side of the symmetry axis of the open area 21, i.e. two open areas 11 may be disposed to meet the diversified demands of users.
It will be understood that the X-axis direction of the array substrate refers to the width direction of the array substrate, the Y-axis direction refers to the length direction of the array substrate, and the Z-axis direction of the array substrate refers to the thickness direction of the array substrate.
The shape of the openings of the open area 11 may be specifically any geometric shape such as a circle, an ellipse, a rectangle, a square, a triangle, a diamond, or other irregular shape. In this embodiment, the shape of the open area 11 is circular to meet the blind hole requirement of the user. The open hole region 11 is set as a blind hole region, so that components such as a camera in the blind hole region can be protected, and an optical element (e.g., a polarizing film or the like) can be arranged at a closed end of the blind hole region, so that imaging effects and the like of a product can be adjusted in cooperation with the camera.
As shown in fig. 1, the shape of the opening area 21 is an arc-shaped groove, and two side edges of the arc-shaped groove smoothly transition with the edge of the second substrate 2.
Further, the width of the arc-shaped groove gradually decreases from the outside to the inside from the edge of the second substrate 2. That is, the opening of the opening area 21 gradually increases from inside to outside, so that processing of different shaped structures can be facilitated, and different shaped structures (Notch shaped structures) such as V-Notch, drip screen, liu Haibing and the like can be formed only by cutting. The smooth transition between the two side edges of the arc-shaped groove and the edge of the second substrate 2 is also convenient for processing.
In a specific implementation, the shape of the opening area 21 may be a regular groove such as a "U-shape" or a "concave shape", for example, when the opening area is a "concave shape", processing of the Ji Liuhai Notch structure may be facilitated, but processing of the V-Notch is inconvenient, and more material may need to be cut during processing of the V-Notch, which is not beneficial to implementation of the narrow frame. When the shape of the opening area 21 is "U-shaped" or "concave", the edges of the two sides of the arc-shaped groove and the edge of the second substrate 2 can directly pass through right angle transition, and also can be chamfered at the right angle to realize smooth transition, so as to facilitate the processing of the special-shaped structure or other structures.
In some embodiments, as shown in fig. 1 and 2, at least two first alignment marks 31 are disposed on the first substrate 1 to align with two side edges of the opening area 21.
During specific processing, the special-shaped cutting equipment performs counterpoint through grabbing the at least two first counterpoint marks 31, determines the cutter wheel cutting position of the special-shaped cutting equipment, and finally realizes the Notch shape structure.
In this embodiment, as shown in fig. 1, a first alignment mark 31 is etched on the left and right sides above the opening area 11 to align with the left and right edges of the opening area 21, respectively, i.e. the line between the first alignment mark 31 and the edge points of the two side edges of the opening area 21 is parallel to the Y axis of the array substrate.
The array substrate includes a display Area (AA) and a non-display Area located inside and around the display Area, the open Area 11 and the open Area 21 are both located in the non-display Area, and the first alignment mark 31 is located above the open Area 11 and located in the non-display Area.
Further, the distance L between the first alignment mark 31 and the top edge of the display area of the array substrate is 200-400um (e.g. 300 um), so that the alignment is ensured, and meanwhile, the non-display area is prevented from being excessively large, so as to realize a narrow frame or full screen design.
In this embodiment, the first alignment mark 31 is formed on the SD layer (source/drain metal layer) of the first substrate 1, and the SD layer has a structure of Ti/Al/Ti (titanium/aluminum/titanium). The Ti/Al/Ti three-layer structure can improve the product quality of the array substrate.
In some embodiments, the first alignment mark 31 is a cross-shaped mark or a zig-zag mark as shown in fig. 3. Preferably, the cross-shaped mark has a length a of 100um and a width b of 20 um. In particular embodiments, the first alignment mark 31 may have other shapes as long as it has a crossing point to facilitate positioning.
In some embodiments, the edge of the opening area 21 is further provided with a plurality of second alignment marks 32, and the wires of the second alignment marks 32 form a dicing line 4, and the dicing line 4 is cut to form the Notch structure.
As shown in fig. 1 and 2, a plurality of third alignment marks 33 are provided at the connection of the edges of the first substrate 1 and/or the second substrate 2 so as to form corresponding cutting lines, thereby cutting the edges of the array substrate to form rounded edges, etc.
In some embodiments, as shown in fig. 4 and 5, the array substrate further includes a plurality of gate signal lines 5 and a gate driving circuit for driving the gate signal lines 5, the gate driving circuit including a first gate driving unit 61 (first GOA unit) and a second gate driving unit 62 (second GOA unit) respectively provided at left and right sides of the gate signal lines 5, the first gate driving unit and the second gate driving unit driving the gate signal lines 5 from the left and right sides of the gate signal lines 5 to the opening region 21 or the opening region 11, respectively.
The gate signal lines 5 are located in the display area, the gate driving circuits are located in the non-display area, and each row of gate signal lines 5 located in the display area is connected to each row of gate driving circuits located in the non-display area.
The array substrate further includes an array of M rows and N columns of pixels disposed in the display area, where the array of pixels is disposed corresponding to the gate signal lines 5, and the display area of the array substrate is provided with the M gate signal lines 5, for example, 2402 gate signal lines 5 are provided in this embodiment, and pixels (pixels) in the same row in the array of pixels are all connected to the same gate signal line 5.
The grid driving circuit outputs a grid scanning driving signal to drive a grid signal line 5 in the panel, so that a thin film transistor in the display area is conducted to charge the pixel; meanwhile, the gate driving circuits sequentially transmit signals in a progressive scanning mode, and after the scanning of the gate scanning driving signals input through one row of gate signal lines 5 is completed, the next row of gate driving circuits are controlled to input signals to the gate signal lines 5 positioned in the row, and the signals are sequentially transmitted until the scanning of the gate scanning driving signals input to the last row of gate signal lines 5 is completed.
The array substrate further comprises Data lines (Data) which are mutually perpendicular to the gate signal lines 5 and are arranged in a crossing and insulating mode, and a Data driving circuit used for driving the Data lines, namely the array substrate is provided with N Data lines, and pixels in the same column in the pixel array are all connected to the same Data line. When a scanning signal is input through the grid signal line 5, the thin film transistor is turned on, and at the moment, a gray-scale signal is input through the data line, so that the pixel unit can be driven, and a display function is realized.
As shown in fig. 5, each pixel unit in the pixel array may include at least three sub-pixels to respectively correspond to the red filter unit, the green filter unit and the blue filter unit on the color film substrate.
In this embodiment, the first gate driving unit 61 and the second gate driving unit 62 are respectively connected to the left and right sides of each row of gate signal lines 5, so that when the opening area 21 is cut, even if the gate signal lines 5 are cut off, the cut-off gate signal lines 5 can be respectively scanned and driven normally by the first gate driving unit 61 and the second gate driving unit 62, so that the pixel units are driven normally to display, and no other abnormal or bad phenomenon occurs; or may display with another normally driven pixel cell when an abnormality occurs in one of the two GOA cells located in the same row.
In some embodiments, as shown in fig. 6, in order to prevent the excessive instantaneous current in the array substrate from breaking down the GOA unit, which affects the normal display of the array substrate, the array substrate further includes electrostatic discharge protection units 7 (ESD units) respectively disposed on the left and right sides of the opening region 21, the electrostatic discharge protection units 7 are connected to the gate signal lines 5 disposed near the opening region 21, and the connection between the electrostatic discharge protection units 7 and the edges of the opening region 21 and the second substrate 2 has a first distance S 1
First distance S 1 The ESD unit can be effectively prevented from being cut off during special-shaped cutting, the ESD unit is not damaged, and the protection capability of the ESD unit is ensured.
As shown in fig. 7, the electrostatic discharge protection unit 7 includes thin film transistors (Thin Film Transistor, TFT), the aspect ratio of the thin film transistors is less than 6, and the transistor pitch of the thin film transistors is less than 5.
By reducing the width-to-length ratio and the pipe section number of the thin film transistor, the ESD protection capability is ensured, and meanwhile, the space occupation ratio of the ESD unit is reduced, so that the ESD unit is ensured not to be damaged. For example, in this embodiment, the size of the thin film transistor may be 34 (Poly) by 3 (node number)/6 (Gate), where 34 (Poly)/6 (Gate) represents the width-to-length ratio.
The embodiment of the disclosure also provides a display panel, which comprises the array substrate.
In some embodiments, the display panel further includes a color film substrate (CF) disposed opposite the array substrate (TFT), and a Seal frame 8 (Seal) for connecting the color film substrate and the array substrate.
As shown in fig. 4, the sealant frame 8 is disposed around the edges of the array substrate and the color film substrate, and as shown in fig. 7, the width w of the first sealant frame 81 located at the edge of the opening area 21 is 500-700um. The reliable sealing of the opening area 21 (Notch special-shaped area) can be ensured, the problem of liquid leakage of the cut special-shaped area is effectively solved, the reliable sealing is ensured, and therefore the diversified special-shaped structure is realized.
Further, the edge of the opening area 21 on the array substrate is formed with a cutting line 4 for cutting, and a second distance S between the cutting line 4 and the outer side edge of the first sealant frame 81 coated on the edge of the opening area 21 2 Preferably 100um, that is, the distance between the outer edge of the first sealant frame 81 and the cutting line 4 is relatively short, the edge sealant applied to the opening area 21 is prevented from flowing into the array substrate from the opening area 21, and damage is prevented.
The coating manner of the sealant frame at other positions of the display panel is consistent with the prior art, and is not repeated here.
The embodiment of the disclosure also provides a display device comprising the display panel.
An example of the display device is a liquid crystal display device. The display device may be any product or component having a display function, such as a cell phone, tablet computer, television, display, notebook computer, wearable watch, navigator, etc.
The above embodiments are merely exemplary embodiments of the present disclosure, which are not intended to limit the present disclosure, the scope of which is defined by the claims. Various modifications and equivalent arrangements of parts may be made by those skilled in the art, which modifications and equivalents are intended to be within the spirit and scope of the present disclosure.

Claims (14)

1. An array substrate, comprising:
a first substrate having an open area;
the second substrate is oppositely overlapped with the first substrate, at least one side edge of the second substrate is provided with an opening area, the opening area surrounds the opening area, and at least part of the edge of the opening area is tangent to at least part of the edge of the opening area.
2. The array substrate of claim 1, wherein the open hole region and the open hole region are symmetrically arranged along a Y-axis direction of the array substrate, and a symmetry axis of the open hole region coincides with a symmetry axis of the open hole region.
3. The array substrate of claim 1, wherein the opening region is an arc-shaped groove, and both side edges of the arc-shaped groove smoothly transition with edges of the second substrate.
4. The array substrate of claim 1, wherein the first substrate is provided with at least two first alignment marks to align with both side edges of the opening region.
5. The array substrate of claim 4, wherein the array substrate comprises a display region and a non-display region located inside and around the display region, the open area and the open area are both located in the non-display region, and the first alignment mark is located above the open area and located in the non-display region.
6. The array substrate of claim 4, wherein the first alignment mark is formed on an SD layer of the first substrate, and the SD layer has a structure of Ti/Al/Ti.
7. The array substrate of claim 4, wherein the first alignment mark is a cross mark or a zig-zag mark.
8. The array substrate according to any one of claims 1 to 7, wherein the array substrate further comprises a plurality of gate signal lines and a gate driving circuit for driving the gate signal lines, the gate driving circuit comprising first and second gate driving units respectively provided at left and right sides of the gate signal lines, the first and second gate driving units respectively driving the gate signal lines from the left and right sides of the gate signal lines to the opening region or the opening region at the same time.
9. The array substrate of claim 8, further comprising electrostatic discharge protection units respectively disposed at left and right sides of the opening region, the electrostatic discharge protection units being connected to the gate signal lines disposed near the opening region, the electrostatic discharge protection units having a first distance from a junction of the opening region and an edge of the second substrate.
10. The array substrate of claim 9, wherein the electrostatic discharge protection unit comprises a thin film transistor having an aspect ratio of less than 6 and a transistor section number of less than 5.
11. A display panel comprising the array substrate of any one of claims 1-10.
12. The display panel of claim 11, further comprising a color film substrate disposed opposite the array substrate, and a sealant frame for connecting the color film substrate and the array substrate.
13. The display panel according to claim 12, wherein an edge of the opening region is formed with a cutting line for cutting, the cutting line having a second distance from an outer side edge of the first sealant frame provided in the opening region.
14. A display device comprising the display panel according to any one of claims 11-13.
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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101614915A (en) * 2008-06-25 2009-12-30 乐金显示有限公司 The liquid crystal indicator of fringe field switching mode and array base palte thereof
CN104950526A (en) * 2014-03-27 2015-09-30 群创光电股份有限公司 Display panel and manufacturing method thereof
TW201537257A (en) * 2014-03-27 2015-10-01 Innolux Corp Display panel and manufacturing method thereof
CN109032416A (en) * 2018-03-28 2018-12-18 上海和辉光电有限公司 The preparation method of touch-control display panel, display device and touch-control display panel
CN110703479A (en) * 2019-09-24 2020-01-17 上海中航光电子有限公司 Display device
CN210378212U (en) * 2019-07-30 2020-04-21 南京洛普科技有限公司 Steel mesh for LED module copper post pad
JPWO2019038861A1 (en) * 2017-08-23 2020-07-02 シャープ株式会社 Vapor deposition mask, display panel manufacturing method, and display panel

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101614915A (en) * 2008-06-25 2009-12-30 乐金显示有限公司 The liquid crystal indicator of fringe field switching mode and array base palte thereof
CN104950526A (en) * 2014-03-27 2015-09-30 群创光电股份有限公司 Display panel and manufacturing method thereof
TW201537257A (en) * 2014-03-27 2015-10-01 Innolux Corp Display panel and manufacturing method thereof
JPWO2019038861A1 (en) * 2017-08-23 2020-07-02 シャープ株式会社 Vapor deposition mask, display panel manufacturing method, and display panel
CN109032416A (en) * 2018-03-28 2018-12-18 上海和辉光电有限公司 The preparation method of touch-control display panel, display device and touch-control display panel
CN210378212U (en) * 2019-07-30 2020-04-21 南京洛普科技有限公司 Steel mesh for LED module copper post pad
CN110703479A (en) * 2019-09-24 2020-01-17 上海中航光电子有限公司 Display device

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