CN113555485A

CN113555485A - LED chip and preparation method thereof

Info

Publication number: CN113555485A
Application number: CN202110663071.XA
Authority: CN
Inventors: 叶佩青; 刘英策; 翁启伟; 陈亮; 刘兆
Original assignee: Jiangxi Qianzhao Photoelectric Co ltd
Current assignee: Jiangxi Qianzhao Photoelectric Co ltd
Priority date: 2021-06-15
Filing date: 2021-06-15
Publication date: 2021-10-26

Abstract

The embodiment of the application discloses an LED chip and a preparation method thereof, wherein the LED chip comprises: a substrate; a light emitting structure on the surface of the substrate; a first electrode on a surface of the first type semiconductor layer of the light emitting structure; the second electrode is positioned on the surface of the second type semiconductor layer of the light-emitting structure, the surface of the second electrode facing the second type semiconductor layer comprises a first area and a second area, the second area surrounds the first area, the first area is in contact with the surface of the second type semiconductor layer, and a gap exists between the second area and the surface of the second type semiconductor layer; and a Bragg reflector layer at least partially within the gap. Therefore, in the LED chip, when light emitted by the light emitting structure is emitted to the second electrode, the light can be reflected by the Bragg reflection layer between the second electrode and the second type semiconductor layer, so that the reflection of the second electrode to light is improved, the absorption and shielding of the second electrode to light are reduced, and the light efficiency of the LED chip is further improved.

Description

LED chip and preparation method thereof

Technical Field

The application relates to the technical field of light emitting diodes, in particular to an LED chip and a preparation method thereof.

Background

With the development of semiconductor technology, Light-Emitting diodes (LEDs) have been widely used in various fields in our production and life. Currently, the LED chip in the industry is mainly a normal mounting structure, and generally includes from bottom to top in sequence: the LED chip with the front-mounted structure comprises a substrate, an N-type semiconductor layer, a multiple quantum well layer, a P-type semiconductor layer, a P electrode and an N electrode, wherein the P electrode is arranged on the P-type semiconductor layer, the N electrode is arranged on the N-type semiconductor layer, the LED chip with the front-mounted structure emits light from a P surface, namely, the light emitted by the multiple quantum well layer is emitted through the P-type semiconductor layer and the P electrode, however, the P electrode can absorb and shield the light, and the light efficiency of the LED chip is affected, so that the technical problem that how to reduce the absorption and shielding of the P electrode in the front-mounted LED chip to the light is needed to be solved by technical personnel in the field is urgently needed.

Disclosure of Invention

In order to solve the technical problem, an embodiment of the application provides an LED chip and a manufacturing method thereof, so as to reduce absorption and shielding of a P electrode in a normally-installed LED chip to light and improve the lighting effect of the LED chip.

In order to achieve the above object, the embodiments of the present application provide the following technical solutions:

an LED chip, comprising:

a substrate;

the light-emitting structure is positioned on the surface of the substrate, and the light-emitting structure sequentially comprises the following components in the direction deviating from the substrate: the semiconductor device comprises a first type semiconductor layer, a multi-quantum well layer and a second type semiconductor layer, wherein the multi-quantum well layer and the second type semiconductor layer are exposed to a part of the first type semiconductor layer to form a table top;

a first electrode on the mesa;

the second electrode is positioned on the surface of the second type semiconductor layer, the surface of the second electrode facing the second type semiconductor layer comprises a first area and a second area, the second area surrounds the first area, the first area is in contact with the surface of the second type semiconductor layer, and a gap exists between the second area and the surface of the second type semiconductor layer;

a Bragg reflector layer at least partially within the gap.

Optionally, the LED chip further includes:

the current blocking layer is positioned between the second type semiconductor layer and the second electrode, is partially positioned in the gap and partially extends out of the gap, and is provided with a first through hole;

the current expansion layer is positioned between the current blocking layer and the second electrode, is partially positioned in the gap, partially extends out of the gap and covers part of the surface of the second type semiconductor layer, and is provided with a second through hole which is communicated with the first through hole;

and the second electrode is contacted with the surface of the second type semiconductor layer sequentially through the second through hole and the first through hole.

Optionally, the second electrode includes a pad electrode, the bragg reflection layer is located between the current spreading layer and the second electrode, is partially located in the gap, and partially extends to the outside of the gap to cover a surface of the current spreading layer, the bragg reflection layer has a third through hole, and the third through hole is communicated with the second through hole;

the second electrode is in contact with the surface of the second type semiconductor layer sequentially through the third through hole, the second through hole and the first through hole.

Optionally, the second electrode includes a pad electrode and a finger electrode extending from the pad electrode in a direction parallel to the extending direction of the current spreading layer, and the bragg reflection layer is located between the finger electrode and the second type semiconductor layer.

Optionally, a portion of the current spreading layer located between the finger electrode and the current blocking layer has a plurality of holes, and the bragg reflection layer is located in the plurality of holes.

Optionally, the method further includes:

and the passivation layer covers the surface of the LED chip and exposes the first electrode and the second electrode.

Optionally, the bragg reflection layer is SiO₂Layer and Ti₃O₅Alternating layers of layers.

A preparation method of an LED chip comprises the following steps:

providing a substrate;

forming a light-emitting structure on the surface of the substrate, wherein the light-emitting structure sequentially comprises the following components in the direction departing from the substrate: the semiconductor device comprises a first type semiconductor layer, a multi-quantum well layer and a second type semiconductor layer, wherein the multi-quantum well layer and the second type semiconductor layer are exposed to a part of the first type semiconductor layer to form a table top;

forming a Bragg reflection layer on one side of the second type semiconductor layer, which is far away from the substrate;

forming a first electrode on the table top, and forming a second electrode on the surface of the second type semiconductor layer, wherein the surface of the second electrode facing the second type semiconductor layer comprises a first area and a second area, and the second area surrounds the first area;

the first region is in contact with the surface of the second type semiconductor layer, a gap exists between the second region and the surface of the second type semiconductor layer, and the Bragg reflection layer is at least partially positioned in the gap.

Optionally, after forming the light emitting structure, the method further includes:

forming a current blocking layer on one side of the second type semiconductor layer, which is far away from the substrate, wherein the current blocking layer is provided with a first through hole;

forming a current expansion layer on one side of the current blocking layer, which is far away from the second type semiconductor layer, and the surface of the second type semiconductor layer, wherein the current expansion layer is provided with a second through hole which is communicated with the first through hole;

when the second electrode is formed, the second electrode is contacted with the surface of the second type semiconductor layer through the second through hole and the first through hole in sequence;

the current blocking layer is positioned between the second type semiconductor layer and the second electrode, is partially positioned in the gap and partially extends out of the gap; the current expansion layer is positioned between the current blocking layer and the second electrode, is partially positioned in the gap, partially extends out of the gap and covers part of the surface of the second type semiconductor layer.

Optionally, the method further includes:

and forming a passivation layer covering the surface of the LED chip, wherein the passivation layer exposes the first electrode and the second electrode.

Compared with the prior art, the technical scheme has the following advantages:

the LED chip that this application embodiment provided includes: a substrate; the light-emitting structure is positioned on the surface of the substrate, and the light-emitting structure sequentially comprises the following components in the direction deviating from the substrate: the semiconductor device comprises a first type semiconductor layer, a multi-quantum well layer and a second type semiconductor layer, wherein the multi-quantum well layer and the second type semiconductor layer are exposed to a part of the first type semiconductor layer to form a table top; a first electrode on the mesa; the second electrode is positioned on the surface of the second type semiconductor layer, the surface of the second electrode facing the second type semiconductor layer comprises a first area and a second area, the second area surrounds the first area, the first area is in contact with the surface of the second type semiconductor layer, and a gap exists between the second area and the surface of the second type semiconductor layer; a Bragg reflector layer at least partially within the gap. Therefore, in the LED chip provided in the embodiment of the present application, when light emitted from the multiple quantum well layer is directed to the second electrode, the light can be reflected by the bragg reflection layer between the second electrode and the second type semiconductor layer, so that reflection of the second electrode to light is improved, absorption and shielding of the second electrode to light are reduced, and further, the light efficiency of the LED chip is improved.

Drawings

In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present application, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.

FIG. 1 is a schematic diagram of an internal structure of a P electrode of a front-mounted LED chip;

fig. 2 is a schematic structural diagram of an LED chip according to an embodiment of the present application;

fig. 3 is a schematic structural diagram of an LED chip according to another embodiment of the present application;

fig. 4 is a schematic top view illustrating an LED chip provided in an embodiment of the present application, in which the first electrode and the second electrode each include a pad electrode;

fig. 5 is a schematic structural diagram of an LED chip according to another embodiment of the present application;

fig. 6 is a schematic top view of an LED chip provided in an embodiment of the present application, in which the first electrode and the second electrode each include a pad electrode and a finger electrode extending from the pad electrode along a direction parallel to an extending direction of the current spreading layer;

fig. 7 is a schematic structural diagram of an LED chip according to still another embodiment of the present application;

fig. 8 is a schematic structural diagram of an LED chip according to another embodiment of the present application;

fig. 9 is a schematic flow chart of a method for manufacturing an LED chip according to an embodiment of the present application;

fig. 10(a) -10 (d) are schematic structural diagrams of an LED chip corresponding to each process step in a method for manufacturing an LED chip according to an embodiment of the present application;

fig. 11(a) -11 (e) are schematic structural diagrams of an LED chip corresponding to each process step in a method for manufacturing an LED chip according to another embodiment of the present application;

fig. 12(a) -12 (e) are schematic structural diagrams of an LED chip corresponding to each process step in a method for manufacturing an LED chip according to yet another embodiment of the present application.

Detailed Description

The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.

In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present application, but the present application may be practiced in other ways than those described herein, and it will be apparent to those of ordinary skill in the art that the present application is not limited to the specific embodiments disclosed below.

Next, the present application will be described in detail with reference to the drawings, and in the detailed description of the embodiments of the present application, the cross-sectional views illustrating the structure of the device are not enlarged partially according to the general scale for convenience of illustration, and the drawings are only examples, which should not limit the scope of the protection of the present application. In addition, the three-dimensional dimensions of length, width and depth should be included in the actual fabrication.

As described in the background section, how to reduce the absorption and shielding of light by the P electrode in the front-mounted LED chip becomes a technical problem to be solved by those skilled in the art.

The inventor researches and invents that for the forward-mounted LED chip, when light emitted by the multiple quantum well layer is emitted to the P electrode, the light is mainly absorbed and shielded by the side part of the bottom part of the P electrode. One existing solution is to add an Al reflective layer inside the P-electrode where the LED chip is being mounted. Specifically, fig. 1 shows a schematic diagram of an internal structure of a P electrode of the normally-mounted LED chip, and as shown in fig. 1, the P electrode sequentially includes from bottom to top: the metal-clad thin film transistor comprises an ohmic contact layer 10, an Al reflecting layer 11, a barrier layer 12 and an Au expanding layer 13, wherein the ohmic contact layer 10 is thin and is used for forming ohmic contact with a P-type semiconductor layer; the Al reflective layer 11 (mainly the side of the Al reflective layer 11) is used to reflect light; the barrier layer 12 is used for blocking the Au extension layer and the Al reflection layer from mutual dissolution; the Au extension layer 13 serves as a metal electrode. Under normal conditions, as shown in fig. 1, when light emitted from the mqw layer enters the P electrode, the light is reflected by the side of the Al reflective layer 11 inside the P electrode, so that the absorption and shielding of the P electrode to the light are reduced.

However, the inventor further studies and finds that, in order to avoid mutual solubility between the Au extension layer 13 and the Al reflection layer 11 and improve the large-current impact resistance of the LED chip, it is a conventional practice to insert a high barrier layer between the Al reflection layer 11 and the barrier layer 12 of the P electrode, and simultaneously increase the thickness of the Au extension layer 13. However, after inserting the high barrier layer and thickening the Au extension layer, if the angle of the P electrode is not good, the barrier layer 12 is easily plated, so that the side of the Al reflective layer 11 is completely covered. Because Al reflecting layer 11 mainly reflects light through its side in the P electrode, and light can enter into the central zone of Al reflecting layer 11 in the P electrode very rarely, consequently, this will reduce the reflection of Al reflecting layer to light in the P electrode, increase the absorption and the sheltering from of P electrode to light, moreover, insert high barrier layer and behind the thickening Au extension layer, still can make the surface area increase of P electrode, the area that the Au extension layer absorbs light also increases in the P electrode simultaneously, thereby further increase the absorption and the sheltering from of P electrode to light.

In view of this, the present application provides an LED chip, as shown in fig. 2, including:

a substrate 20;

a light emitting structure 21 on the surface of the substrate 20, wherein the light emitting structure 21 sequentially comprises, in a direction away from the substrate: a first type semiconductor layer 211, a multiple quantum well layer 212 and a second type semiconductor layer 213, wherein the multiple quantum well layer 212 and the second type semiconductor layer 213 expose a portion of the first type semiconductor layer 211 to form a mesa;

a first electrode 22, said first electrode 22 being located on said mesa;

a second electrode 23, wherein the second electrode 23 is located on the surface of the second type semiconductor layer 213, and the surface of the second electrode 23 facing the second type semiconductor layer 213 includes a first region and a second region, the second region surrounds the first region, the first region is in contact with the surface of the second type semiconductor layer 213, and a gap exists between the second region and the surface of the second type semiconductor layer 213;

a Bragg reflector (DBR) 24, the DBR 24 being at least partially disposed within the gap.

Optionally, the substrate 20 may be a semiconductor substrate such as a silicon substrate, a germanium substrate, a sapphire substrate, and the like, and the material of the substrate 20 is not limited in this application, which is determined as the case may be.

Optionally, in an embodiment of the present application, the first type semiconductor layer is an N-type semiconductor layer, the first electrode is an N-electrode, the second type semiconductor layer is a P-type semiconductor layer, and the second electrode is a P-electrode, but the present application is not limited thereto, as the case may be.

On the basis of the above embodiments, in an embodiment of the present application, the first type semiconductor layer is an N-type GaN layer, and the second type semiconductor layer is a P-type GaN layer, but the present application is not limited thereto, as the case may be.

As can be seen, in the LED chip provided in the embodiment of the present application, as shown in fig. 2, when light emitted from the multiple quantum well layer 212 is directed to the second electrode 23, the light can be reflected by the bragg reflection layer 24 located between the second electrode 23 and the second type semiconductor layer 213, and the bragg reflection layer has a high reflectivity for light, so that the reflection of the second electrode for light is improved, the absorption and shielding of the second electrode for light are reduced, and the light efficiency of the LED chip is further improved. Even if the second electrode 23 includes the stacked structure shown in fig. 1, which is composed of the ohmic contact layer 10, the Al reflective layer 11, the barrier layer 12 and the Au extension layer 13, when the second electrode 23 is coated on the side of the Al reflective layer 11 due to the plating on the side of the internal barrier layer 12 to reduce the reflection of light, the second electrode can be reflected by the bragg reflective layer 24 located between the second electrode 23 and the second type semiconductor layer 213, so as to compensate the reduced reflection of light due to the coating on the side of the Al reflective layer due to the plating on the side of the internal barrier layer of the second electrode, improve the reflection of light by the second electrode, and further improve the light efficiency of the LED chip.

It should be noted that, in practical applications, since the resistivity of the second type semiconductor layer (such as P type GaN layer) is usually high, the current cannot be uniformly distributed in the second type semiconductor layer, but most of the current is localized in the region of the second type semiconductor layer opposite to the second electrode, so that the current is congested in this region, which affects the uniformity of the luminous intensity of the LED chip, and for this reason, on the basis of the above embodiments, in an embodiment of the present application, as shown in fig. 3, the LED chip further includes:

a current blocking layer 25, wherein the current blocking layer 25 is located between the second type semiconductor layer 213 and the second electrode 23, is partially located in the gap, and partially extends to the outside of the gap, and the current blocking layer 25 has a first through hole;

a current spreading layer 26, wherein the current spreading layer 26 is located between the current blocking layer 25 and the second electrode 23, is partially located in the gap, partially extends to the outside of the gap and covers a part of the surface of the second type semiconductor layer 213, and the current spreading layer 26 has a second through hole which is communicated with the first through hole;

the second electrode 23 sequentially passes through the second through hole and the first through hole to be in surface contact with the second type semiconductor layer 213.

Optionally, the current blocking layer 25 is SiO₂Layer, but the present application does not limit this, and the current blocking layer 25 may also be another material layer capable of blocking current spreading, as the case may be.

Optionally, the current spreading layer 26 is an Indium Tin Oxide (ITO) layer, but the application is not limited thereto, and the current spreading layer 26 may also be another transparent high-conductivity material layer, as the case may be.

It should be noted that the current blocking layer 25 is used to block the current flowing out from the second electrode 23 from spreading from the bottom edge region of the second electrode 23 to the second type semiconductor layer 213, so as to avoid most of the current from being confined to the region of the second type semiconductor layer 213 directly opposite to the second electrode 23, and thus most of the current flowing out from the second electrode 23 spreads to the current spreading layer 26 located between the current blocking layer 25 and the second electrode 23; after entering the current spreading layer 26, the current spreads uniformly along the extending direction of the current spreading layer 26, and then flows uniformly into the second type semiconductor layer 213 and the multiple quantum well layer 212 from the current spreading layer 26, so that the material of the multiple quantum well layer 212 is fully utilized, the light emission is more uniform, that is, the light emission intensity of the LED chip is more uniform, and the light emission area of the LED chip is also increased.

It should be noted that, the gap between the second electrode 23 and the second type semiconductor layer 213 includes the current blocking layer 25, the current spreading layer 26 and the bragg reflector 24, and due to the functional relationship between the current blocking layer 25 and the current spreading layer 26, the current spreading layer 26 is located between the current blocking layer 25 and the second electrode 23, but the present application does not limit the specific location of the bragg reflector 24 in the gap, as the case may be.

Optionally, in an embodiment of the present application, as shown in fig. 3, the bragg reflector layer 24 is located between the current spreading layer 26 and the second electrode 23, i.e. on the surface of the current spreading layer 26. In this case, the current blocking layer 25, the current spreading layer 26, and the bragg reflector 24 are sequentially disposed in the gap in a direction away from the second type semiconductor layer 213.

Optionally, in another embodiment of the present application, the bragg reflector layer 24 and the current spreading layer 26 are the same layer, that is, in the same layer, one part is the bragg reflector layer 24, and the other part is the current spreading layer 26. At this time, in the gap, in a direction away from the second type semiconductor layer 213, the current blocking layer 25, and the bragg reflector layer 24 and the current spreading layer 26 located in the same layer are sequentially arranged.

Optionally, in a further embodiment of the present application, the bragg reflector layer 24 is located between the current blocking layer 25 and the current spreading layer 26. In this case, the current blocking layer 25, the bragg reflector layer 24, and the current spreading layer 26 are sequentially disposed in the gap in a direction away from the second type semiconductor layer 213.

Optionally, in another embodiment of the present application, the bragg reflector layer 24 and the current blocking layer 25 are the same layer, that is, in the same layer, a part of the bragg reflector layer 24 is the current blocking layer 25. At this time, the current blocking layer 25 and the bragg reflector layer 24, and the current spreading layer 26 are sequentially located in the same layer in the gap along a direction away from the second type semiconductor layer 213.

Optionally, in another embodiment of the present application, the bragg reflector 24 is located between the current blocking layer 25 and the second type semiconductor layer 213. In this case, the bragg reflector 24, the current blocking layer 25, and the current spreading layer 26 are sequentially formed in the gap in a direction away from the second type semiconductor layer 213.

In the above embodiments, no matter where the bragg reflector 24 is located in the gap, when the light emitted from the mqw layer 212 is directed to the second electrode 23, the light can be reflected by the bragg reflector 24 located in the gap more or less, so as to improve the reflection of the light by the second electrode, reduce the absorption and shielding of the light by the second electrode, and further improve the light efficiency of the LED chip.

Because the LED chip provided in the embodiment of the present application needs to add the bragg reflection layer with high reflectivity in the gap between the second electrode and the second type semiconductor layer to reduce the absorption and shielding of the second electrode to light, the specific structure of the second electrode needs to be considered in the design of the position of the bragg reflection layer in the gap.

The following describes the design of the position of the bragg reflector in the gap with reference to the specific structure of the second electrode.

Optionally, in an embodiment of the present application, as shown in fig. 3, the second electrode 23 includes a pad electrode 231. Specifically, fig. 4 is a schematic top view of the LED chip provided in the embodiment of the present application, where the first electrode and the second electrode are both pad electrodes. It is understood that the absorption and shielding of light by the pad electrode 231 mainly occurs at its bottom edge portion. Also, if the pad electrode 231 includes the stacked structure of the ohmic contact layer 10, the Al reflective layer 11, the barrier layer 12, and the Au extension layer 13 shown in fig. 1, the problem of reflection of light, which is reduced by the side edge of the Al reflective layer 11 inside the pad electrode 231 being coated due to plating on the side of the internal barrier layer 12, is mainly concentrated on the bottom edge portion thereof.

Since the gap between the pad electrode 231 and the second-type semiconductor layer 213 is narrow, in view of achieving a significant improvement in the reflectivity of the pad electrode 231 with as simple process steps as possible, it is, optionally, in one embodiment of the present application, continuing with fig. 3, the bragg reflector layer 24 is located between the current spreading layer 26 and the second electrode 23, i.e., between the current spreading layer 26 and the pad electrode 231, in which case the gap between the second electrode 23 and the second type semiconductor layer 213 is the gap between the pad electrode 231 and the second type semiconductor layer 213, the Bragg reflector layer 24 is partially located in the gap, partially extends out of the gap to cover a part of the surface of the current spreading layer 26, the bragg reflection layer 24 has a third through hole, and the third through hole is communicated with the second through hole;

the second electrode 23 sequentially passes through the third through hole, the second through hole and the first through hole to contact the surface of the second type semiconductor layer 213.

It can be seen that, the LED chip provided in the embodiment of the present application, through increase at the bottom edge of the pad electrode 231 the bragg reflection layer 24, thereby reducing the absorption and shielding of the pad electrode 231 to light, increasing the reflection effect of the pad electrode 231 to light, and then improving the light efficiency of the LED chip.

Optionally, in another embodiment of the present application, in order to further improve the uniformity of the distribution of the current flowing from the second electrode 23 in the current spreading layer 26, as shown in fig. 5, the second electrode 23 includes not only a pad electrode 231, but also a finger electrode 232 extending from the pad electrode 231 in a direction parallel to the extending direction of the current spreading layer 26. Specifically, fig. 6 shows a schematic top view of the LED chip provided in this embodiment of the present application, where the first electrode and the second electrode both include a pad electrode and a finger electrode, and it can be seen that the second electrode 23 increases the contact area between the second electrode 23 and the current spreading layer 26 by using the finger electrode 232, so that after the current flowing from the finger electrode 232 flows into the current spreading layer 26, the current can be distributed more uniformly in the current spreading layer 26, and thus the light emitting intensity of the LED chip is more uniform.

At this time, since the current flowing out of the second electrode 23 mainly spreads toward the current spreading layer 26 through the finger electrodes 232 thereof, so that the light emitted from the mqw layer 212 is also mainly emitted from the finger electrode 232 region, the absorption and shielding of the light by the second electrode 23 are mainly concentrated on the finger electrode 232 portion thereof. Further, if the second electrode 23 includes the laminated structure of the ohmic contact layer 10, the Al reflective layer 11, the barrier layer 12 and the Au extension layer 13 shown in fig. 1, it can be understood that since the finger electrodes 232 are generally in the shape of strip fingers and are thin, the problem of reflection of light, which is reduced by the second electrode 23 whose inner Al reflective layer 11 side is coated due to the inner barrier layer 12 side plating, is mainly concentrated on the finger electrode 232 portion thereof.

Therefore, optionally, in an embodiment of the present application, as shown in fig. 5, the bragg reflector layer 24 is located between the finger electrode 232 and the second type semiconductor layer 213.

Similarly, the current blocking layer 25, the current spreading layer 26 and the bragg reflector layer 24 are included in the gap between the finger electrode 232 and the second type semiconductor layer 213, and the current spreading layer 26 is located between the current blocking layer 25 and the finger electrode 232 due to the aforementioned action relationship between the current blocking layer 25 and the current spreading layer 26, but the present application does not limit the specific location of the bragg reflector layer 24 in the gap between the finger electrode 232 and the second type semiconductor layer 213, as the case may be.

Optionally, in an embodiment of the present application, the bragg reflector layer 24 is located between the current spreading layer 26 and the finger electrode 232, i.e., on the surface of the current spreading layer 26. At this time, in the gap between the finger electrode 232 and the second type semiconductor layer 213, the current blocking layer 25, the current spreading layer 26, and the bragg reflection layer 24 are sequentially in a direction away from the second type semiconductor layer 213.

Optionally, in another embodiment of the present application, as shown in fig. 5, the bragg reflector layer 24 and the current spreading layer 26 are the same layer, that is, in the same layer, one part is the bragg reflector layer 24, and the other part is the current spreading layer 26. At this time, in the gap between the finger electrode 232 and the second type semiconductor layer 213, the current blocking layer 25, and the bragg reflection layer 24 and the current spreading layer 26 located at the same layer are sequentially in a direction away from the second type semiconductor layer 213.

Optionally, in a further embodiment of the present application, the bragg reflector layer 24 is located between the current blocking layer 25 and the current spreading layer 26. At this time, in the gap between the finger electrode 232 and the second type semiconductor layer 213, the current blocking layer 25, the bragg reflector layer 24, and the current spreading layer 26 are sequentially in a direction away from the second type semiconductor layer 213.

Optionally, in another embodiment of the present application, the bragg reflector layer 24 and the current blocking layer 25 are the same layer, that is, in the same layer, a part of the bragg reflector layer 24 is the current blocking layer 25. At this time, in the gap between the finger electrode 232 and the second type semiconductor layer 213, the current blocking layer 25 and the bragg reflection layer 24, and the current spreading layer 26 located at the same layer are sequentially in a direction away from the second type semiconductor layer 213.

Optionally, in another embodiment of the present application, the bragg reflector 24 is located between the current blocking layer 25 and the second type semiconductor layer 213. At this time, in the gap between the finger electrode 232 and the second type semiconductor layer 213, the bragg reflector layer 24, the current blocking layer 25, and the current spreading layer 26 are sequentially in a direction away from the second type semiconductor layer 213.

It should be noted that, in each of the above embodiments, no matter where the bragg reflective layer 24 is located in the gap between the finger electrode 232 and the second type semiconductor layer 213, when the light emitted from the mqw layer 212 is directed to the finger electrode 232, the light can be reflected by the bragg reflective layer 24 located in the gap more or less, so as to improve the reflection of the light by the second electrode, reduce the absorption and shielding of the light by the second electrode, and further improve the light efficiency of the LED chip.

Considering the adhesion problem between the bragg reflector 24 and the finger electrode 232 and the adhesion problem between the bragg reflector 24 and the second type semiconductor layer 213, if the bragg reflector 24 is entirely positioned between the finger electrode 232 and the second type semiconductor layer 213, the adhesion between the finger electrode 232 and the bragg reflector 24 is not strong due to the thinness of the finger electrode 232, which may easily cause the finger electrode 232 to be peeled off.

Therefore, optionally, in an embodiment of the present application, as shown in fig. 5, a portion of the current spreading layer 26 between the finger electrode 232 and the current blocking layer 25 has a plurality of holes, and the bragg reflection layer 24 is located in the plurality of holes, so as to stabilize the LED chip (especially the finger electrode 232 portion thereof).

It should be noted that, the number, the width and the interval of the plurality of holes are not limited in the present application, as the case may be.

It can be seen that, in the LED chip provided in the embodiment of the present application, the bragg reflection layer 24 is filled in the plurality of holes of the current expansion layer 26 at the bottom of the finger-shaped electrode 232, so that absorption and shielding of the finger-shaped electrode 232 on light are reduced, a reflection effect of the finger-shaped electrode 232 on light is increased, and a light efficiency of the LED chip is further improved.

On the basis of any of the above embodiments, in an embodiment of the present application, as shown in fig. 7 and 8, in order to protect the LED chip, the LED chip further includes:

a passivation layer 27 covering the surface of the LED chip, and the passivation layer 27 exposes the first electrode 22 and the second electrode 23.

Fig. 7 is a schematic structural diagram of the LED chip shown in fig. 3 after being covered with the passivation layer 27, and fig. 8 is a schematic structural diagram of the LED chip shown in fig. 5 after being covered with the passivation layer 27.

Optionally, the passivation layer 27 is SiO₂The present application is not limited to the above-described layer, and the layer may be optionally formed.

On the basis of any one of the above embodiments, in an embodiment of the present application, the bragg reflective layer is SiO₂Layer and Ti₃O₅The bragg reflector may be other reflectors having high reflectivity to light, such as a silver mirror reflector, as the case may be.

It should be noted that, the thickness of the bragg reflection layer is not limited in the present application, and optionally, the thickness of the bragg reflection layer is 1 μm to 4 μm, as the case may be.

The embodiment of the application also provides a preparation method of the LED chip, as shown in fig. 9, the method includes:

s1: a substrate 20 is provided as shown in fig. 10 (a).

S2: forming a light emitting structure 21 on the surface of the substrate 20, wherein the light emitting structure 21 sequentially comprises, in a direction away from the substrate 20: a first type semiconductor layer 211, a multiple quantum well layer 212 and a second type semiconductor layer 213, and the multiple quantum well layer 212 and the second type semiconductor layer 213 expose a portion of the first type semiconductor layer 212 to form a mesa, as shown in fig. 10 (b).

Specifically, as shown in fig. 10(b), first, the first type semiconductor layer 211, the multiple quantum well layer 212, and the second type semiconductor layer 213 are epitaxially grown in this order on the surface of the substrate 20 to form the light emitting structure 21; then, a pattern of the mesa is manufactured on the surface of the light emitting structure 21 by a photoetching method; next, the multi-quantum well layer 212 and the second-type semiconductor layer 213 are etched by dry etching to expose a portion of the first-type semiconductor layer 212 to form the mesa.

S3: a bragg reflector 24 is formed on the second type semiconductor layer 213 away from the substrate 20, as shown in fig. 10 (c).

Specifically, as shown in fig. 10(c), first, a bragg reflector (DBR) is deposited on the second type semiconductor layer 213 away from the substrate 20 by using a DBR stage24, optionally, the bragg reflector layer 24 is SiO₂Layer and Ti₃O₅The thickness of the Bragg reflection layer 24 is 1-4 μm, but the application does not limit the thickness, and the thickness is determined according to the situation; then, a graph of the Bragg reflection layer 24 is manufactured through a photoetching mode; and secondly, generating a finally required pattern film layer of the Bragg reflection layer 24 by utilizing dry etching.

S4: forming a first electrode 22 on the mesa and a second electrode 23 on the surface of the second-type semiconductor layer 213, as shown in fig. 10(d), it can be seen that the surface of the second electrode 23 facing the second-type semiconductor layer 213 includes a first region and a second region, and the second region surrounds the first region;

wherein the first region is in contact with the surface of the second type semiconductor layer 213, a gap exists between the second region and the surface of the second type semiconductor layer 213, and the bragg reflector layer 24 is at least partially located in the gap.

Specifically, as shown in fig. 10(d), a wire electrode pattern is formed by negative photoresist lithography and metal stripping, so that the first electrode 22 is formed on the mesa, and the second electrode 23 is formed on the surface of the second-type semiconductor layer 213.

As can be seen, in the LED chip manufactured by the method for manufacturing an LED chip provided in the embodiment of the present application, as shown in fig. 10(d), when light emitted from the multiple quantum well layer 212 is directed to the second electrode 23, the light can be reflected by the bragg reflection layer 24 located between the second electrode 23 and the second type semiconductor layer 213, and the bragg reflection layer 24 has a high reflectivity for light, so that the reflection of the second electrode for light is improved, the absorption and shielding of the second electrode for light are reduced, and the light efficiency of the LED chip is further improved. Even if the second electrode 23 includes the stacked structure shown in fig. 1, which is composed of the ohmic contact layer 10, the Al reflective layer 11, the barrier layer 12 and the Au extension layer 13, when the second electrode 23 is coated on the side of the Al reflective layer 11 due to the plating on the side of the internal barrier layer 12 to reduce the reflection of light, the second electrode can be reflected by the bragg reflective layer 24 located between the second electrode 23 and the second type semiconductor layer 213, so as to compensate the reduced reflection of light due to the coating on the side of the Al reflective layer due to the plating on the side of the internal barrier layer of the second electrode, improve the reflection of light by the second electrode, and further improve the light efficiency of the LED chip.

It should be noted that, in practical applications, since the resistivity of the second type semiconductor layer (such as P type GaN layer) is usually high, the current cannot be uniformly distributed in the second type semiconductor layer, but most of the current is localized in the second type semiconductor layer region opposite to the second electrode, so that the current is congested in this region, which affects the uniformity of the light emitting intensity of the LED chip, for this reason, on the basis of the above embodiments, in an embodiment of the present application, as shown in fig. 9, after the light emitting structure 21 is formed, that is, on the basis of fig. 10(b), the method further includes:

s5: a current blocking layer 25 is formed on the second-type semiconductor layer 213 facing away from the substrate 20, and the current blocking layer 25 has a first through hole, as shown in fig. 11(a) and 12 (a).

S6: forming a current spreading layer 26 on a side of the current blocking layer 25 facing away from the second type semiconductor layer 213 and a part of the surface of the second type semiconductor layer 213, wherein the current spreading layer 26 has a second through hole, and the second through hole is communicated with the first through hole, as shown in fig. 11(b) and 12 (b).

Specifically, continuing as shown in fig. 11(a) and 12(a), first, a chemical vapor deposition apparatus (Chemi) is usedcal Vapor Deposition apparatus) a single layer of 2 μm thick SiO is deposited on the side of the semiconductor layer 213 of the second type facing away from the substrate 20₂The layer is used as the current blocking layer 25, but the thickness of the current blocking layer 25 is not limited in the present application, as the case may be; then, a pattern of the current blocking layer 25 is manufactured by a photoetching method; next, a pattern film layer of the current blocking layer 25 is formed by wet etching.

Similarly, as shown in fig. 11(b) and fig. 12(b) again, first, an ITO film layer is evaporated on the side of the current blocking layer 25 away from the substrate 20 and the surface of the second type semiconductor layer 213 as the current spreading layer 26; then, a pattern of the current spreading layer 26 is made by a photoetching method; next, a pattern film layer of the current spreading layer 26 is formed by etching.

In the embodiment of the present application, the current blocking layer 25 is located between the second type semiconductor layer 213 and the second electrode 23, partially located in the gap, and partially extending out of the gap; the current spreading layer 26 is located between the current blocking layer 25 and the second electrode 23, partially located in the gap, partially extending to the outside of the gap and covering a part of the surface of the second type semiconductor layer 213.

It should be noted that, the current blocking layer 25, the current spreading layer 26 and the bragg reflector layer 24 are included in the gap between the second electrode 23 and the second type semiconductor layer 213, and the current spreading layer 26 is located between the current blocking layer 25 and the second electrode 23 due to the functional relationship between the current blocking layer 25 and the current spreading layer 26, but the present application does not limit the specific location of the bragg reflector layer 24 in the gap, as the case may be.

Optionally, in an embodiment of the present application, the bragg reflector layer 24 is located between the current spreading layer 26 and the second electrode 23. Specifically, as shown in fig. 11(c), the bragg reflector layer 24 is formed on the surface of the current spreading layer 26; as shown in fig. 11(d), when the second electrode 23 is formed, the second electrode 23 is in contact with the surface of the second-type semiconductor layer through the second via hole and the first via hole in this order. At this time, as shown in fig. 11(d), the current blocking layer 25, the current spreading layer 26, and the bragg reflector 24 are sequentially formed in the gap in a direction away from the second-type semiconductor layer 213.

Optionally, in another embodiment of the present application, the bragg reflector layer 24 and the current spreading layer 26 are the same layer, that is, in the same layer, one part is the bragg reflector layer 24, and the other part is the current spreading layer 26. Specifically, as shown in fig. 12(b), when the current spreading layer 26 is formed, in addition to forming the second through hole on the current spreading layer 26, a plurality of holes are formed on the current spreading layer 26; as shown in fig. 12(c), when the bragg reflector layer 24 is formed, the bragg reflector layer 24 intermittently fills the holes; as shown in fig. 12(d), when the second electrode 23 is formed, the second electrode 23 is in contact with the surface of the second-type semiconductor layer through the second via hole and the first via hole in this order. At this time, as shown in fig. 12(d), the current blocking layer 25, the bragg reflector layer 24 and the current spreading layer 26 are sequentially located in the gap in a direction away from the second-type semiconductor layer 213.

Optionally, in other embodiments of the present application, the bragg reflector 24 may be located between the current blocking layer 25 and the current spreading layer 26, and in this case, in the gap, in a direction away from the second type semiconductor layer 213, the current blocking layer 25, the bragg reflector 24, and the current spreading layer 26 are sequentially located; the bragg reflector 24 may be the same as the current blocking layer 25, that is, in the same layer, a part of the bragg reflector 24 is the current blocking layer 25, and another part of the bragg reflector is the current blocking layer 25, in this case, the current blocking layer 25 and the bragg reflector 24 which are located in the same layer, and the current spreading layer 26 are sequentially located in the gap along a direction away from the second type semiconductor layer 213; the bragg reflector 24 may also be located between the current blocking layer 25 and the second type semiconductor layer 213, and in this case, the bragg reflector 24, the current blocking layer 25, and the current spreading layer 26 are sequentially located in the gap along a direction away from the second type semiconductor layer 213.

In the above embodiments, no matter where the bragg reflector 24 is located in the gap, when the light emitted from the mqw layer 212 is directed to the second electrode 23, the light can be reflected by the bragg reflector 24 located in the gap more or less, so as to improve the reflection of the light by the second electrode, reduce the absorption and shielding of the light by the second electrode, and further improve the light efficiency of the LED chip. When the position of the bragg reflector 24 in the gap changes, the process steps for manufacturing the bragg reflector 24 and the associated current blocking layer 25 and current spreading layer 26 may be changed accordingly.

When the method provided by the embodiment of the present application is used to manufacture an LED chip, a bragg reflection layer 24 with high reflectivity needs to be added in the gap between the second electrode 23 and the second type semiconductor layer 213 to reduce the absorption and shielding of the second electrode to light, and therefore, the specific structure of the second electrode needs to be considered in the design of the position of the bragg reflection layer in the gap.

Alternatively, in an embodiment of the present application, as shown in fig. 11(d) again, the second electrode 23 includes a pad electrode 231. Specifically, fig. 4 shows a schematic top view of the first electrode and the second electrode both being pad electrodes in the method for manufacturing an LED chip provided in the embodiment of the present application. It is understood that the absorption and shielding of light by the pad electrode 231 mainly occurs at its bottom edge portion. Also, if the pad electrode 231 includes the stacked structure of the ohmic contact layer 10, the Al reflective layer 11, the barrier layer 12, and the Au extension layer 13 shown in fig. 1, the problem of reflection of light, which is reduced by the side edge of the Al reflective layer 11 inside the pad electrode 231 being coated due to plating on the side of the internal barrier layer 12, is mainly concentrated on the bottom edge portion thereof.

Since the gap between the pad electrode 231 and the second-type semiconductor layer 213 is narrow, in view of achieving a significant improvement in the reflectivity of the pad electrode 231 with the simplest possible process steps, in an embodiment of the present application, the method optionally forms the bragg reflector 24 on a part of the surface of the current spreading layer 26, and the bragg reflector 24 has a third via, and the third via is communicated with the second via, as shown in fig. 11 (c).

Next, when the second electrode 23 is formed, that is, when the pad electrode 231 is formed, the second electrode 23 is in contact with the surface of the second-type semiconductor layer 213 through the third via hole, the second via hole, and the first via hole in this order, as shown in fig. 11 (d).

In the embodiment of the present application, the current blocking layer 25 is located on a portion of the surface of the second type semiconductor layer 213, partially located in the gap between the second electrode 24 and the second type semiconductor layer 213, and partially extending out of the gap; the current spreading layer 26 is located between the current blocking layer 25 and the second electrode 23, partially located in the gap, partially extending to the outside of the gap and covering a part of the surface of the second type semiconductor layer 213; the bragg reflector 24 is located between the current spreading layer 26 and the second electrode 23, partially located in the gap, and partially extending to the outside of the gap to cover a part of the surface of the current spreading layer 26.

Therefore, in the preparation method of the LED chip provided in the embodiment of the present application, the bragg reflection layer 24 is added at the bottom edge of the pad electrode 231, so that the absorption and shielding of the pad electrode 231 to light are reduced, the reflection effect of the pad electrode 231 to light is increased, and the light efficiency of the LED chip is further improved.

Alternatively, in another embodiment of the present application, in order to further improve the uniformity of the distribution of the current flowing from the second electrode 23 in the current spreading layer 26, as shown in fig. 12(d), the second electrode 23 includes not only the pad electrode 231 but also the finger electrode 232 extending from the pad electrode 231 in a direction parallel to the extending direction of the current spreading layer 26. Specifically, fig. 6 shows a schematic top view that the first electrode and the second electrode both include a pad electrode and a finger electrode in the method for manufacturing an LED chip provided in the embodiment of the present application, and it can be seen that the second electrode 23 increases a contact area between the second electrode 23 and the current spreading layer 26 by using the finger electrode 232, so that after a current flowing from the finger electrode 232 flows into the current spreading layer 26, the current can be distributed more uniformly in the current spreading layer 26, and thus the luminous intensity of the LED chip is more uniform.

Therefore, optionally, in an embodiment of the present application, as shown in fig. 12(d) again, the bragg reflector 24 is located between the finger electrode 232 and the second-type semiconductor layer 213.

Therefore, optionally, in an embodiment of the present application, in the forming of the current spreading layer 26, in addition to making the current spreading layer 26 have the second through hole, a plurality of holes are formed on the current spreading layer 26 along the extending direction thereof, as shown in fig. 12 (b).

When the bragg reflector layer 24 is formed, specifically, the bragg reflector layer 24 is formed on a part of the surface of the current blocking layer 25, so that the bragg reflector layer 24 intermittently fills the plurality of holes, as shown in fig. 12 (c).

It should be noted that, the number, width and interval of the holes are not limited in the present application, as the case may be.

Next, when the second electrode 23 is formed, specifically, the pad electrode 231 is in contact with the surface of the second type semiconductor layer 213 through the second via hole and the first via hole in this order, and the finger electrode is formed by the pad electrode 231 in a direction parallel to the extending direction of the current spreading layer 26, so that the finger electrode 232 is located on the surface of the bragg reflection layer 24 and on a part of the surface of the current spreading layer 26.

In the embodiment of the present application, the current blocking layer 25 is located on a portion of the surface of the second type semiconductor layer 213, partially located in the gap between the second electrode 23 and the second type semiconductor layer 213, and partially extending out of the gap; the current spreading layer 26 is located between the current blocking layer 25 and the second electrode 23, partially located in the gap, partially extending to the outside of the gap and covering a part of the surface of the second type semiconductor layer 213, and the part of the current spreading layer 26 located between the finger electrode 232 and the current blocking layer 25 has a plurality of holes; the bragg reflector layer 24 is located within the plurality of holes to make the LED chip (particularly the finger electrodes 232 portion thereof) more stable.

Therefore, in the preparation method of the LED chip provided in the embodiment of the present application, the bragg reflection layer 24 is filled in the plurality of holes of the current expansion layer 26 at the bottom of the finger-shaped electrode 232, so that absorption and shielding of the finger-shaped electrode 232 on light are reduced, the reflection effect of the finger-shaped electrode 232 on light is increased, and further, the light efficiency of the LED chip is improved.

On the basis of any one of the above embodiments, in an embodiment of the present application, to protect the LED chip, the method further includes:

s7: a passivation layer 27 is formed to cover the surface of the LED chip and to expose the first and second electrodes, as shown in fig. 11(e) and 12 (e).

Optionally, the passivation layer 27 is SiO₂The present application is not limited to the above-described layer, and the layer may be optionally formed. Specifically, as shown in fig. 11(e) and 12(e), a layer of SiO is deposited on the entire surface of the LED chip₂The layer acts as a passivation layer 27 protecting the chip surface and exposing the first electrode 22 and the second electrode 23.

To sum up, the LED chip provided in the embodiment of the present application includes: a substrate; the light-emitting structure is positioned on the surface of the substrate, and the light-emitting structure sequentially comprises the following components in the direction deviating from the substrate: the semiconductor device comprises a first type semiconductor layer, a multi-quantum well layer and a second type semiconductor layer, wherein the multi-quantum well layer and the second type semiconductor layer are exposed to a part of the first type semiconductor layer to form a table top; a first electrode on the mesa; the second electrode is positioned on the surface of the second type semiconductor layer, the surface of the second electrode facing the second type semiconductor layer comprises a first area and a second area, the second area surrounds the first area, the first area is in contact with the surface of the second type semiconductor layer, and a gap exists between the second area and the surface of the second type semiconductor layer; a Bragg reflector layer at least partially within the gap. Therefore, in the LED chip provided in the embodiment of the present application, when light emitted from the multiple quantum well layer is directed to the second electrode, the light can be reflected by the bragg reflection layer between the second electrode and the second type semiconductor layer, so that reflection of the second electrode to light is improved, absorption and shielding of the second electrode to light are reduced, and further, the light efficiency of the LED chip is improved.

All parts in the specification are described in a mode of combining parallel and progressive, each part is mainly described to be different from other parts, and the same and similar parts among all parts can be referred to each other.

In the above description of the disclosed embodiments, features described in various embodiments in this specification can be substituted for or combined with each other to enable those skilled in the art to make or use the present application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the application. Thus, the present application is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. An LED chip, comprising:

a substrate;

a first electrode on the mesa;

a Bragg reflector layer at least partially within the gap.

2. The LED chip of claim 1, further comprising:

3. The LED chip of claim 2, wherein said second electrode comprises a pad electrode, said bragg reflector layer is located between said current spreading layer and said second electrode, partially within said gap, and partially extending outside said gap to cover a surface of a portion of said current spreading layer, said bragg reflector layer having a third via, said third via being in communication with said second via;

4. The LED chip of claim 2, wherein said second electrode comprises a pad electrode and a finger electrode extending from said pad electrode in a direction parallel to the direction of extension of said current spreading layer, said bragg reflector layer being located between said finger electrode and said second type semiconductor layer.

5. The LED chip of claim 4, wherein the portion of the current spreading layer between the finger electrode and the current blocking layer has a plurality of holes, and the Bragg reflector layer is located in the plurality of holes.

6. The LED chip of any of claims 1-5, further comprising:

7. The LED chip of claim 1, wherein said bragg reflector layer is SiO₂Layer and Ti₃O₅Alternating layers of layers.

8. A preparation method of an LED chip is characterized by comprising the following steps:

providing a substrate;

9. The method of manufacturing an LED chip according to claim 8, wherein after the forming the light emitting structure, the method further comprises:

10. The method for manufacturing an LED chip according to claim 8 or 9, further comprising: