CN113543411A - Current limiting circuit and application thereof - Google Patents

Current limiting circuit and application thereof Download PDF

Info

Publication number
CN113543411A
CN113543411A CN202110634746.8A CN202110634746A CN113543411A CN 113543411 A CN113543411 A CN 113543411A CN 202110634746 A CN202110634746 A CN 202110634746A CN 113543411 A CN113543411 A CN 113543411A
Authority
CN
China
Prior art keywords
signal
voltage
resistor
input end
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN202110634746.8A
Other languages
Chinese (zh)
Other versions
CN113543411B (en
Inventor
不公告发明人
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shenzhen Nanyun Microelectronics Co ltd
Original Assignee
Shenzhen Nanyun Microelectronics Co ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shenzhen Nanyun Microelectronics Co ltd filed Critical Shenzhen Nanyun Microelectronics Co ltd
Priority to CN202110634746.8A priority Critical patent/CN113543411B/en
Publication of CN113543411A publication Critical patent/CN113543411A/en
Application granted granted Critical
Publication of CN113543411B publication Critical patent/CN113543411B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
    • H05B45/00—Circuit arrangements for operating light-emitting diodes [LED]
    • H05B45/30—Driver circuits
    • H05B45/36—Circuits for reducing or suppressing harmonics, ripples or electromagnetic interferences [EMI]
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
    • H05B45/00—Circuit arrangements for operating light-emitting diodes [LED]
    • H05B45/30—Driver circuits
    • H05B45/345—Current stabilisation; Maintaining constant current
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B20/00—Energy efficient lighting technologies, e.g. halogen lamps or gas discharge lamps
    • Y02B20/40—Control techniques providing energy savings, e.g. smart controller or presence detection

Landscapes

  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Circuit Arrangement For Electric Light Sources In General (AREA)

Abstract

The invention relates to a current limiting circuit and application thereof, the current limiting circuit is used for limiting the charging current of an output capacitor of a linear silicon controlled dimming LED driver, the conception of the invention is that the voltage value of the negative output end of the linear silicon controlled dimming LED driver is sampled and correspondingly controlled at the time of zero crossing of the voltage of a power grid or the time of starting charging of the output capacitor: and if the minimum value of the sampling voltage is smaller than the lowest threshold value, the output capacitor charging current is increased, if the minimum value of the sampling voltage is larger than the highest threshold value, the output capacitor charging current is reduced, and if the minimum value of the sampling voltage is larger than the highest threshold value, the output capacitor charging current is maintained unchanged. The invention can ensure that the lowest voltage of the charging capacitor is not lower than the voltage at two ends of the LED, and realizes that the current output by the LED driver has no ripple wave; meanwhile, the lowest voltage of the charging capacitor is not too high, the power factor PF and efficiency of the linear silicon controlled dimming LED driver can be relatively compromised, and the current output by the LED driver has the optimal configuration effect without ripples.

Description

Current limiting circuit and application thereof
Technical Field
The invention relates to a current limiting circuit which is applied to a linear silicon controlled rectifier dimming LED driver.
Background
The invention discloses a silicon controlled dimmer, which is used for realizing illumination by heating a resistance wire to generate light, and adjusting the brightness of an incandescent lamp by adjusting the conduction angle of a silicon controlled to adjust the effective value of input voltage in order to meet the adjustment of the illumination brightness in different application occasions.
As the times have progressed, a Light Emitting Diode (LED) is widely used as a new light source because of its advantages of adjustable color, high light emitting efficiency, low power consumption, high reliability, and long life. The dimming mode of the LED light source has various modes, such as silicon controlled rectifier dimming, analog dimming, PWM dimming, switch dimming and the like, but the market share of the silicon controlled rectifier dimming LED lamp is very large because silicon controlled rectifier dimmers are installed in a plurality of early buildings, and the linear driving silicon controlled rectifier dimming mode has the advantages of simple circuit structure, no need of magnetic devices, low cost, good EMI (electro-magnetic interference), small volume and wide application.
An existing linear silicon controlled dimming LED driving system is shown in fig. 1, and the system includes a silicon controlled dimmer, a rectifier bridge, and a linear dimmable LED driver (hereinafter, referred to as LED driver), where one end of the silicon controlled dimmer is used to connect to 1 end of an AC input voltage AC of a power grid, and the other end of the silicon controlled dimmer is connected to an AC input end of the rectifier bridge, the other AC input end of the rectifier bridge is used to connect to 2 ends of the AC input voltage AC of the power grid, a positive dc output end of the rectifier bridge is connected to a positive input end of the LED driver, and a negative dc output end of the rectifier bridge is connected to a negative input end of the LED driver and then grounded.
The LED driver comprises a resistor R1, a current limiting unit 1, a diode D1, a current limiting unit 2 and an output capacitor C1; one end of the resistor R1 and the anode of the diode D1 are connected together to be used as a positive input end of the LED driver, the cathode of the diode D1 is used as a positive output end of the LED driver and is used for connecting the anode of the driven LED lamp string, the other end of the resistor R1 is connected with one end of the current limiting unit 1, one end of the current limiting unit 2 is used as a negative output end of the LED driver and is used for connecting the cathode of the driven LED lamp string, the other end of the current limiting unit 1 and the other end of the current limiting unit 2 are connected together to be used as a negative input end of the LED driver, the output capacitor C1 is connected between the positive output end and the negative output end of the LED driver in parallel, namely, one end of the output capacitor C1 is connected with the positive output end of the LED driver, and the other end of the output capacitor C1 is connected with the negative output end of the LED driver.
In fig. 1, the current limiting unit 1 is composed of a constant current module with a fixed reference or a variable reference, and is used for setting the magnitude of a leakage current, and is used together with a resistor R1 for maintaining the normal operation of the triac dimmer; the current limiting unit 2 consists of a constant current module with variable reference, the reference size of the constant current module is changed along with the conduction angle of the silicon controlled rectifier, and the constant current module is used for setting the LED driving current value; the diode D1 is used to prevent the discharging current in the output capacitor C1 from flowing through the current limiting unit 1, i.e. to ensure that the discharging current in the output capacitor C1 only passes through the branch with the current limiting unit 2; the output capacitor C1 is used for providing current for the LED when the bus voltage is lower than the LED string voltage.
In the system shown in fig. 1, since the voltages at the two dc output terminals of the rectifier bridge need to be greater than the voltage of the LED string to be driven, the LED has current flowing through it, so that the whole period of the system shows that the LED driving current has ripples, and the ripple will be improved by increasing the capacitance value of the output capacitor C1 connected in parallel with the LED, but the effect is not obvious, and the disadvantages of increased cost and volume of the output capacitor and prolonged startup time of the LED driver are brought.
Disclosure of Invention
In view of this, the present invention provides a current limiting circuit and an application thereof, which can eliminate ripples of an output current of a linear thyristor dimming LED driver without increasing the cost and the size of an output capacitor of the linear thyristor dimming LED driver.
The technical scheme for solving the problems is as follows:
the utility model provides a current-limiting circuit for limit linear silicon controlled rectifier adjusts luminance LED driver output capacitance's charging current which characterized in that: comprises a detection circuit and a control circuit;
the detection circuit is used for detecting the voltage zero-crossing time between the positive input end and the negative input end of the linear silicon controlled rectifier dimming LED driver or detecting the time when the output capacitor of the linear silicon controlled rectifier dimming LED driver starts to charge,
the control circuit is used for carrying out the following control according to a voltage value sampling signal VB2 of the negative output end of the linear silicon controlled rectifier dimming LED driver when detecting that the voltage between the positive input end and the negative input end of the linear silicon controlled rectifier dimming LED driver is zero or detecting that the output capacitor of the linear silicon controlled rectifier dimming LED driver starts to charge:
when the minimum value of the sampling signal VB2 is less than the minimum threshold value, increasing the charging current of the output capacitor;
when the minimum value of the sampling signal VB2 is larger than the highest threshold value, reducing the charging current of the output capacitor;
and when the minimum value of the minimum threshold value is less than or equal to the minimum value of the sampling signal VB2, the charging current of the output capacitor is kept unchanged.
As a first specific embodiment of the current limiting circuit, the current limiting circuit includes: the detection circuit is a zero-crossing detection module; the control circuit comprises a comparator 1, a comparator 2, a logic processing module, a reference regulating module and a constant current module;
the input end of the zero-crossing detection module is used for inputting a sampling signal VB1 of the voltage between the positive input end and the negative input end of the linear silicon controlled dimming LED driver, outputting a zero-crossing signal when the sampling signal VB1 is detected to be reduced from high voltage to low voltage, carrying out time-delay processing on the zero-crossing signal to obtain a zero-crossing reset signal Vzr, and carrying out pulse width processing on the zero-crossing reset signal to obtain a zero-crossing pulse signal Vzc;
the positive input end of the comparator 1 is used for inputting a reference voltage Vref1, the negative input end of the comparator 2 is used for inputting a reference voltage Vref2, the negative input end of the comparator 1 is connected with the positive input end of the comparator 2 and is used for inputting a sampling signal VB2 that the voltage at two ends of an output capacitor of the linear silicon controlled light-adjusting LED driver exceeds the voltage value at two ends of the positive output end and the negative output end of the linear silicon controlled light-adjusting LED driver, the output end of the comparator 1 outputs a result signal VL, and the output end of the comparator 2 outputs a result signal VH;
the logic processing module outputs a reference adjusting signal Vtz and a reference adjusting signal Vtj according to the zero-crossing reset signal Vzr, the zero-crossing pulse signal Vzc, the result signal VL and the result signal VH;
the reference adjusting module adjusts the size of the reference voltage Vref3 output by the reference adjusting module according to the reference adjusting signal Vtz and the reference adjusting signal Vtj, wherein the reference adjusting voltage Vref3 is increased when the level of the reference adjusting signal Vtz is inverted, and the reference adjusting voltage Vref3 is decreased when the level of the reference adjusting signal Vtj is inverted;
the constant current module provides a charging current according to a reference voltage Vref3, and is used for adjusting the magnitude of the charging current of the output capacitor of the linear silicon controlled dimming LED driver.
Further, when receiving the zero-crossing reset signal Vzr and the zero-crossing pulse signal Vzc, the logic processing module outputs the following logic:
when the level state of the resultant signal VL is high without the level inversion, the level of the reference adjustment signal Vtz is inverted and the level of the reference adjustment signal Vtj is maintained;
as a result, when the level of the signal VL is inverted and the level state is an arbitrary state, the level of the reference adjustment signal Vtz is inverted and the level of the reference adjustment signal Vtj is maintained;
as a result, when the level of the signal VH is not inverted and the level state is high, the level of the reference adjustment signal Vtz is maintained and the level of the reference adjustment signal Vtj is inverted;
as a result, when the level of the signal VH is inverted and the level state is any state, the levels of the reference adjustment signal Vtz and the reference adjustment signal Vtj are maintained.
As a specific implementation manner of the zero-crossing detection module, the zero-crossing detection module is characterized in that: the circuit comprises a comparator 3, a comparator 4, a resistor R2, a resistor R3, a capacitor C2, a capacitor C3, a diode D4 and a diode D5; the negative input end of the comparator 3 is used for inputting a sampling signal VB1, the positive input end of the comparator 3 is used for inputting a reference voltage Vref4, the output end of the comparator 3 is simultaneously connected with one end of a resistor R2 and one end of a capacitor C3, the other end of the resistor R2 is connected with one end of a capacitor C2, a zero-crossing reset signal Vzr is output, and the other end of the capacitor C2 is grounded; the other end of the capacitor C3 is connected to the cathode of the diode D4 and the anode of the diode D5, the anode of the diode D4 is connected to one end of the resistor R3 and the ground, the cathode of the diode D5 is connected to the other end of the resistor R3 and the positive input end of the comparator 4, the negative input end of the comparator 4 is used for inputting the reference voltage Vref5, and the output end of the comparator 4 outputs the zero-crossing pulse signal Vzc.
As a specific implementation manner of the logic processing module, the logic processing module is characterized in that: the system comprises a D trigger 1, a D trigger 2, an OR gate 1, an AND gate 2 and an AND gate 3; the R end of the D trigger 1 and the R end of the D trigger 2 are connected together and used for inputting a zero-crossing reset signal Vzr, the first input end of the AND gate 1 and the first input end of the AND gate 3 are connected together and used for inputting a zero-crossing pulse signal point Vzc, and the D end of the D trigger 1 and the D end of the D trigger 2 are connected together and used for inputting a power supply voltage VCC; the CP end of the D trigger 1 and the first input end of the OR gate 1 are connected together for inputting a result signal VL, the second input end of the OR gate 1 is connected with the Q end of the D trigger 1, the output end of the OR gate 1 is connected with the second input end of the AND gate 1, and the output end of the AND gate 1 outputs a reference adjusting signal Vtz; the CP end of the D flip-flop 2 is connected to the first input end of the and gate 2 for inputting the result signal VH, the second input end of the and gate 2 is connected to the QN end of the D flip-flop 2, the output end of the and gate 2 is connected to the second input end of the and gate 3, and the output end of the and gate 3 outputs the reference adjusting signal Vtj.
As a specific implementation manner of the above-mentioned reference adjusting module, the following features are provided: the bidirectional counter comprises a bidirectional counter, a voltage-controlled current source 1, a voltage-controlled current source 2, a voltage-controlled current source 3, a voltage-controlled current source 4 and a resistor R6; the UP input end of the UP counter inputs a reference adjusting signal Vtz, the DOWN input end of the UP counter inputs a reference adjusting signal Vtj, the output end Q0 of the UP counter is connected with the voltage control end of the voltage controlled current source 1, the output end Q1 of the UP counter is connected with the voltage control end of the voltage controlled current source 2, the output end Q2 of the UP counter is connected with the voltage control end of the voltage controlled current source 3, the output end Q3 of the UP counter is connected with the voltage control end of the voltage controlled current source 4, the power supply end of the 4 voltage controlled current sources is used for inputting a power supply voltage VCC, the reference end of the 4 voltage controlled current sources is connected with GND, the current output end of the 4 voltage controlled current sources and one end of the resistor R6 are connected together and then output a reference voltage Vref3, and the other end of the resistor R6 is grounded.
As a specific implementation manner of the constant current module, the constant current module is characterized in that: the constant current source circuit comprises an MOS (metal oxide semiconductor) tube S1, an operational amplifier 1 and a resistor R7, wherein a positive input end of the operational amplifier 1 inputs a reference voltage Vref3, a negative input end of the operational amplifier 1 is simultaneously connected with one end of the resistor R7 and a source electrode of the MOS tube S1, an output end of the operational amplifier 1 is connected with a grid electrode of the MOS tube S1, a drain electrode of the MOS tube S1 is an input end of a constant current module and used for providing charging current, and the other end of the resistor R7 is an output end of the constant current module and used for grounding.
The present invention also provides an application of the first specific implementation mode and the further implementation mode of the current limiting circuit in a linear silicon controlled dimming LED driver, and is characterized in that the current limiting circuit further comprises: a resistor RH1, a resistor RL1, a resistor RH2, a resistor RL2, a diode D2 and a diode D3; one end of a resistor RH1 is connected with the positive input end of the linear thyristor dimming LED driver, the other end of the resistor RH1 is connected with one end of a resistor RL1 and used for outputting a sampling signal VB1, one end of a resistor RH2 is connected with the negative output end of the linear thyristor dimming LED driver, and the other end of a resistor RH2 is connected with one end of a resistor RL2 and used for outputting a sampling signal VB 2; the other end of the resistor RL1, the other end of the resistor RL2, the output end of the constant current module and the anode of the diode D3 are grounded at the same time; the cathode of the diode D2 is connected to the input end of the constant current module, and the anode of the diode D2 and the cathode of the diode D3 are connected together and then connected to the positive output end of the linear thyristor dimming LED driver through the output capacitor of the linear thyristor dimming LED driver.
As a first specific embodiment of the current limiting circuit, the current limiting circuit includes: the detection circuit is a capacitance current detection module; the control circuit comprises a resistor R2, a capacitor C2, a comparator 1, a comparator 2, a logic processing module, a reference adjusting module and a constant current module;
the input end of the capacitance current detection module is used for inputting a sampling signal Vcy of the linear silicon controlled dimming LED driver for outputting capacitance charging current, and when the sampling signal Vcy is detected to be increased, a charging signal Vyd for starting charging of a capacitor is output;
one end of the resistor R2 is used for inputting a sampling signal VB2 of which the voltage at two ends of an output capacitor of the linear silicon controlled rectifier dimming LED driver exceeds the voltage values at two ends of a positive output end and a negative output end of the linear silicon controlled rectifier dimming LED driver, the other end of the resistor R2 is simultaneously connected with one end of the capacitor C2, a negative input end of the comparator 1 and a positive input end of the comparator 2, the other end of the capacitor C2 is grounded, the positive input end of the comparator 1 is used for inputting a reference voltage Vref1, the negative input end of the comparator 2 is used for inputting a reference voltage Vref2, the output end of the comparator 1 outputs a result signal VL, and the output end of the comparator 2 outputs a result signal VH;
the logic processing module outputs a reference adjusting signal Vtz and a reference adjusting signal Vtj according to the charging signal Vyd, the result signal VL and the result signal VH;
the reference adjusting module adjusts the size of the reference voltage Vref3 output by the reference adjusting module according to the reference adjusting signal Vtz and the reference adjusting signal Vtj, wherein the reference adjusting voltage Vref3 is increased when the level of the reference adjusting signal Vtz is inverted, and the reference adjusting voltage Vref3 is decreased when the level of the reference adjusting signal Vtj is inverted;
the constant current module provides a charging current according to a reference voltage Vref3, and is used for adjusting the magnitude of the charging current of the output capacitor of the linear silicon controlled dimming LED driver.
Further, when receiving the charging signal Vyd, the logic processing module outputs the following logic:
when the result signal VH is at a high level and the result signal VL is at a low level, the level of the reference adjustment signal Vtj is inverted, and the level of the reference adjustment signal Vtz is maintained;
when the result signal VH is at a low level and the result signal VL is at a high level, the level of the reference adjustment signal Vtz is inverted, and the level of the reference adjustment signal Vtj is maintained unchanged;
when the result signal VH is at a low level and the result signal VL is at a low level, the levels of the reference adjustment signal Vtz and the reference adjustment signal Vtj are both maintained.
As a specific implementation manner of the capacitance current detection module, the capacitance current detection module is characterized in that: the circuit comprises a comparator 3, a comparator 4, a resistor R3, a capacitor C3, a diode D4 and a diode D5; the negative input end of the comparator 3 is used for inputting a reference voltage Vref4, the positive input end of the comparator 3 is used for inputting a sampling signal Vcy, the output end of the comparator 3 is connected with one end of a capacitor C3, the other end of the capacitor C3 is simultaneously connected with the cathode of a diode D4 and the anode of a diode D5, the anode of a diode D4 is simultaneously connected with one end of a resistor R3 and the ground, the cathode of the diode D5 is simultaneously connected with the other end of the resistor R3 and the positive input end of the comparator 4, the negative input end of the comparator 4 is used for inputting a reference voltage Vref5, and the output end of the comparator 4 outputs a charging signal Vyd.
As a specific implementation manner of the logic processing module, the logic processing module is characterized in that: the charge control circuit comprises an AND gate 1 and an AND gate 2, wherein a first input end of the AND gate 1 is connected with a first input end of the AND gate 2 and used for inputting a charging signal Vyd, a second input end of the AND gate 1 is used for inputting a result signal VL, a second input end of the AND gate 2 is used for inputting a result signal VH, an output end of the AND gate 1 outputs a reference adjusting signal Vtz, and an output end of the AND gate 2 outputs a reference adjusting signal Vtj.
As a specific implementation manner of the above-mentioned reference adjusting module, the following features are provided: the bidirectional counter comprises a bidirectional counter, a voltage-controlled current source 1, a voltage-controlled current source 2, a voltage-controlled current source 3, a voltage-controlled current source 4 and a resistor R6; the UP input end of the UP counter inputs a reference adjusting signal Vtz, the DOWN input end of the UP counter inputs a reference adjusting signal Vtj, the output end Q0 of the UP counter is connected with the voltage control end of the voltage controlled current source 1, the output end Q1 of the UP counter is connected with the voltage control end of the voltage controlled current source 2, the output end Q2 of the UP counter is connected with the voltage control end of the voltage controlled current source 3, the output end Q3 of the UP counter is connected with the voltage control end of the voltage controlled current source 4, the power supply end of the 4 voltage controlled current sources is used for inputting a power supply voltage VCC, the reference end of the 4 voltage controlled current sources is connected with GND, the current output end of the 4 voltage controlled current sources and one end of the resistor R6 are connected together and then output a reference voltage Vref3, and the other end of the resistor R6 is grounded.
As a specific implementation manner of the constant current module, the constant current module is characterized in that: the constant current circuit comprises an MOS transistor S1, an operational amplifier 1 and a resistor R7, wherein a reference voltage Vref3 is input to a positive input end of the operational amplifier 1, a negative input end of the operational amplifier 1, one end of the resistor R7 and a source electrode of the MOS transistor S1 are connected together to output a sampling signal Vcy, an output end of the operational amplifier 1 is connected with a grid electrode of the MOS transistor S1, a drain electrode of the MOS transistor S1 is an input end of a constant current module and used for providing charging current, and the other end of the resistor R7 is an output end of the constant current module and used for grounding.
The present invention also provides a first specific implementation of the current limiting circuit and an application of the first specific implementation of the current limiting circuit to a linear thyristor dimming LED driver, and is characterized by further comprising: a resistor RH1, a resistor RL1, a resistor RH2, a resistor RL2, a diode D2 and a diode D3; one end of a resistor RH1 is connected with the positive input end of the linear thyristor dimming LED driver, the other end of the resistor RH1 is connected with one end of a resistor RL1 and used for outputting a sampling signal VB1, one end of a resistor RH2 is connected with the negative output end of the linear thyristor dimming LED driver, and the other end of a resistor RH2 is connected with one end of a resistor RL2 and used for outputting a sampling signal VB 2; the other end of the resistor RL1, the other end of the resistor RL2, the output end of the constant current module and the anode of the diode D3 are grounded at the same time; the cathode of the diode D2 is connected to the input end of the constant current module, and the anode of the diode D2 and the cathode of the diode D3 are connected together and then connected to the positive output end of the linear thyristor dimming LED driver through the output capacitor of the linear thyristor dimming LED driver.
Description of the meaning of the terms:
bus voltage: the linear silicon controlled dimming LED driver is also called as power grid voltage, and refers to the voltage of two direct current output ends of a rectifier bridge, when the alternating current input voltage AC of a power grid crosses zero, the bus voltage also crosses zero, and the voltage between the positive input end and the negative input end of the linear silicon controlled dimming LED driver also crosses zero.
The working principle of the invention is analyzed in detail by combining with the specific embodiment, and the invention has the advantages that:
1. the lowest voltage of a charging capacitor in the linear silicon controlled dimming LED driver is controlled not to be lower than the voltage at two ends of the LED, so that the current output by the LED driver has no ripple waves;
2. the lowest voltage of a charging capacitor in the linear silicon controlled dimming LED driver is not too high, so that the optimal configuration effect that the power factor PF and the efficiency of the linear silicon controlled dimming LED driver are relatively compromised and the current output by the LED driver has no ripple can be obtained.
Drawings
Fig. 1 is a schematic diagram of a conventional linear thyristor dimming LED driving system;
FIG. 2 is a schematic diagram of a current limiting circuit according to a first embodiment of the present invention;
FIG. 3 is a schematic block diagram of a first embodiment of a current limiting circuit according to the present invention;
FIG. 4 is a schematic diagram of a zero crossing detection module and a logic processing module according to a first embodiment of the present invention;
FIG. 5 is a schematic diagram of a reference regulation module and a constant current module according to a first embodiment of the present invention;
FIG. 6 is a timing diagram illustrating the operation of the first embodiment of the present invention;
FIG. 7 is a schematic diagram of a current limiting circuit according to a second embodiment of the present invention;
FIG. 8 is a schematic block diagram of a second embodiment of a current limiting circuit according to the present invention;
FIG. 9 is a schematic diagram of a capacitive current sensing module and a logic processing module according to a second embodiment of the present invention;
FIG. 10 is a schematic diagram of a reference regulation module and a constant current module according to a second embodiment of the present invention;
FIG. 11 is a timing diagram illustrating operation of the second embodiment of the present invention.
Detailed Description
The present invention is described in detail below with reference to embodiments and drawings thereof to help those skilled in the art to better understand the inventive concept of the present invention, but the scope of the claims of the present invention is not limited to the following embodiments, and it will be apparent to those skilled in the art that all other embodiments obtained without inventive efforts fall within the scope of the present invention.
First embodiment
Fig. 2 is a schematic diagram of a current limiting circuit according to a first embodiment of the present invention, and fig. 3 is an application schematic block diagram of the current limiting circuit according to the first embodiment of the present invention, where the current limiting circuit according to the present embodiment includes: the device comprises a zero-crossing detection module, a comparator 1, a comparator 2, a logic processing module, a reference regulation module and a constant current module; the peripheral circuit when this embodiment is applied to in linear silicon controlled rectifier LED driver includes: resistance RH1, resistance RL1, resistance RH2, resistance RL2, diode D2, and diode D3.
One end of a resistor RH1 is connected with the positive input end of the linear thyristor dimming LED driver, the other end of the resistor RH1 is connected with one end of a resistor RL1 and used for outputting a sampling signal VB1, one end of a resistor RH2 is connected with the negative output end of the linear thyristor dimming LED driver, and the other end of a resistor RH2 is connected with one end of a resistor RL2 and used for outputting a sampling signal VB 2; the other end of the resistor RL1, the other end of the resistor RL2, the output end of the constant current module and the anode of the diode D3 are grounded at the same time; the cathode of the diode D2 is connected with the input end of the constant current module, the anode of the diode D2 is connected with the cathode of the diode D3, and then the anode is connected to the positive output end of the linear thyristor dimming LED driver through the output capacitor of the linear thyristor dimming LED driver; the diode D2 is used for preventing the discharge current from flowing through the constant current module during the discharge of the output capacitor C1, so that the discharge current returns to the negative end of the capacitor from the diode D3 after passing through the LED; the diode D3 functions to provide a current return path for the discharge current through the LED back to the negative terminal of the capacitor during discharge of the output capacitor C1.
The working principle of the embodiment is as follows:
when the controllable dimmer is connected to a power grid, the capacitor in the controllable dimmer charges, the bus voltage begins to rise, the capacitor in the controllable dimmer charges enough to break down the bidirectional voltage stabilizing diode in the controllable dimmer, and therefore the thyristor in the controllable dimmer is triggered to be conducted, and during the conduction period of the thyristor in the controllable dimmer, the current limiting unit 1 provides a maintaining current, so that the thyristor cannot be abnormally turned off.
The bus voltage is divided by voltage dividing resistors RH1 and RL1 to obtain a sampling signal VB1, the sampling signal VB1 is input to the zero-crossing detection module, when the zero-crossing detection module detects that the sampling signal VB1 is reduced from high voltage to low voltage, a zero-crossing signal is output, a zero-crossing reset signal Vzr is obtained after time delay, a zero-crossing pulse signal Vzc is obtained after pulse width processing, and the Vzr and Vzc are sent to the logic processing module.
The voltage value of the negative output end of the linear silicon controlled dimming LED driver is divided by the voltage dividing resistors RH2 and RL2 to obtain a sampling signal VB2, since one end of the output capacitor C1 is connected to the positive output terminal of the triac dimming LED driver, the other end of the output capacitor C1 is connected to the negative output terminal of the triac dimming LED driver through the resistors RH2 and RL2 and the diode D3, therefore, the sampled signal VB2 can reflect the value that the voltage across the capacitor C1 exceeds the voltage across the LED, the sampled signal VB2 is input to the negative input terminal of the comparator 1, compared with the reference voltage Vref1 input from the positive input terminal of the comparator 1 to obtain a result signal VL, the sampling signal VB2 is also input to the positive input terminal of the comparator 2, and comparing the comparison result with the reference voltage Vref2 input from the negative input end of the comparator 2 to obtain a result signal VH, and inputting the two comparison result signals to the logic processing module.
The logic processing module will settle the VH and VL level inversion condition temporarily at the zero crossing signal, and combine the level state of VH and VL at settlement time to obtain the reference adjusting signals Vtz and Vtj, and the specific drain relation is as follows:
Figure BDA0003105085250000081
Figure BDA0003105085250000091
when the Vtz level is inverted, the reference voltage Vref3 outputted by the first gear is increased by the reference adjusting module, when the Vtj level is inverted, the reference voltage Vref3 outputted by the first gear is decreased by the reference adjusting module, and finally the reference voltage Vref3 is outputted to the constant current module to serve as an adjusting reference, so that the charging current of the capacitor C1 is adjusted.
After appropriate reference voltage tables Vref1 and Vref2 are selected, the lowest voltage value of the two ends of the capacitor C1 can be ensured not to be smaller than the voltage value of the two ends of the LED, so that the LED has no current ripple; the voltage across the capacitor C1 does not exceed the voltage across the LED so much that the current distortion is limited and the power factor PF is higher than it would be without limiting the charging current.
It should be noted that, the current limiting circuit of this embodiment has a slight decrease in efficiency after being applied to the scr dimming LED driver, but finally, a power factor PF and a relative compromise in efficiency can be obtained, and the optimal configuration effect of the LED without current ripple is obtained.
Fig. 4 is a schematic diagram of a zero-crossing detection module and a logic processing module according to this embodiment, and fig. 5 is a schematic diagram of a reference adjustment module and a constant current module according to this embodiment.
The zero-crossing detection module is composed of a comparator 3, a comparator 4, a resistor R2, a resistor R3, a capacitor C2, a capacitor C3, a diode D4 and a diode D5; a negative input end of the comparator 3 inputs a sampling signal VB1, a positive input end of the comparator 3 is connected with a reference voltage Vref4, an output end of the comparator 3 is connected with one end of a resistor R2 and one end of a capacitor C3, the other end of the resistor R2 is connected with one end of a capacitor C2 and serves as an output end of a zero-crossing reset signal Vzr, and the other end of the capacitor C2 is grounded; the other end of the capacitor C3 is connected to the cathode of the diode D4 and the anode of the diode D5, the anode of the diode D4 is connected to one end of the resistor R3 and the Ground (GND), the cathode of the diode D5 is connected to the other end of the resistor R3 and the positive input end of the comparator 4, the negative input end of the comparator 4 is connected to the reference voltage Vref5, and the output end of the comparator 4 serves as the output end of the zero-crossing pulse signal Vzc.
The logic processing module consists of a D trigger 1, a D trigger 2, an OR gate 1, an AND gate 2 and an AND gate 3; a first input end of an AND gate 1 is connected with a first input end of an AND gate 3 and then inputs a zero-crossing pulse signal Vzc, an R end of a D trigger 1 is connected with an R end of a D trigger 2 and then inputs a zero-crossing reset signal Vzr, a D end of the D trigger 1 and a D end of the D trigger 2 are connected with a power supply voltage VCC, a CP end of the D trigger 1 is connected with a result signal VL and an input end of an OR gate 1, a second input end of the OR gate 1 is connected with a Q end of the D trigger 1, an output end of the OR gate 1 is connected with an input end of the AND gate 1, and an output end of the AND gate 1 outputs a reference adjusting signal Vtz; the CP end of the D flip-flop 2 is connected to the result signal VH, the first input end of the and gate 2, and the input end of the and gate 3, the second input end of the and gate 2 is connected to the QN end of the D flip-flop 2, the output end of the and gate 2 is connected to the input end of the and gate 3, and the output end of the and gate 3 outputs the reference adjusting signal Vtj.
The reference adjusting module consists of a bidirectional counter, a voltage-controlled current source 1, a voltage-controlled current source 2, a voltage-controlled current source 3 and a voltage-controlled current source 4; the UP input end of the UP counter inputs a reference adjusting signal Vtz, the DOWN input end of the UP counter inputs a reference adjusting signal Vtj, the output end Q0 of the UP counter is connected with the voltage control end of the voltage controlled current source 1, the output end Q1 of the UP counter is connected with the voltage control end of the voltage controlled current source 2, the output end Q2 of the UP counter is connected with the voltage control end of the voltage controlled current source 3, the output end Q3 of the UP counter is connected with the voltage control end of the voltage controlled current source 4, the power supply ends of the 4 voltage controlled current sources are connected with the power supply voltage VCC, the reference ends of the 4 voltage controlled current sources are connected with the GND, the current output ends of the 4 voltage controlled current sources are connected with one end of the resistor R6, the reference voltage Vref3 is output from the one end, and the other end of the resistor R6 is connected with the reference ground GND.
The constant current module consists of an operational amplifier 1, an MOS (metal oxide semiconductor) tube S1 and a resistor R7; the positive input end of the operational amplifier 1 is connected with a reference voltage Vref3, the negative input end of the operational amplifier 1 is connected with one end of a resistor R7 and is simultaneously connected with the source electrode of a MOS tube S1, the other end of the resistor R7 is connected with GND, the gate of the MOS tube S1 is connected with the output end of the operational amplifier 1, and the drain of the MOS tube S1 is connected with the negative end of a diode D2.
Fig. 6 is a timing diagram illustrating the operation of the first embodiment of the present invention, wherein 1 is high and 0 is low, which is specifically analyzed as follows:
when the bus voltage is higher than the voltage of the capacitor C1, the capacitor C1 starts to be charged, when the voltage of the capacitor C1 is higher than the LED voltage, the sampling signal VB2 starts to rise along with the rise of the voltage of the capacitor C1, if the lowest voltage of the sampling signal VB2 is lower than the reference voltage Vref1 at the beginning, the result signal VL is 1, when the sampling signal VB2 is higher than the reference voltage Vref2, the result signal VH is 1 along with the charging of the capacitor C1, and the QN end of the trigger 2 is 0;
when the bus voltage is lower than the voltage of the capacitor C1, the capacitor discharges to provide energy for the LED, the sampling signal VB2 begins to descend, when the rising edge of the zero-crossing signal comes, the zero-crossing pulse signal Vzc becomes 1, the output of the AND gate 2 is 0, the reference adjusting signal Vtj is 0, the output of the OR gate 1 is 1, the reference adjusting signal Vtz is 1, the bidirectional counter is increased by 1, the reference voltage Vref3 is increased by one step, then the zero-crossing reset signal Vzr becomes 1, the R ends of the D flip-flop 1 and the D flip-flop 2 become 1, the Q end of the D flip-flop 1 becomes 0, the QN end of the D flip-flop 2 becomes 1, when the zero-crossing reset signal Vzr becomes 0 again, the D flip-flop reset is completed, and when the sampling signal VB2 is lower than Vref2, the result signal VH becomes 0;
when the bus voltage is higher than the voltage of the capacitor C1 again, the capacitor C1 will start to charge again, which is divided into the following two cases:
(1) the lowest voltage of the sampling signal VB2 (i.e., the voltage of the sampling signal VB2 at the time when the capacitor starts to charge) is intermediate between the reference voltage Vref1 and the reference voltage Vref2, the result signal VL is 0, when the sampling signal VB2 continuously rises with the capacitor charging to be greater than the reference voltage Vref2, the result signal VH becomes 1, the QN terminal of the flip-flop 2 becomes 0, when the zero-crossing signal comes temporarily, the zero-crossing pulse signal Vzc becomes 1, the and gate 2 outputs 0, the reference adjustment signal Vtj becomes 0, the Q terminal of the D flip-flop 1 becomes 0 because the result signal VL is 0, or the gate 1 outputs 0, the reference adjustment signal Vtz becomes 0, the up-down counter does not change, the reference voltage Vref3 remains unchanged, then the zero-crossing reset signal Vzr becomes 1, the R terminals of the D flip-flop 1 and the D flip-flop 2 become 1, the Q terminal of the D flip-flop 1 becomes 0, the QN terminal of the D flip-flop 2 becomes 1, and the zero-crossing reset signal Vzr becomes 0 again, d, completing the reset of the trigger;
(2) the lowest voltage of the sampling signal VB2 is higher than the reference voltage Vref2, and the sampling signal VB2 starts to increase, the result signal VH is kept at 1, the result signal VL is kept at 0, the Q terminal of the D flip-flop 1 is 0, the QN terminal of the D flip-flop 2 is 1, when the zero-crossing signal occurs, the zero-crossing pulse signal Vzc becomes 1, or the output of the gate 1 is 0 and the output of the and gate 2 is 1, the reference adjustment signal Vtj becomes 1, when the zero-crossing pulse signal Vzc becomes 0, the reference adjustment signal Vtj becomes 0, the count value of the bidirectional counter is decremented by 1, and the reference voltage signal Vref3 is decremented by one step.
With this, selecting the appropriate reference voltage Vref1 and the reference voltage Vref2 enables the lowest voltage of the sampled signal VB2 to be stabilized between the reference voltage Vref1 and the reference voltage Vref2, and finally, adaptive adjustment is achieved.
Second embodiment
Fig. 7 is a schematic diagram of a current limiting circuit according to a second embodiment of the present invention, and fig. 8 is a schematic diagram of an application of the current limiting circuit according to the second embodiment of the present invention. An RC delay is added between the comparator 1 and the comparator 2 and the sampling signal VB2, and the logic control module controls the logic change.
The working principle of the present embodiment is different from that of the first embodiment as follows:
the first embodiment is controlled at the zero-crossing time of the bus voltage, which is divided into four cases, while the second embodiment is controlled at the time when the output capacitor C1 starts to be charged, which is divided into three cases.
In the second embodiment, when the bus voltage is greater than the voltage across the output capacitor C1, the output capacitor C1 starts to charge, and the sampled signal VB2 is at a minimum value.
When the capacitance current detection module rises in the input sampling signal Vcy, that is, the capacitance starts to be charged at this time, the voltage value of VB2 is the minimum value, the charging signal Vyd is output to the logic processing module, and when the charging signal Vyd comes, Vyd becomes 1, and three situations can be distinguished:
(1) if the voltage value of VB2 subjected to RC delay is higher than Vref2, VL is 0, VH is 1, the level of a reference adjusting signal Vtj given to the reference adjusting module by the logic processing module is reversed, the level of Vtz is not reversed, the count of the up-down counter is increased by 1, and the reference voltage Vref3 is increased by one step;
(2) if the voltage value of VB2 subjected to RC delay is between Vref2 and Vref1, VH is 0, VL is 0, the Vtz and Vtj levels are not inverted, the count of the up-down counter is not changed, and the reference voltage Vref3 is not changed;
(3) if the voltage value of VB2 after RC delay is lower than Vref1, VH is 0, VL is 1, Vtz level inverts, the up-down counter counts down by 1, and the reference voltage Vref3 decreases by one step.
Fig. 9 is a schematic diagram of a capacitance current detection module and a logic processing module according to this embodiment, and fig. 10 is a schematic diagram of a reference adjustment module and a constant current module according to this embodiment.
The difference from the first embodiment is:
the negative input end of the operational amplifier 1 in the constant current module, one end of the resistor R7 and the source electrode of the MOS tube S1 are connected together and then output a sampling signal Vcy.
The capacitance current detection module is composed of a comparator 3, a comparator 4, a capacitor C3, a diode D4, a diode D5 and a resistor R3; the positive input end of the comparator 3 inputs the sampling signal Vcy, the inverting input end of the comparator 3 is connected with a voltage reference Vref4, the output end of the comparator 3 is connected with one end of a capacitor C3, the other end of the capacitor C3 is connected with the cathode of a diode D4 and the anode of a diode D5, the anode of the diode D4 is connected with one end of a resistor R3 and GND, the cathode of the diode D5 is connected with the other end of the resistor R3 and the positive input end of the comparator 4, the negative input end of the comparator 4 is connected with a voltage reference Vref5, the output end of the comparator 4 outputs a charging signal Vyd for starting charging the capacitor, and the charging signal Vyd is a narrow pulse signal.
The logic processing module consists of an AND gate 1 and an AND gate 2; the first input end of the and gate 1 is connected with the first input end of the and gate 2 and then inputs the charging signal Vyd, the second input end of the and gate 1 inputs the result signal VL, the second input end of the and gate 2 inputs the result signal VH, the output end of the and gate 1 outputs the reference adjusting signal Vtz, and the output end of the and gate 2 outputs the reference adjusting signal Vtj.
Fig. 11 is a timing diagram illustrating the operation of the second embodiment of the present invention, wherein 1 is high and 0 is low, which is specifically analyzed as follows:
when the bus voltage is higher than the capacitor voltage, the capacitor starts to charge, and a charging signal Vyd becomes 1;
if the sampling signal VB2 after RC delay is smaller than the reference voltage Vref1, the result signal VL is 1, and the result signal VH is 0, the reference adjusting signal Vtz becomes 1, the reference adjusting signal Vtj keeps 0, when the signal to be charged Vyd becomes 0, the reference adjusting signal Vtz becomes 0, the count value of the bidirectional counter is increased by 1, and the reference voltage Vref3 is increased by one step;
if the RC delayed sampling signal VB2 is between the reference voltage Vref1 and the reference voltage Vref2, the result signal VL is 0, and the result signal VH is 0, then the reference adjustment signal Vtz remains 0, the reference adjustment signal Vtj remains 0, the up-down counter count remains unchanged, and the reference voltage Vref3 remains unchanged;
if the sampling signal VB2 after RC delay is greater than the reference voltage Vref2, the resultant signal VL is 0, and the resultant signal VH is 1, the reference adjustment signal Vtz remains 0, the reference adjustment signal Vtj becomes 1, when the signal to be charged Vyd becomes 0, the reference adjustment signal Vtj becomes 0, the count value of the up-down counter is decreased by 1, and the reference voltage Vref3 is decreased by one step.
With this, selecting the appropriate reference voltage Vref1 and the reference voltage Vref2 enables the lowest voltage of the sampled signal VB2 to be stabilized between the reference voltage Vref1 and the reference voltage Vref2, and finally, adaptive adjustment is achieved.
The above is only a preferred embodiment of the present invention, it should be noted that the above preferred embodiment should not be considered as limiting the present invention, and it will be apparent to those skilled in the art that several modifications and decorations can be made without departing from the spirit and scope of the present invention, and the modifications and decorations of the triangle wave generation module, the duty ratio generation module and the logic processing module should also be considered as the protection scope of the present invention, which is not repeated herein by examples, and the protection scope of the present invention should be subject to the scope defined by the claims.

Claims (15)

1. The utility model provides a current-limiting circuit for limit linear silicon controlled rectifier adjusts luminance LED driver output capacitance's charging current which characterized in that: comprises a detection circuit and a control circuit;
the detection circuit is used for detecting the voltage zero-crossing time between the positive input end and the negative input end of the linear silicon controlled dimming LED driver or detecting the time when the output capacitor of the linear silicon controlled dimming LED driver starts to charge;
the control circuit is used for carrying out the following control according to a voltage value sampling signal VB2 of the negative output end of the linear silicon controlled rectifier dimming LED driver when detecting that the voltage between the positive input end and the negative input end of the linear silicon controlled rectifier dimming LED driver is zero or detecting that the output capacitor of the linear silicon controlled rectifier dimming LED driver starts to charge:
when the minimum value of the sampling signal VB2 is less than the minimum threshold value, increasing the charging current of the output capacitor;
when the minimum value of the sampling signal VB2 is larger than the highest threshold value, reducing the charging current of the output capacitor;
and when the minimum value of the minimum threshold value is less than or equal to the minimum value of the sampling signal VB2, the charging current of the output capacitor is kept unchanged.
2. The current-limiting circuit of claim 1, wherein: the detection circuit is a zero-crossing detection module; the control circuit comprises a comparator 1, a comparator 2, a logic processing module, a reference regulating module and a constant current module;
the input end of the zero-crossing detection module is used for inputting a sampling signal VB1 of the voltage between the positive input end and the negative input end of the linear silicon controlled dimming LED driver, outputting a zero-crossing signal when the sampling signal VB1 is detected to be reduced from high voltage to low voltage, carrying out time-delay processing on the zero-crossing signal to obtain a zero-crossing reset signal Vzr, and carrying out pulse width processing on the zero-crossing reset signal to obtain a zero-crossing pulse signal Vzc;
the positive input end of the comparator 1 is used for inputting a reference voltage Vref1, the negative input end of the comparator 2 is used for inputting a reference voltage Vref2, the negative input end of the comparator 1 is connected with the positive input end of the comparator 2 and is used for inputting a sampling signal VB2 that the voltage at two ends of an output capacitor of the linear silicon controlled light-adjusting LED driver exceeds the voltage value at two ends of the positive output end and the negative output end of the linear silicon controlled light-adjusting LED driver, the output end of the comparator 1 outputs a result signal VL, and the output end of the comparator 2 outputs a result signal VH;
the logic processing module outputs a reference adjusting signal Vtz and a reference adjusting signal Vtj according to the zero-crossing reset signal Vzr, the zero-crossing pulse signal Vzc, the result signal VL and the result signal VH;
the reference adjusting module adjusts the size of the reference voltage Vref3 output by the reference adjusting module according to the reference adjusting signal Vtz and the reference adjusting signal Vtj, wherein the reference adjusting voltage Vref3 is increased when the level of the reference adjusting signal Vtz is inverted, and the reference adjusting voltage Vref3 is decreased when the level of the reference adjusting signal Vtj is inverted;
the constant current module provides a charging current according to a reference voltage Vref3, and is used for adjusting the magnitude of the charging current of the output capacitor of the linear silicon controlled dimming LED driver.
3. The current-limiting circuit of claim 2, wherein: when receiving the zero-crossing reset signal Vzr and the zero-crossing pulse signal Vzc, the logic processing module outputs the following logic:
when the level state of the resultant signal VL is high without the level inversion, the level of the reference adjustment signal Vtz is inverted and the level of the reference adjustment signal Vtj is maintained;
as a result, when the level of the signal VL is inverted and the level state is an arbitrary state, the level of the reference adjustment signal Vtz is inverted and the level of the reference adjustment signal Vtj is maintained;
as a result, when the level of the signal VH is not inverted and the level state is high, the level of the reference adjustment signal Vtz is maintained and the level of the reference adjustment signal Vtj is inverted;
as a result, when the level of the signal VH is inverted and the level state is any state, the levels of the reference adjustment signal Vtz and the reference adjustment signal Vtj are maintained.
4. The current-limiting circuit of claim 2, wherein: the zero-crossing detection module comprises a comparator 3, a comparator 4, a resistor R2, a resistor R3, a capacitor C2, a capacitor C3, a diode D4 and a diode D5; the negative input end of the comparator 3 is used for inputting a sampling signal VB1, the positive input end of the comparator 3 is used for inputting a reference voltage Vref4, the output end of the comparator 3 is simultaneously connected with one end of a resistor R2 and one end of a capacitor C3, the other end of the resistor R2 is connected with one end of a capacitor C2, a zero-crossing reset signal Vzr is output, and the other end of the capacitor C2 is grounded; the other end of the capacitor C3 is connected to the cathode of the diode D4 and the anode of the diode D5, the anode of the diode D4 is connected to one end of the resistor R3 and the ground, the cathode of the diode D5 is connected to the other end of the resistor R3 and the positive input end of the comparator 4, the negative input end of the comparator 4 is used for inputting the reference voltage Vref5, and the output end of the comparator 4 outputs the zero-crossing pulse signal Vzc.
5. The current-limiting circuit of claim 2, wherein: the logic processing module comprises a D trigger 1, a D trigger 2, an OR gate 1, an AND gate 2 and an AND gate 3; the R end of the D trigger 1 and the R end of the D trigger 2 are connected together and used for inputting a zero-crossing reset signal Vzr, the first input end of the AND gate 1 and the first input end of the AND gate 3 are connected together and used for inputting a zero-crossing pulse signal point Vzc, and the D end of the D trigger 1 and the D end of the D trigger 2 are connected together and used for inputting a power supply voltage VCC; the CP end of the D trigger 1 and the first input end of the OR gate 1 are connected together for inputting a result signal VL, the second input end of the OR gate 1 is connected with the Q end of the D trigger 1, the output end of the OR gate 1 is connected with the second input end of the AND gate 1, and the output end of the AND gate 1 outputs a reference adjusting signal Vtz; the CP end of the D flip-flop 2 is connected to the first input end of the and gate 2 for inputting the result signal VH, the second input end of the and gate 2 is connected to the QN end of the D flip-flop 2, the output end of the and gate 2 is connected to the second input end of the and gate 3, and the output end of the and gate 3 outputs the reference adjusting signal Vtj.
6. The current-limiting circuit of claim 2, wherein: the reference adjusting module comprises a bidirectional counter, a voltage-controlled current source 1, a voltage-controlled current source 2, a voltage-controlled current source 3, a voltage-controlled current source 4 and a resistor R6; the UP input end of the UP counter inputs a reference adjusting signal Vtz, the DOWN input end of the UP counter inputs a reference adjusting signal Vtj, the output end Q0 of the UP counter is connected with the voltage control end of the voltage controlled current source 1, the output end Q1 of the UP counter is connected with the voltage control end of the voltage controlled current source 2, the output end Q2 of the UP counter is connected with the voltage control end of the voltage controlled current source 3, the output end Q3 of the UP counter is connected with the voltage control end of the voltage controlled current source 4, the power supply end of the 4 voltage controlled current sources is used for inputting a power supply voltage VCC, the reference end of the 4 voltage controlled current sources is connected with GND, the current output end of the 4 voltage controlled current sources and one end of the resistor R6 are connected together and then output a reference voltage Vref3, and the other end of the resistor R6 is grounded.
7. The current-limiting circuit of claim 2, wherein: the constant current module comprises an MOS transistor S1, an operational amplifier 1 and a resistor R7, a reference voltage Vref3 is input to the positive input end of the operational amplifier 1, the negative input end of the operational amplifier 1 is simultaneously connected with one end of the resistor R7 and the source electrode of the MOS transistor S1, the output end of the operational amplifier 1 is connected with the grid electrode of the MOS transistor S1, the drain electrode of the MOS transistor S1 is the input end of the constant current module and used for providing charging current, and the other end of the resistor R7 is the output end of the constant current module and used for grounding.
8. Use of the current limiting circuit of claims 2 to 7 in a triac-dimmed LED driver, further comprising: a resistor RH1, a resistor RL1, a resistor RH2, a resistor RL2, a diode D2 and a diode D3; one end of a resistor RH1 is connected with the positive input end of the linear thyristor dimming LED driver, the other end of the resistor RH1 is connected with one end of a resistor RL1 and used for outputting a sampling signal VB1, one end of a resistor RH2 is connected with the negative output end of the linear thyristor dimming LED driver, and the other end of a resistor RH2 is connected with one end of a resistor RL2 and used for outputting a sampling signal VB 2; the other end of the resistor RL1, the other end of the resistor RL2, the output end of the constant current module and the anode of the diode D3 are grounded at the same time; the cathode of the diode D2 is connected to the input end of the constant current module, and the anode of the diode D2 and the cathode of the diode D3 are connected together and then connected to the positive output end of the linear thyristor dimming LED driver through the output capacitor of the linear thyristor dimming LED driver.
9. The current-limiting circuit of claim 1, wherein: the detection circuit is a capacitance current detection module; the control circuit comprises a resistor R2, a capacitor C2, a comparator 1, a comparator 2, a logic processing module, a reference adjusting module and a constant current module;
the input end of the capacitance current detection module is used for inputting a sampling signal Vcy of the linear silicon controlled dimming LED driver for outputting capacitance charging current, and when the sampling signal Vcy is detected to be increased, a charging signal Vyd for starting charging of a capacitor is output;
one end of the resistor R2 is used for inputting a sampling signal VB2 of which the voltage at two ends of an output capacitor of the linear silicon controlled rectifier dimming LED driver exceeds the voltage values at two ends of a positive output end and a negative output end of the linear silicon controlled rectifier dimming LED driver, the other end of the resistor R2 is simultaneously connected with one end of the capacitor C2, a negative input end of the comparator 1 and a positive input end of the comparator 2, the other end of the capacitor C2 is grounded, the positive input end of the comparator 1 is used for inputting a reference voltage Vref1, the negative input end of the comparator 2 is used for inputting a reference voltage Vref2, the output end of the comparator 1 outputs a result signal VL, and the output end of the comparator 2 outputs a result signal VH;
the logic processing module outputs a reference adjusting signal Vtz and a reference adjusting signal Vtj according to the charging signal Vyd, the result signal VL and the result signal VH;
the reference adjusting module adjusts the size of the reference voltage Vref3 output by the reference adjusting module according to the reference adjusting signal Vtz and the reference adjusting signal Vtj, wherein the reference adjusting voltage Vref3 is increased when the level of the reference adjusting signal Vtz is inverted, and the reference adjusting voltage Vref3 is decreased when the level of the reference adjusting signal Vtj is inverted;
the constant current module provides a charging current according to a reference voltage Vref3, and is used for adjusting the magnitude of the charging current of the output capacitor of the linear silicon controlled dimming LED driver.
10. The current-limiting circuit of claim 9, wherein: when receiving the charging signal Vyd, the logic processing module outputs the following logic:
when the result signal VH is at a high level and the result signal VL is at a low level, the level of the reference adjustment signal Vtj is inverted, and the level of the reference adjustment signal Vtz is maintained;
when the result signal VH is at a low level and the result signal VL is at a high level, the level of the reference adjustment signal Vtz is inverted, and the level of the reference adjustment signal Vtj is maintained unchanged;
when the result signal VH is at a low level and the result signal VL is at a low level, the levels of the reference adjustment signal Vtz and the reference adjustment signal Vtj are both maintained.
11. The current-limiting circuit of claim 9, wherein: the capacitance current detection module comprises a comparator 3, a comparator 4, a resistor R3, a capacitor C3, a diode D4 and a diode D5; the negative input end of the comparator 3 is used for inputting a reference voltage Vref4, the positive input end of the comparator 3 is used for inputting a sampling signal Vcy, the output end of the comparator 3 is connected with one end of a capacitor C3, the other end of the capacitor C3 is simultaneously connected with the cathode of a diode D4 and the anode of a diode D5, the anode of a diode D4 is simultaneously connected with one end of a resistor R3 and the ground, the cathode of the diode D5 is simultaneously connected with the other end of the resistor R3 and the positive input end of the comparator 4, the negative input end of the comparator 4 is used for inputting a reference voltage Vref5, and the output end of the comparator 4 outputs a charging signal Vyd.
12. The current-limiting circuit of claim 9, wherein: the logic processing module comprises an and gate 1 and an and gate 2, wherein a first input end of the and gate 1 is connected with a first input end of the and gate 2 for inputting the charging signal Vyd, a second input end of the and gate 1 is used for inputting the result signal VL, a second input end of the and gate 2 is used for inputting the result signal VH, an output end of the and gate 1 outputs a reference adjusting signal Vtz, and an output end of the and gate 2 outputs a reference adjusting signal Vtj.
13. The current-limiting circuit of claim 9, wherein: the reference adjusting module comprises a bidirectional counter, a voltage-controlled current source 1, a voltage-controlled current source 2, a voltage-controlled current source 3, a voltage-controlled current source 4 and a resistor R6; the UP input end of the UP counter inputs a reference adjusting signal Vtz, the DOWN input end of the UP counter inputs a reference adjusting signal Vtj, the output end Q0 of the UP counter is connected with the voltage control end of the voltage controlled current source 1, the output end Q1 of the UP counter is connected with the voltage control end of the voltage controlled current source 2, the output end Q2 of the UP counter is connected with the voltage control end of the voltage controlled current source 3, the output end Q3 of the UP counter is connected with the voltage control end of the voltage controlled current source 4, the power supply end of the 4 voltage controlled current sources is used for inputting a power supply voltage VCC, the reference end of the 4 voltage controlled current sources is connected with GND, the current output end of the 4 voltage controlled current sources and one end of the resistor R6 are connected together and then output a reference voltage Vref3, and the other end of the resistor R6 is grounded.
14. The current-limiting circuit of claim 9, wherein: the constant current module comprises an MOS transistor S1, an operational amplifier 1 and a resistor R7, a reference voltage Vref3 is input to a positive input end of the operational amplifier 1, a negative input end of the operational amplifier 1, one end of the resistor R7 and a source electrode of the MOS transistor S1 are connected together and then output a sampling signal Vcy, an output end of the operational amplifier 1 is connected with a grid electrode of the MOS transistor S1, a drain electrode of the MOS transistor S1 is an input end of the constant current module and used for providing charging current, and the other end of the resistor R7 is an output end of the constant current module and used for grounding.
15. Use of the current limiting circuit of claims 9 to 14 in a triac-dimmed LED driver, further comprising: a resistor RH1, a resistor RL1, a resistor RH2, a resistor RL2, a diode D2 and a diode D3; one end of a resistor RH1 is connected with the positive input end of the linear thyristor dimming LED driver, the other end of the resistor RH1 is connected with one end of a resistor RL1 and used for outputting a sampling signal VB1, one end of a resistor RH2 is connected with the negative output end of the linear thyristor dimming LED driver, and the other end of a resistor RH2 is connected with one end of a resistor RL2 and used for outputting a sampling signal VB 2; the other end of the resistor RL1, the other end of the resistor RL2, the output end of the constant current module and the anode of the diode D3 are grounded at the same time; the cathode of the diode D2 is connected to the input end of the constant current module, and the anode of the diode D2 and the cathode of the diode D3 are connected together and then connected to the positive output end of the linear thyristor dimming LED driver through the output capacitor of the linear thyristor dimming LED driver.
CN202110634746.8A 2021-06-08 2021-06-08 Current limiting circuit and application thereof Active CN113543411B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202110634746.8A CN113543411B (en) 2021-06-08 2021-06-08 Current limiting circuit and application thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202110634746.8A CN113543411B (en) 2021-06-08 2021-06-08 Current limiting circuit and application thereof

Publications (2)

Publication Number Publication Date
CN113543411A true CN113543411A (en) 2021-10-22
CN113543411B CN113543411B (en) 2024-03-15

Family

ID=78095290

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202110634746.8A Active CN113543411B (en) 2021-06-08 2021-06-08 Current limiting circuit and application thereof

Country Status (1)

Country Link
CN (1) CN113543411B (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2022142857A1 (en) * 2020-12-30 2022-07-07 华润微集成电路(无锡)有限公司 Led driving system and closed-loop control method for led driving

Citations (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070216372A1 (en) * 2006-03-15 2007-09-20 Micrel, Inc. Switching voltage regulator with low current trickle mode
US20110057576A1 (en) * 2008-03-24 2011-03-10 Hirokazu Otake Power supply device and lighting equipment
CN102355012A (en) * 2011-08-11 2012-02-15 深圳市天微电子有限公司 Numerical-control constant current driving circuit
JP2012059610A (en) * 2010-09-10 2012-03-22 Eye Lighting Syst Corp Discharge lamp lighting device
JP2016006761A (en) * 2014-05-29 2016-01-14 サンケン電気株式会社 Led driver
CN106455216A (en) * 2016-10-19 2017-02-22 东南大学 Silicon controlled rectifier dimming control system for LED brightness adjustment
US20180139816A1 (en) * 2016-11-16 2018-05-17 Joulwatt Technology (Hangzhou) Co., Ltd. Bleeder circuit and control method thereof, and led control circuit
CN108633126A (en) * 2017-03-22 2018-10-09 华润矽威科技（上海）有限公司 Linear high power factor constant current is without stroboscopic LED drive circuit and method
CN110473508A (en) * 2019-08-16 2019-11-19 深圳南云微电子有限公司 A kind of buzzer driving method and driving circuit for realizing Width funtion input
US20190373691A1 (en) * 2018-05-29 2019-12-05 Silergy Semiconductor Technology (Hangzhou) Ltd Led drive circuit and method thereof
CN112637999A (en) * 2021-03-08 2021-04-09 上海芯龙半导体技术股份有限公司 Constant current control circuit and chip

Patent Citations (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070216372A1 (en) * 2006-03-15 2007-09-20 Micrel, Inc. Switching voltage regulator with low current trickle mode
US20110057576A1 (en) * 2008-03-24 2011-03-10 Hirokazu Otake Power supply device and lighting equipment
JP2012059610A (en) * 2010-09-10 2012-03-22 Eye Lighting Syst Corp Discharge lamp lighting device
CN102355012A (en) * 2011-08-11 2012-02-15 深圳市天微电子有限公司 Numerical-control constant current driving circuit
JP2016006761A (en) * 2014-05-29 2016-01-14 サンケン電気株式会社 Led driver
CN106455216A (en) * 2016-10-19 2017-02-22 东南大学 Silicon controlled rectifier dimming control system for LED brightness adjustment
US20180139816A1 (en) * 2016-11-16 2018-05-17 Joulwatt Technology (Hangzhou) Co., Ltd. Bleeder circuit and control method thereof, and led control circuit
CN108633126A (en) * 2017-03-22 2018-10-09 华润矽威科技（上海）有限公司 Linear high power factor constant current is without stroboscopic LED drive circuit and method
US20190373691A1 (en) * 2018-05-29 2019-12-05 Silergy Semiconductor Technology (Hangzhou) Ltd Led drive circuit and method thereof
CN110473508A (en) * 2019-08-16 2019-11-19 深圳南云微电子有限公司 A kind of buzzer driving method and driving circuit for realizing Width funtion input
CN112637999A (en) * 2021-03-08 2021-04-09 上海芯龙半导体技术股份有限公司 Constant current control circuit and chip

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2022142857A1 (en) * 2020-12-30 2022-07-07 华润微集成电路(无锡)有限公司 Led driving system and closed-loop control method for led driving
US11917735B2 (en) 2020-12-30 2024-02-27 CRM ICBG (Wuxi) Co., Ltd. LED driving system and closed-loop control method for LED driving

Also Published As

Publication number Publication date
CN113543411B (en) 2024-03-15

Similar Documents

Publication Publication Date Title
US10143051B2 (en) Bleeder circuit and control method thereof, and LED control circuit
US10433384B2 (en) LED driver with silicon controlled dimmer, apparatus and control method thereof
CN110113841B (en) LED driving circuit with silicon controlled rectifier dimmer, circuit module and control method
TWI523569B (en) Adjustable LED driver circuit and drive method
US11317483B2 (en) Apparatus, dimmable light emitting diode drive circuit and control method
US9055629B2 (en) SCR dimming circuit and method
CN110493913B (en) Control system and method for silicon controlled dimming LED lighting system
CN1156201C (en) Anti-flicker circuit for fluorescent lamp ballast driver
CN109041348B (en) Adaptive circuit module, LED driving circuit with silicon controlled rectifier dimmer and method
TWI492659B (en) A novel control scheme to achieve low brightness for dimmable led driver
US7265498B2 (en) Dimmer control system and controlling method thereof
EP3026988A1 (en) Power converter controller with analog controlled variable current circuit
US7982413B2 (en) Electronic ballast with dimming control from power line sensing
CN108848598B (en) Bleeder module for silicon controlled rectifier dimmer, LED driving circuit and driving method
EP3675603A1 (en) Driving circuit and driving method for driving light emitting diode load
CN1228242A (en) Ballast for compact fluorescent lamp with current protection
CN113543411A (en) Current limiting circuit and application thereof
US9246378B2 (en) Method and apparatus for extending the power output range of a power converter used for a lighting system
CN209964330U (en) A bleeder module, LED drive circuit for silicon controlled rectifier dimmer
CN110035579B (en) High-power-factor non-stroboscopic linear control method compatible with silicon controlled rectifier dimmer and control device used in method
CN115474313A (en) Control method and circuit
CN209882155U (en) Silicon controlled rectifier LED drive circuit of adjusting luminance
CN109587880B (en) Driving method and circuit for silicon controlled rectifier dimming LED
US5463307A (en) High efficiency, low voltage adapter apparatus and method
CN111194119A (en) LED driving circuit and method capable of being controlled by switching and dimming

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant