CN113540194B - Display panel and display device - Google Patents
Display panel and display device Download PDFInfo
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- CN113540194B CN113540194B CN202110785527.XA CN202110785527A CN113540194B CN 113540194 B CN113540194 B CN 113540194B CN 202110785527 A CN202110785527 A CN 202110785527A CN 113540194 B CN113540194 B CN 113540194B
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
- H10K59/122—Pixel-defining structures or layers, e.g. banks
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
- H10K59/124—Insulating layers formed between TFT elements and OLED elements
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Abstract
The embodiment of the application provides a display panel and a display device, when each film layer structure of the display panel is arranged, an opening is arranged in a pixel opening area, meanwhile, a separation groove is further arranged on a flattening layer in the opening area, an electrode layer covering part separates the separation groove and forms an accommodating space with the separation groove, and a light emitting function layer and an electrode layer of the display panel are discontinuous on the separation groove. The electrode layer and the light-emitting layer are disconnected in the region through the arranged partition groove, so that the problem of lateral current between two adjacent pixels is effectively solved, and the luminous performance of the display panel is effectively improved.
Description
Technical Field
The invention relates to the technical field of display panel manufacturing, in particular to a display panel and a display device.
Background
An Organic Light Emitting Diode (OLED) display device has many advantages such as self-luminescence, low driving voltage, high light emitting efficiency, short response time, high contrast ratio, and wide temperature range, and is considered as the most promising display device.
With the continuous development and improvement of the manufacturing technology, high-resolution OLEDs and display devices with high-quality light emitting effects are gradually developed. Accordingly, in the case of a display device, the light emission of the light-emitting functional layer in the device will directly affect the light-emitting performance of the whole device. In the prior art, the luminescent performance of the display device is better improved by the luminescent functional layer of the quantum dot material. The color gamut of the quantum dot display technology can reach 110%, so that the luminescent film layer prepared from the quantum dot material can endow the display with a wider color gamut, and the display terminal has more beautiful color expression. However, in the prior art, when a quantum dot luminescent film layer is prepared and formed, the preparation method mainly comprises a photoetching method and an ink-jet printing method. However, the quantum dot luminescent film layer prepared by the processing method has the problems of low luminescent efficiency, poor stability, long processing time and the like. Further, the luminous performance and quality of the display device are affected, and the improvement and improvement of the overall performance of the display device are not facilitated.
In summary, when the quantum dot light-emitting film layer in the display device is formed, the existing preparation process often has the problems of low light-emitting efficiency of the formed quantum dot light-emitting film layer, poor stability of the quantum dot light-emitting film layer, complex preparation process, long processing time and the like, and is not favorable for further improving the light-emitting performance of the display device.
Disclosure of Invention
The embodiment of the invention provides a display panel and a display device, which are used for effectively solving the problem that pixels in the high-resolution display panel are easy to overlap, so that the interior of the display panel is prone to being stolen and bright.
In order to solve the above technical problem, the technical method provided by the embodiment of the present invention is as follows:
in a first aspect of the embodiments of the present invention, there is provided a display panel including
An array substrate;
a planarization layer disposed on the array substrate;
an electrode layer disposed on the planarization layer;
a pixel defining layer disposed on the electrode layer, the pixel defining layer including a pixel opening region and a pixel defining region disposed at one side of the pixel opening region; and the number of the first and second groups,
a light emitting functional layer disposed on and covering the pixel defining layer;
in the opening region, a partition groove is arranged on the planarization layer, the electrode layer covers part of the partition groove and forms an accommodating space with the partition groove, and the light-emitting function layer and the electrode layer are discontinuous on the partition groove.
According to an embodiment of the present invention, the pixel opening region includes a first pixel opening region and a second pixel opening region, the first pixel opening region, the pixel defining region and the second pixel opening region are sequentially disposed, and the blocking groove is disposed in the second pixel opening region.
According to an embodiment of the present invention, the first pixel opening region includes a first opening therein, the second pixel opening region includes a second opening, and an opening depth of the second opening is greater than an opening depth of the first opening.
According to an embodiment of the invention, the first opening penetrates through the pixel defining layer, and the second opening penetrates through the pixel defining layer and a portion of the planarization layer.
According to an embodiment of the present invention, a projected area of the electrode layer on the bottom of the partition groove is greater than or equal to half of the area of the bottom of the partition groove.
According to an embodiment of the present invention, the blocking slot is at least disposed between two adjacent pixel units.
According to an embodiment of the present invention, the display panel further includes a protrusion, the protrusion is disposed in the partition groove, and the protrusion does not contact with the film layers on two sides of the partition groove.
According to an embodiment of the present invention, the upper surface of the protrusion is flush with the light emitting function layer.
According to an embodiment of the present invention, the display panel further includes an anode disposed in the pixel opening region, the anode is electrically connected to the array substrate through a via hole, and the anode and the electrode layer are formed in a same process.
According to a second aspect of the embodiments of the present invention, there is further provided a display device, which includes a display panel, where the display panel is provided in the embodiments of the present invention, a partition groove is provided on a planarization layer of the display panel, an electrode layer of the display panel covers a portion of the partition groove and forms an accommodating space with the partition groove, and a light emitting function layer of the display panel and the electrode layer of the display panel are discontinuous on the partition groove.
In summary, the embodiments of the present invention have the following beneficial effects:
in order to improve the resolution of the display panel and prevent adjacent pixels from being stolen, in the embodiment of the invention, when each film layer structure of the display panel is arranged, an opening is arranged in a pixel opening area and penetrates through a pixel definition layer. Meanwhile, in the opening area, a partition groove is further arranged on the planarization layer, the electrode layer covering portion partitions the partition groove and forms an accommodating space with the partition groove, and the light-emitting function layer and the electrode layer of the display panel are discontinuous on the partition groove. The electrode layer and the light-emitting layer are disconnected in the region through the arranged partition groove, so that the problem of lateral current between two adjacent pixels is effectively solved, and the luminous performance of the display panel is effectively improved.
Drawings
The technical solution and other advantages of the present invention will become more apparent from the detailed description of the embodiments of the present invention with reference to the accompanying drawings.
Fig. 1 is a schematic diagram of a film structure of a display panel provided in the prior art;
fig. 2 is a schematic view of a film structure of a display panel according to an embodiment of the present disclosure;
fig. 3 is a schematic plan view of a pixel unit of a display panel according to an embodiment of the present disclosure;
fig. 4-5 are schematic plan views illustrating another arrangement of pixel units and partition grooves according to an embodiment of the present disclosure;
fig. 6 is a schematic view of a film layer corresponding to a preparation method provided in an embodiment of the present application;
fig. 7 is a schematic view of a film structure corresponding to another display panel provided in the present embodiment;
fig. 8 is a schematic view of a film structure corresponding to another display panel according to an embodiment of the present disclosure.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention. It is to be understood that the described embodiments are merely exemplary of the invention, and not restrictive of the full scope of the invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
In the description of the present invention, it is to be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", and the like, indicate orientations and positional relationships based on those shown in the drawings, and are used only for convenience of description and simplicity of description, and do not indicate or imply that the device or element being referred to must have a particular orientation, be constructed and operated in a particular orientation, and thus, should not be considered as limiting the present invention. Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated.
With the increasing resolution of display panels, people have made higher demands on the manufacturing process of display panels. In order to achieve an optimum display effect, it is desirable not only to obtain a high-resolution panel, but also to prevent color mixing between adjacent pixels and the occurrence of sneak brightness between adjacent pixels when the display panel performs light emission display.
As shown in fig. 1, fig. 1 is a schematic diagram of a film structure of a display panel provided in the prior art. The display panel includes a base substrate 101, an anode 102, a pixel defining layer 103, and a light emitting layer 104. Wherein the anode 102 is disposed on the substrate 101, and the anode 102 is electrically connected to the thin film transistor in the substrate. Meanwhile, a pixel defining layer 103 is disposed on the base substrate 101, and the pixel defining layer 103 covers the anode 102. A pixel opening region 105 is further disposed at a position corresponding to the anode 102, and the light emitting layer 104 is disposed on the pixel defining layer 103 and covers the anode 102 disposed in the pixel opening region 105.
For a high resolution display panel, the distance between two adjacent pixel opening regions 105 is very close. Due to the close distance, when the light emitting layers 104 in the two adjacent pixel opening regions 105 are prepared, the gaps between the evaporated light emitting materials are also small, and the small gaps easily cause the problem of overlapping of the light emitting materials in the preparation process. Once the overlap occurs, the overlapped light-emitting layer and the anode form a lateral current, which causes adjacent pixels to appear sneak and have a certain color shift.
In order to prevent the problem of the high-resolution display panel that is caused by the small gap between the adjacent pixels, embodiments of the present application provide a display panel and a display device, so as to effectively solve the problem of the display panel color cast caused by the lateral current appearing in the light-emitting layer in the display panel.
As shown in fig. 2, fig. 2 is a schematic view of a film structure of a display panel provided in the embodiment of the present application. The display panel includes an array substrate 20, a planarization layer 21, an electrode layer 205, a pixel defining layer 206, and a light emitting function layer 207, and a cathode 208 disposed on the light emitting function layer 207.
Specifically, the planarization layer 21 is disposed on the array substrate 20. The electrode layer 205 is disposed on the planarization layer 21, the pixel defining layer 206 is disposed on the planarization layer 21, and the pixel defining layer 206 covers the electrode layer 205, while the light emitting function layer 207 is disposed on the pixel defining layer 206.
Further, the pixel defining layer 206 of the display panel provided in the embodiment of the present application includes a pixel opening region 23 and a pixel defining region 24. Wherein the pixel defining area 24 is disposed at one side of the pixel opening area 23. In the subsequent preparation process, corresponding color resistors are arranged at the positions corresponding to the pixel opening regions 23, so that the display effects of different colors are realized.
In the embodiment of the present application, when the planarization layer 21 is disposed, the planarization layer 21 may include the first planarization layer 211 and the second planarization layer 212. Wherein the second planarization layer 212 is disposed on the first planarization layer 211. In order to improve the effect of the planarization layer 21, the first planarization layer 211 is made of an inorganic material, i.e., the first planarization layer 211 is an inorganic planarization layer, and the second planarization layer 212 may be made of an organic material, i.e., the second planarization layer 212 is an organic planarization layer. The organic and inorganic film layers are stacked to further improve the effect of the planarization layer 21 of the display panel. Besides, the planarization layer 21 can be provided as a stacked structure of multiple layers, which is not described in detail herein.
Further, the pixel opening region 23 of the display panel in the embodiment of the present application is further provided with an opening, and the opening is formed by etching on the corresponding film layer. Specifically, the pixel opening region 23 in the embodiment of the present application may include a first pixel opening region 231 and a second pixel opening region 232 as an example for description. Different openings are formed by etching in the first and second pixel opening regions 231 and 232.
In the embodiment of the present application, the corresponding openings in the different pixel opening regions 23 may be different. Specifically, a first opening 2311 is provided in the first pixel opening region 231, and a second opening 2312 is provided in the second pixel opening region 232. The first opening 2311 penetrates through the pixel defining layer 206 and is not etched to other film layers. The second opening 2312 not only penetrates the pixel defining layer 206, but also the second opening 2312 etches part of the planarization layer 21. In the embodiment of the present application, the second opening 2312 penetrates through the pixel defining layer 206 and the second planarizing layer 212 and etches away a portion of the first planarizing layer 211.
Thus, the depth of the openings formed in different pixel opening regions is different. In the embodiment of the present application, the depth of the second opening 2312 in the second pixel opening region 232 is greater than the depth of the first opening 2311 in the first pixel opening region 231.
In the embodiment, a blocking groove 25 is further provided in the second opening 2312. Wherein the blocking groove 25 is disposed on the first planarization layer 211. When the partition groove 25 in the embodiment of the present application is provided, the width of the groove body corresponding to the top of the partition groove 25 is smaller than the width of the opening corresponding to the bottom of the second opening 2312. Thus, the partition groove 25 may form a stepped structure with the second opening 2312, and a transition step 251 is formed between the partition groove 25 and the second opening 2312. The transition step 251 is used for supporting other film layers prepared subsequently, so that the reliability of the display panel is ensured.
In the region corresponding to the partition groove 25, the electrode layer 205 is laid on the transition step 251 and extends to the middle region of the partition groove 25 to cover a portion of the partition groove 25, so that the electrode layer 205 forms a protruding portion on the partition groove 25. Meanwhile, since the isolation groove 25 is disposed on the first planarization layer 211, the first planarization layer 211 corresponding to the isolation groove 25 and the protruding portion of the electrode layer 205 form an accommodation space.
Specifically, in the embodiment of the present application, the protruding portion of the electrode layer 205 extends to at least one side of the central region of the partition groove 25, that is, the projected area of the protruding portion of the electrode layer 205 at the bottom of the partition groove 25 is equal to or larger than half of the area of the bottom of the partition groove 25. Thus, the electrode layer 205 can provide a better supporting effect for the subsequent film layer, thereby effectively ensuring the comprehensive performance of the display panel.
Meanwhile, when the partition groove 25 is disposed, the partition groove 25 may form a buffer platform on both sides of the first planarization layer 211 corresponding to the bottom of the second opening 2312, so that other films may be laid on the buffer platform, and the continuity of the films in different regions may be ensured.
As shown in fig. 3, fig. 3 is a schematic plan view of a pixel unit of a display panel according to an embodiment of the present disclosure. A plurality of pixel units are arranged on an array substrate of the display panel, wherein each pixel unit is correspondingly arranged in a pixel opening area of the pixel definition layer.
The pixel unit in the embodiment of the present application includes a plurality of light emitting sub-pixels, and each pixel unit may include, for example, a red sub-pixel 300, a blue sub-pixel 301, and a green sub-pixel 302. When the red sub-pixel 300, the blue sub-pixel 301 and the green sub-pixel 302 are disposed, each sub-pixel may be disposed in a long or wide array with respect to the display panel, and finally, the light emitting region of the entire panel is formed on the array substrate.
Further, in the embodiment of the present application, in order to improve the light emitting effect of the display panel and the light emitting performance of the display panel, when the sub-pixels with different colors are disposed, the pixel area of the blue sub-pixel 301 is larger than the pixel area of the red sub-pixel 300, and the pixel area of the red sub-pixel 300 is larger than the pixel area of the green sub-pixel.
In the embodiment of the present application, in order to prevent color mixing of two adjacent light emitting sub-pixels, a partition groove 25 is further provided in the pixel opening region. Specifically, the blocking groove 25 is provided at least in the opening area corresponding to between two adjacent sub-pixels. Because the partition groove 25 is arranged between two adjacent sub-pixels, and the electrode layer and the light-emitting layer arranged on the partition groove 25 are discontinuous, the problem that the sub-pixels are stolen to be bright due to lateral current between two adjacent light-emitting units is effectively avoided.
Further, as shown in fig. 4 to 5, fig. 4 to 5 are schematic plan views of an arrangement of another pixel unit and a partition groove provided in an embodiment of the present application. Meanwhile, with reference to the schematic diagram in fig. 3, for a high-resolution display panel, when the partition groove 25 is provided, the partition groove 25 may also be provided only between two adjacent sub-pixels in a part of pixel units, or the partition groove 25 may be provided between two different pixel units, so as to avoid the problem of color mixing between different pixels of the display panel to a certain extent.
Meanwhile, when the partition groove 25 is provided, the partition groove 25 may be continuously provided on the array substrate. Specifically, as shown in fig. 5, the partition groove 25 is continuously disposed in the opening area corresponding to different pixel units, specifically, the partition groove 25 is continuously disposed between three different pixel units, so that the problem of overlapping between two adjacent sub-pixels is effectively prevented, and the occurrence of a side circuit of the display panel is avoided. The arrangement positions of the partition grooves 25 in the embodiment of the present application are merely examples, and for different display products, partition grooves 25 of different types or sizes may be provided in different opening regions, and detailed description is omitted here.
Further, the display panel in the embodiment of the present application may further include a protrusion 28. When the protrusions 28 are disposed, the protrusions 28 are disposed in the partition grooves 25, and the protrusions 28 are not in contact with the film layer or the sidewall around the partition grooves 25, so that the upper surfaces of the protrusions 28 are flush with the light-emitting functional layer 207. In the embodiment of the present application, the protrusions 28 may be made of an insulating material, and the protrusions 28 are disposed in the partition groove 25, so as to support the film layer disposed in the area above the partition groove 25, so as to further improve the reliability of the display panel.
The array substrate 20 in the embodiment of the present invention specifically includes: a substrate 200, a buffer layer 201, an inorganic insulating layer 202, a first gate insulating layer 203, and a second gate insulating layer 204. Wherein the buffer layer 201 is disposed on the substrate 200, the inorganic insulating layer 202 is disposed on the buffer layer 201, the first gate insulating layer 203 is disposed on the inorganic insulating layer 202, the second gate insulating layer 204 is disposed on the first gate insulating layer 203, and the first planarization layer 211 is disposed on the second gate insulating layer 204.
Meanwhile, in the array substrate 20, a thin film transistor 27 is further provided. The thin film transistor includes an active layer 271, a source electrode 270, a drain electrode 273, and a gate electrode 272. The electrodes are correspondingly arranged between different film layers, as shown in fig. 1. In the embodiment of the present application, two gates may be provided, and the detailed structure of the thin film transistor 27 is not described in detail herein.
Further, in the display panel provided in the embodiment of the present application, the anode 242 is electrically connected to the drain 273 of the thin film transistor 27 through the corresponding via hole, and meanwhile, the anode 242 and the electrode layer 205 are formed in the same etching process.
Preferably, the embodiment of the application further provides a preparation method of the display panel. As shown in fig. 6, fig. 6 is a schematic view of a film layer corresponding to the preparation method provided in the embodiment of the present application.
A substrate 200 is provided, and the array substrate 20 in the embodiment of the present application is sequentially prepared and formed on the substrate 200. Specifically, the thin film transistor 27 and the interlayer structure are provided in the array substrate 20. The specific structure is as described above, and will not be described in detail here. After the array substrate 20 is arranged, a first planarization layer 211 is prepared on the array substrate 20, wherein the first planarization layer 211 is an inorganic planarization layer. After the first planarization layer 211 is disposed, the second planarization layer 212 is disposed on the first planarization layer 211, in the embodiment of the present invention, the second planarization layer 212 is an organic planarization layer.
After the second planarization layer 212 is disposed, etching is performed at corresponding positions to form the first and second pixel opening regions 231 and 232 and the pixel defining region 24. In the embodiment of the present invention, the first pixel opening region 231 corresponds to the pixel light emitting region, and the second pixel opening region 232 corresponds to the non-light emitting region.
And simultaneously, etching to form a via hole on the corresponding film layer. After the etching is completed, the electrode layer 205 is provided on the second planarizing layer 212. In the embodiment of the present application, a portion of the electrode layer 205 is electrically connected to the drain of the thin film transistor 27 through the via hole, and the portion of the electrode layer 205 forms a corresponding anode 242 partially exposed in the first pixel opening 231. Another portion of the electrode layer 205 is at least partially exposed in the second opening region 232 and contacts the first planarization layer 211, and one end of the another portion of the electrode layer 205 extends to the second planarization layer 212. So that the support structure is subsequently etched in the second open region 232.
After the above-mentioned film layers are prepared, as shown in fig. 7, fig. 7 is a schematic view of a film layer structure corresponding to another display panel provided in the embodiment of the present application. After the electrode layer 205 is completely disposed and etched at the corresponding position, a pixel defining layer 206 is deposited and etched. While corresponding openings are formed at corresponding positions.
Specifically, the first planarization layer 212 is laterally etched at the position of the second opening 2312 corresponding to the second pixel opening region 232 by using a dry etching process, and during the lateral etching, under the protection of the electrode layer 205, the etched first planarization layer 211 and the electrode layer 205 are formed to block the trench 25. Wherein, at least one side edge of the electrode layer 205 extends into the isolation groove 25. Preferably, one end of the partition groove 25 extends toward the central region of the partition groove 25 and extends to the other side of the central region, so as to increase the coverage area of the electrode layer 205 on the opening of the partition groove 25, thereby providing sufficient support for the subsequent film layer.
After the lateral etching of the first planarization layer 211 is completed, various materials remaining during the etching process are removed. As shown in fig. 8, fig. 8 is a schematic view of a film structure corresponding to another display panel provided in the embodiment of the present application. On the basis of the preparation of fig. 7, the light emitting function layer 207 is further prepared on the pixel defining layer 206.
In the embodiment of the present application, the light emitting function layer 207 has a better conductive performance, and meanwhile, light emitting function layers with different colors, such as red pixel light emitting function layers, may be disposed in different opening regions. Specifically, the light-emitting functional layer 207 is directly evaporated on the pixel defining layer 206 and other film layers on the light-emitting side of the display panel by an evaporation process, for example, the corresponding light-emitting functional layer 207 is evaporated on the corresponding film layer in the opening region, and after the light-emitting functional layer 207 is prepared, the cathode 208 is formed on the light-emitting functional layer 207 by evaporation.
In the embodiment of the present application, since the electrode layer 205 is discontinuous in the region corresponding to the partition groove 25, when the light-emitting functional layer 207 is formed by vapor deposition, the light-emitting functional layer 207 is also discontinuous in the position corresponding to the partition groove 25.
Thus, the light-emitting function layers 207 on both sides of the partition groove 25 are not electrically connected, that is, the adjacent two sub-pixels cannot be electrically connected in the lateral direction, and thus a lateral flowing current cannot be generated. Therefore, in the embodiment of the present application, the partition groove is provided at a corresponding position, the partition groove is similar to a "hat brim" structure, and the light-emitting functional layer 207, the electrode layer 205 and the cathode 208 are not continuous in the corresponding region above the partition groove, so that the problem of the brightness of the display panel is effectively prevented.
Further, an embodiment of the present application further provides a display device, which includes the display panel provided in the embodiment of the present application, wherein a structure of the partition groove is provided in the film layer inside the display panel, and the structure and the arrangement manner of the partition groove are as described above. The display device can be widely applied to various display equipment, has better performance, and cannot cause the problem of surreptitious lighting between adjacent pixels when the display panel normally emits light.
The display panel and the display device provided by the embodiment of the present invention are described in detail above, and the principle and the embodiment of the present invention are explained in the present document by applying specific examples, and the description of the above embodiments is only used to help understanding the technical scheme and the core idea of the present invention; those of ordinary skill in the art will understand that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; and such modifications or substitutions do not depart from the spirit and scope of the corresponding technical solutions of the embodiments of the present invention.
Claims (9)
1. A display panel, comprising:
an array substrate;
a planarization layer disposed on the array substrate;
an electrode layer disposed on the planarization layer;
a pixel defining layer disposed on the electrode layer, the pixel defining layer including a pixel opening region and a pixel defining region disposed at one side of the pixel opening region; and the number of the first and second groups,
a light emitting function layer disposed on and covering the pixel defining layer;
in the pixel opening area, a separation groove is arranged on the planarization layer, the electrode layer covers part of the separation groove and forms an accommodating space with the planarization layer, and the light-emitting function layer and the electrode layer are discontinuous on the separation groove;
the display panel further comprises a protrusion, the protrusion is arranged in the partition groove, and the protrusion is not in contact with the film layers on two sides of the partition groove.
2. The display panel according to claim 1, wherein the pixel opening region includes a first pixel opening region and a second pixel opening region, the first pixel opening region, the pixel defining region and the second pixel opening region are sequentially disposed, and the blocking groove is disposed in the second pixel opening region.
3. The display panel according to claim 2, wherein the first pixel opening region includes a first opening therein, the second pixel opening region includes a second opening, and an opening depth of the second opening is greater than an opening depth of the first opening.
4. The display panel according to claim 3, wherein the first opening extends through the pixel defining layer, and the second opening extends through the pixel defining layer and a portion of the planarization layer.
5. The display panel according to claim 1, wherein the projected area of the electrode layer on the bottom of the partition groove is equal to or larger than half of the area of the bottom of the partition groove.
6. The display panel according to claim 1, wherein the blocking groove is provided at least between two adjacent pixel units.
7. The display panel according to claim 1, wherein an upper surface of the projection is flush with the light emission functional layer.
8. The display panel of claim 1, further comprising an anode correspondingly disposed in the pixel opening region, wherein the anode is electrically connected to the array substrate through a via, and the anode and the electrode layer are formed in the same process.
9. A display device comprising a display panel comprising the display panel according to any one of claims 1 to 8;
the display panel comprises a display panel and a planarization layer, wherein a partition groove is formed in the planarization layer of the display panel, an electrode layer of the display panel covers part of the partition groove and forms an accommodating space with the partition groove, and a light-emitting function layer of the display panel and an electrode layer of the display panel are discontinuous on the partition groove;
the display panel further comprises a protrusion, the protrusion is arranged in the partition groove, and the protrusion is not in contact with the film layers on two sides of the partition groove.
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| CN105552107A (en) * | 2016-02-29 | 2016-05-04 | 上海天马有机发光显示技术有限公司 | Display panel, manufacturing method and electronic equipment |
| CN105895664B (en) * | 2016-05-31 | 2019-08-02 | 上海天马有机发光显示技术有限公司 | A kind of display panel, production method and electronic equipment |
| KR20180036434A (en) * | 2016-09-30 | 2018-04-09 | 엘지디스플레이 주식회사 | Organic light emitting display device and method of manufacturing the same |
| CN106876331B (en) * | 2017-03-03 | 2019-11-22 | 武汉华星光电技术有限公司 | OLED display panel and preparation method thereof, display device |
| CN107134532B (en) * | 2017-04-10 | 2019-07-12 | 深圳市华星光电半导体显示技术有限公司 | A kind of organic light emitting display panel |
| CN107359263A (en) * | 2017-07-12 | 2017-11-17 | 京东方科技集团股份有限公司 | A kind of organic EL display panel and preparation method, display device |
| CN108649057B (en) * | 2018-05-14 | 2020-07-31 | 京东方科技集团股份有限公司 | Display panel, manufacturing method thereof and display device |
| CN108717942B (en) * | 2018-05-31 | 2021-11-19 | 京东方科技集团股份有限公司 | OLED substrate, manufacturing method thereof and display device |
| KR102646218B1 (en) * | 2018-11-02 | 2024-03-08 | 엘지디스플레이 주식회사 | Electroluminescent Display Device |
| CN109560117B (en) * | 2018-12-21 | 2022-04-12 | 合肥鑫晟光电科技有限公司 | Array substrate, preparation method thereof and display device |
| KR20200091059A (en) * | 2019-01-21 | 2020-07-30 | 삼성디스플레이 주식회사 | Organic light emitting display device and method manufacturing the same |
| CN110085648B (en) * | 2019-05-17 | 2021-03-16 | 京东方科技集团股份有限公司 | Array substrate, manufacturing method thereof, display panel and display device |
| CN111162196B (en) * | 2020-01-02 | 2022-05-03 | 厦门天马微电子有限公司 | Display panel and display device |
| CN113097409B (en) * | 2021-03-17 | 2023-04-18 | 深圳市华星光电半导体显示技术有限公司 | Display panel, display device and manufacturing method of display panel |
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