CN113178524B - Display panel, display panel manufacturing method and display device - Google Patents
Display panel, display panel manufacturing method and display device Download PDFInfo
- Publication number
- CN113178524B CN113178524B CN202110380753.XA CN202110380753A CN113178524B CN 113178524 B CN113178524 B CN 113178524B CN 202110380753 A CN202110380753 A CN 202110380753A CN 113178524 B CN113178524 B CN 113178524B
- Authority
- CN
- China
- Prior art keywords
- layer
- light emitting
- electrode
- display panel
- current blocking
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K50/00—Organic light-emitting devices
- H10K50/10—OLEDs or polymer light-emitting diodes [PLED]
- H10K50/11—OLEDs or polymer light-emitting diodes [PLED] characterised by the electroluminescent [EL] layers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K50/00—Organic light-emitting devices
- H10K50/80—Constructional details
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K50/00—Organic light-emitting devices
- H10K50/80—Constructional details
- H10K50/805—Electrodes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
- H10K59/1201—Manufacture or treatment
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
Abstract
The embodiment of the application discloses a display panel, a manufacturing method of the display panel and a display device, wherein the display panel comprises an array substrate and light-emitting devices arranged on the array substrate in an array manner; the current blocking structure comprises an auxiliary layer in a slit shape and a groove below the slit of the auxiliary layer, the cross section of a film layer of the groove is provided with an undercut outline, current can be prevented from flowing transversely between adjacent sub-pixels, and therefore the problem of stealing brightness of the sub-pixels caused by transverse flow of current is solved.
Description
Technical Field
The application relates to the field of display, in particular to a display panel, a display panel manufacturing method and a display device.
Background
Organic light emitting display panels (OLED panels) have been widely used in human life, such as display screens of mobile phones, computers, and the like. With the development of display technology and the requirements of people on the progress of display technology, people have higher and higher requirements on the display quality of display panels.
However, there is always a problem of stealing luminance of the sub-pixels in the organic light emitting display panel, because there is a lateral leakage current between adjacent sub-pixels, for example, when the green sub-pixel displays, and when the blue sub-pixel is turned off, the green sub-pixel is adjacent to the blue sub-pixel, and then the current in the green sub-pixel flows laterally into the blue sub-pixel, so that the blue sub-pixel emits light and cannot present a full black state, which seriously affects the display quality of the organic light emitting display panel.
Disclosure of Invention
The embodiment of the application provides a display panel, a manufacturing method of the display panel and a display device, wherein a current blocking structure is arranged between adjacent light-emitting devices in the display panel, and the current blocking structure enables a public light-emitting material layer and a second electrode to be disconnected on the current blocking structure, so that current is prevented from flowing transversely between adjacent sub-pixels through the public light-emitting material layer or/and the second electrode, and the problem of stealing and lighting of the sub-pixels caused by the transverse flow of the current is solved.
The embodiment of the application provides a display panel, which comprises an array substrate and light-emitting devices arranged on the array substrate in an array manner;
the light emitting device comprises at least one light emitting device and is characterized in that a current blocking structure is arranged between the adjacent light emitting devices in at least one arrangement direction, the current blocking structure comprises an auxiliary layer in a slit shape and a groove below the slit of the auxiliary layer, and the cross section of a film layer of the groove is provided with an undercut profile.
Optionally, in some embodiments of the present application, the array substrate includes a pixel definition layer disposed between adjacent light emitting devices, the pixel definition layer including an opening for exposing the light emitting devices;
the light-emitting device comprises a first electrode arranged on the array substrate, a public light-emitting material layer arranged on the first electrode, and a second electrode arranged on the public light-emitting material layer;
the pixel defining layer, the common light emitting material layer, and the second electrode are disconnected on the current blocking structure.
Optionally, in some embodiments of the present application, the array substrate includes a first insulating layer, the first electrode is disposed on the first insulating layer, and the pixel defining layer is disposed on an end portion of the first electrode and the first insulating layer;
the auxiliary layer is arranged on the first insulating layer and is positioned between two adjacent first electrodes;
the pixel defining layer further includes a via hole above the auxiliary layer to expose the slit of the auxiliary layer and the groove.
Optionally, in some embodiments of the present application, the first electrode is located at the opening of the pixel defining layer, and an end portion of the first electrode is located above the pixel defining layer;
the auxiliary layer is located above the pixel definition layer and between the adjacent first electrodes, and the pixel definition layer comprises the groove.
Optionally, in some embodiments of the present application, the auxiliary layer is made of metal.
Optionally, in some embodiments of the present application, the auxiliary layer is made of the same material as the first electrode and is disposed in the same layer.
Alternatively, in some embodiments of the present application,
the current blocking structure comprises a first current blocking structure arranged between the adjacent light emitting devices along a first direction and a second current blocking structure arranged between the adjacent light emitting devices along a second direction, the first current blocking structure and the second current blocking structure do not intersect, and the first direction and the second direction intersect.
Optionally, in some embodiments of the present application, a first region of the forward pair and a second region at two ends of the first region are included between adjacent light emitting devices, and the current blocking structure is disposed in the first region.
Correspondingly, the embodiment of the application also provides a manufacturing method of the display panel, which comprises the following steps:
providing an array substrate, wherein the array substrate comprises an array composite layer;
forming a first electrode and an auxiliary layer on the array composite layer, wherein the auxiliary layer is in a slit shape, and the auxiliary layer and the first electrode are made of the same material and are arranged on the same layer;
forming a pixel definition layer and a groove below a slit of the auxiliary layer on the first electrode and the auxiliary layer, wherein the film layer section of the groove has an undercut profile, the pixel definition layer comprises an opening for exposing a light emitting device, and a through hole for exposing the slit of the auxiliary layer and the groove;
forming a common light emitting material layer on the pixel defining layer;
and forming a second electrode on the common light emitting material layer.
Correspondingly, an embodiment of the present application further provides a display device, including the display panel described in any one of the above.
In the embodiment of the application, the current blocking structure is arranged between the adjacent light emitting devices of the display panel, and the common light emitting material layer and the second electrode are disconnected on the current blocking structure by the current blocking structure, so that the current is prevented from transversely flowing between the adjacent sub-pixels through the common light emitting material layer or/and the second electrode, and the problem of stealing and lighting of the sub-pixels caused by the transverse flowing of the current is solved.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
Fig. 1 is a schematic cross-sectional view of a first display panel according to an embodiment of the present disclosure;
fig. 2 is a schematic top view of a display panel according to an embodiment of the present application;
FIG. 3 is a schematic top view of another display panel provided in an embodiment of the present application;
fig. 4 is a schematic cross-sectional view of a second display panel according to an embodiment of the present application;
FIG. 5 is a schematic top view of a portion of another display panel according to an embodiment of the present disclosure;
fig. 6 is a first schematic diagram illustrating a method for manufacturing a display panel according to an embodiment of the present disclosure;
fig. 7 is a second schematic view illustrating a manufacturing method of a display panel according to an embodiment of the disclosure;
fig. 8 is a third schematic view illustrating a manufacturing method of a display panel according to an embodiment of the present application.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application. Furthermore, it should be understood that the detailed description and specific examples, while indicating preferred embodiments of the present application, are given by way of illustration and explanation only, and are not intended to limit the present application. In the present application, unless indicated to the contrary, the use of the directional terms "upper" and "lower" generally refer to the upper and lower positions of the device in actual use or operation, and more particularly to the orientation of the figures of the drawings; while "inner" and "outer" are with respect to the outline of the device.
The embodiment of the application provides a display panel, a display panel manufacturing method and a display device. The following are detailed below. It should be noted that the following description of the embodiments is not intended to limit the preferred order of the embodiments.
The first embodiment,
Referring to fig. 1, fig. 2, and fig. 3, fig. 1 is a cross-sectional view of a display panel 1000 according to an embodiment of the present disclosure, fig. 2 is a top view of the display panel 1000 according to the embodiment of the present disclosure, fig. 3 is a top view of another display panel 1000 according to the embodiment of the present disclosure, an embodiment of the present disclosure provides a display panel 1000, the display panel 1000 includes an array substrate and light emitting devices 59 arranged in the array substrate in an array, wherein a current blocking structure 60 is arranged between the light emitting devices 59 adjacent to each other in at least one arrangement direction, the current blocking structure 60 includes an auxiliary layer 190 in a slit shape, and a groove 181 below a slit 191 of the auxiliary layer 190, and a cross section of the groove 181 has an undercut profile.
Specifically, the display panel 1000 includes a plurality of light emitting devices 59 arranged in an array, as shown in fig. 2 and 3, the light emitting devices 59 may include a first color light emitting device 61, a second color light emitting device 62, and a third color light emitting device 63, the first color light emitting device 61 may be a red light emitting device, the second color light emitting device 62 may be a green light emitting device, and the third color light emitting device 63 may be a blue light emitting device. Fig. 2 illustrates that the current blocking structure 60 is disposed between the light emitting devices 59 adjacent in the first direction, and fig. 3 illustrates that the current blocking structure 60 is disposed between the light emitting devices 59 adjacent in both the first direction and the second direction, the first direction intersecting the second direction, for example, the first direction and the second direction being perpendicular to each other.
Specifically, the current blocking structure 60 includes the auxiliary layer 190 in a slit shape, the auxiliary layer 190 may include two or more slit-shaped structures, the groove 181 is formed below the slit 191 of the auxiliary layer 190, and a cross section of the groove 181 has an undercut profile, in a cross-sectional view, a width of a side of the groove 181 far away from the auxiliary layer 190 is larger than a width of a side of the groove 181 close to the auxiliary layer 190.
In some embodiments, as shown in fig. 1, the array substrate includes a pixel defining layer 20 disposed between adjacent light emitting devices 59, the pixel defining layer 20 including openings for exposing the light emitting devices 59; the light emitting device 59 includes a first electrode 19 disposed on the array substrate, a color emission layer 21 disposed on the first electrode 19, a common light emitting material layer 22 disposed on the color emission layer 21, and a second electrode 23 disposed on the common light emitting material layer 22; the pixel defining layer 20, the common light emitting material layer 22 and the second electrode 23 are disconnected on the current blocking structure.
In some embodiments, as shown in fig. 1, the array substrate includes a first insulating layer 18, a first electrode 19 is disposed on the first insulating layer 18, and a pixel defining layer 20 is disposed on an end portion of the first electrode 19 and the first insulating layer 18; the auxiliary layer 190 is disposed on the first insulating layer 18 and located between two adjacent first electrodes 19; the pixel defining layer 20 further includes a via hole 210 above the auxiliary layer 190, and the slit 191 and the groove 181 of the auxiliary layer 190 may be exposed through the via hole 210.
Specifically, the display panel 1000 includes a substrate 11, a buffer layer 12 disposed on the substrate 11, a semiconductor layer 13 disposed on the buffer layer 12, a gate insulating layer 14 disposed on the semiconductor layer 13, a gate layer 15 disposed on the gate insulating layer 14, an interlayer insulating layer 16 disposed on the gate layer 15, a source-drain layer 17 disposed on the interlayer insulating layer 16, a first insulating layer 18 disposed on the source-drain layer 17, a first electrode 19 disposed on the first insulating layer 18, a pixel definition layer 20 disposed on the first electrode 19, a color emission layer 21 disposed on the pixel definition layer 20, a common emission layer 22 disposed on the color emission layer 21, and a second electrode 23 disposed on the common emission layer 22, and the display panel 1000 may further include an encapsulation layer (not shown), which may be a thin film encapsulation layer or/and a cover plate encapsulation layer, and is not limited herein. The gate layer 15 may include a gate trace and a gate 151, the source drain layer 17 may include a source electrode 171, a drain electrode 172 and a data line, and the thin film transistor 100 is formed by the semiconductor layer 13, the gate insulating layer 14, the gate 151, the interlayer insulating layer 16, the source electrode 171 and the drain electrode 172.
Although the structure of the display panel 1000 is described here as an example, the structure of the display panel 1000 may be another structure.
It should be noted that the structure of the thin film transistor 100 is described here by way of example, but the thin film transistor 100 may also have another structure, for example, a bottom gate structure. The material of the semiconductor layer of the thin film transistor 100 is not limited, and may be, for example, amorphous silicon or low temperature polysilicon.
It is to be noted that although the light-emitting device 59 including the first electrode 19, the color light-emitting layer 21, the common light-emitting layer 22, and the second electrode 23 is exemplified here, the light-emitting device 59 may include other structures, for example, a multilayer structure of the first electrode 19, the common light-emitting layer 22, the color light-emitting layer 21, the common light-emitting layer 22, and the second electrode 23. The common light emitting layer 22 includes, but is not limited to, one or more of a hole injection layer, a hole transport layer, an electron injection layer, and an electron transport layer. Among them, the color light emitting layers 21 may emit light of different colors, for example, the color light emitting layer 21 in a red light emitting device emits red light, the color light emitting layer 21 in a green light emitting device emits green light, and the color light emitting layer 21 in a blue light emitting device emits blue light. The first electrode 19 of the light emitting device 59 may be an anode, and the second electrode 23 of the light emitting device 59 may be a cathode.
Specifically, the first insulating layer 18 may be a flat layer, the material of the first insulating layer 18 may be silicon oxide, silicon nitride, or the like among inorganic materials, and the material of the first insulating layer 18 may be a resin among organic materials, or the like.
In the embodiment of the present application, as shown in fig. 1, the auxiliary layer 190 is disposed on the first insulating layer 18 and located between two adjacent first electrodes 19; the pixel defining layer 20 further includes a via hole 210 above the auxiliary layer 190 to expose the slit and the groove 181 of the auxiliary layer 190, and the pixel defining layer 20, the common light emitting material layer 22, and the second electrode 23 are disconnected on the current blocking structure.
In some embodiments, the auxiliary layer 190 is made of metal.
In some embodiments, the auxiliary layer 190 is the same material as the first electrode 19 and is disposed in the same layer. Specifically, the auxiliary layer 190 is formed through the same process as the first electrode 19.
Specifically, when the first electrode 19 is formed, the auxiliary layer 190 is formed at the same time, the auxiliary layer 190 is formed of at least two slit metals, preferably, the auxiliary layer 190 is formed of two slit metals, and the recess 181 is formed in the first insulating layer 18.
In the display panel of the embodiment of the application, the current blocking structure is arranged between the adjacent light emitting devices, and the common light emitting material layer 22 and the second electrode 23 are disconnected on the current blocking structure by the current blocking structure, so that the current is prevented from flowing transversely between the adjacent sub-pixels through the common light emitting material layer 22 or/and the second electrode 23, and the problem of the sub-pixel lighting caused by the transverse flow of the current is solved.
Example II,
Referring to fig. 4, fig. 2, and fig. 3, fig. 4 is a cross-sectional view of a display panel 1000 according to an embodiment of the present disclosure, fig. 2 is a top view of the display panel 1000 according to the embodiment of the present disclosure, fig. 3 is a top view of another display panel 1000 according to the embodiment of the present disclosure, the embodiment of the present disclosure provides a display panel 1000, the display panel 1000 includes an array substrate and light emitting devices 59 arranged in the array substrate in an array, wherein a current blocking structure 60 is arranged between the light emitting devices 59 adjacent to each other in at least one arrangement direction, the current blocking structure 60 includes an auxiliary layer 190 in a slit shape, and a groove 181 below a slit 191 of the auxiliary layer 190, and a cross section of the groove 181 has an undercut profile.
Specifically, the display panel 1000 includes a plurality of light emitting devices arranged in an array, as shown in fig. 2 and 3, the light emitting device 59 includes a first color light emitting device 61, a second color light emitting device 62, and a third color light emitting device 63, the first color light emitting device 61 may be a red light emitting device, the second color light emitting device 62 may be a green light emitting device, and the third color light emitting device 63 may be a blue light emitting device. Fig. 2 illustrates that the current blocking structure 60 is disposed between the light emitting devices 59 adjacent in the first direction, and fig. 3 illustrates that the current blocking structure 60 is disposed between the light emitting devices 59 adjacent in both the first direction and the second direction, and the first direction intersects the second direction, for example, the first direction and the second direction are perpendicular to each other.
Specifically, the current blocking structure 60 includes the auxiliary layer 190 in a slit shape, the auxiliary layer 190 may include two or more slit-shaped structures, the groove 181 is formed below the slit 191 of the auxiliary layer 190, and a cross section of the groove 181 has an undercut profile, in a cross-sectional view, a width of a side of the groove 181 far away from the auxiliary layer 190 is larger than a width of a side of the groove 181 close to the auxiliary layer 190.
In some embodiments, as shown in fig. 4, the array substrate includes a pixel defining layer 20 disposed between adjacent light emitting devices 59, the pixel defining layer 20 including openings for exposing the light emitting devices 59; the light emitting device 59 includes a first electrode 19 disposed on the array substrate, a color emission layer 21 disposed on the first electrode 19, a common light emitting material layer 22 disposed on the color emission layer 21, and a second electrode 23 disposed on the common light emitting material layer 22; the pixel defining layer 20, the common light emitting material layer 22, and the second electrode 23 are disconnected on the current blocking structure.
In some embodiments, as shown in fig. 1, the first electrode 19 is located at the opening of the pixel defining layer 20, and the end portion of the first electrode 19 is located above the pixel defining layer 20; the auxiliary layer 190 is disposed on the pixel defining layer 20 and between the adjacent first electrodes 19, and the pixel defining layer 20 includes a groove 181.
Specifically, the display panel 1000 includes a substrate 11, a buffer layer 12 disposed on the substrate 11, a semiconductor layer 13 disposed on the buffer layer 12, a gate insulating layer 14 disposed on the semiconductor layer 13, a gate layer 15 disposed on the gate insulating layer 14, an interlayer insulating layer 16 disposed on the gate layer 15, a source-drain layer 17 disposed on the interlayer insulating layer 16, a first insulating layer 18 disposed on the source-drain layer 17, a pixel defining layer 20 disposed on the first insulating layer 18, a first electrode 19 disposed on an opening of the pixel defining layer 20, a color light emitting layer 21 disposed on the first electrode 19, a common light emitting layer 22 disposed on the color light emitting layer 21, and a second electrode 23 disposed on the common light emitting layer 22, and the display panel 1000 may further include an encapsulation layer (not shown), which may be a thin film encapsulation layer or/and a cover plate encapsulation layer, which is not limited herein. The gate layer 15 may include a gate trace and a gate 151, the source drain layer 17 may include a source electrode 171, a drain electrode 172 and a data line, and the thin film transistor 100 is formed by the semiconductor layer 13, the gate insulating layer 14, the gate 151, the interlayer insulating layer 16, the source electrode 171 and the drain electrode 172.
Although the structure of the display panel 1000 is described here as an example, the structure of the display panel 1000 may be another structure.
It should be noted that the structure of the thin film transistor 100 is described here by way of example, but the thin film transistor 100 may also have another structure, for example, a bottom gate structure. The material of the semiconductor layer of the thin film transistor 100 is not limited, and may be, for example, amorphous silicon or low temperature polysilicon.
It should be noted that although the light-emitting device 59 including the first electrode 19, the color light-emitting layer 21, the common light-emitting layer 22, and the second electrode 23 is illustrated here, the light-emitting device 59 may include other structures, such as a multilayer structure of the first electrode 19, the common light-emitting layer 22, the color light-emitting layer 21, the common light-emitting layer 22, and the second electrode 23. The common light emitting layer 22 includes, but is not limited to, one or more of a hole injection layer, a hole transport layer, an electron injection layer, and an electron transport layer. Among them, the color light emitting layers 21 may emit light of different colors, for example, the color light emitting layer 21 in a red light emitting device emits red light, the color light emitting layer 21 in a green light emitting device emits green light, and the color light emitting layer 21 in a blue light emitting device emits blue light. The first electrode 19 of the light emitting device 59 may be an anode, and the second electrode 23 of the light emitting device 59 may be a cathode.
Specifically, the first insulating layer 18 may be a flat layer, the material of the first insulating layer 18 may be silicon oxide, silicon nitride, or the like among inorganic materials, and the material of the first insulating layer 18 may be a resin among organic materials, or the like.
In the embodiment of the present application, as shown in fig. 4, the auxiliary layer 190 is disposed on the pixel defining layer 20 and located between two adjacent first electrodes 19; the pixel defining layer 20 includes a groove 181 under the slit 191 of the auxiliary layer 190, a cross-section of the groove 181 exhibits an undercut profile, and the pixel defining layer 20, the common light emitting material layer 22, and the second electrode 23 are disconnected on the current blocking structure.
In some embodiments, the auxiliary layer 190 is made of metal.
In some embodiments, the auxiliary layer 190 is the same material as the first electrode 19 and is disposed in the same layer. Specifically, the auxiliary layer 190 is formed through the same process as the first electrode 19.
Specifically, when the first electrode 19 is formed, the auxiliary layer 190 is formed at the same time, the auxiliary layer 190 is formed of at least two slit metals, preferably, the auxiliary layer 190 is formed of two slit metals, and the groove 181 is formed in the pixel defining layer 20.
In the display panel of the embodiment of the application, the current blocking structure is arranged between the adjacent light emitting devices, and the common light emitting material layer 22 and the second electrode 23 are disconnected on the current blocking structure by the current blocking structure, so that the current is prevented from flowing transversely between the adjacent sub-pixels through the common light emitting material layer 22 or/and the second electrode 23, and the problem of the sub-pixel lighting caused by the transverse flow of the current is solved.
Example III,
The present embodiment further describes in detail the installation location of the current blocking structure in the above embodiments.
In some embodiments, referring to fig. 3, the current blocking structure 60 includes a first current blocking structure 610 between adjacent light emitting devices 59 arranged along a first direction and a second current blocking structure 620 between adjacent light emitting devices 59 arranged along a second direction, the first current blocking structure 610 does not intersect with the second current blocking structure 620, and the first direction intersects with the second direction.
Specifically, the first current blocking structure 610 in the first direction does not intersect with the second current blocking structure 620 in the second direction, so that the second electrodes 23 between the adjacent light emitting devices 59 are not insulated from each other, smooth supply of electric signals can be maintained, normal supply of signals of the second electrodes 23 can be ensured, and meanwhile, the transverse leakage current is prevented from reaching the adjacent sub-pixels through the shortest distance, so that the transverse leakage current is blocked, and the phenomenon of stealing and lighting of the sub-pixels is avoided.
Specifically, it is preferable that the first direction is perpendicular to the second direction.
In some embodiments, referring to fig. 5, fig. 5 is a top view of a portion of the light emitting devices of the display panel, a first region 71 of a forward pair is included between adjacent light emitting devices 59, and a second region 72 at two ends of the first region 71 is not opposite to the first region, and the current blocking structure 60 is disposed in the first region 71.
Specifically, the current blocking structure 60 is disposed in the first region 71, and the current blocking structure 60 is not disposed in the second region 72, so that the adjacent light emitting devices 59 can also keep smooth electrical property through the second electrode of the second region 72, thereby ensuring normal signal supply of the second electrode 23, and preventing the lateral leakage current from reaching the adjacent sub-pixel through the first region 71 with the shortest distance, thereby blocking the lateral leakage current, and avoiding the sub-pixel from being stolen.
Example four,
Referring to fig. 6 to 8 and 1, fig. 6 to 8 and 1 illustrate a manufacturing process of a display panel, and the present embodiment further provides a manufacturing method of a display panel according to a first embodiment, where the manufacturing method of the display panel includes:
1) as shown in fig. 6, an array substrate is provided, and the array substrate includes a substrate 11 and an array composite layer;
specifically, the array composite layer includes a buffer layer 12 disposed on the substrate 11, a semiconductor layer 13 disposed on the buffer layer 12, a gate insulating layer 14 disposed on the semiconductor layer 13, a gate layer 15 disposed on the gate insulating layer 14, an interlayer insulating layer 16 disposed on the gate layer 15, a source/drain layer 17 disposed on the interlayer insulating layer 16, and a first insulating layer 18 disposed on the source/drain layer 17. The first insulating layer may be a flat layer.
2) As shown in fig. 7, a first electrode 19 and an auxiliary layer 190 are formed on the array composite layer, wherein the auxiliary layer 190 is in a slit shape, the auxiliary layer 190 is made of the same material as the first electrode 19 and is disposed in the same layer, and the auxiliary layer 190 is located between the adjacent first electrodes 19. Specifically, the auxiliary layer 190 is formed through the same process as the first electrode 19.
3) As shown in fig. 8, a pixel defining layer 20 and a groove 181 under the slit of the auxiliary layer 190 are formed on the first electrode 19 and the auxiliary layer 190, wherein a cross-section of the groove 181 has an undercut profile, and the pixel defining layer 20 includes an opening for exposing the light emitting device and a through hole 210 exposing the slit 191 and the groove 181 of the auxiliary layer 190.
Specifically, the pixel defining layer 20 may be made of an inorganic or organic material, the pixel defining layer 20 is formed with an opening for accommodating the light emitting device and a through hole 210 exposing the slit 191 of the auxiliary layer 190, the pixel defining layer is further developed or etched, the developing solution or the etching solution penetrates through the slit 191 of the auxiliary layer 190 to further etch the underlying first insulating layer 18, and the pixel defining layer 20 and the groove 181 may be formed simultaneously by controlling the amount of the developing solution or the etching solution or by controlling the developing or etching time.
4) As shown in fig. 1, a common light emitting material layer 22 is formed on the pixel defining layer 20.
Specifically, when the light emitting material is formed on the pixel defining layer 20, the light emitting device is manufactured according to the stack of the actual light emitting materials of the light emitting device, for example, the light emitting device may include the first electrode 19, the color light emitting layer 21, the common light emitting layer 22, and the second electrode 23, and the light emitting device may also include a multilayer structure of the first electrode 19, the common light emitting layer 22, the color light emitting layer 21, the common light emitting layer 22, and the second electrode 23. The common light-emitting layer 22 includes, but is not limited to, one or more of a hole injection layer, a hole transport layer, an electron injection layer, and an electron transport layer.
5) As shown in fig. 1, a second electrode 23 is formed on the common light emitting material layer 22.
Specifically, the first electrode may be an anode, and the second electrode may be a cathode.
It should be noted that the common light emitting material layer 22 and the second electrode 23 are manufactured in a whole surface manner, that is, no photomask is used in the manufacturing process of the common light emitting material layer 22 and the second electrode 23, and the common light emitting material layer 22 and the second electrode 23 are naturally disconnected on the current blocking structure after film formation, so that lateral current is prevented from flowing laterally between adjacent sub-pixels, and therefore, the brightness of the sub-pixels is improved.
Specifically, the forming of the second electrode 23 further includes forming an encapsulation layer, which is not described herein again.
Example V,
The present embodiment further provides a manufacturing method of the display panel of the second embodiment, where the manufacturing method of the display panel is the same as or similar to the manufacturing method of the fourth embodiment, and details are not repeated here.
It should be noted that, in the above embodiment, the width of the auxiliary layer 190 may be 1 to 20 micrometers, and the width of the gap 191 may be 2 to 12 micrometers.
The difference is that after an array substrate is provided, a pixel defining layer 20 is formed on the array substrate, and then a first electrode 19 and an auxiliary layer 190 are formed on the pixel defining layer 20, the first electrode 19 is located at an opening of the pixel defining layer 20, and an end portion of the first electrode 19 is located above the pixel defining layer 20; the auxiliary layer 190 is located above the pixel defining layer 20 and between the adjacent first electrodes 19. Then, the groove 181 is formed under the slit 191 of the auxiliary layer 190 through a mask, wherein the pixel defining layer 20 includes the groove 181.
Example six,
The embodiment of the application further provides a display device which comprises the display panel.
In the embodiment of the present application, a current blocking structure is disposed between adjacent light emitting devices, and the current blocking structure causes the common light emitting material layer 22 and the second electrode 23 to be disconnected on the current blocking structure, so that a current is prevented from flowing laterally between adjacent sub-pixels through the common light emitting material layer 22 or/and the second electrode 23, and thus the problem of sub-pixel stealing due to the lateral flow of the current is solved.
The display panel, the display panel manufacturing method, and the display device provided in the embodiments of the present application are described in detail above, and specific examples are applied in the present application to explain the principle and the implementation manner of the present application, and the description of the above embodiments is only used to help understanding the method and the core idea of the present application; meanwhile, for those skilled in the art, according to the idea of the present application, the specific implementation manner and the application scope may be changed, and in summary, the content of the present specification should not be construed as a limitation to the present application.
Claims (10)
1. The display panel is characterized by comprising an array substrate and light emitting devices arranged on the array substrate in an array mode, wherein the array substrate comprises a pixel defining layer arranged between the adjacent light emitting devices, and the pixel defining layer comprises an opening used for exposing the light emitting devices;
a current blocking structure is arranged between the adjacent light emitting devices in at least one arrangement direction, the current blocking structure comprises an auxiliary layer in a slit shape and a groove below the slit of the auxiliary layer, and the cross section of a film layer of the groove is provided with an undercut profile;
the light-emitting device comprises a first electrode arranged on the array substrate, a public light-emitting material layer arranged on the first electrode, and a second electrode arranged on the public light-emitting material layer;
the common light emitting material layer and the second electrode are disconnected on the current blocking structure.
2. The display panel according to claim 1, wherein the pixel defining layer is disconnected on the current blocking structure.
3. The display panel according to claim 2, wherein the array substrate includes a first insulating layer, the first electrode is provided on the first insulating layer, and the pixel defining layer is provided on an end portion of the first electrode and the first insulating layer;
the auxiliary layer is arranged on the first insulating layer and is positioned between two adjacent first electrodes;
the pixel defining layer further includes a via hole above the auxiliary layer to expose the slit of the auxiliary layer and the groove.
4. The display panel according to claim 2, wherein the first electrode is located at the opening of the pixel defining layer, and an end portion of the first electrode is located above the pixel defining layer;
the auxiliary layer is located above the pixel defining layer and between the adjacent first electrodes, and the pixel defining layer includes the groove.
5. The display panel according to any one of claims 1 to 4, wherein the auxiliary layer is made of metal.
6. The display panel according to claim 5, wherein the auxiliary layer is made of the same material as the first electrode and is disposed in the same layer.
7. The display panel according to any one of claims 1 to 4,
the current blocking structure comprises a first current blocking structure arranged between adjacent light emitting devices along a first direction and a second current blocking structure arranged between adjacent light emitting devices along a second direction, the first current blocking structure and the second current blocking structure do not intersect with each other, and the first direction intersects with the second direction.
8. The display panel of claim 7,
the light-emitting device comprises a first area and a second area, wherein the first area comprises a forward pair, the second area comprises two ends of the first area, and the current blocking structure is arranged in the first area.
9. A method for manufacturing a display panel is characterized by comprising the following steps:
providing an array substrate, wherein the array substrate comprises an array composite layer;
forming a first electrode and an auxiliary layer on the array composite layer, wherein the auxiliary layer is in a slit shape, and the auxiliary layer and the first electrode are made of the same material and are arranged on the same layer;
forming a pixel definition layer and a groove below a slit of the auxiliary layer on the first electrode and the auxiliary layer, wherein the film layer section of the groove has an undercut profile, the pixel definition layer comprises an opening for exposing a light emitting device, and a through hole for exposing the slit of the auxiliary layer and the groove;
forming a common light emitting material layer on the pixel defining layer, the common light emitting material layer being disconnected on the groove;
and forming a second electrode on the common light emitting material layer, wherein the second electrode is disconnected on the groove.
10. A display device characterized by comprising the display panel according to any one of claims 1 to 8.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110380753.XA CN113178524B (en) | 2021-04-09 | 2021-04-09 | Display panel, display panel manufacturing method and display device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110380753.XA CN113178524B (en) | 2021-04-09 | 2021-04-09 | Display panel, display panel manufacturing method and display device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN113178524A CN113178524A (en) | 2021-07-27 |
| CN113178524B true CN113178524B (en) | 2022-07-12 |
Family
ID=76924709
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202110380753.XA Active CN113178524B (en) | 2021-04-09 | 2021-04-09 | Display panel, display panel manufacturing method and display device |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN113178524B (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN115050787A (en) * | 2022-06-10 | 2022-09-13 | 云谷（固安）科技有限公司 | Display panel, manufacturing method and display device |
Family Cites Families (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP6211873B2 (en) * | 2013-09-30 | 2017-10-11 | 株式会社ジャパンディスプレイ | Organic EL display device and method of manufacturing organic EL display device |
| EP3291299B1 (en) * | 2016-08-31 | 2019-06-26 | LG Display Co., Ltd. | Organic light-emitting array and organic light-emitting display device using the same |
| CN106449702B (en) * | 2016-09-20 | 2019-07-19 | 上海天马微电子有限公司 | A kind of organic light emitting display panel and production method |
| KR102604310B1 (en) * | 2016-12-30 | 2023-11-20 | 엘지디스플레이 주식회사 | Organic Light Emitting Display Device |
| EP3610513B1 (en) * | 2017-05-17 | 2023-10-11 | Apple Inc. | Organic light-emitting diode display with reduced lateral leakage |
| CN107394057B (en) * | 2017-07-28 | 2020-04-03 | 武汉天马微电子有限公司 | Organic light emitting display panel and manufacturing method thereof |
| CN107731883A (en) * | 2017-11-17 | 2018-02-23 | 深圳市华星光电半导体显示技术有限公司 | OLED display and preparation method thereof |
| CN115295561A (en) * | 2020-08-24 | 2022-11-04 | 武汉天马微电子有限公司 | Display panel, display device and manufacturing method |
-
2021
- 2021-04-09 CN CN202110380753.XA patent/CN113178524B/en active Active
Also Published As
| Publication number | Publication date |
|---|---|
| CN113178524A (en) | 2021-07-27 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US11716877B2 (en) | Organic light-emitting display device and method of manufacturing the same | |
| US7164230B2 (en) | Dual panel-type organic electroluminescent display device and method for fabricating the same | |
| KR102584253B1 (en) | Organic light emitting display apparatus and method for manufacturing the same | |
| CN110544714B (en) | Display panel, manufacturing method thereof and display device | |
| US10998395B2 (en) | Organic light-emitting display device | |
| KR100741968B1 (en) | Organic light emitting display device and fabricating method of the same | |
| KR100616396B1 (en) | Electro luminescence display device | |
| CN113078195B (en) | Display device, display panel and manufacturing method thereof | |
| TWI624096B (en) | Organic light-emitting display device and method of manufacturing the same | |
| WO2019033811A1 (en) | Electroluminescence display substrate and preparation method therefor, display panel, and display device | |
| CN104576957A (en) | Organic electroluminescent device and method of manufacturing the same | |
| CN111710792B (en) | Display panel and preparation method thereof | |
| CN113241421A (en) | Display substrate, display panel and display device | |
| WO2022163123A1 (en) | Display device | |
| CN113178524B (en) | Display panel, display panel manufacturing method and display device | |
| US20230209956A1 (en) | Display device | |
| KR20020043324A (en) | Organic electroluminescence display device and method for fabricating thereof | |
| US20190326547A1 (en) | Organic el display panel | |
| CN215644557U (en) | Display substrate, display panel and display device | |
| US20230284482A1 (en) | Display device and method for manufacturing display device | |
| CN114122084B (en) | Top-emitting OLED display panel | |
| US11201198B2 (en) | Electroluminescent display device | |
| CN113193140B (en) | Display panel and manufacturing method thereof | |
| US8003913B2 (en) | Base plate with electrodes, process for producing the same, and electro-optical device | |
| CN117460305A (en) | Display panel and display device |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |