CN113517169B - Matcher output power debugging method and matcher output power debugging system - Google Patents
Matcher output power debugging method and matcher output power debugging system Download PDFInfo
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- 238000004904 shortening Methods 0.000 abstract description 4
- 238000012360 testing method Methods 0.000 description 6
- 238000005530 etching Methods 0.000 description 5
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
- H01J37/32—Gas-filled discharge tubes
- H01J37/32009—Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
- H01J37/32082—Radio frequency generated discharge
- H01J37/32174—Circuits specially adapted for controlling the RF discharge
- H01J37/32183—Matching circuits
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J2237/00—Discharge tubes exposing object to beam, e.g. for analysis treatment, etching, imaging
- H01J2237/32—Processing objects by plasma generation
- H01J2237/33—Processing objects by plasma generation characterised by the type of processing
- H01J2237/332—Coating
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J2237/00—Discharge tubes exposing object to beam, e.g. for analysis treatment, etching, imaging
- H01J2237/32—Processing objects by plasma generation
- H01J2237/33—Processing objects by plasma generation characterised by the type of processing
- H01J2237/334—Etching
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Abstract
The invention provides a matcher output power debugging method and a matcher output power debugging system. The debugging method specifically comprises the following steps: when the radio frequency power supply is started, detecting an input power value of an input end of the matcher and an output power value of an output end of the matcher; calculating an actual efficiency value of the matcher, wherein the actual efficiency value is equal to the ratio of the output power value to the input power value of the matcher; judging whether the actual efficiency value is in a preset efficiency range, if not, calculating an efficiency compensation value, wherein the efficiency compensation value is equal to the ratio of the preset efficiency value to the actual efficiency value, and adjusting the input power of the matcher according to the efficiency compensation value. The invention provides a matcher output power debugging method and a matcher output power debugging system, which can obtain required output power by carrying out fewer debugging times, thereby reducing resource consumption for debugging and shortening debugging time.
Description
Technical Field
The invention relates to the field of semiconductor manufacturing, in particular to a matcher output power debugging method and a matcher output power debugging system.
Background
Currently, plasma surface treatment techniques are widely used in the field of semiconductor fabrication. Plasma surface treatment processes typically accomplish coating or etching of a wafer by igniting a plasma in a process chamber and applying a certain rf power to the wafer to attract a specified plasma to deposit or bombard the surface of the wafer. The radio frequency power involved in the process is generated by a radio frequency power supply and is matched into the cavity through the matcher, but the radio frequency power actually matched into the cavity is unknown because of the power loss of the matcher. In addition, different matchers have efficiency differences, so that in order to ensure consistency of product quality, the input power of plasma processing equipment needs to be debugged before the matchers are put into use, so that unknown influences on products caused by inconsistent input power and actual power of a chamber are avoided.
The existing debugging method comprises the following steps: the method comprises the steps of firstly carrying out linearity calibration on a radio frequency power supply of a chamber, then carrying out etching rate test on a test wafer, adjusting the linearity of the radio frequency power supply according to a test result, then adjusting the output power of the radio frequency power supply, and then restarting carrying out etching rate test on a new test wafer until the etching rate of equipment reaches a value required by a user. However, this method cannot be adjusted to a desired value at a time, and several tens of adjustments are required to obtain the desired etching rate and the desired rf power output power, which results in a waste of more resources and time in the whole debugging process.
Disclosure of Invention
The invention aims to at least solve one of the technical problems in the prior art, and provides a matcher output power debugging method which can obtain required output power by carrying out fewer debugging times, thereby reducing resource consumption for debugging and shortening debugging time.
In order to achieve the object of the present invention, there is provided a method for debugging output power of a matcher, wherein an input end of the matcher is electrically connected with an output end of a radio frequency power supply, and an output end of the matcher is electrically connected with a radio frequency power receiving end of a process chamber, the method comprises: when the radio frequency power supply is started, detecting an input power value of an input end of the matcher and an output power value of an output end of the matcher;
calculating an actual efficiency value of the matcher, wherein the actual efficiency value is equal to the ratio of the input power value to the output power value of the matcher;
judging whether the actual efficiency value is in a preset efficiency range, if not, calculating an efficiency compensation value, wherein the efficiency compensation value is equal to the ratio of the preset efficiency value to the actual efficiency value, and adjusting the input power of the matcher according to the efficiency compensation value.
Optionally, the adjusting the input power of the input end of the matcher according to the efficiency compensation value specifically includes:
calculating a target input power value, the target input power value being equal to a product of the efficiency compensation value and an input power value of the matcher;
and adjusting the output power of the radio frequency power supply to the target input power value.
Optionally, after determining that the actual efficiency value is not within the preset efficiency range, the method further includes:
judging whether the adjustment times exceeds the preset maximum adjustment times, if so, sending prompt information for calibrating the matcher;
if not, adding 1 to the adjustment times.
Optionally, the method further comprises the following steps:
and setting the initial value of the debugging times to 0 when the radio frequency power supply is started.
Optionally, after the step of detecting the input power value of the input end of the matcher and the output power value of the output end of the matcher, and before the step of calculating the actual efficiency value of the matcher, the method further includes:
judging whether the input power value of the matcher is in a preset power range, if so, performing the step of calculating the actual efficiency value of the matcher; if not, sending out prompt information for indicating the output power of the radio frequency power supply to be calibrated.
As another aspect, the present invention also provides a debug system for debugging output power of a matcher, including: the radio frequency power supply control device comprises a power detection unit and a control unit, wherein the power detection unit is used for detecting an input power value of an input end of the matcher and an output power value of an output end of the matcher when a radio frequency power supply is started, and sending the input power value and the output power value to the control unit;
the control unit is used for calculating the actual efficiency value of the matcher, wherein the actual efficiency value of the matcher is equal to the ratio of the input power value to the output power value of the matcher;
the control unit is further configured to determine whether the actual efficiency value is within a preset efficiency range, if not, calculate an efficiency compensation value, where the efficiency compensation value is equal to a ratio of the preset efficiency value to the actual efficiency value, and control the radio frequency power supply to adjust the input power of the matcher according to the efficiency compensation value.
Optionally, the control unit is further configured to calculate a target input power value, where the target input power value is equal to a product of the efficiency compensation value and the input power value of the matcher;
the control unit is also used for controlling the radio frequency power supply to adjust the input power of the matcher to the target input power value.
Optionally, the power detection unit includes an input power detector and an output power detector, where the input power detector is configured to detect input power of an input end of the matcher, and the output power detector is configured to detect output power of an output end of the matcher.
Optionally, the control unit is further configured to determine whether the adjustment frequency exceeds a preset maximum adjustment frequency, if yes, stop the adjustment and send a prompt message indicating that the matcher is calibrated; if not, adding 1 to the adjustment times.
Optionally, the control unit is further configured to determine whether an input power value of the matcher is within a preset power range, and if yes, calculate an actual efficiency value of the matcher; if not, sending out prompt information for indicating the output power of the radio frequency power supply to be calibrated.
The invention has the following beneficial effects:
according to the matcher output power debugging method, the input power and the output power of the matcher are directly detected, the efficiency compensation value is calculated according to the preset efficiency value, and the input power of the matcher is regulated according to the efficiency compensation value, so that the input power of the matcher can be regulated accurately, the debugging times can be reduced, resources for debugging can be further reduced, the debugging time is shortened, and the debugging cost is reduced.
According to the debugging system provided by the invention, the output power and the input power of the output end and the input end of the matcher are detected by the power detection unit, the efficiency compensation value is calculated by the control unit according to the output power and the input power of the matcher, and the radio frequency power supply is controlled to adjust the input power of the matcher according to the efficiency compensation value, so that the input power of the matcher can be accurately adjusted, the debugging times can be reduced, the resources for debugging can be further reduced, the debugging time is shortened, and the debugging cost is reduced.
Drawings
Fig. 1 is a flowchart of a matcher output power debugging method provided in embodiment 1 of the present invention;
fig. 2 is a flowchart of step S05 of the matcher output power debugging method provided in embodiment 1 of the present invention;
fig. 3 is a flowchart of steps S06 to S07 of the matcher output power debugging method provided in embodiment 1 of the present invention;
fig. 4 is a flowchart of steps S01 to S02 of another debugging method provided in embodiment 1 of the present invention;
FIG. 5 is a flowchart of a software algorithm flow provided in embodiment 1 of the present invention;
fig. 6 is a schematic structural diagram of a debug system according to embodiment 2 of the present invention;
fig. 7 is a schematic diagram of a debug system according to embodiment 2 of the present invention.
Detailed Description
In order to enable those skilled in the art to better understand the technical scheme of the invention, the method and the system for debugging the output power of the matcher provided by the invention are described in detail below with reference to the accompanying drawings.
Example 1
The invention provides a matcher output power debugging method for achieving the purpose of the invention. Specifically, the input end of the matcher is electrically connected with the output end of the radio frequency power supply, and the output end of the matcher is electrically connected with the radio frequency power receiving end (such as an upper electrode coil or a lower electrode of the process chamber) of the process chamber; the matcher is used for feeding the radio frequency power output by the radio frequency power supply into the reaction chamber. However, since the matchers have certain self-loss, the actual output power of the rf power supply fed into the reaction chamber through the matchers is far from the actual output power of the rf power supply, and the self-loss of different matchers is different, so that the quality consistency of the manufactured wafer cannot be ensured if the different matchers are put into use directly. In order to solve the above technical problems, as shown in fig. 1, the debugging method provided in this embodiment includes the following steps:
step S01: when the radio frequency power supply is started, detecting an input power value of an input end of the matcher and an output power value of an output end of the matcher;
step S02: calculating an actual efficiency value of the matcher, wherein the actual efficiency value is equal to the ratio of the output power value to the input power value of the matcher;
step S03: judging whether the actual efficiency value is within a preset efficiency range, if so, completing debugging; if not, go to step S04;
specifically, the preset efficiency value can be selected according to actual processing requirements, for example, 95%; the preset efficiency range may be about the preset efficiency value, for example, 95% ± 1%.
Step S04: calculating an efficiency compensation value, wherein the efficiency compensation value is equal to the ratio of a preset efficiency value to an actual efficiency value;
step S05: and adjusting the input power of the matcher according to the efficiency compensation value.
The input power of the matcher is adjusted according to the efficiency compensation value, namely, the output power of the radio frequency power supply is adjusted, so that the input power of the matcher can be adjusted accurately, instead of blindly adjusting the input power of the matcher (or the output power of the radio frequency power supply) to be higher or lower, the input power of the matcher can be adjusted to a value corresponding to the actually required output power value of the matcher rapidly, the adjustment times can be reduced, resources for debugging can be further reduced, the debugging time is shortened, and therefore the debugging cost can be reduced.
Specifically, after the step S05 is finished, steps S01 to S03 may be re-executed to test the adjusted output power of the matcher, and whether the adjusted output power of the matcher is successfully debugged is determined by determining whether the actual efficiency value is within the preset efficiency range; if not, proceed to step S04 and step S05. The steps are continuously and circularly carried out until the debugging is successful, so that the output power value of the matcher actually required is obtained, and the radio frequency power actually required is accurately fed into the reaction chamber, so that the quality of the wafer is ensured.
In some implementations, the step S05, that is, the step of adjusting the input power of the matcher according to the efficiency compensation value, as shown in fig. 2, specifically includes the following steps:
step S051: calculating a target input power value, specifically, the target input power value is equal to the product of the efficiency compensation value and the input power value of the matcher;
step S052: and adjusting the output power of the radio frequency power supply to a target input power value so as to adjust the input power of the matcher to the target input power value.
Specifically, the target input power value calculated in step S051 and step S052 is equal to the original input power of the matcher x the preset efficiency value/(output power/preset output power), and it is easy to understand that by introducing a plurality of parameters, the adjustment accuracy of the power value can be improved to a certain extent, so that the input power of the matcher can be adjusted more accurately, the adjustment times can be reduced, and the debugging cost is reduced. However, the calculation method of the target input power value is not limited thereto, and in some embodiments, the target input power value may be equal to the original input power/(output power/preset output power) of the matcher.
In some implementations, as shown in fig. 3, after performing step S03, that is, after determining whether the actual efficiency value is within the preset efficiency range, the debugging method further includes:
step S06: judging whether the adjustment times exceeds the preset maximum adjustment times, if so, sending out prompt information representing the calibration matcher; if not, continuing to step S07;
specifically, the preset maximum adjustment number may be set according to the results of multiple experiments, for example, 3 times. However, in an ideal state, the maximum adjustment frequency may be 1, that is, the output power of the matcher actually required may be obtained after one adjustment.
Step S07: the number of adjustments is increased by 1 to count the number of adjustments.
In some embodiments, the initial value of the adjustment number is set to 0 when the rf power is turned on, so that each adjustment is added to 1 based on the original adjustment number during the subsequent adjustment.
Since the matching unit for feeding the power to the process chamber is generally composed of a reactance element such as a capacitor or an inductor, the input power of the matching unit is generally power-lost due to impedance mismatch, and therefore the output power of the matching unit is generally lower than the input power of the matching unit. Furthermore, as is clear from the above step S052, the above-mentioned debugging method has high accuracy of adjusting the input power, but the actual adjustment amount is small, so the debugging method proposed in the above-mentioned embodiment can only be used for fine tuning. Therefore, when the impedance of the matcher is not matched, the difference between the input power and the output power of the matcher is too large, and accordingly, the matcher needs to be debugged for too many times to reach the actually required output power (even the actually required output power cannot be obtained), which causes the problem of excessively long debugging time. Therefore, the step of counting the adjustment times is added in the debugging process, and an operator is prompted to check and calibrate the matcher in time while the adjustment times are limited, so that the problem of excessive adjustment times caused by mismatching of impedance of the matcher can be avoided, resources for debugging can be reduced, and the debugging time is shortened.
In some embodiments, as shown in fig. 4, between step S01 and step S02, i.e., after the step of detecting the input power value of the input of the matcher and the output power value of the output of the matcher, and before the step of calculating the actual efficiency value of the matcher, the steps of:
step S011: judging whether the input power value of the matcher is within a preset power range, if so, performing step S02; if not, go to step S012;
step S012: and sending out prompt information for indicating the output power of the calibration radio frequency power supply so as to prompt an operator to adjust the output power value of the radio frequency power supply to be within a preset power range.
The reason why steps S011 and S012 are added between step S01 and step S02 is that the method for debugging the output power of the matcher according to the present embodiment aims at accurately and slightly adjusting the input power of the matcher, so that if the input power of the matcher exceeds the preset input power range, it is difficult to obtain the actually required output power even if the input power of the matcher is debugged for a very large number of times; therefore, before debugging of the matcher starts, power calibration needs to be performed on the radio frequency power supply, so that the problem of debugging failure caused by overlarge phase difference between the input power of the matcher and the preset input power can be avoided before calculating the input power and the output power of the matcher. Specifically, the preset power range should include and be similar to the output power of the matcher actually required.
Preferably, the present embodiment further provides a software algorithm flow for integrating the above debugging steps, as shown in fig. 5, which includes the following steps:
step S11: setting a preset efficiency value, a preset power value, an initial adjustment frequency, a first tolerance and a second tolerance;
wherein the preset efficiency value is, for example, 95%; the preset power value is 500W, for example; the initial adjustment number was 0.
Step S12: adjusting the output power of the radio frequency power supply to a preset power value, namely adjusting the input power of the matcher to the preset power value;
step S13: judging whether the detected input power of the matcher is within a preset power range, if so, performing step S14; if not, sending out prompt information for indicating the output power of the calibration radio frequency power supply so as to prompt an operator to adjust the output power value of the radio frequency power supply to be within a preset power range; specifically, the preset power range is a preset power value±a first tolerance;
step S14: delaying for a certain period of time;
step S15: calculating the ratio of the output power value to the input power value of the matcher and taking the ratio as the actual efficiency value of the matcher, wherein the detected output power value and input power value of the matcher can be abstracted into double-precision type data which can be read in real time, so that the precision of a calculation result is improved;
step S16: judging whether the actual efficiency value is within a preset efficiency range, if so, completing debugging; if not, go to step S17; specifically, the preset efficiency range is preset efficiency±second tolerance;
step S17: judging whether the adjustment times exceeds the preset maximum adjustment times, if so, sending out prompt information for indicating the calibration matcher so as to prompt a debugger to debug the matcher; if not, continuing to step S18; specifically, the preset maximum adjustment frequency may be 3 times;
step S18: adding 1 to the adjustment times;
step S19: calculating the ratio of the preset efficiency value to the actual efficiency value to be used as an efficiency compensation value; calculating the product of the efficiency compensation value and the input power value of the matcher to obtain a target input power value;
step S20: the target input power is set as the target power value, and the process proceeds to step S12.
According to the matcher output power debugging method, the input power and the output power of the matcher are directly detected, the efficiency compensation value is calculated according to the preset efficiency value, and the input power of the matcher is adjusted according to the efficiency compensation value, so that the input power of the matcher can be accurately adjusted, the debugging times can be reduced, resources for debugging can be further reduced, the debugging time is shortened, and the debugging cost can be reduced.
Example 2
The present embodiment provides a debugging system for debugging the output power of a matcher, as shown in fig. 6, which includes a power detection unit 2 and a control unit 1.
The power detection unit 2 is configured to detect an input power value of an input end of the matcher 4 and an output power value of an output end of the matcher 4 when the radio frequency power supply 3 is turned on, and send the input power value and the output power value of the matcher 4 to the control unit 1. In some embodiments, when the matcher 4 is applied in the semiconductor processing field, the input end of the matcher 4 is electrically connected with the output end of the rf power supply 3, and at this time, the input power value of the input end of the matcher 4 is the output power value of the rf power supply 3; the output of the matcher 4 is electrically connected to a component (e.g., a lower electrode) in the process chamber 5 to enable matching of the output power of the matcher 4 into the process chamber 5.
The control unit 1 is configured to calculate an actual efficiency value of the matcher 4, where the actual efficiency value is equal to a ratio of an input power value to an output power value of the matcher 4, and specifically, the ratio may be used as the actual efficiency value of the matcher 4.
The control unit 1 is further configured to determine whether the actual efficiency value is within a preset efficiency range, if not, calculate an efficiency compensation value, where the efficiency compensation value is equal to a ratio of the preset efficiency value to the actual efficiency value, and control the radio frequency power supply 3 to adjust input power of an input end of the matcher 4 according to the efficiency compensation value, so as to accurately adjust the input power of the matcher 4, thereby obtaining actually required output power of the matcher 4 after performing adjustment for fewer times, that is, reducing the times of performing debugging, further reducing resources used for debugging, shortening debugging time, and reducing debugging cost. In some embodiments, the control unit 1 may use a controller capable of performing logic operation, such as a host computer (PC), or the control unit 1 may be integrated with the detection unit 2 on a controller capable of performing logic operation, such as a lower computer (PLC).
In some embodiments, the control unit 1 is further configured to calculate a target input power value, in particular, the target input power value is equal to the product of the efficiency compensation value and the input power value; after the target input power value is obtained, the control unit 1 is further configured to control the radio frequency power supply 3 to adjust the input power of the input end of the matcher 4 to the target input power value, and specifically, the radio frequency power supply 3 adjusts the input power of the matcher 4 by adjusting its own output power.
In some embodiments, as shown in fig. 7, the power detection unit 2 includes an input power detector 21 and an output power detector 22, wherein the input power detector 21 is used to detect the input power of the matcher 4, and the output power detector 22 is used to detect the output power of the matcher 4. Specifically, the input power detector 21 should be connected to the input of the matcher 4, and the output power detector 22 should be connected to the power output of the matcher 4.
In some embodiments, the control unit 1 is further configured to determine whether the adjustment frequency exceeds a preset maximum adjustment frequency, and if not, add 1 to the adjustment frequency; if yes, stopping debugging and sending prompt information for indicating the calibration matcher so as to limit the debugging times and prompt operators to debug the matcher 4, thereby avoiding the problem of excessive adjusting times caused by larger debugging errors of the matcher 4, and further shortening the debugging time.
In some embodiments, the control unit 1 is further configured to determine whether the input power value of the matcher 4 is within a preset power range, and if yes, calculate an actual efficiency value of the matcher 4; if not, a prompt message indicating the output power of the radio frequency power supply 3 is sent out to prompt an operator to adjust the output power of the radio frequency power supply 3 (namely, the input power of the matcher 4), so that the problem that a large gap exists between the output power of the matcher 4 and the actually required output power due to a large error exists in the output power of the radio frequency power supply 3 is avoided, and the debugging success rate can be improved.
According to the debugging system provided by the embodiment, the output power and the input power of the output end and the input end of the matcher are detected by the power detection unit, the efficiency compensation value is calculated by the control unit according to the output power and the input power of the matcher, and the radio frequency power supply is controlled to adjust the input power of the matcher according to the efficiency compensation value, so that the input power of the matcher can be accurately adjusted, the debugging times can be reduced, resources for debugging can be further reduced, the debugging time is shortened, and the debugging cost is reduced.
It is to be understood that the above embodiments are merely illustrative of the application of the principles of the present invention, but not in limitation thereof. Various modifications and improvements may be made by those skilled in the art without departing from the spirit and substance of the invention, and are also considered to be within the scope of the invention.
Claims (8)
1. The output power debugging method of the matcher, the input end of the matcher is electrically connected with the output end of the radio frequency power supply, the output end of the matcher is electrically connected with the radio frequency power receiving end of the process chamber, the method is characterized by comprising the following steps:
when the radio frequency power supply is started, detecting an input power value of an input end of the matcher and an output power value of an output end of the matcher;
calculating an actual efficiency value of the matcher, wherein the actual efficiency value is equal to the ratio of the output power value to the input power value of the matcher;
judging whether the actual efficiency value is in a preset efficiency range, if not, calculating an efficiency compensation value, wherein the efficiency compensation value is equal to the ratio of the preset efficiency value to the actual efficiency value, and adjusting the input power of the matcher according to the efficiency compensation value;
the adjusting the input power of the matcher according to the efficiency compensation value specifically includes:
calculating a target input power value, the target input power value being equal to a product of the efficiency compensation value and an input power value of the matcher;
and adjusting the output power of the radio frequency power supply to the target input power value.
2. The matcher output power tuning method of claim 1, further comprising, after determining whether the actual efficiency value is within a preset efficiency range:
judging whether the adjustment times exceeds the preset maximum adjustment times, if so, sending prompt information for calibrating the matcher;
if not, adding 1 to the adjustment times.
3. The matcher output power tuning method as claimed in claim 2, further comprising the steps of:
and setting the initial value of the debugging times to 0 when the radio frequency power supply is started.
4. The matcher output power tuning method as claimed in claim 1, further comprising, after the step of detecting an input power value of an input of the matcher and an output power value of an output of the matcher, and before the step of calculating an actual efficiency value of the matcher:
judging whether the input power value of the matcher is in a preset power range, if so, performing the step of calculating the actual efficiency value of the matcher; if not, sending out prompt information for indicating the output power of the radio frequency power supply to be calibrated.
5. A debug system for debugging output power of a matcher, comprising: a power detection unit and a control unit, wherein,
the power detection unit is used for detecting an input power value of an input end of the matcher and an output power value of an output end of the matcher when the radio frequency power supply is started, and sending the input power value of the matcher and the output power value of the matcher to the control unit;
the control unit is used for calculating the actual efficiency value of the matcher, wherein the actual efficiency value of the matcher is equal to the ratio of the input power value to the output power value of the matcher;
the control unit is further used for judging whether the actual efficiency value is within a preset efficiency range, if not, calculating an efficiency compensation value, wherein the efficiency compensation value is equal to the ratio of the preset efficiency value to the actual efficiency value, and controlling the radio frequency power supply to adjust the input power of the matcher according to the efficiency compensation value;
the control unit is further configured to calculate a target input power value, where the target input power value is equal to a product of the efficiency compensation value and an input power value of the matcher;
the control unit is also used for controlling the radio frequency power supply to adjust the input power of the matcher to the target input power value.
6. The debugging system of claim 5, wherein the power-detection unit comprises an input power detector for detecting an input power of the input of the matcher and an output power detector for detecting an output power of the output of the matcher.
7. The system according to claim 5, wherein the control unit is further configured to determine whether the adjustment count exceeds a preset maximum adjustment count, and if so, stop the adjustment and send a prompt message indicating that the matcher is calibrated; if not, adding 1 to the adjustment times.
8. The debugging system of claim 5, wherein the control unit is further configured to determine whether the input power value of the matcher is within a preset power range, and if so, calculate an actual efficiency value of the matcher; if not, sending out prompt information for indicating the output power of the radio frequency power supply to be calibrated.
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| US5543689A (en) * | 1993-12-27 | 1996-08-06 | Fujitsu Limited | High frequency power source having corrected power output |
| JP2003032064A (en) * | 2001-07-11 | 2003-01-31 | Adtec Plasma Technology Co Ltd | Impedance matching unit with transmission efficiency control function |
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| CN102820198A (en) * | 2011-06-10 | 2012-12-12 | 东京毅力科创株式会社 | High frequency power distribution device and substrate processing apparatus using same |
| JP2017123214A (en) * | 2016-01-04 | 2017-07-13 | 株式会社日立ハイテクノロジーズ | Plasma processing apparatus |
| WO2020083340A1 (en) * | 2018-10-25 | 2020-04-30 | 北京北方华创微电子装备有限公司 | Power transmission method for radio frequency power supply |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| US5543689A (en) * | 1993-12-27 | 1996-08-06 | Fujitsu Limited | High frequency power source having corrected power output |
| JP2003032064A (en) * | 2001-07-11 | 2003-01-31 | Adtec Plasma Technology Co Ltd | Impedance matching unit with transmission efficiency control function |
| EP1976347A2 (en) * | 2007-03-30 | 2008-10-01 | Tokyo Electron Limited | Plasma processing apparatus, radio frequency generator and correction method therefor |
| CN102820198A (en) * | 2011-06-10 | 2012-12-12 | 东京毅力科创株式会社 | High frequency power distribution device and substrate processing apparatus using same |
| JP2017123214A (en) * | 2016-01-04 | 2017-07-13 | 株式会社日立ハイテクノロジーズ | Plasma processing apparatus |
| WO2020083340A1 (en) * | 2018-10-25 | 2020-04-30 | 北京北方华创微电子装备有限公司 | Power transmission method for radio frequency power supply |
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