CN113515907A - Pre-analysis method of VVP file and computer-readable storage medium - Google Patents
Pre-analysis method of VVP file and computer-readable storage medium Download PDFInfo
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Abstract
The invention discloses a pre-analysis method of a VVP file and a computer-readable storage medium. The method for pre-analyzing the VVP file comprises the following steps: analyzing an official document of the VVP file to generate an identification rule of the VVP file; according to the identification rule, syntax analysis is carried out on the sentence of the VVP file, and the field identified through syntax analysis is annotated with a corresponding category label according to the category of the field and is stored as an index; and reading the statement of the VVP file according to the index, finding all logic gates of the VVP file and the driving and driven relation among the logic gates, and outputting the logic gates. The invention can pre-analyze the VVP file, extract important logic information from the VVP file and automatically generate a corresponding file with logic dependency relationship, thereby improving the simulation efficiency.
Description
Technical Field
The invention relates to an analysis technology of VVP file content, in particular to a pre-analysis method of VVP files.
Background
During the simulation process of the gate level circuit, analysis of Verilog (Verilog HDL), a hardware description language that can represent a logic circuit diagram, is essential.
The VVP file is a unique file of ivorilog (short for irus Verilog, called "fourth global" digital chip simulator, also a completely open source simulator), and has a unique analysis value. VVP is a kind of compiled executable format generated in the open source general-purpose EDA tool, and its program itself is an interpreter, with the. VVP file as input. The generation of the VVP input file is responsible for/tgt-VVP. Thus, although the grammar is readable, it is not very convenient for the user to read, which can result in inefficient simulation.
Disclosure of Invention
In order to solve the technical problem that the VVP files processed in the prior art are inconvenient for users to read, the invention provides a pre-analysis method of the VVP files and a computer-readable storage medium.
The invention provides a pre-analysis method of a VVP file, which comprises the following steps:
and 3, reading the sentence of the VVP file according to the index, finding all logic gates of the VVP file and the driving and driven relation among the logic gates, and outputting.
Further, the analyzing the official document of the VVP file in step 1 is specifically to divide the VVP file into an actuator path, a header sentence, a plurality of modules, and a file list.
Further, the step 3 comprises:
step 3.1, finding a statement containing a logic gate according to the index, and taking the statement as a current statement, wherein the logic gate is taken as a current logic gate;
step 3.2, searching the input information of the current logic gate in the current statement;
3.3, searching the output information of the current logic gate in other sentences except the current sentence;
step 3.4, checking a module where the current statement is located;
and 3.5, sorting the searched contents in the steps 3.2 to 3.4 to form a logic unit of the current logic gate and outputting the logic unit to a Json file, and returning to the step 3.1 to read the next statement of the VVP file until the logic units of all the logic gates are output.
Further, the category label includes: header, Label, Opcode, Operand, Comment, Filename.
Further, the step 3.5 of sorting the contents searched in the steps 3.2 to 3.4 to form a logic unit of the current logic gate and outputting the logic unit specifically includes:
when a statement with a category label of Opcode and the content of a field of functor is found, the statement is taken as a statement containing a logic gate, the statement is a current statement, and the logic gate pointed by the functor is a current logic gate;
reading the label of the current logic gate, and outputting the label to a Json file according to a preset format;
reading the first Operand of the current statement, outputting the functor type of the current logic gate according to a preset format by the content in the Operand before the space, and outputting the content in the first Operand as the corresponding input bit width according to the preset format;
reading the content of the second Operand of the current statement up to the point before the mark separation as the input of the current logic gate and outputting the input to the Json file according to a preset format;
searching the label of the current logic gate in the Operand list of other statements containing the functor, if the labels are matched, taking the matched logic gate as a driven logic gate, taking out the label of the driven logic gate, and outputting the label to the driving list of the current logic gate in the Json file;
and checking the module where the current statement is located, and outputting the module to the Json file according to a preset format.
Further, the index is specifically to store the identified field and the category label corresponding to the field through a key value pair.
Further, the identification rule includes: the grammar rules of the Label, the grammar rules of the Opcode, the grammar rules of the Operand, the grammar rules of each statement in the VVP file and the grammar rules of the head statement are formed.
Further, the identification rules are respectively represented by a railway diagram.
The computer-readable storage medium is used for storing a computer program, and when the computer program is executed by at least one processor, the method for pre-analyzing the VVP file according to the above technical solution is performed.
The invention realizes the analysis of the automatic VVP file, generates Json file output with logical relation, enables a user to know the driving and driven relation of each logical unit of the gate level circuit, and solves the problem that RTL level description of the Verilog HDL file is converted into gate level circuit grid expression.
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The invention is described in detail below with reference to examples and figures, in which:
fig. 1 shows the structure of the VVP file analyzed by the present invention.
FIG. 2 is a railway diagram of the syntactic rules constituting the Label according to the present invention.
FIG. 3 is a railway diagram of the grammar rules that make up the Opcode of the present invention.
Fig. 4 is a railway diagram of the grammar rules that constitute operanded of the present invention.
Fig. 5 is a railway diagram of the grammar rules for constructing each sentence in the VVP file according to the present invention.
FIG. 6 is a railway diagram of the grammatical rules of the constituent header statements of the present invention.
Fig. 7 is an example of the output of the logic unit of the present invention.
FIG. 8 is a schematic of the index storage of the present invention.
Detailed Description
In order to make the technical problems, technical solutions and advantageous effects to be solved by the present invention more clearly apparent, the present invention is further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
Thus, a feature indicated in this specification will serve to explain one of the features of one embodiment of the invention, and does not imply that every embodiment of the invention must have the stated feature. Further, it should be noted that this specification describes many features. Although some features may be combined to show a possible system design, these features may also be used in other combinations not explicitly described. Thus, the combinations illustrated are not intended to be limiting unless otherwise specified.
The principles of the present invention will be described in detail below with reference to the accompanying drawings and embodiments.
The invention provides a VVP file pre-analysis method, which needs to analyze official documents of VVP files to generate corresponding identification rules of the VVP files. Different VVP files have different official documents, and through analysis of the official documents of the VVP files, the content of the VVP files can be classified and divided, as shown in FIG. 1, the content of the VVP files can be divided into four parts, wherein the first part is an actuator path, and then a head sentence starts with a colon; the following modules (Scope) are arranged, each module comprises various functional statements, and a file list is arranged at the tail of a file and used for storing original file information.
Each module in the VVP file is composed of a plurality of statements, each scope block includes variable definitions, port information, functional statements, event family statements, and the like, and then the present invention finds that the components of each statement can be classified as tags (Label), instructions (Opcode), operations (Operand), comments (Comment), file lists (Filename), and the like. Based on the rule found by analyzing the VVP official document, the invention generates the corresponding recognition rule of the VVP file, in this embodiment, the recognition rule includes the grammar rule constituting the Label, the grammar rule constituting the Opcode, the grammar rule constituting the Operand, the grammar rule constituting each sentence in the VVP file, and the grammar rule constituting the head sentence. And the invention represents the grammar rules through the railway diagram of the grammar, so that the grammar of the VVP file is more intuitive. The categories of the corresponding fields can be automatically identified through the rules, so that the fields are classified and stored as indexes, and corresponding contents can be quickly found when the logical relationship between the gate units is found at the later stage.
FIG. 2 is a diagram of the syntax for constructing a Label expressed by a railway diagram, wherein Label starter represents the starting symbols for constructing the Label (since the Label cannot start with numbers and decimal points), Digit represents the numbers (0-9), Letter represents the letters (Aa-Zz), and Special Symbol represents the Special symbols ($ < > _____ h).
Fig. 3 is a diagram expressing syntax rules constituting Opcode through a railway diagram, in which "% or." represents that the start flag of Opcode is "%" (percentile) or "-" (decimal point), Special Symbol represents a Special Symbol ($ < > __ /), and Letter represents a Letter (Aa-Zz).
FIG. 4 shows the grammar rules for forming Operand through a railway diagram, wherein Digit represents numbers (0-9), Letter represents letters (Aa-Zz), Special Symbol represents Special symbols ($ < > _____), Operand can be represented by any one of numbers, letters or Special symbols, and then the subsequent contents can be any combination of numbers, letters and Special symbols.
Fig. 5 is a diagram showing a grammar rule for constructing each sentence in the VVP file by a railway diagram, wherein a sentence may be composed of only one Label; or Opcode, Label, Operand. Each statement ";" may be followed by a Comment (Comment).
FIG. 6 is a diagram of a grammar for constructing a header sentence by a railway, wherein the header sentence starts with ":" (colon) and may be composed of letters (Aa-Zz) only; or the composition can be composed of Digit, Letter and Special Symbol. Each statement ";" may be followed by Comment.
Through the railway diagram of the grammar rule, the visual operation of the grammar is realized, and the comprehension of a user is facilitated.
After the identification rules of the VVP file are obtained, the sentence of the VVP file is analyzed according to the identification rules, and then the field identified through the analysis of the grammar is annotated with the corresponding class label according to the class of the field and is stored as the index. In this embodiment, the index is stored in a key-value pair manner, and the category tag may include: the expression form of the Header, Label, Opcode, Operand, Comment and Filename after index storage can be as shown in fig. 8, where fig. 8 shows an output result of a VVP statement after analysis, where type is a category tag and string is specific content.
In specific implementation, taking Python language as an example, by designing a Parser class and a corresponding Token class, lexical analysis function and formatted output of each Token are completed through the Parser class, that is, the separated Token in the Parser class is made, and then the Token value is returned, so that the returned Token value can form an index. The following is an explanation of the Parser class and Token class writing, where the Parser class performs the function of reading the incoming text and parsing.
After obtaining the index which can read the content of the VVP file, reading the sentence of the VVP file according to the index, finding all logic gates of the VVP file and the driving and driven relation among the logic gates, and outputting the logic gates.
When in specific implementation, the method comprises the following steps:
step 3.1, finding a statement containing a logic gate according to the index, and taking the statement as a current statement, wherein the logic gate is taken as a current logic gate;
step 3.2, searching the input information of the current logic gate in the current statement;
3.3, searching the output information of the current logic gate in other sentences except the current sentence;
step 3.4, checking a module where the current statement is located;
and 3.5, sorting the searched contents in the steps 3.2 to 3.4 to form a logic unit of the current logic gate and outputting the logic unit to a Json file, and returning to the step 3.1 to read the next statement of the VVP file until the logic units of all the logic gates are output.
The above steps find the driving and driven relationships between all logic gates through two iterative loops. In particular, in the implementation, a logic unit formed by the driving and driven relationship between one logic gate and other logic gates is found as an example. When a statement of which the category label is Opcode and the content of the field is found, the statement is used as a statement containing a logic gate, the statement is a current statement, the logic gate pointed by the functor is the current logic gate, a label of the current logic gate is read, and then the label is output to a Json file according to a preset format; reading the first Operand of the current statement, outputting the functor type of the current logic gate according to a preset format by the content in the Operand before the space, and outputting the content in the first Operand as the corresponding input bit width according to the preset format; reading the content of the second Operand of the current statement up to the point before the mark separation as the input of the current logic gate and outputting the input to the Json file according to a preset format; searching the label of the current logic gate in the Operand list of other statements containing the functor, if the labels are matched, taking the matched logic gate as a driven logic gate, taking out the label of the driven logic gate, and outputting the label to the driving list of the current logic gate in the Json file; and checking the module where the current statement is located, and outputting the module to the Json file according to a preset format.
Fig. 7 shows details of each logic gate having a logic relationship and corresponding modules, which are finally output after analysis by the present invention. The result output based on fig. 7 will help the user to understand the VVP file, which helps to improve the research and development efficiency.
The present invention also protects a corresponding computer-readable storage medium for storing a computer program for executing the above-mentioned VVP file preprocessing method when the computer program runs.
The above description is only for the purpose of illustrating the preferred embodiments of the present invention and is not to be construed as limiting the invention, and any modifications, equivalents and improvements made within the spirit and principle of the present invention are intended to be included within the scope of the present invention.
Claims (9)
1. A method for pre-analyzing a VVP file, comprising:
step 1, analyzing an official document of a VVP file to generate an identification rule of the VVP file;
step 2, carrying out grammar analysis on the sentence of the VVP file according to the identification rule, remarking a corresponding category label for the field identified by the grammar analysis according to the category of the field, and storing the category label as an index;
and 3, reading the sentence of the VVP file according to the index, finding all logic gates of the VVP file and the driving and driven relation among the logic gates, and outputting.
2. The method for pre-analyzing VVP file of claim 1, wherein the parsing of the official document of the VVP file in step 1 is to divide the VVP file into an executor path, a header sentence, a plurality of modules, and a file list.
3. The VVP file pre-analysis method of claim 1, wherein the step 3 includes:
step 3.1, finding a statement containing a logic gate according to the index, and taking the statement as a current statement, wherein the logic gate is taken as a current logic gate;
step 3.2, searching the input information of the current logic gate in the current statement;
3.3, searching the output information of the current logic gate in other sentences except the current sentence;
step 3.4, checking a module where the current statement is located;
and 3.5, sorting the searched contents in the steps 3.2 to 3.4 to form a logic unit of the current logic gate and outputting the logic unit to a Json file, and returning to the step 3.1 to read the next statement of the VVP file until the logic units of all the logic gates are output.
4. The VVP file pre-analysis method of claim 3, wherein the category tag includes: header, Label, Opcode, Operand, Comment, Filename.
5. The method for pre-analyzing the VVP file according to claim 4, wherein the step 3.5 of sorting the contents searched in the steps 3.2 to 3.4 into a logic unit of the current logic gate and outputting the logic unit specifically includes:
when a statement with a category label of Opcode and the content of a field of functor is found, the statement is taken as a statement containing a logic gate, the statement is a current statement, and the logic gate pointed by the functor is a current logic gate;
reading the label of the current logic gate, and outputting the label to a Json file according to a preset format;
reading the first Operand of the current statement, outputting the functor type of the current logic gate according to a preset format by the content in the Operand before the space, and outputting the content in the first Operand as the corresponding input bit width according to the preset format;
reading the content of the second Operand of the current statement up to the point before the mark separation as the input of the current logic gate and outputting the input to the Json file according to a preset format;
searching the label of the current logic gate in the Operand list of other statements containing the functor, if the labels are matched, taking the matched logic gate as a driven logic gate, taking out the label of the driven logic gate, and outputting the label to the driving list of the current logic gate in the Json file;
and checking the module where the current statement is located, and outputting the module to the Json file according to a preset format.
6. The method for pre-analyzing VVP file of claim 1, wherein the index is specifically to store the identified field and its corresponding category label by key value pair.
7. The VVP file pre-analysis method of claim 1, wherein the identification rule includes: the grammar rules of the Label, the grammar rules of the Opcode, the grammar rules of the Operand, the grammar rules of each statement in the VVP file and the grammar rules of the head statement are formed.
8. The VVP file pre-analysis method of claim 1, wherein the identification rules are respectively represented by railroad graphs.
9. A computer-readable storage medium storing a computer program for performing the method of pre-analyzing the VVP file according to any one of claims 1 to 6, when the computer program is executed by at least one processor.
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