CN113514716B - Digital bus electromagnetic environment effect simulation device and method - Google Patents
Digital bus electromagnetic environment effect simulation device and method Download PDFInfo
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Abstract
The invention belongs to the technical field of electromagnetic compatibility characteristics, and discloses a digital bus electromagnetic environment effect simulation device and a method, wherein the device comprises an A board for sending digital bus information, a B board for receiving the digital bus information, an excitation signal injection module, a signal generation module, a bus signal control analysis module and a power supply module; the bus signal control analysis module sends information to the board A, the board A transmits the received information to the board B by using a bus, and the signal generation module generates an excitation signal which is injected into the bus by the excitation signal injection module; the board B demodulates the received digital bus signal and transmits the demodulated information to a bus signal control analysis module; and the bus signal control analysis module compares the sent information with the received information, calculates the error rate, and realizes the touch boundary detection of the electromagnetic environment effect of the digital bus according to the relationship between the form, the amplitude and the error rate of the excitation signal.
Description
Technical Field
The invention belongs to the technical field of electromagnetic compatibility characteristics, and particularly relates to a digital bus electromagnetic environment effect simulation device and method.
Background
The digital bus is a common carrier for transferring information and energy between a controller of a complex electronic system and various types of sensors, and is one of the key research objects for researching the electromagnetic environment effect of electronic equipment.
With the development of information technology and the improvement of integration level of electronic devices, the electromagnetic environment faced by the digital bus is increasingly complex, and the problem of electromagnetic compatibility caused by the complex electromagnetic environment coupled by the digital bus is one of the problems often faced in the process of developing the electronic devices. In addition, complex electronic systems often integrate multiple types of digital buses, and the electromagnetic compatibility problems caused by the digital buses are difficult to analyze and predict in the electromagnetic compatibility design stage of the complex electronic systems.
Disclosure of Invention
In order to analyze and simulate the electromagnetic environment effect of a digital bus of a complex electronic system under a real condition, the invention provides a common digital bus electromagnetic environment effect simulation device, which can simulate the electromagnetic environment effect of various common digital buses, and the electromagnetic environment faced by the digital bus can adjust parameters such as signal form, amplitude, period and the like according to the actual condition, so that the real electromagnetic environment faced by the digital bus in the complex electronic system can be better simulated, meanwhile, the touch-edge detection boundary of the electromagnetic environment effect of the digital bus is completed, and reference is provided for the protection of the digital bus of the complex electronic system.
In order to achieve the aim, the invention provides a digital bus electromagnetic environment effect simulation device, which comprises an A board for sending digital bus information, a B board for receiving the digital bus information, an excitation signal injection module, a signal generation module, a bus signal control analysis module and a power supply module, wherein the A board is used for sending the digital bus information; the power supply module is electrically connected with the board A, the board B, the signal generation module and the bus signal control analysis module respectively; the board A and the board B are electrically connected through a bus, and the bus signal control analysis module is respectively electrically connected with the board A and the board B; the signal generation module is electrically connected with the excitation signal injection module, and the bus passes through the excitation signal injection module;
the bus signal control analysis module sends information to the board A, the board A transmits the received information to the board B by using the bus, and meanwhile, the signal generation module generates an excitation signal which is injected into the bus by the excitation signal injection module; the B board demodulates the received digital bus signal and transmits the demodulated information to the bus signal control analysis module, the bus signal control analysis module compares the transmitted information with the received information to calculate the error rate, and data support is provided for electromagnetic compatibility research and experiments according to the relationship between the form, the amplitude and the error rate of the excitation signal.
Further, the board a and the board B each include a central processing unit, a bus codec module electrically connected to the central processing unit, and a bus interface module electrically connected to the bus codec module; the bus codec module comprises at least one ETH bus codec and one or more other bus codecs, and the bus interface module comprises at least one ETH bus interface electrically connected with the at least one ETH bus codec and one or more other bus interfaces electrically connected with the one or more other bus codecs respectively; one or more other bus interfaces of the A board are electrically connected with one or more other bus interfaces of the B board through corresponding buses; the board A and the board B are connected with the bus signal control analysis module through at least one ETH bus interface.
Further, the bus codec module comprises one or more of an ARINC429 bus codec, an RS485 bus codec, an RS232 bus codec, an RS422 bus codec, a CAN bus codec, a RapidIO bus codec, a 1394B bus codec and an MIL-1553B bus codec; the bus interface module comprises one or more of an ARINC429 bus interface, an RS485 bus interface, an RS232 bus interface, an RS422 bus interface, a CAN bus interface, a RapidIO bus interface, a 1394B bus interface and an MIL-1553B bus interface.
Further, the bus signal control analysis module comprises a processor and a display, and the processor is respectively connected with the ETH bus interfaces of the board A and the board B; the interface displayed by the display comprises a local address bar, a bus bar to be tested, a bus parameter configuration bar, a data input bar, a data sending bar, a test result bar, a status bar and an operation log bar; the local address bar comprises a local address frame and a service starting button and is used for connecting the bus signal control analysis module with the board A and the board B; the bus bar to be tested comprises one or more bus selection buttons, and is used for selecting one bus type from one or more other buses to simulate; the bus parameter configuration column is used for configuring the selected bus parameters, sending the bus parameters to the board A and the board B, and configuring board card parameters of the board A and the board B; the data input field comprises a file data button and a custom data button; the data sending column comprises a sending interval input box, a sending frequency input box and a data sending button; the test result bar comprises a test result display frame and an emptying display button; the status bar comprises a system status, an A board status and a B board status, and the three statuses respectively comprise a normal status and an off-line status; the running log column comprises a running log frame and an emptying display button, and the running log frame is used for displaying a running log and a real error rate.
Further, the signal sending module comprises a signal sender, the excitation signal injection module comprises a current injection probe, the current injection probe is electrically connected with the signal generator in a coaxial mode, and meanwhile the current injection probe is clamped on the bus.
Further, the a board and the B board each include a selection switch, the a board can be converted into the B board by the selection switch, and the B board can be converted into the a board by the selection switch.
The invention also provides a digital bus electromagnetic environment effect simulation method of the digital bus electromagnetic environment effect simulation device, which comprises the following steps:
1) Constructing a device according to any one of claims 1-6, turning on a power supply to power on the device;
2) Opening a bus signal control analysis module, clicking a local address frame of a local address bar, selecting an IP address, and clicking a start service button, wherein the system state, the A board state and the B board state in the state bar are all displayed as normal states;
3) Clicking the selected digital bus selection button on the bus bar to be tested;
4) Selecting a bus parameter value in a bus parameter configuration column, and clicking a setting button to complete bus parameter configuration;
5) Clicking a custom data button on a data input field, clicking a hexadecimal button, and inputting data to be sent in a data area frame;
6) Respectively inputting a sending interval and a sending time set value in a sending interval frame and a sending time frame of a sending data column, and clicking a sending data button to finish data sending;
7) Displaying the receiving result in a test result column;
8) When the receiving error rate is 0 as shown in the running log frame, completing the calibration of the device;
9) Starting a signal generation module, sending an excitation signal, and clicking for output;
10 Display the received result in the test result column;
11 ) the received error rate is displayed in a running log box.
The invention has the beneficial effects that:
the invention integrates various common digital buses, can finish the simulation of the electromagnetic environment effect of the digital bus used in a complex electronic system at a lower cost, and provides hardware support for the research of the electromagnetic environment effect of the digital bus of the complex system; meanwhile, the invention can be used as an identification device for the performance of a specific digital bus transmission medium, and provides reference for the selection of the digital bus transmission medium; in addition, the invention can also be used as a digital bus simulator in the standard test of electromagnetic compatibility.
Drawings
FIG. 1 is a connection block diagram of a digital bus electromagnetic environment effect simulation apparatus according to an embodiment of the present invention;
FIG. 2 is a block diagram of an A plate or a B plate according to an embodiment of the present invention;
FIG. 3 is a structural view of the A plate or the B plate of the present invention, wherein (a) is a front view, (B) is a rear view, and (c) is a top view;
FIG. 4 is a block diagram of a bus signal control analysis module according to an embodiment of the present invention;
fig. 5 is a screenshot of digital bus electromagnetic environment effect analysis software according to an embodiment of the present invention.
Detailed Description
The invention is further described below with reference to the accompanying drawings and examples, it being understood that the examples described below are intended to facilitate the understanding of the invention, and are not intended to limit it in any way.
The digital bus electromagnetic environment effect simulation apparatus provided by this embodiment, as shown in fig. 1, includes a power module (not shown in the figure), an a board 1 for transmitting digital bus information, a B board 2 for receiving digital bus information, a signal generation module 3, an excitation signal injection module 4, and a bus signal control analysis module 5. The power module is respectively electrically connected with the A board 1, the B board 2, the signal generation module 3 and the bus signal control analysis module 5, and is used for providing power for the A board 1, the B board 2, the signal generation module 3 and the bus signal control analysis module 5. The A board 1 is electrically connected with the B board 2 through a bus and used for transmitting digital bus signals to the B board 2. The signal generating module 3 is electrically connected to the excitation signal injecting module 4, and a neutral line passes through the excitation signal injecting module 4, so as to inject an excitation signal (i.e. a signal for exciting sensitivity of the digital bus) generated by the signal generating module 3 according to an electromagnetic compatibility standard into the bus, thereby simulating an electromagnetic environment effect of the bus. The bus signal control analysis module 5 is electrically connected with the board a 1 and the board B2 through network cables, and is configured to transmit information to be transmitted to the board a 1, receive information from the board B2, compare the transmitted and received information, and calculate an error rate, where the error rate calculation formula is: bit error rate = number of error symbols/total number of transmitted symbols. The error rates under different signal forms and amplitudes can be obtained by changing the form and the amplitude of the excitation signal, and data support is provided for electromagnetic compatibility research and experiments according to the relationship between the form, the amplitude and the error rate of the excitation signal.
In the present embodiment, as shown in fig. 2-3, both the a board 1 and the B board 2 include a central processor 11; an ARINC429 bus codec 12 electrically connected with the CPU 11, an ARINC429 bus interface 111 electrically connected with the ARINC429 bus codec 12; an RS485 bus codec 13 electrically connected with the central processor 11, and an RS485 bus interface 112 electrically connected with the RS485 bus codec 13; an RS232 bus codec 14 electrically connected with the CPU 11, and an RS232 bus interface 113 electrically connected with the RS232 bus codec 14; RS422 bus codec 15 electrically connected to the cpu 11, and RS422 bus interface 114 electrically connected to RS422 bus codec 15; a CAN bus codec 16 electrically connected to the central processing unit 11, a CAN bus interface 115 electrically connected to the CAN bus codec 16; an ETH bus codec 17 electrically connected to the central processor 11, and an ETH bus interface 116 electrically connected to the ETH bus codec 17; a RapidIO bus codec 18 electrically connected to the central processing unit 11, and a RapidIO bus interface 117 electrically connected to the RapidIO bus codec 18; a 1394B bus codec 19 electrically connected to the cpu 11, and a 1394B bus interface 118 electrically connected to the 1394B bus codec 19; an MIL-1553B bus codec 20 electrically connected with the central processing unit 11, and an MIL-1553B bus interface 119 electrically connected with the MIL-1553B bus codec 20; a DC 12V power interface 120 electrically connected to the CPU 11; and an a/B board selection switch 121. The a/B board selection switch 121 is used to determine the transmission or reception attribute of the digital bus board, as shown in fig. 3, when the a switch is toggled to the side of the letter a and the B switch is toggled to the side far from the letter B, it indicates that the digital bus board is the a board 1; when the switch A is shifted to a side far away from the letter A and the switch B is shifted to a side near the letter B, the digital bus board card is represented as a board B2. During actual simulation, the ARINC429 bus interface 111, the RS485 bus interface 112, the RS232 bus interface 113, the RS422 bus interface 114, the CAN bus interface 115, the RapidIO bus interface 117, the 1394B bus interface 118, the MIL-1553B bus interface 119 of the a board 1 and the corresponding digital bus interface of the B board 2 are electrically connected through corresponding buses.
In the present embodiment, the length of the A plate 1 and the B plate 2 can be designed to be 482mm, the height can be designed to be 44.5mm, and the width can be designed to be 250mm. Of course, the sizes of the a plate 1 and the B plate 2 are not limited to this, and the sizes of the a plate 1 and the B plate 2 may be adjusted according to actual situations, and are not limited herein.
In this embodiment, the signal generation module 3 comprises a signal generator and the excitation signal injection module 4 comprises a current injection probe. The current injection probe is electrically connected with the signal generator through a coaxial line, and the current injection probe is clamped on a bus for connecting the A board 1 and the B board 2 so as to simulate the electromagnetic environment faced by a digital bus and achieve the purpose of touching the electromagnetic environment effect of the digital bus and detecting the boundary.
In the present embodiment, as shown in fig. 4, the bus signal control analysis module 5 includes a processor 51, a display 52 and an input keyboard 53. The processor 51 is electrically connected to the ETH bus interface 116 of the a board 1 and the B board 1 through ETH network lines, and is configured to send information to be transmitted to the a board 1 and receive information received by the B board 2 by the processor 51, and compare a difference between the sent information and the received information to calculate an error rate. The input keyboard 53 is electrically connected to the processor 51, and is used for inputting information to be transmitted. The display 52 is electrically connected to the processor 51, and is used for selecting a bus type, displaying input information, displaying an output result, an error rate, and the like, so that a tester can conveniently check the bus type and the input information.
Specifically, as shown in fig. 5, the section displayed by the display 52 of the bus signal control analysis module 5 includes a main interface title column 521, a local address column 522, a bus to be tested column 523, a bus parameter configuration column 524, a data input column 525, a transmission data column 529, a test result column 5210, a status column 526, a firmware update column 527, and an operation log column 528. Therein, the main interface title bar 521 is shown as "digital bus electromagnetic environment effect analysis". The local address column 522 includes local address input and open service buttons for connecting the bus signal control analysis module to the a board 1 and the B board 2. The bus bar to be tested 523 is used for selecting analog bus types, only one bus CAN be simulated at a time, and comprises an ARINC digital bus selection button, an RS485 digital bus selection button, an RS232 digital bus selection button, an RS422 digital bus selection button, a CAN digital bus selection button, an ETH digital bus selection button, a RapidIO digital bus selection button, a 1394B digital bus selection button and an MIL-1553B digital bus selection button. The bus parameter configuration field 524 is determined according to the selected bus to be tested, which is, for example, an RS232 digital bus: the bus parameter configuration column 524 includes a "set" button for RS232 bus configuration, and configures the RS232 bus parameters by setting the baud rate, data bit, stop bit, check bit, and flow control input to the RS232 bus, and the "set" button is used to send the input bus parameters to the a board 1 and the B board 2, and configure the parameters of the a board 1 and the B board 2. The data input field 525 includes two buttons of file data and custom data, the data format is selected by clicking hexadecimal or ASCII, the data to be sent can be input by clicking the button for opening the file when the file data is clicked, the data to be sent can be input by clicking the custom data, and the data to be sent can be input in the data area. The transmission data field 529 includes a transmission interval input box, a transmission number input box, and a transmission data button, and clicks the transmission interval input box to input a data transmission interval, clicks the transmission number box to input the transmission number, and then clicks the transmission data button to transmit data to the a board 1. The test result column 5210 includes a test result display frame and a clear display button, the B board 2 transmits the received data to the bus signal control analysis module 5 and displays the data in the test result display frame, and the test result display frame can be cleared by clicking the clear display button. Status bar 526 includes a system status, an A board 1 status, and a B board 2 status, each of which includes both normal and offline status. The firmware update column 527 is provided with a firmware update button for updating the digital bus electromagnetic environment effect analysis software, and the software can be updated by clicking the button to select the firmware to be updated. The operation log column 528 includes an operation log box for displaying the operation log and the actual error rate and an empty display button, and the operation log box can be emptied by clicking the empty display button.
In conclusion, the digital bus electromagnetic environment effect simulation device can integrate various bus protocols, thereby realizing the touch edge detection of various bus electromagnetic environment effects and simultaneously providing a hardware basis for disclosing a digital bus electromagnetic sensitivity mechanism.
The analog process of the above analog device is explained in detail by selecting the RS232 digital bus.
The specific process is as follows:
1) The digital bus electromagnetic environment effect simulation device of the embodiment is built by using the block diagram shown in FIG. 1, and a power supply is turned on to electrify the simulation device;
2) Opening digital bus electromagnetic environment effect analysis software of a bus signal control analysis module 5, clicking a local address box of a local address bar 522, selecting an IP address, clicking to start service, wherein the system state of a state bar 526 is displayed normally, and the states of an A board 1 and a B board 2 are displayed normally;
3) Clicking an RS232 digital bus selection button on a bus bar 523 to be tested; only one bus can be simulated at a time, and the RS232 digital bus is selected in the embodiment;
4) Selecting the baud rate to be 9600 in the bus parameter configuration column 524, and clicking a setting button to complete the bus parameter configuration;
5) Clicking a custom data button and clicking a hexadecimal button in the data input field 525 to input data to be sent "face1314" in a data area frame;
6) Inputting 1 in a sending interval frame and 1 in a sending times frame in a sending data column 529, and clicking a sending data button to finish data sending;
7) The reception result is "face1314" in the test result field 5210;
8) Running a log to display that 8 characters are sent and the receiving error rate is 0, and completing the calibration of the digital bus electromagnetic environment effect simulation device;
9) Starting a signal generating module 3, sending 1V and 1MHz sine waves, and clicking for output;
10 In the test result column 5210, the reception result is "face1b14";
11 Run log display "8 characters sent with a received bit error rate of 0.125".
It will be apparent to those skilled in the art that various modifications and improvements can be made to the embodiments of the present invention without departing from the inventive concept thereof, and these modifications and improvements are intended to be within the scope of the invention.
Claims (5)
1.A digital bus electromagnetic environment effect simulation device is characterized by comprising an A board for sending digital bus information, a B board for receiving the digital bus information, an excitation signal injection module, a signal generation module, a bus signal control analysis module and a power supply module; the power supply module is electrically connected with the board A, the board B, the signal generation module and the bus signal control analysis module respectively; the A board and the B board are electrically connected through a bus, and the bus signal control analysis module is respectively electrically connected with the A board and the B board; the signal generation module is electrically connected with the excitation signal injection module, and the bus passes through the excitation signal injection module;
the bus signal control analysis module sends information to the board A, the board A transmits the received information to the board B by using the bus, and meanwhile, the signal generation module generates an excitation signal which is injected into the bus by the excitation signal injection module; the B board demodulates the received digital bus signal and transmits the demodulated information to the bus signal control analysis module, the bus signal control analysis module compares the transmitted information with the received information to calculate the bit error rate, and data support is provided for electromagnetic compatibility research and experiments according to the relationship among the form, the amplitude and the bit error rate of the excitation signal;
the signal transmitting module comprises a signal transmitter, the excitation signal injection module comprises a current injection probe, the current injection probe is electrically connected with the signal generator through a coaxial line, and the current injection probe is clamped on the bus;
the board A and the board B respectively comprise a central processing unit, a bus codec module electrically connected with the central processing unit, and a bus interface module electrically connected with the bus codec module; the bus codec module comprises at least one ETH bus codec and one or more other bus codecs, and the bus interface module comprises at least one ETH bus interface electrically connected with the at least one ETH bus codec and one or more other bus interfaces electrically connected with the one or more other bus codecs respectively; one or more other bus interfaces of the A board are electrically connected with one or more other bus interfaces of the B board through corresponding buses; the board A and the board B are connected with the bus signal control analysis module through at least one ETH bus interface.
2. The apparatus of claim 1, wherein the bus codec module comprises one or more of an ARINC429 bus codec, an RS485 bus codec, an RS232 bus codec, an RS422 bus codec, a CAN bus codec, a RapidIO bus codec, a 1394B bus codec, and a MIL-1553B bus codec; the bus interface module comprises one or more of an ARINC429 bus interface, an RS485 bus interface, an RS232 bus interface, an RS422 bus interface, a CAN bus interface, a RapidIO bus interface, a 1394B bus interface and an MIL-1553B bus interface.
3. The apparatus of claim 1 or 2, wherein the bus signal control analysis module comprises a processor and a display, the processor being respectively interfaced with the at least one ETH bus of each of the A board and the B board; the interface displayed by the display comprises a local address bar, a bus bar to be tested, a bus parameter configuration bar, a data input bar, a data sending bar, a test result bar, a status bar and an operation log bar; the local address bar comprises a local address frame and a service starting button and is used for connecting the bus signal control analysis module with the board A and the board B; the bus bar to be tested comprises one or more bus selection buttons, and is used for selecting one bus type from one or more buses to simulate; the bus parameter configuration column is used for configuring the selected bus parameters, sending the bus parameters to the board A and the board B, and configuring board card parameters of the board A and the board B; the data input field comprises a file data button and a user-defined data button; the data sending column comprises a sending interval input box, a sending frequency input box and a data sending button; the test result bar comprises a test result display frame and an emptying display button; the status bar comprises a system status, an A board status and a B board status, and the three statuses respectively comprise a normal status and an off-line status; the running log column comprises a running log frame and an emptying display button, and the running log frame is used for displaying a running log and displaying an error rate.
4. The apparatus of claim 3, wherein the A board and the B board each comprise a selection switch by which the A board is convertible to the B board, which is convertible to the A board.
5. A digital bus electromagnetic environment effect simulation method of the device according to one of claims 1 to 4, wherein the bus signal control analysis module comprises a processor and a display; the interface displayed by the display comprises a main interface title bar, a local address bar, a bus bar to be tested, a bus parameter configuration bar, a data input bar, a data sending bar, a test result bar, a state bar and an operation log bar; the method comprises the following steps:
1) Building the device of any one of claims 1-4, and turning on a power supply to power on the device;
2) Opening a bus signal control analysis module, clicking a local address frame of a local address bar, selecting an IP address, and clicking a start service button, wherein the system state, the A board state and the B board state in the state bar are all displayed as normal states;
3) Clicking the selected digital bus selection button on the bus bar to be tested;
4) Configuring bus parameters in a bus parameter configuration column, and clicking a setting button to complete bus parameter configuration;
5) Clicking a custom data button on a data input field, clicking a hexadecimal button, and inputting data to be sent in a data area frame;
6) Respectively inputting a sending interval and a sending time set value in a sending interval frame and a sending time frame of a sending data column, and clicking a sending data button to finish data sending;
7) Displaying the receiving result in a test result column;
8) When the receiving error rate is 0 as shown in the running log frame, completing the calibration of the device;
9) Starting a signal generation module, sending an excitation signal, and clicking for output;
10 Display the received result in the test result column;
11 ) displays the received bit error rate in a running log box.
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