CN113507215A

CN113507215A - Synchronous rectification control device, power supply and synchronous rectification control method

Info

Publication number: CN113507215A
Application number: CN202110688325.3A
Authority: CN
Inventors: 陈世伟
Original assignee: Agco Microelectronics Shenzhen Co ltd
Current assignee: Agco Microelectronics Shenzhen Co ltd
Priority date: 2021-06-21
Filing date: 2021-06-21
Publication date: 2021-10-15
Anticipated expiration: 2041-06-21
Also published as: CN113507215B

Abstract

The invention discloses a synchronous rectification control device which is coupled to a synchronous rectification switch with a first end point. The synchronous rectification control device comprises a waveform slope detection circuit, a comparison circuit, a timer and a judgment unit. The waveform slope detection circuit receives a first endpoint voltage of the first endpoint and obtains a waveform slope change value of the first endpoint voltage. The comparison circuit receives the waveform slope change value, generates a first trigger signal when the waveform slope change value is larger than a first positive critical value, and generates a conducting state signal when the waveform slope change value is smaller than a negative critical value. When the timer is triggered by the first trigger signal, the timer outputs a shielding signal, and the shielding signal is activated for a first shielding time. When the shielding signal is not activated and the conducting state signal is received, the synchronous rectification switch is conducted.

Description

Synchronous rectification control device, power supply and synchronous rectification control method

Technical Field

The present invention relates to a synchronous rectification control device, a power supply, and a synchronous rectification control method, and more particularly, to a synchronous rectification control device, a power supply, and a synchronous rectification control method that prevent a synchronous rectification switch from being erroneously turned on by a falling edge of a resonant waveform.

Background

The flyback converter (flyback converter) has the advantages of high conversion efficiency and small loss. The existing primary side control flyback converter realizes the regulation of output voltage or current by controlling a main power switch arranged on the primary side of a transformer. Meanwhile, in the prior art, the secondary side of the flyback converter is synchronously rectified by using a secondary side rectifier switch to replace an original diode, so that the rectification loss can be greatly reduced, and the conversion efficiency of the power supply is further improved.

In the conventional control strategy of the secondary side rectifier switch, after the main power switch is turned off by a control signal, the drain voltage of the main power switch rises, so that the energy stored in the transformer starts to be released to the secondary side, and therefore, a body diode of the secondary side rectifier switch is firstly conducted. Because there is a voltage drop in the body diode, the conduction of the body diode causes the voltage at the end of the secondary side rectifier switch connected to the secondary side winding to be negative. By setting a conduction threshold voltage slightly lower than zero, the secondary side rectifier switch is controlled to conduct when the voltage is lower than the conduction threshold.

However, when the flyback converter operates in the discontinuous conduction mode, in each switching cycle, after the energy in the transformer is released to the secondary side, the voltage of the primary side winding starts to resonate due to the non-conduction of the primary power switch on the primary side and the existence of the parasitic parameters of the circuit. The resonance of the voltage is transmitted to the secondary side through the transformer, so that the voltage resonates. If the resonance amplitude is large, the voltage may drop below the conduction threshold during resonance, which may cause the secondary side rectifier switch to be turned on erroneously.

Therefore, how to design a synchronous rectification control device, a power supply and a synchronous rectification control method to solve the problems and technical bottlenecks of the prior art is an important subject of the present inventors.

Disclosure of Invention

An object of the present invention is to provide a synchronous rectification control device, which solves the problems of the prior art.

To achieve the above objective, the present invention provides a synchronous rectification control device coupled to a synchronous rectification switch having a first end. The synchronous rectification control device comprises a waveform slope detection circuit, a comparison circuit, a timer and a judgment unit. The waveform slope detection circuit receives a first endpoint voltage of the first endpoint and obtains a waveform slope change value of the first endpoint voltage. The comparison circuit receives the waveform slope change value, generates a first trigger signal when the waveform slope change value is larger than a first positive critical value, and generates a conducting state signal when the waveform slope change value is smaller than a negative critical value. The timer is coupled to the comparison circuit, and outputs a masking signal when the timer is triggered by the first trigger signal, and the masking signal is activated for a first masking time. The judging unit is coupled with the comparing circuit and the timer, and leads the synchronous rectification switch to be conducted when the shielding signal is not activated and receives the conducting state signal.

Optionally, the comparison circuit generates a second trigger signal when the slope variation value of the waveform is greater than a second positive critical value. Wherein the second positive threshold is greater than the first positive threshold. When the timer is triggered by the second trigger signal, the timer outputs a masking signal, and the masking signal is activated for a second masking time. Wherein the second masking time is less than the first masking time.

Optionally, the comparison circuit comprises a first comparator, a second comparator and a third comparator. The first comparator receives the waveform slope variation value and the first positive critical value, compares the waveform slope variation value with the first positive critical value, and generates a first trigger signal. The second comparator receives the waveform slope variation value and the second positive critical value, compares the waveform slope variation value with the second positive critical value, and generates a second trigger signal. The third comparator receives the waveform slope variation value and the negative critical value, and compares the waveform slope variation value with the negative critical value to generate a conducting state signal.

Optionally, the waveform slope detection circuit is a high pass filter, when the first endpoint voltage rises, the waveform slope change value is an up pulse, and the height of the up pulse is proportional to the slope of the first endpoint voltage rise.

Alternatively, when the first endpoint voltage drops, the waveform slope change value is a downward pulse, and the height of the downward pulse is proportional to the slope of the first endpoint voltage drop.

By the proposed synchronous rectification control device, a synchronous rectification switch is prevented from being erroneously turned on by a falling edge of a resonant waveform.

Another objective of the present invention is to provide a power supply device, which solves the problems of the prior art.

To achieve the above objective, the power supply of the present invention includes a synchronous rectification control device and a transformer. The transformer has a primary side winding and a secondary side winding. The synchronous rectification switch is coupled to the secondary side winding, and the synchronous rectification control device enables the synchronous rectification switch to be selectively switched on or switched off.

Optionally, the power supply further comprises a main switch and a control signal generator. The main switch is coupled to the primary side winding. The control signal generator is used for providing a control signal to control the main switch, so that the main switch is selectively switched on or off to carry out power conversion, and the output voltage of the power supply is regulated and controlled.

By the proposed power supply, a false conduction of the synchronous rectification switch by a falling edge of the resonant waveform is avoided.

It is still another object of the present invention to provide a synchronous rectification control method, which solves the problems of the prior art.

To achieve the above object, the present invention provides a synchronous rectification control method comprising: (a) receiving a first endpoint voltage; (b) obtaining a waveform slope change value of the first endpoint voltage; (c) when the change value of the waveform slope is larger than a first positive critical value, generating a first trigger signal, and when the change value of the waveform slope is smaller than a negative critical value, generating a conducting state signal; (d) generating a shielding signal according to the first trigger signal, and activating the shielding signal for a first shielding time; and (e) when the shielding signal is not activated and the conducting state signal is received, the synchronous rectification switch is conducted.

Optionally, the synchronous rectification control method further includes: (f) when the change value of the waveform slope is larger than a second positive critical value, generating a second trigger signal; wherein the second positive threshold is greater than the first positive threshold; and (g) generating a masking signal according to the second trigger signal, wherein the masking signal is activated for a second masking time; wherein the second masking time is less than the first masking time.

Optionally, in step (b), the change value of the waveform slope is obtained by high-pass filtering the first endpoint voltage, and when the first endpoint voltage rises, the change value of the waveform slope is an upward pulse, and the height of the upward pulse is proportional to the slope of the first endpoint voltage rise.

By the proposed synchronous rectification control method, the synchronous rectification switch is prevented from being erroneously turned on by the falling edge of the resonant waveform.

For a further understanding of the technology, means, and efficacy of the invention to be achieved, reference should be made to the following detailed description of the invention and accompanying drawings which are believed to be a further and specific understanding of the invention, and to the following drawings which are provided for purposes of illustration and description and are not intended to be limiting.

Drawings

The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate an embodiment of the invention and, together with the description, serve to explain the invention and not to limit the invention. In the drawings:

fig. 1 is a circuit block diagram of a power supply having a synchronous rectification switch and a synchronous rectification control device disposed on a secondary side low side thereof according to an embodiment of the present invention.

Fig. 2 is a block diagram of a power supply according to an embodiment of the present invention, in which a synchronous rectification switch and a synchronous rectification control device are disposed on a secondary side of the power supply.

Fig. 3 is a circuit block diagram of a synchronous rectification control device according to a first embodiment of the present invention.

Fig. 4 is a circuit block diagram of a synchronous rectification control device according to a second embodiment of the present invention.

Fig. 5 is a signal waveform diagram corresponding to the first embodiment of fig. 3 according to an embodiment of the present invention.

Fig. 6 is a signal waveform diagram corresponding to the second embodiment of fig. 4 according to an embodiment of the present invention.

Fig. 7 is a circuit diagram of an embodiment of a waveform slope detection circuit according to the present invention.

Fig. 8 is a flowchart of a synchronous rectification control method according to an embodiment of the present invention.

Description of reference numerals:

10 synchronous rectification control device

11 waveform slope detection circuit

12 comparison circuit

13, timer

14 judging unit

100 power supply

121: first comparator

122 second comparator

123 third comparator

141 AND gate

142 trigger

SR synchronous rectifier switch

N1 first endpoint

VD first end point voltage

VHPF waveform slope variation value

VC1 first trigger signal

VC2 second trigger signal

SMON on state signal

SAND operation signal

SPU Relay Signal

SSRG switch drive signal

SON synchronous rectification turn-on signal

VH1 first Positive threshold

VH2 second Positive threshold

Negative critical value of VL

VTH voltage critical value

SBL mask signal

SCR time window signal

TBL1 first mask time

TBL2 second mask time

TR transformer

S1 primary side winding

S2 Secondary winding

SM main switch

SG control signal generator

SC control signal

Vout output voltage

t 1-t 6 time points

S11-S15

S21-S25

Detailed Description

The technical contents and the detailed description of the present invention are described below with reference to the drawings.

Referring to fig. 1 and fig. 2, fig. 1 is a circuit block diagram of a power supply with a synchronous rectification switch and a synchronous rectification control device disposed on a secondary side low side of the power supply according to an embodiment of the present invention, and fig. 2 is a circuit block diagram of a power supply with a synchronous rectification switch and a synchronous rectification control device disposed on a secondary side high side of the power supply according to an embodiment of the present invention. The power supply 100 shown in fig. 1 and 2 includes a synchronous rectification control device 10. The power supply 100 includes a transformer TR having a primary side winding S1 and a secondary side winding S2. The power supply 100 further includes a main switch SM coupled to the primary winding S1 and a control signal generator SG. The control signal generator SG is used for providing a control signal SC to control the main switch SM, so that the main switch SM is selectively turned on or off to perform power conversion, so as to regulate the output voltage Vout of the power supply 100.

The synchronous rectification switch SR is coupled to the secondary winding S2, and the synchronous rectification control device 10 selectively turns on or off the synchronous rectification switch SR. As shown in fig. 1, the synchronous rectification switch SR is disposed at a low side (low side) of the secondary winding S2 of the transformer TR, and a source (source) of the synchronous rectification switch SR is grounded, so that the waveform slope detection circuit 11 receives a drain (drain) voltage VD (see fig. 3 and 4, which will be described in detail later) of the synchronous rectification switch SR from a first terminal N1 adjacent to the low side of the secondary winding S2, that is, the voltage difference VDs between the drain and the source of the synchronous rectification switch SR coupled to the low side is represented. As shown in fig. 2, the synchronous rectification switch SR is disposed on the high side of the secondary winding S2 of the transformer TR, and the source of the synchronous rectification switch SR is coupled to the high side of the secondary winding S2, so that the slope detection circuit 11 receives the drain voltage VD of the synchronous rectification switch SR from the first node N1 adjacent to the output voltage Vout, and compares the drain voltage VD with the source voltage of the synchronous rectification switch SR, thereby obtaining the voltage difference VDs between the drain and the source of the synchronous rectification switch SR coupled to the high side. The following description will take the circuit configuration of fig. 1 and the drain voltage VD (equal to the voltage difference VDs between the drain and the source of the synchronous rectification switch SR) as an example to describe the determination and control performed by the synchronous rectification control device 10 after receiving the first endpoint voltage VD (i.e. the drain voltage VD), which will be described in detail later. However, the present invention is not limited to the circuit configuration shown in fig. 1, and the present invention can be easily applied as long as the synchronous rectification control device 10 can detect the voltage difference VDS between the drain and the source of the synchronous rectification switch SR.

Referring to fig. 3 and fig. 5, fig. 3 is a circuit block diagram of a synchronous rectification control device according to a first embodiment of the present invention, and fig. 5 is a signal waveform diagram corresponding to the first embodiment of fig. 3 according to the present invention. The synchronous rectification control device 10 is coupled to a synchronous rectification switch (synchronous rectifier) SR having a first terminal N1. The synchronous rectification control device 10 includes a waveform slope detection circuit 11, a comparison circuit 12, a timer 13 and a determination unit 14.

The waveform slope detection circuit 11 receives the first endpoint voltage VD of the first endpoint N1, and obtains a waveform slope variation value VHPF of the first endpoint voltage VD. In one embodiment, the waveform slope detection circuit 11 is a high-pass filter (high-pass filter). Therefore, the waveform slope variation value VHPF is a waveform obtained by high-pass filtering the first endpoint voltage VD. When the first endpoint voltage VD rises, the waveform slope variation value VHPF is an upward pulse, and the height of the upward pulse is proportional to the rising slope of the first endpoint voltage VD. When the first endpoint voltage VD decreases, the waveform slope variation value VHPF is a downward pulse, and the height of the downward pulse is proportional to the slope of the decrease of the first endpoint voltage VD.

The comparison circuit 12 receives the waveform slope change value VHPF. When the waveform slope variation value VHPF is greater than the first positive threshold VH1, the comparison circuit 12 generates the first trigger signal VC 1. When the waveform slope variation value VHPF is smaller than the negative critical value VL, the comparison circuit 12 generates the on-state signal SMON. The conducting state signal SMON is one of necessary signals for triggering the secondary side synchronous rectification switch SR to turn on. For example: when the main switch SM coupled to the primary winding S1 is switched from the original on state to the off/open state, the first terminal voltage VD rapidly decreases, the slope change value VHPF is smaller than the negative threshold VL, and the comparison circuit 12 generates the on state signal SMON.

The timer 13 is coupled to the comparing circuit 12. When the timer 13 is triggered by the first trigger signal VC1 (i.e., when the waveform slope variation value VHPF is greater than the first positive threshold VH 1), the timer 13 outputs the mask signal SBL, and the mask signal SBL is activated for the first mask time TBL 1.

In the embodiment shown in fig. 3, the comparison circuit 12 includes a first comparator 121 and a second comparator 122. The first comparator 121 receives the slope VHPF and the positive threshold VH1, and compares the slope VHPF with the positive threshold VH1 to generate the first trigger signal VC 1. The second comparator 122 receives the slope change VHPF and the negative threshold VL, and compares the slope change VHPF with the negative threshold VL to generate the on-state signal SMON.

The determining unit 14 is coupled to the comparing circuit 12 and the timer 13. When the mask signal SBL is not activated and the conducting state signal SMON is received, the synchronous rectification switch SR is turned on. In the present embodiment, the determining unit 14 includes an AND gate (AND gate)141 AND a flip-flop 142 coupled to the AND gate 141. The AND gate 141 receives the mask signal SBL AND the on-state signal SMON, performs a logical AND operation, AND provides the generated output, e.g., an operation signal SAND, to the set (S) pin of the flip-flop 142. And, in cooperation with the switch driving signal SSRG received by the reset (R) pin of the flip-flop 142, further determine whether to output the synchronous rectification on signal SON to control the synchronous rectification switch SR to be turned on.

Referring to fig. 5, at a time point t1, when the main switch SM coupled to the primary winding S1 is turned from the original off-state to the on-state, the first terminal voltage VD is correspondingly increased, such that the waveform slope variation value VHPF is higher than the first positive threshold VH 1. Thus, the timer 13 outputs the mask signal SBL, and the mask signal SBL is activated and maintained for the first mask time TBL1 (e.g., the mask signal SBL maintains logic 0 during the first mask time TBL 1). At time t2, when the main switch SM coupled to the primary winding S1 is switched from the original on state to the off/open state, the first terminal voltage VD rapidly decreases, the slope change VHPF is smaller than the negative threshold VL, and the comparison circuit 12 generates the on state signal SMON. When the power supply 100 is confronted with the load condition change of the output voltage Vout, the length of the period during which the main switch SM is turned on (from the time point t1 to the time point t2) is correspondingly changed. The present invention is designed to keep the shortest possible on-period length of the main switch SM, i.e. the shortest period length from time point t1 to time point t2, longer than the first shading time TBL 1. Therefore, at the time point t2, the mask signal SBL is not activated (for example, the mask signal SBL is in a logic 1 state), the conducting state signal SMON generated by the comparing circuit 12 is not masked by the mask signal SBL, and the determining unit 14 can correctly output the synchronous rectification on signal SON, so as to turn on the synchronous rectification switch SR.

Referring to fig. 5, when the power supply 100 operates in the Discontinuous Conduction Mode (DCM), the primary switch SM and the secondary switch SR are both in an off-state at time t3 to t6, the first terminal voltage VD exhibits a relatively gentle resonant waveform change, the resonant waveform has a rising edge (e.g., time t3, t5) and a falling edge (e.g., time t4, t6), and the interval between the peaks of the slope change of the waveform generated by the rising edge and the falling edge is relatively short (e.g., time t3 to t4, time t5 to t6) and is shorter than the first shielding time TBL 1. Thus, at time points t4 and t6, although the waveform slope change value VHPF corresponding to the falling edge of the resonant waveform may be smaller than the negative threshold VL, the comparison circuit 12 generates the on-state signal SMON. However, at time points t3 and t5, the masking signal SBL triggered to be output by the rising edges of the two resonant waveforms remains activated (e.g., the masking signal SBL is still in a logic 0 state) within the first masking time TBL 1. Therefore, the conducting state signal SMON generated at the time points t4 and t6 is masked by the masking signal SBL, so that the determining unit 14 does not output the synchronous rectification on signal SON, and can avoid erroneously turning on the synchronous rectification switch SR.

Referring to fig. 4 and fig. 6, fig. 4 is a circuit block diagram of a synchronous rectification control device according to a second embodiment of the present invention, and fig. 6 is a signal waveform diagram corresponding to the second embodiment of fig. 4 according to the second embodiment of the present invention. Compared to the first embodiment shown in fig. 3 and 5, the comparison circuit 12 of the second embodiment further includes a third comparator 123. The third comparator 123 receives the slope VHPF and the positive threshold VH2, and compares the slope VHPF with the positive threshold VH2 to generate the second trigger signal VC 2. When the waveform slope variation value VHPF is greater than the second positive threshold VH2, the comparison circuit 12 generates the second trigger signal VC 2. As shown in fig. 6, the second positive threshold VH2 is greater than the first positive threshold VH 1.

When the timer 13 is triggered by the second trigger signal VC2, the timer 13 outputs the mask signal SBL, and the mask signal SBL is activated for the second mask time TBL 2. As shown in fig. 6, the second mask time TBL2 is less than the first mask time TBL 1. The waveform slope change value VHPF generated when the main switch SM is turned from the original off-state to the on-state (e.g., time t1) is higher than the waveform slope change value VHPF generated by the rising edge of the resonant waveform (e.g., time t3, t5), so that the second shielding time TBL2 is shorter for the shielding signal SBL triggered by the main switch SM turning from the original off-state to the on-state. In the second embodiment, the shortest possible on-time of the main switch SM, that is, the shortest period length from the time point t1 to the time point t2, only needs to be kept longer than the second mask time TBL 2. Thus, when the power supply 100 is subject to the load condition change of the output voltage Vout, the on-time of the main switch SM may have a larger time interval length variation margin, which is helpful to improve the electric energy conversion efficiency of the circuit.

Fig. 7 is a circuit diagram of an embodiment of a waveform slope detection circuit according to the invention. As shown in the figure, the waveform slope detection circuit adopted in the present invention is a high-pass filter, and is implemented by a first-order high-pass filter in the simplest form of a capacitor-resistor. The high-pass filter of the embodiment shown in fig. 7 is used for high-pass filtering the first endpoint voltage VD to generate the waveform slope variation VHPF having the positive and negative voltage variations shown in fig. 5 and 6.

Referring to fig. 8, fig. 8 is a flowchart illustrating a synchronous rectification control method according to an embodiment of the present invention. The synchronous rectification control method comprises the following steps: first, the first terminal voltage VD is received (S11). Then, the waveform slope change value VHPF of the first endpoint voltage VD is obtained (S12). In step (S12), the waveform slope change value VHPF is obtained by high-pass filtering the first endpoint voltage VD. When the first endpoint voltage VD rises, the waveform slope variation value VHPF is an upward pulse, and the height of the upward pulse is proportional to the rising slope of the first endpoint voltage VD. When the first endpoint voltage VD decreases, the waveform slope variation value VHPF is a downward pulse, and the height of the downward pulse is proportional to the slope of the decrease of the first endpoint voltage VD.

Then, the first trigger signal VC1 is generated when the waveform slope variation value VHPF is greater than the first positive threshold value VH1, and the on-state signal SMON is generated when the waveform slope variation value VHPF is less than the negative threshold value VL (S13). Then, the mask signal SBL is generated according to the first trigger signal VC1, and the mask signal SBL is activated for the first mask time TBL1 (S14). Finally, when the mask signal SBL is not activated and the conduction state signal SMON is received, the synchronous rectification switch SR is turned on (S15).

The synchronous rectification control method further comprises the following steps: when the waveform slope variation value VHPF is greater than the second positive threshold value VH2, the second trigger signal VC2 is generated. Wherein the second positive threshold VH2 is greater than the first positive threshold VH 1. The masking signal SBL is generated according to the second trigger signal VC2 and is activated for a second masking time TBL 2. Wherein the second masking time TBL2 is less than the first masking time TBL 1.

In summary, the synchronous rectification control apparatus, the power supply and the synchronous rectification control method provided by the present invention are used to realize the control of the synchronous rectification switch that prevents the synchronous rectification switch from being erroneously turned on by the falling edge of the resonant waveform.

The above-mentioned detailed description and drawings are only for the preferred embodiments of the present invention, but the present invention is not limited thereto, and the present invention should not be limited thereto, and all embodiments and modifications of the present invention should be included in the scope of the present invention, which is defined by the claims, and the scope of the present invention is encompassed by the claims, and any changes and modifications that can be easily conceived by those skilled in the art can be covered by the claims.

Claims

1. A synchronous rectification control device coupled to a synchronous rectification switch having a first terminal, the synchronous rectification control device comprising:

the waveform slope detection circuit receives a first endpoint voltage of the first endpoint and obtains a waveform slope change value of the first endpoint voltage;

a comparison circuit for receiving the change value of the waveform slope, wherein the comparison circuit generates a first trigger signal when the change value of the waveform slope is larger than a first positive critical value, and generates a conducting state signal when the change value of the waveform slope is smaller than a negative critical value;

a timer coupled to the comparison circuit, wherein when the timer is triggered by the first trigger signal, the timer outputs a mask signal, and the mask signal is activated for a first mask time;

and the judging unit is coupled with the comparison circuit and the timer and enables the synchronous rectification switch to be conducted when the shielding signal is not activated and the conducting state signal is received.

2. The synchronous rectification control device of claim 1, wherein the comparison circuit generates a second trigger signal when the slope variation value of the waveform is greater than a second positive threshold value; the second positive threshold is greater than the first positive threshold;

when the timer is triggered by the second trigger signal, the timer outputs the shielding signal, and the shielding signal is activated for a second shielding time, wherein the second shielding time is less than the first shielding time.

3. The synchronous rectification control device of claim 2 wherein the comparison circuit comprises:

a first comparator for receiving the change value of the waveform slope and the first positive critical value, and comparing the change value of the waveform slope and the first positive critical value to generate the first trigger signal;

a second comparator for receiving the change value of the waveform slope and the negative critical value, and comparing the change value of the waveform slope and the negative critical value to generate the conducting state signal; and

a third comparator for receiving the change value of the waveform slope and the second positive critical value, and comparing the change value of the waveform slope and the second positive critical value to generate the second trigger signal.

4. The synchronous rectification control device as claimed in claim 1, wherein the waveform slope detection circuit is a high pass filter, the change in the waveform slope is an up pulse when the first terminal voltage rises, and the height of the up pulse is proportional to the slope of the first terminal voltage rise.

5. The synchronous rectification control device of claim 4, wherein the change in the slope of the waveform is a downward pulse when the first endpoint voltage decreases, and the height of the downward pulse is proportional to the slope of the first endpoint voltage decrease.

6. A power supply comprising the synchronous rectification control device as claimed in any one of claims 1 to 5, wherein the power supply further comprises:

a transformer having a primary side winding and a secondary side winding;

the synchronous rectification switch is coupled to the secondary side winding, and the synchronous rectification control device enables the synchronous rectification switch to be selectively switched on or switched off.

7. The power supply of claim 6, wherein the power supply further comprises:

a main switch coupled to the primary winding;

the control signal generator is used for providing a control signal to control the main switch, so that the main switch is selectively switched on or off to carry out power conversion, and an output voltage of the power supply is regulated and controlled.

8. A synchronous rectification control method, characterized in that the method comprises:

(a) receiving a first endpoint voltage;

(b) obtaining a waveform slope change value of the first endpoint voltage;

(c) when the change value of the wave form slope is larger than a first positive critical value, a first trigger signal is generated, and when the change value of the wave form slope is smaller than a negative critical value, a conducting state signal is generated;

(d) generating a shielding signal according to the first trigger signal, and activating the shielding signal for a first shielding time;

(e) and when the shielding signal is not activated and the conducting state signal is received, enabling a synchronous rectification switch to be conducted.

9. The synchronous rectification control method of claim 8, further comprising:

(f) when the change value of the waveform slope is larger than a second positive critical value, generating a second trigger signal; the second positive threshold is greater than the first positive threshold;

(g) generating the shielding signal according to the second trigger signal, and activating the shielding signal for a second shielding time; the second masking time is less than the first masking time.

10. The synchronous rectification control method of claim 8, wherein in step (b), the change in the slope of the waveform is obtained by high-pass filtering the first endpoint voltage, and when the first endpoint voltage rises, the change in the slope of the waveform is an up pulse, and the height of the up pulse is proportional to the slope of the rise in the first endpoint voltage.

11. The synchronous rectification control method of claim 10, wherein the change in the slope of the waveform is a downward pulse when the first endpoint voltage decreases, and the height of the downward pulse is proportional to the slope of the first endpoint voltage decrease.