CN113497544B - Switching power supply and control circuit and quick response method thereof - Google Patents

Switching power supply and control circuit and quick response method thereof Download PDF

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Publication number
CN113497544B
CN113497544B CN202010267023.4A CN202010267023A CN113497544B CN 113497544 B CN113497544 B CN 113497544B CN 202010267023 A CN202010267023 A CN 202010267023A CN 113497544 B CN113497544 B CN 113497544B
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signal
fast response
output voltage
circuit
power supply
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CN113497544A (en
Inventor
陈永任
林宥婕
刘家旗
林祓*
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Richtek Technology Corp
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Richtek Technology Corp
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/08—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
    • H02M3/158—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load

Abstract

A switching power supply, a control circuit thereof and a fast response method are provided. The switching power supply has load transient response capability and comprises at least one power stage circuit and a control circuit. The control circuit includes a pulse width modulation signal generating circuit and a fast response signal generating circuit. The PWM signal generating circuit generates a PWM signal according to the output voltage and the quick response signal so as to operate a power switch in the corresponding power level circuit and convert the input voltage into the output voltage. The fast response signal generating circuit includes a differentiating circuit and a comparing circuit. The differentiating circuit is used for carrying out a differentiating operation on a sensing signal related to the output voltage to generate a differentiated signal. The comparing circuit is used for comparing the differential signal with the quick response threshold signal so as to determine that the pulse width modulation signal generating circuit executes a quick response procedure when the differential signal exceeds the quick response threshold signal.

Description

Switching power supply and control circuit and quick response method thereof
Technical Field
The present invention relates to a switching power supply, and more particularly, to a switching power supply with load transient (load transient) response capability. The invention also relates to a control circuit and a quick response method for the switching power supply.
Background
Fig. 1A shows a prior art switching power supply 1 for converting an input voltage Vin into an output voltage Vout for supplying power to a Central Processing Unit (CPU) or a Graphics Processing Unit (GPU) 10. As shown in fig. 1A, the switching power supply 1 is a multi-phase switching power supply, and includes a plurality of power stage circuits 11 and a control circuit 12. The control circuit 12 correspondingly generates Pulse Width Modulation (PWM) signals PWM1, PWM2 and PWM3 according to a voltage sense signal Vsense associated with the output voltage Vout and current sense signals CS1, CS2 and CS3 associated with the inductor current flowing through each power stage circuit 11, so as to respectively operate the power switches in the power stage circuit 11, and convert the input voltage Vin into the output voltage Vout.
Compared to a general switching power supply that does not supply power to a CPU or a GPU, the switching power supply 1 satisfies the following special requirements: in order to implement a load circuit with a relatively fast power requirement change during the operation of the CPU/GPU 10, dynamic voltage positioning (dynamic voltage positioning) needs to be implemented with extremely high precision, a certain load line (load line) requirement needs to be satisfied, conversion between different power consumption states needs to be relatively fast, and different parameter measurement and monitoring needs to be provided. Communication between the switching power supply 1 and the CPU/GPU 10 is usually performed via a serial bus (serial bus) interface, and the CPU/GPU 10 will provide different power supply requirements according to its load and operation mode.
In general, the CPU/GPU 10 consumes relatively large amounts of current in certain operating modes, and therefore often employs a multi-phase power stage circuit 11. In the switching power supply 1 shown in fig. 1A, a 3-phase power stage circuit 11 operates power switches therein according to Pulse Width Modulation (PWM) signals PWM1, PWM2 and PWM3, respectively, to convert an input voltage Vin into an output voltage Vout. For the switching power supply 1, it is important to measure the current of each phase accurately, and the control circuit 12 maintains the current distribution among the phases according to the current sensing signals CS1, CS2 and CS3 related to the current of each phase, and realizes good loop characteristic control, setting of load line (load line), and enabling of the over-current protection procedure.
Referring to fig. 1B, waveform signals of the voltage sense signal Vsense and the PWM signals PWM1, PWM2 and PWM3 are shown in the drop-over-load (drop) operation mode of the switching power supply 1. The output voltage Vout drops when the load increases, as shown in the figure, from the voltage V1 to the voltage V2 after the time point t 1. Further, at the initial stage of the output voltage Vout dropping from the voltage V1, undershoot (undershoot) occurs. When the load is lowered, the output voltage Vout rises (not shown, for example, the output voltage Vout rises from the voltage V2 to the voltage V1), and at the beginning of the rise of the output voltage Vout from the voltage V2, overshoot (overshoot) occurs. Therefore, the voltage-dependent-load-drop operation mode utilizes the load line technique to lower the output voltage Vout when the load current increases and to raise the output voltage Vout when the load current decreases, thereby lowering the output capacitor Cout, i.e., eliminating the need to use more or higher output capacitors Cout, thereby reducing the circuit area and circuit manufacturing cost.
One of the disadvantages of the switching power supply 1 of the prior art is that the switching power supply 1 can only generate dense pulses from time t1 to time t2 of the PWM signals PWM1, PWM2 and PWM3 in fig. 1B according to the feedback control of the voltage sense signal Vsense when the load current increases and the output voltage Vout drops due to an undershoot at the beginning. In this control mode, the load transient response capability is poor, and serious undershoot of the output voltage Vout is caused. On the other hand, the disadvantage of the prior art is that when the load is lowered, the switching power supply 1 of the prior art causes a severe overshoot at the initial stage of the output voltage Vout.
That is, since the response speed of the switching power supply 1 to load transient is limited, the switching power supply 1 can only deliver limited current in a fixed ON-time (constant ON time) mode, and thus cannot meet the requirement of heavy load; in the mechanism that the switching power supply 1 operates in alternate (interleaving) conduction, the dynamic response time is delayed, and the idle phases cannot provide power for load increase in the plurality of power stage circuits 11 without simultaneous conduction.
In view of the above, the present invention provides a switching power supply with load transient response capability. The invention also relates to a control circuit and a quick response method for the switching power supply.
Disclosure of Invention
From one aspect, the present invention provides a switching power supply, comprising: at least one power stage circuit, wherein each power stage circuit is configured to operate one of the power switches according to a corresponding Pulse Width Modulation (PWM) signal to convert an input voltage into an output voltage; and a control circuit, comprising: a PWM signal generating circuit coupled to the at least one power stage circuit for generating the PWM signal according to the output voltage and a fast response signal; and a fast response signal generating circuit coupled to the pwm signal generating circuit for generating the fast response signal according to the output voltage, the fast response signal generating circuit comprising: a differential circuit for performing a differential operation on a voltage sense signal associated with the output voltage to generate a differential signal; and a comparison circuit coupled to the differential circuit for comparing the differential signal with a fast response threshold signal to generate the fast response signal, so as to determine to make the pwm signal generating circuit execute a fast response procedure when the differential signal exceeds the fast response threshold signal.
From another aspect, the present invention provides a control circuit for a switching power supply to convert an input voltage into an output voltage, the control circuit comprising: a PWM signal generating circuit, wherein each PWM signal generating circuit is coupled with at least one corresponding power stage circuit and is used for generating a PWM signal according to the output voltage and a quick response signal; and a fast response signal generating circuit coupled to the pwm signal generating circuit for generating the fast response signal according to the output voltage, the fast response signal generating circuit comprising: a differential circuit for performing a differential operation on a voltage sense signal associated with the output voltage to generate a differential signal; and a comparison circuit coupled to the differential circuit for comparing the differential signal with a fast response threshold signal to generate the fast response signal, so as to determine to make the pwm signal generating circuit execute a fast response procedure when the differential signal exceeds the fast response threshold signal.
In a preferred embodiment, the fast response signal generating circuit further includes a fast response pulse generator coupled to the comparing circuit for generating a fast response pulse signal according to the fast response signal.
In a preferred embodiment, the switching power supply includes a plurality of power stage circuits, and in the fast response procedure, the PWM signal generating circuit adjusts each of the PWM signals according to the fast response signal, so that the corresponding power switch in each of the power stage circuits is simultaneously turned on for a fast response period according to a fast response pulse signal associated with the fast response signal.
In a preferred embodiment, the fast response threshold signal is determined based on an inductor current ripple signal, an output capacitance, or/and the number of phases of the at least one power stage circuit.
In a preferred embodiment, the switching power supply operates in a constant ON-time (constant ON-time) mode.
In a preferred embodiment, the fast response threshold signal comprises a positive fast response threshold or/and a negative fast response threshold.
In a preferred embodiment, when the switching power supply operates in a voltage drop over load (drop) mode, when the level of the output voltage drops and the differential signal exceeds the fast response threshold signal, the PWM signal generating circuit adjusts the PWM signal corresponding to each of the power stage circuits according to the fast response signal, such that a corresponding upper bridge power switch in each of the power stage circuits simultaneously turns on a fast response period according to a fast response pulse signal associated with the fast response signal.
In a preferred embodiment, when the switching power supply operates in a voltage drop over load (drop) mode, when the level of the output voltage rises and the differential signal exceeds the fast response threshold signal, the PWM signal generating circuit adjusts the PWM signal corresponding to each of the power stage circuits according to the fast response signal, such that the corresponding lower bridge power switch of each of the power stage circuits is simultaneously turned on for a fast response period according to a fast response pulse signal related to the fast response signal, or such that the corresponding upper bridge power switch and the corresponding lower bridge power switch of each of the power stage circuits are simultaneously turned off for a fast response period according to a fast response pulse signal related to the fast response signal.
In a preferred embodiment, the PWM signal generating circuit further generates the PWM signal according to a voltage positioning signal, and the output voltage is regulated according to the following formula:
Vout＝VDAC-Iout*RLL
where Vout is the output voltage, VDAC is a desired level associated with the voltage positioning signal, Iout is an output current, and RLL is a load line resistance.
In a preferred embodiment, the switching power supply operates in a voltage drop over load (drop) operation mode, such that the PWM signal generating circuit generates the PWM signal in a feedback loop (feedback loop) according to the output voltage and the fast response signal to convert the input voltage to the output voltage.
From another perspective, the present invention provides a fast response method for a switching power supply to improve load transient response capability, the fast response method comprising: performing a differential operation on a voltage sensing signal associated with an output voltage to generate a differential signal; comparing the differential signal with a quick response threshold signal to generate a quick response signal, and determining to execute a quick response procedure when the differential signal exceeds the quick response threshold signal; and in the fast response procedure, a Pulse Width Modulation (PWM) signal is adjusted by a PWM signal generating circuit of the switching power supply according to the fast response signal, so that a corresponding power switch of at least one power stage circuit of the switching power supply is turned on or off for a fast response period according to a fast response pulse signal related to the fast response signal.
In a preferred embodiment, each of the at least one power stage circuit is configured to operate the power switch according to the corresponding PWM signal to convert an input voltage into the output voltage.
The purpose, technical content, features and effects of the present invention will be more readily understood through the following detailed description of specific embodiments.
Drawings
Fig. 1A shows a prior art switching power supply 1.
Fig. 1B shows waveforms of the voltage sense signal Vsense and the PWM signals PWM1, PWM2 and PWM3 of the switching power supply 1.
Fig. 2 shows a schematic view of an embodiment according to the invention.
Fig. 3 shows the signal waveforms of the overshoot and undershoot.
Fig. 4 shows a schematic diagram of a more specific embodiment according to the present invention.
Fig. 5 shows a waveform diagram of a correlation signal with a short fast response period.
Fig. 6 shows a waveform diagram of a correlation signal with a longer fast response period.
Fig. 7 shows a schematic diagram of signal waveforms during fast response that are adaptively adjusted according to the length of the period during which the differentiated signal exceeds the QR threshold signal.
Fig. 8 is a waveform diagram showing a correlation signal with a fast response period of a predetermined fixed length.
Fig. 9 shows a signal waveform diagram of the PWM signal with the fast response pulse overlapping the alternate pulse.
Fig. 10A-10J show synchronous or asynchronous buck, boost, and boost-buck power stage circuits.
Description of the symbols in the drawings
1,2,3: switching type power supply
10: central processing unit or graphic processor
11, 21, 31: power stage circuit
12, 22, 32: control circuit
23, 33: PWM signal generating circuit
24, 34: QR signal generating circuit
241, 341: differentiating circuit
243, 343, 335: comparison circuit
331: amplifying circuit
333: summation circuit
337: alternate circuit
345: QR pulse generator
Ai: sum current signal
Comp: comparing signals
Cout: output capacitor
CS1, CS2, CS 3: current sensing signal
EAout: amplifying the output signal
Isense1, Isense2, Isense 3: current sensing signal
Ip, Ip2, Ip 3: phase current
LG: lower bridge power switch
And (3) Prdth: duration of time
PWM1, PWM2, PWM 3: PWM signal
t1, t 2: point in time
QRPulse: QR pulse signal e
QRprd1, QRprd2, QRprd3, QRprd4, QRprd 5: during fast response
QRSg: QR signals
QRth: QR threshold signal
UG: upper bridge power switch
VDAC: request level
Vdiff: differentiated signal
Vin: input voltage
Vout: output voltage
Vsense: voltage sensing signal
Detailed Description
The drawings in the present disclosure are schematic and are intended to show the coupling relationship between circuits and the relationship between signal waveforms, and the circuits, signal waveforms and frequencies are not drawn to scale.
Fig. 2 shows an embodiment of a switching power supply (switching power supply 2) according to the present invention. The switching power supply 2 includes a power stage circuit 21 and a control circuit 22. The power stage circuit 21 is configured to operate a power switch (not shown) therein according to a corresponding Pulse Width Modulation (PWM) signal PWM1 to convert the input voltage Vin into the output voltage Vout. The control circuit 22 includes a Pulse Width Modulation (PWM) signal generation circuit 23 and a Quick Response (QR) signal generation circuit 24. The PWM signal generating circuit 23 is coupled to the power stage circuit 21 for generating a PWM signal PWM1 according to the output voltage Vout and a Quick Response (QR) signal QRsig. The QR signal generating circuit 24 is coupled to the PWM signal generating circuit 23 for generating a QR signal QRsig according to the output voltage Vout. The QR signal generating circuit 24 includes a differentiating circuit 241 and a comparing circuit 243. The differentiating circuit 241 is configured to perform a differentiating operation (particularly, a differentiating operation with respect to time variation) on the voltage sensing signal Vsense associated with the output voltage Vout to generate a differentiated signal Vdiff. The comparing circuit 243 is coupled to the differentiating circuit 241 for comparing the differentiated signal Vdiff with a Quick Response (QR) threshold signal QRth to generate a QR signal QRsig, so as to determine to enable the PWM signal generating circuit 23 to execute a Quick Response (QR) procedure when the differentiated signal Vdiff exceeds the QR threshold signal QRth.
According to the present invention, the power stage circuit 21 may be configured as, for example, but not limited to, a synchronous or asynchronous buck, boost, buck, or boost-buck type power conversion circuit, as shown in fig. 10A-10J. The number of the power stage circuits 21 is not limited to a single number, and may be a plurality, which will be described in detail later. It should be noted that the QR procedure refers to a response procedure performed to improve undershoot and overshoot caused by load transient when the switching power supply 2 is in the voltage-drop operation mode. As mentioned above, undershoot (undershoot) occurs in the initial stage of the output voltage Vout decreasing from the high potential to the low potential; at the beginning of the output voltage Vout rising from the low potential to the high potential, overshoot (overshoot) occurs. Typical overshoot and undershoot are illustrated by the signal waveform diagram of FIG. 3. Of these, the voltage V1 indicates a higher potential, and the voltage V2 indicates a lower potential.
Fig. 4 shows a schematic diagram of a more specific embodiment according to the present invention. As shown, the switching power supply 3 includes a plurality of power stage circuits 31 and a control circuit 32. Each power stage circuit 31 is configured to operate its power switch (e.g., the upper bridge power switch UG and the lower bridge power switch LG in the power stage circuits shown in fig. 10A-10J) according to the corresponding PWM signal PWM1, PWM2 or PWM3 to convert the input voltage Vin into the output voltage Vout. The control circuit 32 includes a PWM signal generation circuit 33 and a QR signal generation circuit 34. The PWM signal generating circuit 33 is coupled to the power stage circuit 31 for generating a PWM signal PWM1 according to the output voltage Vout and a Quick Response (QR) signal QRsig. The QR signal generating circuit 34 is coupled to the PWM signal generating circuit 33 for generating a QR signal QRsig according to the output voltage Vout.
The QR signal generating circuit 34 includes a differentiating circuit 341, a comparing circuit 343, and a Quick Response (QR) pulse generator 345. The differentiating circuit 341 is configured to perform a differentiating operation on the voltage sense signal Vsense related to the output voltage Vout to generate a differentiated signal Vdiff. The comparing circuit 343 is coupled to the differentiating circuit 341 for comparing the differentiated signal Vdiff with the QR threshold signal QRth to generate the QR signal QRsig, so as to determine that the PWM signal generating circuit 33 executes a Quick Response (QR) procedure when the differentiated signal Vdiff exceeds the QR threshold signal QRth. Compared to the embodiment shown in fig. 2, in the present embodiment, the QR signal generating circuit 34 further includes a QR pulse generator 345 coupled to the comparing circuit 343 for generating a Quick Response (QR) pulse signal QRpulse according to the QR signal QRsig.
The switching power supply 3 is a multi-phase switching power supply, and includes a plurality of power stage circuits 31. In the fast response procedure of the switching power supply 3, the PWM signal generating circuit 33 adjusts each of the PWM signals PWM1, PWM2 and PWM3 according to the QR signal QRpulse, so that the corresponding power switch in each power stage circuit 31 is simultaneously turned on or off for a fast response period according to the QR pulse signal QRpulse associated with the QR signal QRsig.
As shown, the PWM signal generation circuit 33 includes an amplification circuit 331, a sum circuit 333, a comparison circuit 335, and a phase alternation circuit 337. The amplifying circuit 331 generates an amplified output signal EAout according to the voltage sense signal Vsense associated with the output voltage Vout and the desired level VDAC associated with the voltage positioning signal. The summation circuit 333 generates a summation current signal Ai according to the phase currents Ip, Ip2 and Ip3 associated with each power stage. The comparison circuit 335 compares the amplified output signal EAout with the sum current signal Ai to generate a comparison signal Comp. The inter-phase rotation circuit 337 generates PWM signals PWM1, PWM2 and PWM3 according to the comparison signal Comp, the QR pulse signal QRpulse associated with the QR signal QRsig, and the current sensing signals Isense1, Isense2 and Isense3 associated with the respective phase currents Ip, Ip2 and Ip3, respectively.
For example, the switching power supply 3 operates in a constant ON time (constant ON time) mode, operates in a voltage drop over load (drop) mode, and operates in an alternate turn-ON (interleaving) mechanism. The PWM signal generating circuit 33 generates PWM signals PWM1, PWM2 and PWM3 according to a Voltage Identification (VID) signal, and adjusts the output voltage according to the following equation:
Vout＝VDAC-Iout*RLL
wherein Vout is the output voltage Vout, VDAC is the desired level VDAC associated with the voltage positioning signal, Iout is the output current Iout, and RLL is the load line resistance.
In the voltage drop over load (drop) operation mode, the PWM signal generating circuit 33 generates PWM signals PWM1, PWM2 and PWM3 according to the output voltage Vout and QR signal QRsig in a feedback loop (feedback loop) to convert the input voltage Vin to the output voltage Vout.
It should be noted that the constant ON time mode refers to a mode in which the ON time of the power switch is constant due to a feedback mechanism for adjusting the output voltage Vout (not due to the QR process) in each switching cycle of the PWM signal, and this mode is referred to as a constant ON time mode, which is well known to those skilled in the art and will not be described herein. It should be noted that the mechanism of alternate conduction is described.
It should be noted that the mechanism of alternate conducting (interleaving) refers to that, under the condition that the switching power supply includes a plurality of power stage circuits, the power switches in the power stage circuits can be conducted alternately or simultaneously by the control of the PWM signal, so that each power stage circuit shares the output power to satisfy the requirement of the load circuit with larger power consumption, and reduce the ripples of the input voltage and the output voltage to reduce the volume of the inductor therein and the capacitance of the output capacitor therein.
In these operation modes, the differentiating circuit 341 in the QR signal generating circuit 34 performs a differentiating operation on the voltage sensing signal Vsese with respect to the output voltage Vout. The voltage sensing signal Vsese may be, for example, but not limited to, the output voltage Vout itself, and may be generated through other conversions. For example, when the output voltage Vout is decreased from the higher voltage V1 to the lower voltage V2, the signal waveform of the output voltage Vout is shown in the small diagram; the capacitance cross voltage Vc in the differentiating circuit 341 is shown as a signal waveform diagram of the capacitance cross voltage Vc in the small graph; the differential operation in the differential circuit 341 produces a signal waveform diagram of the differential signal Vdiff shown in the small graph.
The comparison circuit 343 compares the differential signal Vdiff with the QR threshold signal QRth to generate the QR signal QRsig. The QR pulse generator 345 generates a QR pulse signal QRpulse based on the QR signal QRsig. In a preferred embodiment, when the switching power supply 3 operates in a voltage drop-over-load (drop) operation mode, when the output voltage Vout drops from a higher level (e.g., the voltage V1) to a lower level (e.g., the voltage V2) and the differential signal Vdiff exceeds the QR threshold signal QRth, the PWM signal generating circuit 33 adjusts the PWM signals PWM1, PWM2 and PWM3 corresponding to each power stage circuit 31 according to the QR signal QRsig, so that the upper bridge power switch corresponding to each power stage circuit 31 (please refer to the upper bridge power switch UG in fig. 10A-10J) is turned on for a fast response period according to the QR pulse signal QRpulse associated with the QR signal QRsig.
In another preferred embodiment, when the switching power supply 3 operates in the voltage-drop-with-load operation mode, when the output voltage Vout rises from a lower level (e.g. voltage V2) to a higher level (e.g. voltage V1) and the differential signal Vdiff exceeds the QR threshold signal QRth, the PWM signal generating circuit 33 adjusts the PWM signals PWM1, PWM2 and PWM3 corresponding to each power stage circuit 31 according to the QR signal QRsig, so that the corresponding lower bridge power switch in each power stage circuit 31 (see the lower bridge power switch LG in fig. 10A-10J) is turned on simultaneously for a fast response period according to the QR pulse signal QRsig, or the corresponding upper bridge power switch and lower bridge power switch LG in each power stage circuit 31 (see the upper bridge power switch UG and the lower bridge power switch LG in fig. 10A-10J) are turned on simultaneously according to the QR pulse signal QRsig, while not conducting for a fast response period. In the embodiments of the upper bridge power switch and the lower bridge power switch (please refer to fig. 10A-10J, the upper bridge power switch UG and the lower bridge power switch LG) according to the QR pulse signal QRpulse associated with the QR signal QRsig, the upper bridge power switch and the lower bridge power switch are not turned on for a period of fast response, and the upper bridge power switch and the lower bridge power switch are tri-state (tri-state) to turn on the parasitic diode of the lower bridge power switch, so that the overshoot of the output voltage Vout can be more effectively alleviated.
One of the technical features of the present invention over the prior art is that the voltage sense signal Vsense with respect to the output voltage Vout is differentiated to calculate the slope of the rise or fall of the output voltage Vout, and the corresponding power switch in each power stage circuit 31 is simultaneously turned on or off according to the calculation result to mitigate overshoot or undershoot in response to a load transient.
It should be noted that, according to the present invention, the pulse width of the QR pulse signal QRpulse is determined in two ways, and the pulse width of the QR pulse signal QRpulse further determines the length of the fast response period. One method of determining the pulse width of the QR pulse signal QRpulse is a fixed pulse width, that is, as long as the differential signal Vdiff exceeds the QR threshold signal QRth, the pulse width of the generated QR pulse signal QRpulse is fixed regardless of the duration of the differential signal Vdiff exceeding the QR threshold signal QRth. A second method for determining the pulse width of the QR pulse signal QRpulse is to adaptively adjust the pulse width according to the length of the period during which the differential signal Vdiff exceeds the QR threshold signal QRth, that is, when the differential signal Vdiff exceeds the QR threshold signal QRth, the pulse width of the QR pulse signal QRpulse generated is determined according to the length of the period during which the differential signal Vdiff exceeds the QR threshold signal QRth.
It should be noted that, in a preferred embodiment, the QR threshold signal QRth is determined according to the inductor current ripple signal, the output capacitor Cout and/or the number of phases of the power stage circuit 31. The inductor current ripple signal refers to, in particular, the rising/falling slope of the inductor current ripple signal flowing through the inductor in each power stage circuit 31, which at least depends on the input voltage Vin, the output voltage Vout and the inductance value of the inductor.
It should be noted that the QR threshold signal QRth includes a positive quick response threshold or/and a negative quick response threshold. That is, the QR threshold signal QRth includes a positive fast response threshold and/or a negative fast response threshold, and may respond to undershoot and/or overshoot of the output voltage Vout.
Fig. 5 shows a waveform diagram of a correlation signal under a condition that a fast response period QRprd1 is relatively short in one embodiment. In one embodiment, for example, when the output voltage Vout decreases from a higher level (e.g., the voltage V1) to a lower level (e.g., the voltage V2) and the differential signal Vdiff exceeds the QR threshold signal QRth, the PWM signal generating circuit 33 adjusts the PWM signals PWM1, PWM2 and PWM3 corresponding to each power stage circuit 31 according to the QR signal QRsig, so that the upper bridge power switch (please refer to the upper bridge power switch UG in fig. 10A-10J) corresponding to each power stage circuit 31 simultaneously turns on a fast response period QRprd1 according to the QR pulse signal QRpulse associated with the QR signal QRsig. Fig. 5 shows a situation where the fast response period QRprd1 is relatively short, so that undershoot compensation is insufficient and undershoot conditions still remain in the output voltage Vout.
Fig. 6 shows a waveform diagram of a correlation signal in an embodiment where the fast response period QRprd2 is relatively long. In one embodiment, for example, when the output voltage Vout decreases from a higher level (e.g., the voltage V1) to a lower level (e.g., the voltage V2) and the differential signal Vdiff exceeds the QR threshold signal QRth, the PWM signal generating circuit 33 adjusts the PWM signals PWM1, PWM2 and PWM3 corresponding to each power stage circuit 31 according to the QR signal QRsig, so that the upper bridge power switch (please refer to the upper bridge power switch UG in fig. 10A-10J) corresponding to each power stage circuit 31 simultaneously turns on a fast response period QRprd2 according to the QR pulse signal QRpulse associated with the QR signal QRsig. Fig. 6 shows a case where the fast response period QRprd2 is relatively long, so that undershoot is over-compensated and the output voltage Vout generates a ring-back (ringing) condition.
Fig. 7 shows a waveform diagram of the fast response period QRprd3 for adaptively adjusting the on-time of the upper bridge switch in each power stage circuit 13 according to the length of the duration Prdth of the QR threshold signal QRth that the differential signal Vdiff exceeds. In one embodiment, for example, when the output voltage Vout decreases from a higher level (e.g., voltage V1) to a lower level (e.g., voltage V2) and the differential signal Vdiff exceeds the QR threshold signal QRth, the pulse width of the QR pulse signal QRpulse is determined according to the length of the duration Prdth of the QR threshold signal QRth that the differential signal Vdiff exceeds the QR threshold signal QRth, and the PWM signal generating circuit 33 adjusts the PWM signals PWM1, PWM2 and PWM3 corresponding to each power stage circuit 31 according to the pulse width of the QR pulse signal QRpulse, so that the corresponding upper bridge power switch in each power stage circuit 31 (see the upper bridge power switch UG in fig. 10A-10J) is turned on simultaneously for a fast response period prd3 according to the pulse width of the QR pulse signal QRpulse.
Fig. 8 shows a waveform diagram of a QRprd4 correlation signal with a preset fixed length during a fast response period in one embodiment. In one embodiment, for example, when the output voltage Vout drops from a higher level (e.g., voltage V1) to a lower level (e.g., voltage V2), and the differential signal Vdiff exceeds the QR threshold signal QRth, the pulse width of the QR pulse signal QRpulse, for example not depending on the length of the duration Prdth of the differential signal Vdiff exceeding the QR threshold signal QRth, but rather, when the differentiated signal Vdiff exceeds the QR threshold signal QRth, a QR pulse signal QRpulse with a fixed preset pulse width is generated, and the PWM signal generating circuit 33 adjusts the PWM signals PWM1, PWM2 and PWM3 corresponding to each power stage circuit 31 according to the pulse width of the QR pulse signal QRpulse, so as to make the corresponding upper bridge power switch in each power stage circuit 31 (see the upper bridge power switch UG in fig. 10A-10J), according to the pulse width of the QR pulse signal QRpulse, a fast response period QRprd4 with a preset length is simultaneously conducted.
Fig. 9 shows a signal waveform diagram of the fast response pulse and the alternate pulse of the related PWM signal. As shown in fig. 9, in the fast response period QRprd5, fast response pulses are generated in each of the PWM signals PWM1, PWM2 and PWM3 according to the QR pulse signal QRpulse, if the fast response pulses overlap with alternate pulses (indicated by dotted lines) generated in each of the PWM signals PWM1, PWM2 and PWM3 by the switching power supply in the voltage-dependent load-down operation mode, each of the PWM signals PWM1, PWM2 and PWM3 will be kept at a high level, i.e. the corresponding power switch is kept turned on.
The present invention has been described with respect to the preferred embodiments, but the above description is only for the purpose of making the content of the present invention easy to understand for those skilled in the art, and is not intended to limit the scope of the present invention. The various embodiments described are not limited to individual applications, but may also be used in combination, for example, two or more embodiments may be combined, and some components in one embodiment may be substituted for corresponding components in another embodiment. In addition, the term "processing or calculating or generating an output result according to a signal" in the present invention is not limited to the signal itself, and includes performing voltage-current conversion, current-voltage conversion, and/or ratio conversion on the signal, if necessary, and then performing processing or calculation according to the converted signal to generate an output result. It is understood that those skilled in the art can devise various equivalent variations and combinations, not necessarily all illustrated, without departing from the spirit of the invention. Accordingly, the scope of the present invention should be determined to encompass all such equivalent variations as described above.

Claims (27)

1. A switching power supply, comprising:
a plurality of power stage circuits, wherein each power stage circuit is used for operating one of the power switches according to a corresponding pulse width modulation signal so as to convert an input voltage into an output voltage; and
a control circuit, comprising:
a PWM signal generating circuit coupled to at least one power stage circuit for generating the PWM signal according to the output voltage and a fast response signal; and
a fast response signal generating circuit coupled to the pwm signal generating circuit for generating the fast response signal according to the output voltage, the fast response signal generating circuit comprising:
a differential circuit for performing a differential operation on a voltage sense signal associated with the output voltage to generate a differential signal; and
a comparator circuit coupled to the differentiator circuit for comparing the differentiated signal with a fast response threshold signal to generate the fast response signal, and determining to enable the pwm signal generator circuit to perform a fast response procedure when the differentiated signal exceeds the fast response threshold signal;
in the fast response procedure, the pwm signal generating circuit adjusts each of the pwm signals according to the fast response signal, so that the corresponding power switch in each of the power stage circuits is simultaneously turned on or off for a fast response period according to a fast response pulse signal related to the fast response signal;
the pulse width of the fast response pulse signal determines the length of the fast response period, and the pulse width of the fast response pulse signal is determined according to the length of the period during which the differential signal exceeds the fast response threshold signal.
2. The switching power supply of claim 1, wherein the fast response signal generating circuit further comprises a fast response pulse generator coupled to the comparing circuit for generating the fast response pulse signal according to the fast response signal.
3. The switching power supply of claim 1, wherein the fast response threshold signal is determined according to an inductor current ripple signal, an output capacitance, and/or a number of phases of the plurality of power stage circuits.
4. The switching power supply of claim 1, wherein the switching power supply operates in a constant on-time mode.
5. The switching power supply of claim 1, wherein the fast response threshold signal comprises a positive fast response threshold or/and a negative fast response threshold.
6. The switching power supply of claim 1, wherein when the switching power supply operates in a voltage-on-load-down mode, when the level of the output voltage decreases and the differential signal exceeds the fast response threshold signal, the pwm signal generating circuit adjusts the pwm signal corresponding to each of the power stage circuits according to the fast response signal, such that a corresponding upper bridge power switch in each of the power stage circuits simultaneously turns on the segment of the fast response period according to the fast response pulse signal associated with the fast response signal.
7. The switching power supply of claim 1, wherein when the switching power supply operates in a voltage-on-load (VSR) mode, the level of the output voltage rises and the differential signal exceeds the QR threshold signal, the PWM signal generating circuit adjusts the PWM signal corresponding to each of the power stage circuits according to the QR signal, such that a corresponding one of the pull-down switches of each of the power stage circuits simultaneously turns on the segment of QR duration according to the QR pulse signal related to the QR signal, or such that a corresponding one of the pull-up switch and the pull-down switch of each of the power stage circuits simultaneously turns off the segment of QR duration according to the QR pulse signal related to the QR signal.
8. The switching power supply of claim 1, wherein the switching power supply operates in a voltage-on-load (VSOP) mode of operation, such that the PWM signal generating circuit generates the PWM signal in a feedback loop according to the output voltage and the fast response signal to convert the input voltage into the output voltage.
9. The switching power supply of claim 8, wherein the pwm signal generating circuit further generates the pwm signal according to a voltage positioning signal, the output voltage being regulated by:
Vout＝VDAC-Iout*RLL
where Vout is the output voltage, VDAC is a desired level associated with the voltage positioning signal, Iout is an output current, and RLL is a load line resistance.
10. A control circuit for a switching power supply to convert an input voltage to an output voltage, the control circuit comprising:
a pulse width modulation signal generating circuit coupled to at least one power stage circuit for generating a pulse width modulation signal according to the output voltage and a fast response signal; and
a fast response signal generating circuit coupled to the pwm signal generating circuit for generating the fast response signal according to the output voltage, the fast response signal generating circuit comprising:
a differential circuit for performing a differential operation on a voltage sense signal associated with the output voltage to generate a differential signal; and
a comparator circuit coupled to the differentiator circuit for comparing the differentiated signal with a fast response threshold signal to generate the fast response signal, and determining to enable the pwm signal generator circuit to perform a fast response procedure when the differentiated signal exceeds the fast response threshold signal;
in the fast response procedure, the pwm signal generating circuit adjusts each of the pwm signals according to the fast response signal, such that the corresponding power switch of each of the power stage circuits is simultaneously turned on or off for a fast response period according to a fast response pulse signal related to the fast response signal;
the pulse width of the fast response pulse signal determines the length of the fast response period, and the pulse width of the fast response pulse signal is determined according to the length of the period during which the differential signal exceeds the fast response threshold signal.
11. The control circuit of claim 10, wherein the fast response signal generating circuit further comprises a fast response pulse generator coupled to the comparing circuit for generating the fast response pulse signal according to the fast response signal.
12. The control circuit of claim 10, wherein said fast response threshold signal is determined based on an inductor current ripple signal, an output capacitance, and/or a number of phases of a plurality of power stage circuits.
13. The control circuit of claim 10 wherein the switching power supply operates in a fixed on-time mode.
14. The control circuit of claim 10 wherein the fast response threshold signal comprises a positive fast response threshold or/and a negative fast response threshold.
15. The control circuit of claim 10, wherein when the switching power supply operates in a voltage-on-load (VSP) mode, the level of the output voltage decreases, and the differential signal exceeds the QR threshold signal, the PWM signal generating circuit adjusts the PWM signal corresponding to each of the power stage circuits according to the QR signal, such that a corresponding upper bridge power switch of each of the power stage circuits simultaneously turns on the segment of QR duration according to the QR pulse signal related to the QR signal.
16. The control circuit of claim 10, wherein when the switching power supply operates in a voltage-on-load (VSR) mode, the level of the output voltage rises and the differential signal exceeds the QR threshold signal, the PWM signal generating circuit adjusts the PWM signal corresponding to each of the power stage circuits according to the QR signal, such that a corresponding lower bridge power switch of each of the power stage circuits simultaneously turns on a QR period according to the QR pulse signal related to the QR signal, or such that a corresponding upper bridge power switch and the lower bridge power switch of each of the power stage circuits simultaneously turn off the QR period according to a QR pulse signal related to the QR signal.
17. The control circuit as claimed in claim 10, wherein the switching power supply operates in a voltage-on-load (VSOP) mode of operation, such that the PWM signal generating circuit generates the PWM signal in a feedback loop according to the output voltage and the fast response signal to convert the input voltage into the output voltage.
18. The control circuit of claim 17 wherein the pwm signal generating circuit further generates the pwm signal based on a voltage positioning signal, the output voltage being regulated by:
Vout＝VDAC-Iout*RLL
where Vout is the output voltage, VDAC is a desired level associated with the voltage positioning signal, Iout is an output current, and RLL is a load line resistance.
19. A fast response method for a switching power supply to improve load transient response capability, the fast response method comprising:
performing a differential operation on a voltage sensing signal associated with an output voltage to generate a differential signal;
comparing the differential signal with a quick response threshold signal to generate a quick response signal, and determining to execute a quick response procedure when the differential signal exceeds the quick response threshold signal; and
in the fast response procedure, a pulse width modulation signal generating circuit in the switching power supply adjusts a pulse width modulation signal according to the fast response signal, so that a plurality of power switches in a plurality of power stage circuits in the switching power supply are conducted or not conducted for a fast response period according to a fast response pulse signal related to the fast response signal;
the pulse width of the quick response pulse signal determines the length of the quick response period, and the pulse width of the quick response pulse signal is determined according to the length of the period during which the differential signal exceeds the quick response threshold signal.
20. The fast response method of claim 19, wherein each of the plurality of power stage circuits is configured to operate the power switch according to the corresponding pwm signal to convert an input voltage to the output voltage.
21. The fast response method according to claim 19, wherein the fast response threshold signal is determined according to an inductor current ripple signal, an output capacitance or/and the number of phases of the plurality of power stage circuits.
22. The fast response method of claim 19, wherein the switching power supply operates in a constant on-time mode.
23. The method of claim 19, wherein the fast response threshold signal comprises a positive fast response threshold or/and a negative fast response threshold.
24. The method of claim 19, wherein when the switching power supply operates in a load-down voltage mode, the level of the output voltage decreases, and the differential signal exceeds the fast response threshold signal, the pwm signal generating circuit adjusts the pwm signal corresponding to each of the power stage circuits according to the fast response signal, such that a corresponding upper bridge power switch of each of the power stage circuits simultaneously turns on the segment of the fast response period according to the fast response pulse signal associated with the fast response signal.
25. The method of claim 19, wherein when the switching power supply operates in a voltage-on-load (VSP) mode, the level of the output voltage rises and the differential signal exceeds the QR threshold signal, the PWM signal generating circuit adjusts the PWM signal corresponding to each of the power stage circuits according to the QR signal, such that a corresponding one of the pull-down switches of each of the power stage circuits simultaneously turns on the segment of QR duration according to the QR pulse signal related to the QR signal, or such that a corresponding one of the pull-up switch and the pull-down switch of each of the power stage circuits simultaneously turns off the segment of QR duration according to the QR pulse signal related to the QR signal.
26. The method of claim 19, wherein the switching power supply operates in a voltage-on-load (VSOP) mode of operation, such that the PWM signal generating circuit generates the PWM signal in a feedback loop according to an output voltage and the fast response signal to convert the input voltage into the output voltage.
27. The fast response method of claim 26, wherein the pwm signal generating circuit further generates the pwm signal based on a voltage positioning signal, the output voltage being regulated by:
Vout＝VDAC-Iout*RLL
where Vout is the output voltage, VDAC is a desired level associated with the voltage positioning signal, Iout is an output current, and RLL is a load line resistance.
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