CN113489548B - Signal processing circuit, light receiving module and laser radar - Google Patents

Signal processing circuit, light receiving module and laser radar Download PDF

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Publication number
CN113489548B
CN113489548B CN202110762547.5A CN202110762547A CN113489548B CN 113489548 B CN113489548 B CN 113489548B CN 202110762547 A CN202110762547 A CN 202110762547A CN 113489548 B CN113489548 B CN 113489548B
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signal
unit
resistor
conversion unit
active clamping
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CN113489548A (en
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胡小波
刘孙光
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LeiShen Intelligent System Co Ltd
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LeiShen Intelligent System Co Ltd
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B10/00—Transmission systems employing electromagnetic waves other than radio-waves, e.g. infrared, visible or ultraviolet light, or employing corpuscular radiation, e.g. quantum communication
    • H04B10/60—Receivers
    • H04B10/66—Non-coherent receivers, e.g. using direct detection
    • H04B10/69—Electrical arrangements in the receiver
    • H04B10/693—Arrangements for optimizing the preamplifier in the receiver
    • H04B10/6932—Bandwidth control of bit rate adaptation
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01S—RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
    • G01S7/00—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00
    • G01S7/48—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00 of systems according to group G01S17/00
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01S—RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
    • G01S7/00—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00
    • G01S7/48—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00 of systems according to group G01S17/00
    • G01S7/483—Details of pulse systems
    • G01S7/486—Receivers
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B10/00—Transmission systems employing electromagnetic waves other than radio-waves, e.g. infrared, visible or ultraviolet light, or employing corpuscular radiation, e.g. quantum communication
    • H04B10/60—Receivers
    • H04B10/66—Non-coherent receivers, e.g. using direct detection
    • H04B10/69—Electrical arrangements in the receiver
    • H04B10/691—Arrangements for optimizing the photodetector in the receiver

Abstract

The embodiment of the application provides a signal processing circuit, a light receiving module and a laser radar, wherein the signal processing circuit comprises a signal conversion unit and an active clamping unit, the input end of the signal conversion unit is configured to input a current signal, the input end of the active clamping unit is electrically connected with the output end of the signal conversion unit, and the output end of the active clamping unit is electrically connected with the feedback end of the signal conversion unit; the active clamping unit is used for feeding back an output clamping voltage signal to the input end of the signal conversion unit through the feedback end so as to enable the signal conversion unit to convert a current signal into a voltage signal, and the active clamping unit is also used for clamping and amplifying the voltage signal to obtain the clamping voltage signal. The technical scheme of this application can carry out preamplification to the pulse width signal, can also effectively restrain the signal and be widened, applicable in the occasion that has the input signal of broad variation range.

Description

Signal processing circuit, light receiving module and laser radar
Technical Field
The application relates to the technical field of signal processing, in particular to a signal processing circuit, a light receiving module and a laser radar.
Background
In some optical communication systems or audio systems, it is necessary to amplify a detected optical signal, sound signal, or the like. However, in the currently commonly used amplifying circuit, when a small signal is input, that is, when the signal current is small, the signal can be linearly amplified, but when the signal is larger and larger, the amplitude of the signal exceeds the range of the power supply after amplification, topping saturation occurs, the signal is widened, which will affect the subsequent detection accuracy of the signal, and the like.
Disclosure of Invention
The embodiment of the application provides a signal processing circuit, a light receiving module and a laser radar, and the signal processing circuit can effectively inhibit the broadening of signals and is suitable for occasions with wide-range input signals.
An embodiment of the present application provides a signal processing circuit, including:
a signal conversion unit, an input terminal of which is configured to input a current signal;
the input end of the active clamping unit is electrically connected with the output end of the signal conversion unit, and the output end of the active clamping unit is electrically connected with the feedback end of the signal conversion unit; the active clamping unit is used for feeding back an output clamping voltage signal to the input end of the signal conversion unit through the feedback end so as to enable the signal conversion unit to convert the current signal into a voltage signal, and the active clamping unit is also used for clamping and amplifying the voltage signal to obtain the clamping voltage signal.
In one embodiment, the signal conversion unit comprises a first PNP tube, a first resistor and a feedback resistor, and the active clamping unit comprises a first NPN tube and a second resistor;
the base electrode of the first PNP tube is used as the input end of the signal conversion unit, the collector electrode of the first PNP tube is grounded, and the emitter electrode of the first PNP tube is used for being connected to a power supply through the first resistor; one end of the feedback resistor is connected with the base electrode of the first PNP tube, and the other end of the feedback resistor is connected with the feedback end;
the base electrode of the first NPN tube is connected with the emitter electrode of the first PNP tube, the emitter electrode of the first NPN tube is grounded, and the collector electrode of the first NPN tube serves as the output end of the active clamping unit and is also used for being connected to the power supply through the second resistor.
In one embodiment, the active clamping unit further includes a first current limiting resistor, and the base of the first NPN transistor is connected to the emitter of the first PNP transistor through the first current limiting resistor.
In one embodiment, the signal conversion unit further comprises a second current limiting resistor, and the active clamping unit further comprises a third current limiting resistor;
the collector of the first PNP tube is grounded through the second current-limiting resistor, and the emitter of the first NPN tube is grounded through the third current-limiting resistor.
In one embodiment, the signal processing circuit further comprises: and one end of the coupling capacitor is configured to input the current signal, and the other end of the coupling capacitor is connected with the input end of the signal conversion unit.
In one embodiment, the signal processing circuit further comprises: the power supply filtering unit is respectively electrically connected with the power supply, the signal conversion unit and the active clamping unit, and is used for filtering the power supply voltage output by the power supply and outputting the filtered power supply voltage to the signal conversion unit and the active clamping unit.
An embodiment of the present application also provides a light receiving module, including: the voltage amplifying circuit is electrically connected with the signal processing circuit; wherein, the voltage amplification circuit includes:
the input end of the following unit is electrically connected with the output end of the active clamping unit; the following unit is used for following the clamping voltage signal output by the active clamping unit to obtain a following voltage signal;
the input end of the gain amplification unit is electrically connected with the output end of the following unit; the gain amplification unit is used for performing gain amplification on the following voltage signal and then outputting the following voltage signal.
In one embodiment, the following unit comprises a second PNP transistor and a third resistor, and the gain amplifying unit comprises a second NPN transistor, a fourth resistor, a fifth resistor, and a bypass capacitor;
the base electrode of the second PNP transistor is connected to the output end of the active clamping unit, the collector electrode of the second PNP transistor is grounded, and the emitter electrode of the second PNP transistor is used to be connected to the power supply end of the signal conversion unit and the power supply end of the active clamping unit through the third resistor;
the base electrode of the second NPN tube is connected with the emitter electrode of the second PNP tube, the emitter electrode of the second NPN tube is grounded through the fifth resistor, and the bypass capacitor is connected in parallel with two ends of the fifth resistor; and the collector of the second NPN tube is used as the output end of the gain amplification unit, and is further used for being connected to the power supply end of the signal conversion unit and the power supply end of the active clamping unit through the fourth resistor, respectively.
In one embodiment, the light receiving module further includes: and the photoelectric detection circuit is used for receiving the laser signal, converting the laser signal into a current signal and then inputting the current signal to the signal processing circuit for signal processing.
The embodiment of the application also provides a laser radar which comprises the light receiving module.
The embodiment of the application has the following beneficial effects:
the signal processing circuit signal of the embodiment of the application comprises a signal conversion unit and an active clamping unit connected with the signal conversion unit, wherein the active clamping unit is used for feeding back an output clamping voltage signal to an input end of the signal conversion unit through a feedback end of the signal conversion unit so that the signal conversion unit converts an input current signal into a voltage signal, and the active clamping unit is further used for clamping and amplifying the voltage signal to obtain the clamping voltage signal. The signal processing circuit can prevent the output signal from supersaturation and broadening by converting the input current signal into a voltage signal and carrying out clamping amplification processing on the voltage signal; meanwhile, a voltage parallel negative feedback connection mode is formed, so that the output clamping voltage signal and the accessed target signal are input in a superposition mode, the amplification factor of the signal processing circuit is favorably adjusted, and stable output and the like are realized.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are required to be used in the embodiments will be briefly described below, it should be understood that the following drawings only illustrate some embodiments of the present application and therefore should not be considered as limiting the scope, and for those skilled in the art, other related drawings can be obtained from the drawings without inventive effort.
Fig. 1 shows a schematic diagram of a signal processing circuit according to an embodiment of the present application;
fig. 2 is a schematic diagram showing a structure of a light receiving module according to an embodiment of the present application;
FIG. 3 shows a circuit schematic of a voltage amplification circuit of an embodiment of the present application;
fig. 4 shows a schematic circuit diagram of an optical receiving module according to an embodiment of the present application;
fig. 5A and 5B are schematic waveforms of output signals of the light receiving module of the present application when pulse current signals of different magnitudes are input, respectively;
fig. 6 is a schematic view showing another structure of the light receiving module according to the embodiment of the present application.
Description of the main element symbols:
100-a light receiving module; 10-a signal processing circuit; 101-a signal conversion unit; 102-active clamp unit; 20-a voltage amplification circuit; 201-a follower unit; 202-a gain amplification unit; q1-a first PNP tube; q2-a first NPN tube; q3-a second PNP tube; q4-a second NPN tube.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments.
The components of the embodiments of the present application, generally described and illustrated in the figures herein, can be arranged and designed in a wide variety of different configurations. Thus, the following detailed description of the embodiments of the present application, as presented in the figures, is not intended to limit the scope of the claimed application, but is merely representative of selected embodiments of the application. All other embodiments, which can be derived by a person skilled in the art from the embodiments of the present application without making any creative effort, shall fall within the protection scope of the present application.
Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which the various embodiments of this application belong. The terms (such as those defined in commonly used dictionaries) should be interpreted as having a meaning that is consistent with their contextual meaning in the relevant art and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein in various embodiments.
For the existing signal amplifying circuit, when a small signal is input, the current of the signal of the circuit is small, so the current cannot be accumulated and stayed in the circuit, the signal can be linearly amplified, but when the signal is larger and larger, the signal is amplified, and the signal is widened. The inventor researches and tests to find that the large signal amplitude exceeds the range of a power supply, so that topping saturation occurs; the excess charge will stay in the capacitive element of the circuit, waiting to be released, resulting in the circuit widening, and also causing the position of the center point of the pulse width signal to shift.
For the problem of center point offset of a pulse width signal, the existing scheme mainly adopts two groups of amplifying circuits, selects one group of signals with the best amplitude value through optimization to carry out distance measurement, and further carries out position compensation or adjustment, wherein a software compensation algorithm, calibration processing and the like are required to be applied, especially for signals with variable sizes, the compensation size also needs to be adjusted in real time, the scheme is complex and is not easy to realize, and the like. Therefore, the embodiment of the present application provides a signal processing circuit, which is easy to implement and maintain, and when the signal processing circuit is used for pre-amplifying a signal, the problem that the signal is widened can be well solved, the problem that the center point of a pulse width signal is shifted can be effectively prevented, and the signal processing circuit can be used for accessing an electrical signal with a wide variation range, and can be particularly applied to occasions such as an optical communication system and an audio transmission system.
Example 1
Fig. 1 is a schematic diagram of a signal processing circuit 10 according to an embodiment of the present disclosure.
Exemplarily, the signal processing circuit 10 includes a signal conversion unit 101 and an active clamping unit 102, wherein an input end of the signal conversion unit 101 is used for accessing a current signal to be processed, and an output end of the signal conversion unit 101 is electrically connected to an input end of the active clamping unit 102; the output terminal of the active clamping unit 102 is electrically connected to the feedback terminal of the signal conversion unit 101.
The active clamping unit 102 is configured to output a clamping voltage signal and feed back the clamping voltage signal to the input terminal of the signal conversion unit 101 through the feedback terminal of the signal conversion unit 101, so that the signal conversion unit 101 converts the input current signal into a voltage signal. Meanwhile, the active clamping unit 102 is further configured to clamp and amplify the voltage signal converted by the signal conversion unit 101 to obtain the output clamped voltage signal. It is understood that the signal conversion unit 101 realizes the conversion of the current signal to the voltage signal by cooperating with the active clamping unit 102.
The input current signal may be a current signal detected by a front-end detection device such as a sensor or a detector. For example, in one embodiment, the current signal may be in the form of pulses, such as a laser pulse current signal or the like. Alternatively, the current signal may be a continuous audio current signal or the like. In this embodiment, the amplitude of the input current signal can be varied in a wide range, that is, the input current signal can be applied to an input signal with a wide variation range.
The active clamping unit 102 is configured to clamp and amplify the voltage signal converted by the signal conversion unit 101 to obtain a clamped voltage signal; and also connected to the feedback terminal of the signal conversion unit 101 through the output terminal to form a voltage parallel negative feedback structure for feeding back the output clamped voltage signal to the input of the signal conversion unit 101. It can be understood that when no current signal is input, the voltage signal output by the active clamping unit 102 is zero, and the signal at the feedback end is also zero. After the current signal is input, the active clamping unit 102 outputs a corresponding clamping voltage signal, and the clamping voltage signal is fed back to the input terminal of the signal conversion unit 101.
The clamp amplification processing is to amplify the amplitude of the voltage signal but is limited within a certain amplitude range. The signal processing circuit 10 of this embodiment clamps the output signal of the active clamping unit 102, so that the bandwidth of the finally output voltage signal is not widened, and the subsequent gain amplification processing on the clamped voltage signal is facilitated; meanwhile, the voltage parallel negative feedback structure is used for superposing and inputting the fed back output voltage signal and the input current signal, so that the amplification factor of the signal processing circuit 10 can be adjusted, and the signal output of the signal processing circuit 10 can be stabilized.
In one embodiment, the signal conversion unit 101 and the active clamping unit 102 in the signal processing circuit 10 may be respectively formed by transistors with complementary structures, for example, the signal conversion unit 101 is a PNP transistor (PNP transistor), and the active clamping unit 102 is an NPN transistor (NPN transistor), that is, a complementary structure of PNP + NPN is formed. The signal processing circuit 10, by adopting a complementary double triode structure, not only has a simple structure and is easy to adjust, but also is beneficial to complementary coupling of signal inflow and signal outflow, especially a current signal in a pulse width form, and can realize broadening suppression of a pulse width signal and prevent a central point position of the pulse width signal from being shifted.
In addition to the above-described triodes, the signal conversion unit 101 and the active clamping unit 102 further include at least one resistor or the like connected to the corresponding triode. For example, as shown in fig. 1, the signal conversion unit 101 includes a first PNP transistor Q1, a first resistor R1, and a feedback resistor Rf, and the active clamping unit 102 includes a first NPN transistor Q2 and a second resistor R2. The base of the first PNP transistor Q1 serves as an input end of the signal conversion unit 101, and is configured to input a current signal, the collector of the first PNP transistor Q1 is grounded, and the emitter of the first PNP transistor Q1 is connected to one end of the first resistor R1; the other end of the first resistor R1 is used for being connected with a power supply to obtain working voltage required by providing a static working point; one end of the feedback resistor Rf is connected to the base of the first PNP transistor Q1, and the other end is connected to the feedback end of the signal conversion unit 101.
The base electrode of the first NPN transistor Q2 serves as the input end of the active clamping unit 102 and is electrically connected to the emitter electrode of the first PNP transistor Q1, the emitter electrode of the first NPN transistor Q2 is grounded, the collector electrode of the first NPN transistor Q2 is connected to one end of the second resistor R2, and the other end of the second resistor R2 is connected to a power supply; the collector of the first NPN transistor Q2 also serves as an output terminal of the active clamping unit 102. The first PNP transistor Q1 and the first NPN transistor Q2 are only described as being different from other triodes in the following text for convenience.
It will be appreciated that the resistors described above may be used to provide a desired quiescent operating point for the corresponding transistor, thereby ensuring that the corresponding transistor is capable of operating in a desired operating state. The feedback resistor Rf is used for feeding back the output voltage signal of the active clamping unit 102 to the input terminal of the signal conversion unit 101, so that on one hand, the above-mentioned voltage parallel negative feedback structure can be formed, and on the other hand, a reference bias voltage is provided for the first PNP transistor Q1 in the signal conversion unit 101, so that the first PNP transistor Q1 can normally operate.
It should be noted that the first NPN transistor Q2 is in a micro-saturation state (also called critical saturation state), and the first NPN transistor Q2 still has a certain amplification capability, but does not satisfy Ic = β Ib, where Ic is the collector current, ib is the emitter current, and β is the amplification factor. Therefore, as the current input to the first PNP transistor Q1 increases, the first NPN transistor Q2 approaches the full saturation state, and Ic is much smaller than β × Ib, which results in a smaller amplification factor. Meanwhile, the feedback signal input from the Rf side of the feedback resistor is superimposed, and the amplification factor is further reduced because the two signals are in opposite directions.
For the signal processing circuit 10 designed based on the PNP transistor plus the NPN transistor, when a current signal is input, the current enters from the base of the first PNP transistor Q1, and the current flowing into the base is positively conducted, and then the current flowing out from the base of the first NPN transistor Q2 is negatively conducted, and complementary coupling between the signal flowing in and the signal flowing out is realized by utilizing the complementary characteristics of the first PNP transistor Q1 and the first PNP transistor Q1, so that the retention time of redundant charges in the circuit can be reduced, and the widening of the signal can be favorably inhibited.
In addition, the PNP tube and NPN tube structure also forms active clamping, which can prevent the signal from supersaturation and broadening. This is because the emitter of the first PNP transistor Q1 in the signal conversion unit 101 is connected to the base of the first NPN transistor Q2 in the active clamping unit 102, and the collector voltage Vc of the first NPN transistor Q2 is clamped at the voltage drop V between the base and the emitter of the first PNP transistor Q1 due to the presence of the feedback resistor Rf be And a static voltage drop V across the feedback resistor Rf Rf In the amplitude range of the sum, wherein the tube voltage drop V between the base and the emitter be Typically around 0.7V (i.e. a voltage drop of a PN junction), the amplitude of the output signal of the first NPN transistor Q2 will be clamped within the above-mentioned amplitude range, and the excess signal will be flattened, so that the phenomenon of signal supersaturation and broadening will not occur.
Based on the above structure of the PNP transistor plus the NPN transistor, as an alternative embodiment, the signal processing circuit 10 further provides a coupling capacitor, and exemplarily, as shown in fig. 1, one end of the coupling capacitor C1 is configured to input a current signal, and the other end is connected to the input end of the signal conversion unit 101. The coupling access of the current signal can be realized by arranging the coupling capacitor at the input end. Due to the "cross-blocking" characteristic of the capacitor, the dc component in the signal can be blocked.
Optionally, the active clamping unit 102 further includes a first current limiting resistor, and exemplarily, as shown in fig. 1, one end of the first current limiting resistor R10 is connected to the emitter of the first PNP transistor Q1, and the other end is connected to the base of the first NPN transistor Q2. The first current limiting resistor may be used to adjust the current or voltage of the input signal of the active clamping unit 102.
Further optionally, the signal conversion unit further includes a second current limiting resistor, and the active clamping unit further includes a third current limiting resistor, and exemplarily, the collector of the first PNP transistor Q1 is grounded through the second current limiting resistor, and the emitter of the first NPN transistor Q2 is grounded through the third current limiting resistor. It will be appreciated that the signal amplification of the signal processing circuit 10 can be adjusted by the two grounded current limiting resistors. However, considering that the sizes of the two current limiting resistors may also affect the broadening of the pulse width signal to some extent, they may be specifically configured according to the actual circuit requirements.
In addition, the signal processing circuit 10 may further include a power supply filtering unit, which is exemplarily electrically connected to the above-mentioned connected power supply, the signal conversion unit 101, and the active clamping unit 102, respectively. The power supply filtering unit is used for filtering the power supply voltage output by the accessed power supply VCC and outputting the filtered power supply voltage to the signal conversion unit 101 and the active clamping unit 102. For example, as shown in fig. 1, the power supply filtering unit may include a resistor R12, and filtering capacitors C2 and C3, etc., as shown in fig. 1. The provision of the power supply filtering unit can make the power supply voltage input into the signal processing circuit 10 more stable, have smaller ripples, and the like.
The signal processing circuit of the embodiment converts the accessed target signal into a voltage signal and performs clamping amplification processing on the voltage signal, wherein by adopting the design of a PNP tube and an NPN tube which are complementary in structure, the charge release in the circuit can be accelerated, the broadening of the signal can be inhibited, an active clamping position can be formed, and the signal can be effectively prevented from being broadened due to over saturation; meanwhile, the output clamping voltage signal is superposed with the input current signal in a voltage parallel negative feedback mode, so that the output of the signal processing circuit is stabilized, and the detection precision of the signal can be improved finally.
Example 2
Fig. 2 is a schematic structural diagram of the light receiving module 100 of the present embodiment.
Exemplarily, the light receiving module 100 includes a signal processing circuit 10 and a voltage amplifying circuit 20 electrically connected to the signal processing circuit 10, wherein the signal processing circuit 10 in the light receiving module 100 may adopt the signal processing circuit 10 in the above embodiment 1, and is mainly used for performing signal conversion and clamp amplification to obtain a clamp voltage signal; the voltage amplifier circuit 20 is mainly used to gain-amplify the electrical output voltage signal processed by the signal processing circuit 10 so as to drive the subsequent circuits and the like.
In one embodiment, as shown in fig. 2, the signal processing circuit 10 includes a signal conversion unit 101 and an active clamping unit 102, wherein an output terminal of the signal conversion unit 101 is connected to an input terminal of the active clamping unit 102, and an output terminal of the active clamping unit 102 is connected to a feedback terminal of the signal conversion unit 101. It is to be understood that the signal processing circuit 10 has the same structure and function as the signal processing circuit 10 in embodiment 1, and the alternatives in embodiment 1 are also applicable to this embodiment, so that the description is not repeated here.
In one embodiment, as shown in fig. 2, the voltage amplifying circuit 20 includes a follower unit 201 and a gain amplifying unit 202, wherein an input terminal of the follower unit 201 is electrically connected to an output terminal of the active clamp unit 102; the input end of the gain amplification unit 202 is electrically connected with the output end of the following unit 201; the output terminal of the gain amplifying unit 202 serves as the output terminal of the voltage amplifying circuit 20.
The following unit 201 is configured to perform signal following on the clamping voltage signal output by the signal processing circuit 10 to obtain a following voltage signal, and may be further configured to raise a quiescent operating point of the gain amplifying unit 202, so as to provide a required bias voltage and signal input for the gain amplifying unit 202. And the gain amplification unit 202 is mainly used for gain-amplifying the follow voltage signal and outputting it in the forward direction.
In one embodiment, the following unit 201 and the gain amplifying unit 202 may also be respectively formed by transistors with complementary structures. For example, the follower unit 201 employs a PNP transistor (PNP transistor for short), and the gain amplifier unit 202 employs an NPN transistor (NPN transistor for short), i.e., a complementary structure of PNP + NPN is formed. It should be understood that the voltage amplifying circuit 20 also adopts a complementary double triode structure, which is beneficial to complementary coupling of signal inflow and signal outflow in the current circuit on the one hand, and on the other hand, by combining with the signal processing circuit 10, a PNP + NPN + PNP + NPN structure is formed, which is beneficial to the broadening suppression of the pulse width signal by the whole circuit.
In addition to the above-described triodes, the follower unit 201 and the gain amplification unit 202 further include at least one resistor or the like connected to the corresponding triode. For example, as shown in fig. 3, the following unit 201 includes a second PNP transistor Q3 and a third resistor R3, and the gain amplifying unit 202 includes a second NPN transistor Q4, a fourth resistor R4, a fifth resistor R5, and a bypass capacitor Ce. The collector of the second PNP transistor Q3 is grounded, and the emitter of the second PNP transistor Q3 is connected to the power supply terminal of the signal conversion unit 101 and the power supply terminal of the active clamping unit 102 through the third resistor R3.
A base of the second NPN transistor Q4 is connected to the emitter of the second PNP transistor Q3, the emitter of the second NPN transistor Q4 is grounded through the fifth resistor R5, and a collector of the second NPN transistor Q4 serves as an output end of the gain amplifying unit 202 and is further configured to be connected to the power supply terminal of the signal converting unit 101 and the power supply terminal of the active clamping unit 102 through the fourth resistor R4, respectively; the bypass capacitor Ce is connected in parallel to two ends of the fifth resistor R5.
It can be understood that the current and the voltage required for providing the static operating points of the second PNP transistor Q3 and the second NPN transistor Q4 can be obtained by respectively connecting the power supply through the third resistor R3 and the fourth resistor R4. The shunt capacitor Ce in parallel can be used to provide an ac path on one hand and an ac amplification factor on the other hand.
Further optionally, the voltage amplifying circuit 20 further includes a power supply filtering unit, where the power supply filtering unit is electrically connected to the following unit 201 and the gain amplifying unit 202, and is configured to perform filtering processing on a power supply voltage output by the connected power supply VCC, and output the power supply voltage after the filtering processing to the following unit 201 and the gain amplifying unit 202.
The principle of the light receiving module 100 is described below with reference to a specific circuit structure.
Exemplarily, as shown in fig. 4, the triodes in the signal conversion unit 101, the active clamping unit 102, the following unit 201, and the gain amplification unit 202 in the light receiving module 100 are a first PNP transistor Q1, a first NPN transistor Q2, a second PNP transistor Q3, and a second NPN transistor Q4 in sequence, and each of the triodes is further connected with a resistor, such as a feedback resistor Rf and resistors R1 to R5 shown in fig. 4, for providing a required static operating point. The connection relationship between the resistors R1 to R5 and the feedback resistor Rf can be referred to in embodiment 1 and the corresponding description above, and will not be described repeatedly here.
Further optionally, the signal conversion unit 101 further includes a coupling capacitor C1 disposed at the input end. And, the active clamping unit 102 further includes a current limiting resistor R10 provided at the input terminal. In addition, each unit may further include a corresponding power supply filtering unit for filtering the power supply, such as a resistor R12, capacitors C2, C3, C4, and C5 shown in fig. 4, which is not limited herein.
It should be noted that, in practical applications, each of the resistors needs to be determined according to the resistance value required by the corresponding position, for example, the resistors may be obtained by one or more resistor strings and/or parallel connections, and the number is not limited to one.
It can be known that the signal conversion unit 101, the active clamping unit 102, the following unit 201, and the gain amplification unit 202 adopt an alternating mode of PNP + NPN + PNP + NPN, that is, two triodes in adjacent units are formed to have complementary structures, so that the retention time of charges in the whole light receiving module 100 can be further reduced, and the broadening of signals can be suppressed. In addition, for the design of the first PNP transistor Q1 and the first NPN transistor Q2 in the signal processing circuit 10, since the feedback resistor Rf is connected between the base B of the first PNP transistor Q1 and the collector C of the first NPN transistor Q2, and the emitter E of the first PNP transistor Q1 is connected to the base B of the first NPN transistor Q2, the voltage of the collector C of the first NPN transistor Q2 will be limited within a certain amplitude range, and will be flattened for signals exceeding the range.
In order to better embody the synergy between the transistors, the static operating points of the first PNP transistor Q1 and the first NPN transistor Q2 are analyzed below. Taking several parameters of the static operating point of the first NPN transistor Q2 as an example, the parameters mainly include the base current I B2 Collector current I C2 And collector voltage V C2 The calculation can be respectively obtained by adopting the following relational expressions:
I B2 ≈(5-0.7)V/(R 1 +R 10 )；
I C2 ≈β Q2 ×I B2 ；
V C2 ＝V CE2 ≈5V-I C2 ×R 2 ；
wherein, the power supply is 5V, and 0.7V is the tube voltage drop of the first NPN tube Q2; r 1 、R 2 And R 10 The resistance values of the first resistor R1, the second resistor R2 and the first current limiting resistor R10 are respectively; beta is a Q2 Is a magnification factor. Due to voltage drop V between collector and emitter CE2 And magnification beta Q2 Is approximately inverse proportional to V CE2 The smaller the first NPN tube Q2 enters a deep saturation state, the smaller the amplification factor.
The V of the first NPN tube Q2 can be obtained by approximate estimation by using the formula and combining with experimental tests CE2 ＝200mv，β Q2 About 42 times; current I C2 22mA. Similarly, it can be calculated that the first PNP transistor Q1 has: current I C1 ≈0.5mA，β Q1 =25 times.
Further, the amplification factor of the four triodes was analyzed. Since the signals from the first PNP transistor Q1 to the first NPN transistor Q2 are the following inputs, the open-loop amplification factor of the first PNP transistor Q1 at this time satisfies:
Figure BDA0003150497980000151
wherein R is be1 ＝300+(1+β Q1 )*26mv/I EQ1 ；I EQ1 ＝0.5mA；
R be2 ＝300+(1+β Q2 )*26mv/I EQ2 ；I EQ2 ＝22mA。
For the first NPN tube Q2, the open loop amplification factor A thereof Q2 Satisfies the following conditions:
Figure BDA0003150497980000152
thus, the open loop amplification factor of the signal processing circuit 10 can be calculated as a 12 ＝A Q2 *A Q1 。
Because the first PNP tube Q1 and the first NPN tube Q2 form a voltage parallel negative feedback circuit, the feedback coefficient F at the moment satisfies the following conditions:
Figure BDA0003150497980000153
wherein R is c ＝R 2 //R be2 ，R f Is the resistance value of the feedback resistor Rf. The closed loop amplification of the signal processing circuit 10 is then: a. The F ＝A 12 *F。
For the voltage amplifying circuit 20 with open-loop amplification and no feedback, the method for solving the open-loop amplification factor can be adopted to similarly derive the amplification factor A of the voltage amplifying circuit 20 34 Namely, the following steps are provided: a. The 34 ＝A Q3 *A Q4 . Thus, the total amplification of the four transistors is obtained as: a. The 1234 ＝A 12 *A 34 。
The open-loop amplification factor a of the signal processing circuit 10 can be estimated by using the above formula and obtained by combining with actual tests 12 About 4.5 times; closed loop amplification factor A F About 4.4 times. Amplification factor a of the voltage amplifying circuit 20 34 About 40 times, in which the total amplification factor a of the light receiving module 100 1234 About 176 times.
It can be understood that the first PNP transistor Q1 in the signal processing circuit 10 in this embodiment mainly functions to convert current into voltage, signals from the first PNP transistor Q1 to the first NPN transistor Q2 mainly serve as a follower input, and the first NPN transistor Q2 is not operated in an amplification region but in a critical saturation state, so that the amplification factor is small. For the voltage amplifying circuit 20, the second PNP transistor Q3 is mainly used for signal following and providing a boosted bias voltage and signal input for the second NPN transistor Q4; the second NPN transistor Q4 operates in the amplification region, i.e., in the amplification state, and thus the amplification factor is large.
To better illustrate that the optical receiving module 100 can be applied to a wide range of input signals, here, taking the pulsed current signal detected by an APD (avalanche photodiode) detector as an example, simulation tests were performed on two pulsed current signals with different magnitudes.
Specifically, fig. 5A shows that when the pulse signal source is 1uA, the optical receiving module 100 outputs a signal amplification waveform; fig. 5B shows an output amplification waveform when the pulse signal source is 10000 uA. As can be seen from comparison of the two waveforms, the bottom pulse width of the signal is not widened, and the optical receiving module 100 of the present embodiment can effectively suppress the widening phenomenon of the signal while amplifying the signal, and is suitable for input signals having a wide range. Further tests show that the operating current range of the APD input signal allowed to be accessed by the optical receiving module 100 can be 0.5uA to 20000uA.
As another optional implementation, as shown in fig. 6, the light receiving module 100 further includes a photodetection circuit 30, where the photodetection circuit 30 is connected to an input end of the signal processing circuit 10, and is configured to receive a laser signal, convert the laser signal into a current signal, and input the current signal to the signal processing circuit 10 for signal processing. It is understood that the photodetection circuit 30 and the signal processing circuit 10 may constitute a front-end circuit of the optical receiving module 100. For example, the photodetection circuit 30 may include, but is not limited to, a photomultiplier tube, a photodiode, etc., and further, the photodiode may be an APD, etc.
The embodiment of the present application also provides a laser radar, which may exemplarily include the light receiving module 100 in embodiment 2 described above. It is to be understood that the alternatives described in embodiment 2 above are equally applicable to this embodiment, and therefore will not be described again here.
The above description is only for the specific embodiments of the present application, but the scope of the present application is not limited thereto, and any person skilled in the art can easily conceive of the changes or substitutions within the technical scope of the present application, and shall be covered by the scope of the present application.

Claims (8)

1. A signal processing circuit, comprising:
a signal conversion unit, an input terminal of which is configured to input a current signal;
the input end of the active clamping unit is electrically connected with the output end of the signal conversion unit, and the output end of the active clamping unit is electrically connected with the feedback end of the signal conversion unit; the active clamping unit is used for feeding back an output clamping voltage signal to the input end of the signal conversion unit through the feedback end so that the signal conversion unit converts the current signal into a voltage signal, and is also used for clamping and amplifying the voltage signal to obtain the clamping voltage signal, wherein the signal conversion unit comprises a PNP type triode, the active clamping unit comprises an NPN type triode and forms a complementary structure of the PNP type triode and the NPN type triode;
the signal conversion unit comprises a first PNP tube, a first resistor and a feedback resistor, and the active clamping unit comprises a first NPN tube and a second resistor;
the base electrode of the first PNP tube is used as the input end of the signal conversion unit, the collector electrode of the first PNP tube is grounded, and the emitter electrode of the first PNP tube is used for being connected to a power supply through the first resistor; one end of the feedback resistor is connected with the base electrode of the first PNP tube, and the other end of the feedback resistor is connected with the feedback end;
the base electrode of the first NPN tube is connected with the emitter electrode of the first PNP tube, the emitter electrode of the first NPN tube is grounded, and the collector electrode of the first NPN tube is used as the output end of the active clamping unit and is also used for being connected to the power supply through the second resistor; the first NPN tube is in a critical saturation state.
2. The signal processing circuit of claim 1, wherein the active clamping unit further comprises a first current limiting resistor, and a base of the first NPN transistor is connected to an emitter of the first PNP transistor through the first current limiting resistor.
3. The signal processing circuit of claim 1, wherein the signal conversion unit further comprises a second current limiting resistor, and the active clamping unit further comprises a third current limiting resistor;
the collector of the first PNP tube is grounded through the second current-limiting resistor, and the emitter of the first NPN tube is grounded through the third current-limiting resistor.
4. The signal processing circuit of claim 1, further comprising: and one end of the coupling capacitor is configured to input the current signal, and the other end of the coupling capacitor is connected with the input end of the signal conversion unit.
5. The signal processing circuit of claim 1, further comprising: the power supply filtering unit is respectively electrically connected with the power supply, the signal conversion unit and the active clamping unit, and is used for filtering the power supply voltage output by the power supply and outputting the filtered power supply voltage to the signal conversion unit and the active clamping unit.
6. A light receiving module, comprising: the signal processing circuit and the voltage amplification circuit according to any one of claims 1 to 5, the voltage amplification circuit being electrically connected to the signal processing circuit; wherein, the voltage amplification circuit includes:
the input end of the following unit is electrically connected with the output end of the active clamping unit; the following unit is used for following the clamping voltage signal output by the active clamping unit to obtain a following voltage signal;
the input end of the gain amplification unit is electrically connected with the output end of the following unit; the gain amplification unit is used for performing gain amplification on the following voltage signal and outputting the following voltage signal;
the following unit comprises a second PNP tube and a third resistor, and the gain amplification unit comprises a second NPN tube, a fourth resistor, a fifth resistor and a bypass capacitor;
the base electrode of the second PNP transistor is connected to the output end of the active clamping unit, the collector electrode of the second PNP transistor is grounded, and the emitter electrode of the second PNP transistor is used to be connected to the power supply end of the signal conversion unit and the power supply end of the active clamping unit through the third resistor;
the base electrode of the second NPN tube is connected with the emitter electrode of the second PNP tube, the emitter electrode of the second NPN tube is grounded through the fifth resistor, and the bypass capacitor is connected in parallel with two ends of the fifth resistor; and the collector of the second NPN tube is used as the output end of the gain amplification unit, and is further used for being connected to the power supply end of the signal conversion unit and the power supply end of the active clamping unit through the fourth resistor, respectively.
7. The optical receiving module of claim 6, further comprising a photo detection circuit, wherein the photo detection circuit is configured to receive a laser signal, convert the laser signal into a current signal, and input the current signal to the signal processing circuit for signal processing.
8. A lidar characterized by comprising the light-receiving module according to any one of claims 6 to 7.
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