CN113488568B - Flip light-emitting diode chip and preparation method thereof - Google Patents
Flip light-emitting diode chip and preparation method thereof Download PDFInfo
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- CN113488568B CN113488568B CN202110518546.6A CN202110518546A CN113488568B CN 113488568 B CN113488568 B CN 113488568B CN 202110518546 A CN202110518546 A CN 202110518546A CN 113488568 B CN113488568 B CN 113488568B
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/44—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the coatings, e.g. passivation layer or anti-reflective coating
- H01L33/46—Reflective coating, e.g. dielectric Bragg reflector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0062—Processes for devices with an active region comprising only III-V compounds
- H01L33/0075—Processes for devices with an active region comprising only III-V compounds comprising nitride compounds
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/44—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the coatings, e.g. passivation layer or anti-reflective coating
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
- H01L2933/0008—Processes
- H01L2933/0025—Processes relating to coatings
Abstract
The invention discloses a flip light-emitting diode chip and a preparation method thereof, belonging to the field of light-emitting diode manufacturing. And a corrosion stop layer is additionally arranged between the p-type layer and the Bragg reflector, and the first accommodating groove and the second accommodating groove extend to the corrosion stop layer. The addition of the corrosion stop layer prevents the formation of the first accommodating groove and the second accommodating groove on the Bragg reflector from influencing the p-type layer, and ensures the surface quality of the p-type layer. The first and second holding grooves provide a covering space for the first insulating protective layer, and part of the Bragg reflector is covered in the first insulating protective layer for protection, and then a first through hole and a second through hole are formed on the surface of the first insulating protective layer. When the first through hole and the second through hole are formed, the Bragg reflector covered by the first insulating protective layer is not influenced, the quality of the Bragg reflector is effectively protected, the light emitting of the Bragg reflector is ensured, and the light emitting efficiency of the flip light-emitting diode chip is ensured.
Description
Technical Field
The invention relates to the field of light emitting diode manufacturing, in particular to a flip light emitting diode chip and a preparation method thereof.
Background
A light emitting diode is a semiconductor electronic component that can emit light. As a novel high-efficiency, environment-friendly and green solid-state illumination light source, the solid-state illumination light source is rapidly and widely applied, such as traffic signal lamps, automobile interior and exterior lamps, urban landscape illumination, mobile phone backlight sources and the like, and the aim of improving the light emitting efficiency of an epitaxial wafer is continuously pursued by light emitting diodes. Flip-chip leds are one type of led.
The flip light-emitting diode chip is a basic structure for preparing the flip light-emitting diode, and comprises an epitaxial wafer, a p electrode and an n electrode, wherein the epitaxial wafer comprises a substrate, and an n-type layer, a light-emitting layer, a p-type layer, a Bragg reflector and an insulating protective layer which are sequentially stacked on the substrate. The insulating protective layer is provided with a first through hole extending to the n-type layer and a second through hole extending to the p-type layer, and the n electrode and the p electrode are respectively positioned in the first through hole and the second through hole.
When the first through holes corresponding to the n electrode and the p electrode respectively are prepared on the insulating protective layer, the first through holes and the second through holes are usually obtained by directly etching the insulating protective layer, but the bragg reflectors through which the first through holes and the second through holes pass can expose part of the bragg reflectors, so that the quality of the bragg reflectors can be influenced by the subsequent preparation steps of the epitaxial wafer, the light emitting of the bragg reflectors is further influenced, and the light emitting efficiency of the flip light-emitting diode chip is influenced.
Disclosure of Invention
The embodiment of the disclosure provides a flip light-emitting diode chip and a preparation method thereof, which can improve the luminous efficiency of the flip light-emitting diode chip. The technical scheme is as follows:
the embodiment of the disclosure provides a flip-chip light emitting diode chip, which comprises an epitaxial wafer, a primary p electrode and a primary n electrode, wherein the epitaxial wafer comprises a substrate, and an n-type layer, a light emitting layer, a p-type layer, an etching stop layer, a Bragg reflector and a first insulating protection layer which are sequentially stacked on the substrate,
the surface of the Bragg reflector is provided with a first holding groove and a second holding groove which are separated, the first holding groove and the second holding groove extend to the surface of the corrosion stop layer,
the surface of the first insulating protection layer is provided with a first through hole and a second through hole, the first through hole and the second through hole are respectively positioned in the first accommodating groove and the second accommodating groove, the width of the first through hole is smaller than that of the first accommodating groove, the width of the second through hole is smaller than that of the second accommodating groove, and the first through hole and the second through hole respectively extend to the n-type layer and the p-type layer,
the primary n electrode is filled in the first through hole and connected with the n-type layer, and the primary p electrode is filled in the space of the second through hole and connected with the p-type layer.
Optionally, the thickness of the corrosion stop layer is 0.1-5 um.
Optionally, the material of the corrosion stop layer is one of SiOx, SiNx, or TiOx.
Optionally, the first receiving groove is pointed to by the corrosion cut-off layer in the direction of the bragg reflector, the width of the first receiving groove is increased, and the minimum width of the first receiving groove is 1 um-50 um.
Optionally, the primary p-electrode is made of a metal material or an indium tin oxide conductive material, and if the primary p-electrode is made of a metal material, the primary p-electrode includes a reflective metal layer and a cap layer that are sequentially stacked, the reflective metal layer includes one of Al, Ag, and Pt, the thickness of the reflective metal layer is 50nm to 500nm, and the cap layer includes at least one of Ni, Ti, and Pt.
Optionally, the light emitting diode chip further comprises a secondary p-electrode, the epitaxial wafer further comprises a second insulating protective layer covering the first insulating protective layer and the secondary p-electrode, the second insulating protective layer has a first connection hole connected to the first through hole and a second connection hole connected to the secondary p-electrode,
the primary n electrode is positioned in the first through hole and the first connecting hole, the secondary p electrode is positioned in the second connecting hole, and the material of the secondary p electrode comprises at least one of Cr Ni Al Pt Au Ti.
Optionally, the led chip further includes a secondary n-electrode, the epitaxial wafer further includes a third insulating protection layer, the third insulating protection layer covers the primary n-electrode and the second insulating protection layer, the third insulating protection layer has a first optical hole and a second optical hole respectively communicated to the primary n-electrode and the second connection hole, the secondary n-electrode is located in the first optical hole, the secondary p-electrode is located in the second optical hole and the second connection hole,
the orthographic projection of the primary n-electrode on the surface of the substrate and the orthographic projection of the primary p-electrode on the surface of the substrate are overlapped.
Optionally, the structure of the primary n-electrode is the same as that of the primary p-electrode, and the structure of the secondary n-electrode is the same as that of the secondary p-electrode.
The embodiment of the disclosure provides a preparation method of a flip light-emitting diode chip, and the flip light-emitting diode chip and the preparation method thereof comprise the following steps:
providing a substrate;
sequentially growing an n-type layer, a light-emitting layer, a p-type layer, a corrosion cut-off layer and a Bragg reflector on the substrate;
sequentially forming a first accommodating groove and a second accommodating groove which are mutually spaced on the surface of the Bragg reflector, wherein the first accommodating groove and the second accommodating groove extend to the surface of the corrosion stop layer;
forming a first insulating protection layer on the Bragg reflector, wherein the surface of the first insulating protection layer is provided with a first through hole and a second through hole, the first through hole and the second through hole are respectively positioned in the first accommodating groove and the second accommodating groove, the width of the first through hole is smaller than that of the first accommodating groove, the width of the second through hole is smaller than that of the second accommodating groove, and the first through hole and the second through hole respectively extend to the n-type layer and the p-type layer;
and forming a primary n electrode in the first through hole, and forming a primary p electrode in the second through hole.
Optionally, the first receiving groove, the second receiving groove, the first through hole, and the second through hole are all obtained by wet etching.
The technical scheme provided by the embodiment of the disclosure has the following beneficial effects:
increase the corruption deadline layer between p type layer and bragg reflector to increase first holding tank and the second holding tank that extends to the corruption deadline layer on the surface of bragg reflector, the formation that corrodes the first holding tank on the bragg reflector and second holding tank can be avoided to the increase of corruption deadline layer and influences the p type layer, guarantees the surface quality of p type layer. The first holding tank and the second holding tank provide a covering space of the first insulating protection layer, the first insulating protection layer can cover the first holding tank and the second holding tank, part of the Bragg reflector is covered in the first insulating protection layer for protection, then a first through hole and a second through hole which are respectively positioned in the first holding tank and the second holding tank are formed on the surface of the first insulating protection layer, the width of the first through hole is smaller than that of the first holding tank, the width of the second through hole is smaller than that of the second holding tank, the primary n electrode is full of the first through hole and is connected with the n-type layer, and the primary p electrode is full of the space of the second through hole and is connected with the p-type layer. When the first through hole and the second through hole are formed, the Bragg reflector covered by the first insulating protective layer is not influenced, the quality of the Bragg reflector and the smoothness of the side wall of the through hole are effectively protected, the surface quality of the p-type layer is good, the light emitting of the Bragg reflector is guaranteed, and the light emitting efficiency and the reliability of the flip-chip light emitting diode chip are guaranteed.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present disclosure, the drawings needed to be used in the description of the embodiments will be briefly introduced below, and it is apparent that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art that other drawings can be obtained based on these drawings without inventive labor.
Fig. 1 is a schematic structural diagram of a flip-chip light emitting diode chip according to an embodiment of the present disclosure;
fig. 2 is a schematic structural diagram of another flip-chip light emitting diode chip provided in the embodiment of the present disclosure;
fig. 3 is a schematic structural diagram of another flip-chip light emitting diode chip provided in the embodiment of the present disclosure;
fig. 4 is a schematic structural diagram of another flip-chip light emitting diode chip according to an embodiment of the disclosure;
fig. 5 is a flowchart of a method for manufacturing a flip-chip light emitting diode chip according to an embodiment of the present disclosure;
fig. 6 is a flowchart of another method for manufacturing a flip-chip light emitting diode chip according to an embodiment of the disclosure.
Detailed Description
To make the objects, technical solutions and advantages of the present invention more apparent, embodiments of the present disclosure will be described in detail with reference to the accompanying drawings.
Fig. 1 is a schematic structural diagram of a flip-chip light emitting diode chip provided by an embodiment of the present disclosure, and as shown in fig. 1, the embodiment of the present disclosure provides a flip-chip light emitting diode chip, where the light emitting diode chip includes an epitaxial wafer 1, a primary p-electrode 2, and a primary n-electrode 3, and the epitaxial wafer 1 includes a substrate 11, and an n-type layer 12, a light emitting layer 13, a p-type layer 14, an etch stop layer 15, a bragg mirror 16, and a first insulating protection layer 17 that are sequentially stacked on the substrate 11.
The surface of the bragg reflector 16 has a first receiving groove 161 and a second receiving groove 162 spaced apart from each other, and the first receiving groove 161 and the second receiving groove 162 extend to the surface of the corrosion stop layer 15. The surface of the first insulating protection layer 17 has a first through hole 171 and a second through hole 172, the first through hole 171 and the second through hole 172 are respectively located in the first receiving groove 161 and the second receiving groove 162, the width of the first through hole 171 is smaller than the width of the first receiving groove 161, the width of the second through hole 172 is smaller than the width of the second receiving groove 162, and the first through hole 171 and the second through hole 172 respectively extend to the n-type layer 12 and the p-type layer 14.
The primary n-electrode 3 fills the first via 171 and contacts the n-type layer 12, and the primary p-electrode 2 fills the space of the second via 172 and contacts the p-type layer 14.
The corrosion stop layer 15 is added between the p-type layer 14 and the bragg reflector 16, and the first accommodating groove 161 and the second accommodating groove 162 which extend to the corrosion stop layer 15 are added on the surface of the bragg reflector 16, so that the formation of the first accommodating groove 161 and the second accommodating groove 162 on the bragg reflector 16 can be prevented from influencing the p-type layer 14 by the addition of the corrosion stop layer 15, and the surface quality of the p-type layer 14 is ensured. The first receiving groove 161 and the second receiving groove provide a covering space for the first insulating protection layer 17, the first insulating protection layer 17 can cover the first receiving groove 161 and the second receiving groove 162, and partially cover the bragg reflector 16 in the first insulating protection layer 17 for protection, and then form a first through hole 171 and a second through hole 172 on the surface of the first insulating protection layer 17, the first through hole 171 and the second through hole 172 are respectively located in the first receiving groove 161 and the second receiving groove 162, the width of the first through hole 171 is smaller than that of the first receiving groove 161, the width of the second through hole 172 is smaller than that of the second receiving groove 162, the first n electrode 3 is filled with the first through hole 171 and connected with the n-type layer 12, and the first p electrode 2 is filled with the space of the second through hole 172 and connected with the p-type layer 14. When the first through hole 171 and the second through hole 172 are formed, the bragg reflector 16 covered by the first insulating protection layer 17 is not affected, the quality of the bragg reflector 16 and the smoothness of the side wall of the through hole are effectively protected, the surface quality of the p-type layer 14 is good, the light emitting of the bragg reflector 16 is ensured, and the light emitting efficiency and the reliability of the flip-chip light emitting diode chip are ensured.
In fact, on the premise that the first receiving groove 161 and the second receiving groove 162 are already prepared on the bragg reflector 16, the first receiving groove 161 and the second receiving groove 162 can be prevented from being completely filled with the first insulating protection layer 17 by a photolithography process. After the first insulating protection layer 17 is formed, the photolithography process is used in cooperation, the bottom surfaces of the first accommodating groove 161 and the second accommodating groove 162 which are not covered by the first insulating protection layer 17 are directly used as a basis, and the stop layer 15 is corroded or etched until the n-type layer 12 and the p-type layer 14, so that the thickness of epitaxial materials required to be acted by etching and corrosion operations can be effectively reduced, the preparation efficiency of the light-emitting diode epitaxial wafer is effectively improved, and meanwhile, the partial surface quality of the first insulating protection layer 17 exposed by the first through hole 171 and the second through hole 172 is guaranteed.
It should be noted that, in the implementation manner provided in the present disclosure, the light emitting surface of the flip-chip light emitting diode chip is the surface on which the substrate 11 is located.
Illustratively, the thickness of the corrosion stop layer 15 is 0.1-5 um.
When the thickness of the etch stop layer 15 is within the above range, the p-type layer 14 and other epitaxial materials can be effectively isolated, and the manufacturing cost of the flip-chip light emitting diode chip is not excessively increased.
Optionally, the material of the corrosion stop layer 15 is one of SiOx, SiNx, or TiOx.
The material of the corrosion stop layer 15 adopts one of the materials, and can be applied to the preparation of light emitting diode epitaxial wafer chips made of different materials.
Illustratively, in a direction in which the first receiving groove 161 is pointed to the bragg reflector 16 by the corrosion stopper 15, the width of the first receiving groove 161 is increased, and the minimum width of the first receiving groove 161 is 1um to 50 um.
In the direction in which the first receiving groove 161 is directed to the bragg reflector 16 by the corrosion stop layer 15, the width of the first receiving groove 161 is increased, so that the first insulating protection layer 17 can be stably formed and grown in the first receiving groove 161, and the minimum width of the first receiving groove 161 is in the above range, the overall width of the first receiving groove 161 is reasonable, and there is enough space to receive the first insulating protection layer 17 and the first through hole 171 to be prepared on the first insulating protection layer 17.
Alternatively, the width of the first receiving groove 161 may be linearly increased in a direction in which the first receiving groove 161 is directed toward the bragg reflector 16 by the etch stop layer 15. The obtained first accommodation groove 161 is good in quality, and the first insulating protective layer 17 formed on the side wall of the first accommodation groove 161 is also good in quality.
In other implementations provided by the present disclosure, the width of the first receiving groove 161 may increase in a step shape in a direction in which the first receiving groove 161 is directed to the bragg reflector 16 by the corrosion stopper 15. The present disclosure is not so limited.
Illustratively, in a direction in which the first receiving groove 161 is pointed to the bragg reflector 16 by the corrosion stopper 15, the width of the first receiving groove 161 is increased, and the minimum width of the first receiving groove 161 is 1um to 50 um.
Illustratively, in the direction in which the second receiving groove 162 is directed to the bragg reflector 16 by the corrosion stop layer 15, the width of the second receiving groove 162 is increased, so that the second insulating protection layer 19 can be stably formed and grown in the second receiving groove 162, and the minimum width of the second receiving groove 162 is in the above range, the overall width of the second receiving groove 162 is reasonable, and there is enough space for receiving the second insulating protection layer 19 and the second through hole 172 required to be prepared on the second insulating protection layer 19.
Note that the widths provided in the present disclosure are all widths in a direction parallel to the surface of the substrate 11.
Alternatively, the width of the second receiving groove 162 may be linearly increased in a direction in which the second receiving groove 162 is directed to the bragg reflector 16 by the etch stop layer 15. The obtained second receiving groove 162 has good quality, and the second insulating protective layer 19 formed on the side wall of the second receiving groove 162 has good quality.
Illustratively, the primary p-electrode 2 is made of a metal material or an indium tin oxide conductive material, and if the primary p-electrode is made of a metal material, the primary p-electrode 2 includes a reflective metal layer and a cap layer stacked in sequence, the reflective metal layer includes one of Al, Ag, and Pt, the thickness of the reflective metal layer is 50nm to 500nm, and the cap layer includes at least one of Ni, Ti, and Pt.
When the material of the primary p-electrode 2 is the above material, the material can play a role in conducting electricity and can also effectively reflect light, most of the light is reflected to the light-emitting surface where the substrate 11 is located, and under the condition that the bragg reflector 16 can only reflect part of the light with a specific incident angle, the light which is difficult to reflect by the bragg reflector 16 is also reflected to the light-emitting surface where the substrate 11 is located, so that the light-emitting efficiency of the flip-chip light-emitting diode chip is effectively improved. When the primary p electrode is made of a metal material, the reflective metal layer comprises one of Al, Ag and Pt, and the thickness of the reflective metal layer is 50 nm-500 nm, so that the reflective effect can be ensured, and the preparation cost of the flip-chip light-emitting diode can not be excessively increased.
In other implementations provided by the present disclosure, the primary p-electrode 2 may further include an adhesion metal layer located below the light-reflecting metal layer, the adhesion metal layer including at least one of Cr and Ni. The structure of the resulting primary p-electrode 2 is more stable.
It should be noted that the epitaxial layers provided in the present disclosure are stacked in sequence from the substrate 11 toward the p-type layer 14 when stacked.
In other implementations provided by the present disclosure, the primary p-electrode 2 may also be made of at least one of Au, Ni, Ti, Cr, or an alloy material, which is not limited by the present disclosure.
It should be noted that the materials of the n-type layer 12, the light-emitting layer 13 and the p-type layer 14 in fig. 1 may be a gallium nitride material, an aluminum gallium arsenide material or an aluminum gallium indium phosphide material, which is not limited in this disclosure.
In one implementation provided by the present disclosure, exemplified by gallium nitride materials, the n-type layer 12, the light emitting layer 13, and the p-type layer 14 may include an n-type GaN layer, an InGaN/GaN multiple quantum well structure, and a p-type GaN layer, respectively.
Where the primary material is gallium nitride, the bragg mirror 16 may comprise SiOx/TiOx, or other high and low index stack materials.
The structure of the epitaxial layer 1 in fig. 1 is only used as an example, and in other implementations provided by the present disclosure, the epitaxial layer 1 may also include other structures, which are not limited by the present disclosure.
Fig. 2 is a schematic structural diagram of another flip-chip light emitting diode chip according to an embodiment of the present disclosure, and referring to fig. 2, the light emitting diode chip includes an epitaxial wafer 1, a primary p-electrode 2, a primary n-electrode 3, and a secondary p-electrode 4, where the epitaxial wafer 1 includes a substrate 11, and an n-type layer 12, a light emitting layer 13, a p-type layer 14, a current spreading layer 18, an etch stop layer 15, a bragg mirror 16, a first insulating protection layer 17, and a second insulating protection layer 19 sequentially stacked on the substrate 11.
The surface of the bragg reflector 16 has a first receiving groove 161 and a second receiving groove 162 spaced apart from each other, and the first receiving groove 161 and the second receiving groove 162 extend to the surface of the corrosion stop layer 15. The surface of the first insulating protection layer 17 has a first through hole 171 and a second through hole 172, the first through hole 171 and the second through hole 172 are respectively located in the first receiving groove 161 and the second receiving groove 162, the width of the first through hole 171 is smaller than the width of the first receiving groove 161, the width of the second through hole 172 is smaller than the width of the second receiving groove 162, and the first through hole 171 and the second through hole 172 respectively extend to the n-type layer 12 and the current spreading layer 18.
The primary n-electrode 3 fills the first via 171 and contacts the n-type layer 12, and the primary p-electrode 2 fills the space of the second via 172 and contacts the p-type layer 14.
Referring to fig. 2, the led chip further includes a secondary p-electrode 4, the epitaxial wafer 1 further includes a second insulating protection layer 19, the second insulating protection layer 19 covers the first insulating protection layer 17 and the primary p-electrode 2, and the second insulating protection layer 19 has a first connection hole 191 connected to the first through hole 171 and a second connection hole 192 connected to the primary p-electrode 2. The primary n-electrode 3 is located in the first through hole 171 and the first connection hole 191, the secondary p-electrode 4 is located in the second connection hole 192, and the material of the secondary p-electrode 4 includes at least one of Cr Ni Al Pt Au Ti.
In the case that the primary p-electrode 2 is made of a single metal material, the primary p-electrode 2 may have a good light reflection effect to improve the light emitting efficiency of the flip-chip light emitting diode chip, but the primary p-electrode 2 made of the single metal material with a good light reflection effect may affect the connection effect between the primary p-electrode 2 and the substrate or other structures. Therefore, the second insulating protection layer 19 and the secondary p-electrode 4 are added, the secondary p-electrode 4 is used for being connected with structures such as a substrate, the primary p-electrode 2 below the secondary p-electrode 4 has a good light reflection effect, and the possibility of short circuit between the secondary p-electrode 4 and the primary n-electrode 3 can be avoided. The light emitting efficiency of the flip light emitting diode chip can be effectively improved while the normal function of the flip light emitting diode chip can be ensured.
The structures and materials of the n-type layer 12, the light-emitting layer 13 and the p-type layer 14 in fig. 2 can be referred to the structures and materials of the n-type layer 12, the light-emitting layer 13 and the p-type layer 14 in fig. 1, and thus are not described herein again. The structures and materials of the primary n-electrode 3 and the primary p-electrode 2 in fig. 2 can also refer to the structures and materials of the primary n-electrode 3 and the primary p-electrode 2 in fig. 1, and are not described herein again.
It should be noted that, in fig. 2, a current spreading layer 18 is added between the p-type layer 14 and the etch stop layer 15. The addition of the current spreading layer 18 may improve the light emission uniformity of the flip-chip light emitting diode and reduce the likelihood of current breakdown.
Optionally, the current spreading layer 18 is an aluminum gallium nitride material. Easy preparation and acquisition.
Fig. 3 is a schematic structural diagram of another flip-chip light emitting diode chip according to an embodiment of the disclosure, and referring to fig. 3, based on the flip-chip light emitting diode chip shown in fig. 2, the flip-chip light emitting diode chip further includes a secondary n-electrode 5, the epitaxial wafer 1 further includes a third insulating protective layer 20, the third insulating protective layer 20 covers the primary n-electrode 3 and the second insulating protective layer 19, the third insulating protective layer 20 has a first light hole 201 and a second light hole 202 respectively connected to the primary n-electrode 3 and the second connection hole 192, the secondary n-electrode 5 is located in the first light hole 201, and the secondary p-electrode 4 is located in the second light hole 202 and the second connection hole 192. The orthographic projection of the primary n-electrode 3 on the surface of the substrate 11 and the orthographic projection of the primary p-electrode 2 on the surface of the substrate 11 have an overlapping part.
The secondary n electrode 5 and the third insulating protection layer 20 are additionally added, the orthographic projection of the primary n electrode 3 on the surface of the substrate 11 is controlled, the orthographic projection of the primary p electrode 2 on the surface of the substrate 11 is overlapped, the primary n electrode 3 made of metal materials has a certain light reflecting effect, the primary p electrode 2 with a better light reflecting effect can reflect most of light emitted by the light emitting layer 13, current can be spread more uniformly when being transmitted through the primary n electrode 3 and the primary p electrode 2, and the light emitting uniformity of the finally obtained island-shaped light emitting diode chip is effectively improved.
Alternatively, the structure of the primary n-electrode 3 is the same as that of the primary p-electrode 2, and the structure of the secondary n-electrode 5 is the same as that of the secondary p-electrode 4.
The structure of the primary n electrode 3 is the same as that of the primary p electrode 2, the structure of the secondary n electrode 5 is the same as that of the secondary p electrode 4, the primary n electrode 3 also comprises a reflective material on the premise that the primary p electrode 2 comprises the reflective material, the light emitting efficiency of the finally obtained flip-chip light emitting diode can be improved, the secondary n electrode 5 can be well fixed and connected with the substrate or bonding metal, and the light emitting efficiency is effectively improved under the condition that the normal function of the finally obtained flip-chip light emitting diode is guaranteed.
The structure of the primary n-electrode 3 is the same as that of the primary p-electrode 2, and the material and the hierarchical distribution of the primary n-electrode 3 are the same as those of the primary p-electrode 2, and the secondary n-electrode 5 and the secondary p-electrode 4, respectively.
To facilitate understanding, fig. 4 is a schematic structural diagram of another flip-chip light emitting diode chip according to an embodiment of the present disclosure, fig. 3 and fig. 4 both have a secondary n electrode 5, but the materials used for the secondary n electrode 5 in fig. 3 and fig. 4 are different, and the secondary n electrode 5 in fig. 4 is made of a metal and has a better reflection effect on light.
It should be noted that, in the embodiments of the present disclosure, the material of the insulating protection layer may be silicon oxide or aluminum oxide, and the present disclosure is not limited thereto.
Fig. 5 is a flowchart of a method for manufacturing a flip-chip light emitting diode chip according to an embodiment of the present disclosure, and as shown in fig. 5, the flip-chip light emitting diode chip and the method for manufacturing the same include:
s101: a substrate is provided.
S102: an n-type layer, a light-emitting layer, a p-type layer, a corrosion cut-off layer and a Bragg reflector are sequentially grown on the substrate.
S103: and a first accommodating groove and a second accommodating groove which are mutually spaced are sequentially formed on the surface of the Bragg reflector, and the first accommodating groove and the second accommodating groove extend to the surface of the corrosion stop layer.
S104: a first insulation protection layer is formed on the Bragg reflector, a first through hole and a second through hole are formed in the surface of the first insulation protection layer, the first through hole and the second through hole are located in the first accommodating groove and the second accommodating groove respectively, the width of the first through hole is smaller than that of the first accommodating groove, the width of the second through hole is smaller than that of the second accommodating groove, and the first through hole and the second through hole extend to the n-type layer and the p-type layer respectively.
S105: a primary n-electrode is formed in the first via hole, and a primary p-electrode is formed in the second via hole.
The effect of the manufacturing method shown in fig. 5 can refer to the technical effect corresponding to the flip-chip light emitting diode chip shown in fig. 1, and therefore, the description thereof is omitted here. The flip-chip led chip structure after step S105 is executed can be seen in fig. 1.
Optionally, the first receiving groove, the second receiving groove, the first through hole, and the second through hole in steps S103 and S104 may be obtained by wet etching. The wet etching effect is good, the surface quality of the obtained first holding tank, the second holding tank, the first through hole and the second through hole is good, and the quality of the structure filled in the first holding tank, the second holding tank, the first through hole and the second through hole can be guaranteed.
For example, the etching solution used in the wet etching may be a BOE solution, which includes water, HF, and ammonium fluoride.
Exemplarily, on the premise that the first accommodating groove and the second accommodating groove are prepared on the bragg reflector, the first insulating protection layer can be prevented from completely filling the first accommodating groove and the second accommodating groove through a photolithography process, and after the first insulating protection layer grows, partial space still exists in the first accommodating groove and the second accommodating groove. And then, matching with a photoetching process, and corroding or etching the corrosion stop layer to the n-type layer and the p-type layer on the basis of the bottom surfaces of the first accommodating groove and the second accommodating groove which are not covered by the first insulation protection layer. The method can effectively reduce the thickness of the epitaxial material required to be acted by etching and corrosion operations, effectively improves the preparation efficiency of the light-emitting diode epitaxial wafer, and simultaneously ensures the surface quality of the exposed part of the first insulation protection layer by the first through hole and the second through hole.
It should be noted that, in order to prevent the first insulating protection layer from completely filling the first receiving groove and the second receiving groove, a portion of photoresist may be disposed in the first receiving groove and the second receiving groove, so as to prevent the material of the first insulating protection layer from being deposited.
Fig. 6 is a flowchart of a method for manufacturing a flip-chip light emitting diode chip according to an embodiment of the present disclosure, and as shown in fig. 6, the flip-chip light emitting diode chip and the method for manufacturing the same include:
s201: a substrate is provided.
Alternatively, the substrate may be a sapphire substrate or a gallium arsenide substrate or a substrate of other material, which is not limited by this disclosure.
S202: an n-type layer, a light-emitting layer, a p-type layer, a current expansion layer, a corrosion cut-off layer and a Bragg reflector are sequentially grown on the substrate.
It should be noted that, in the embodiment of the present disclosure, a VeecoK 465i or C4 or RB MOCVD (Metal Organic Chemical Vapor Deposition) apparatus is adopted to implement the growth method of the light emitting diode. By using high-purity H2(Hydrogen) or high purity N2(Nitrogen) or high purity H2And high purity N2The mixed gas of (2) is used as a carrier gas, high-purity NH3As an N source, trimethyl gallium (TMGa) and triethyl gallium (TEGa) as gallium sources, trimethyl indium (TMIn) as indium sources, silane (SiH4) as an N-type dopant, trimethyl aluminum (TMAl) as an aluminum source, and magnesium dicylocene (CP)2Mg) as a P-type dopant.
Illustratively, for example, in one implementation manner provided by the present disclosure, the growth temperature and growth pressure of the n-type layer, the light emitting layer, the p-type layer, the current spreading layer, the corrosion stop layer, and the bragg reflector may range from 700 to 1200 degrees celsius and from 200 to 600 torr. And an epitaxial wafer with better quality can be obtained.
It should be noted that, in one implementation manner provided by the present disclosure, after the p-type layer is grown, a groove extending to the n-type layer may be formed on the p-type layer, a current spreading layer may be formed on the remaining surface of the p-type layer away from the substrate, and then an etch stop layer covering the groove and the current spreading layer may be grown. The grooves are shown in fig. 4, the reference numeral S for the grooves.
S203: and a first accommodating groove and a second accommodating groove which are mutually spaced are sequentially formed on the surface of the Bragg reflector, and the first accommodating groove and the second accommodating groove extend to the surface of the corrosion stop layer.
The first accommodating groove and the second accommodating groove can be obtained by corrosion.
S204: a first insulation protection layer is formed on the Bragg reflector, a first through hole and a second through hole are formed in the surface of the first insulation protection layer, the first through hole and the second through hole are located in the first accommodating groove and the second accommodating groove respectively, the width of the first through hole is smaller than that of the first accommodating groove, the width of the second through hole is smaller than that of the second accommodating groove, and the first through hole and the second through hole extend to the n-type layer and the p-type layer respectively.
S205: a primary p-electrode is formed within the first via.
S206: and forming a second insulating protection layer on the surfaces of the primary p electrode and the first insulating protection layer, wherein the second insulating protection layer is provided with a first connecting hole communicated with the first through hole, and the second insulating protection layer is provided with a second connecting hole communicated with the primary p electrode.
S207: and forming a primary n electrode in the first through hole and the first connection hole, and forming a secondary p electrode in the second through hole.
The electrode metal may be obtained by vapor deposition.
The structure after step S207 is executed can refer to fig. 2.
It should be noted that, if the structures shown in fig. 3 and fig. 4 need to be grown, on the basis of step S206 of the manufacturing method shown in fig. 2, an n electrode is formed once in the first via hole and the first connection hole; and forming a third insulating protective layer on the surfaces of the primary n electrode and the second insulating protective layer, and respectively forming a first light hole and a second light hole which are communicated to the primary n electrode and the second connecting hole on the third insulating protective layer. And forming a secondary n electrode and a secondary p electrode in the first light hole and the second light hole respectively.
Although the present disclosure has been described with reference to specific embodiments, it will be understood by those skilled in the art that various changes, substitutions and alterations can be made herein without departing from the spirit and scope of the disclosure.
Claims (7)
1. The flip-chip light-emitting diode chip is characterized by comprising an epitaxial wafer, a primary p electrode and a primary n electrode, wherein the epitaxial wafer comprises a substrate, and an n-type layer, a light-emitting layer, a p-type layer, an etch stop layer, a Bragg reflector and a first insulating protective layer which are sequentially stacked on the substrate,
the surface of the Bragg reflector is provided with a first accommodating groove and a second accommodating groove which are spaced, the first accommodating groove and the second accommodating groove extend to the surface of the corrosion stop layer, and the corrosion stop layer is made of one of SiOx, SiNx or TiOx;
the surface of the first insulating protection layer is provided with a first through hole and a second through hole, the first through hole and the second through hole are respectively positioned in the first accommodating groove and the second accommodating groove, the width of the first through hole is smaller than that of the first accommodating groove, the width of the second through hole is smaller than that of the second accommodating groove, and the first through hole and the second through hole respectively extend to the n-type layer and the p-type layer,
the primary n electrode is filled in the first through hole and is connected with the n-type layer, and the primary p electrode is filled in the space of the second through hole and is connected with the p-type layer;
the light emitting diode chip further comprises a secondary p electrode, the epitaxial wafer further comprises a second insulating protection layer, the second insulating protection layer covers the first insulating protection layer and the primary p electrode, the second insulating protection layer is provided with a first connecting hole communicated to the first through hole and a second connecting hole communicated to the primary p electrode,
the primary n electrode is positioned in the first through hole and the first connecting hole, the secondary p electrode is positioned in the second connecting hole, and the material of the secondary p electrode comprises at least one of Cr Ni Al Pt Au Ti;
the light-emitting diode chip further comprises a secondary n electrode, the epitaxial wafer further comprises a third insulating protection layer, the third insulating protection layer covers the primary n electrode and the second insulating protection layer, the third insulating protection layer is provided with a first light hole and a second light hole which are communicated with the primary n electrode and the second connecting hole respectively, the secondary n electrode is located in the first light hole, the secondary p electrode is located in the second light hole and the second connecting hole,
the orthographic projection of the primary n-electrode on the surface of the substrate and the orthographic projection of the primary p-electrode on the surface of the substrate are overlapped.
2. The flip-chip light emitting diode chip as claimed in claim 1, wherein the thickness of the etch stop layer is 0.1-5 um.
3. The flip chip light emitting diode chip of claim 1 or 2, wherein the width of the first receiving groove increases in a direction in which the first receiving groove is directed from the corrosion cut-off layer to the bragg reflector, and the minimum width of the first receiving groove is 1um to 50 um.
4. The flip-chip light emitting diode chip of claim 1 or 2, wherein the primary p-electrode is made of a metal material or an indium tin oxide conductive material, and if the primary p-electrode is made of a metal material, the primary p-electrode includes a reflective metal layer and a cap layer stacked in sequence, the reflective metal layer includes one of Al, Ag and Pt, the thickness of the reflective metal layer is 50nm to 500nm, and the cap layer includes at least one of Ni, Ti and Pt.
5. The flip chip light emitting diode chip of claim 1, wherein the primary n-electrode has the same structure as the primary p-electrode, and the secondary n-electrode has the same structure as the secondary p-electrode.
6. A flip light-emitting diode chip preparation method is characterized by comprising the following steps:
providing a substrate;
sequentially growing an n-type layer, a light-emitting layer, a p-type layer, a corrosion cut-off layer and a Bragg reflector on the substrate;
sequentially forming a first accommodating groove and a second accommodating groove which are mutually spaced on the surface of the Bragg reflector, wherein the first accommodating groove and the second accommodating groove extend to the surface of the corrosion stop layer, and the corrosion stop layer is made of one of SiOx, SiNx or TiOx;
forming a first insulating protection layer on the Bragg reflector, wherein the surface of the first insulating protection layer is provided with a first through hole and a second through hole, the first through hole and the second through hole are respectively positioned in the first accommodating groove and the second accommodating groove, the width of the first through hole is smaller than that of the first accommodating groove, the width of the second through hole is smaller than that of the second accommodating groove, and the first through hole and the second through hole respectively extend to the n-type layer and the p-type layer;
forming a primary n-electrode in the first through hole and a primary p-electrode in the second through hole;
the light emitting diode chip further comprises a secondary p-electrode and a second insulating protection layer, the second insulating protection layer covers the first insulating protection layer and the primary p-electrode, the second insulating protection layer is provided with a first connecting hole communicated to the first through hole and a second connecting hole communicated to the primary p-electrode,
the primary n electrode is positioned in the first through hole and the first connecting hole, the secondary p electrode is positioned in the second connecting hole, and the material of the secondary p electrode comprises at least one of Cr Ni Al Pt Au Ti;
the light-emitting diode chip further comprises a secondary n electrode and a third insulating protection layer, the third insulating protection layer covers the primary n electrode and the second insulating protection layer, the third insulating protection layer is provided with a first light hole and a second light hole which are communicated with the primary n electrode and the second connecting hole respectively, the secondary n electrode is positioned in the first light hole, the secondary p electrode is positioned in the second light hole and the second connecting hole,
the orthographic projection of the primary n-electrode on the surface of the substrate and the orthographic projection of the primary p-electrode on the surface of the substrate are overlapped.
7. The method of claim 6, wherein the first receiving groove, the second receiving groove, the first through hole and the second through hole are all obtained by wet etching.
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| CN104576857A (en) * | 2013-10-15 | 2015-04-29 | 上海工程技术大学 | Flip LED chip structure with high reflection layer and manufacturing method of flip LED chip structure |
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| CN104576857A (en) * | 2013-10-15 | 2015-04-29 | 上海工程技术大学 | Flip LED chip structure with high reflection layer and manufacturing method of flip LED chip structure |
| CN104681704A (en) * | 2015-01-30 | 2015-06-03 | 大连德豪光电科技有限公司 | Flip LED (Light Emitting Diode) chip and production method thereof |
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