CN113485948A

CN113485948A - NVM bad block management method and control unit

Info

Publication number: CN113485948A
Application number: CN202110730397.XA
Authority: CN
Inventors: 盛亮; 代亮亮
Original assignee: Chengdu Starblaze Technology Co ltd
Current assignee: Chengdu Starblaze Technology Co ltd
Priority date: 2021-06-29
Filing date: 2021-06-29
Publication date: 2021-10-08
Anticipated expiration: 2041-06-29
Also published as: CN113485948B

Abstract

NVM bad block management methods and control components are provided. The provided storage bad block management method comprises the following steps: scanning the physical blocks in each logic unit to generate a first information table; determining a first merging block and a second merging block according to the first information table, determining at least one first merging block from the first merging blocks and determining a second merging block corresponding to each first merging block from the second merging blocks, wherein the first merging block comprises a bad physical block, the second merging block comprises a good physical block, and the good physical block in the second merging block can replace the bad physical block in the first merging block for data storage; and determining a first physical address of a bad physical block in each first merging block and a second physical address of a good physical block in a corresponding second merging block, and recording the association relationship between the first physical address and the second physical address.

Description

NVM bad block management method and control unit

Technical Field

The present application relates to a Memory device technology, and in particular, to a bad block management method of an NVM (Non Volatile Memory), a method for accessing the NVM, and a control unit.

Background

FIG. 1 illustrates a block diagram of a storage device. The storage device 102 is coupled to a host for providing storage capabilities to the host. The host and the storage device 102 may be coupled by various methods, including but not limited to, connecting the host and the solid state storage device 102 by, for example, SATA (Serial Advanced Technology Attachment), SCSI (Small Computer System Interface), SAS (Serial Attached SCSI), IDE (Integrated Drive Electronics), USB (Universal Serial Bus), PCIE (Peripheral Component Interconnect Express, PCIE, high speed Peripheral Component Interconnect), NVMe (NVM Express, high speed nonvolatile storage), ethernet, fibre channel, wireless communication network, etc. The host may be an information processing device, such as a personal computer, tablet, server, portable computer, network switch, router, cellular telephone, personal digital assistant, etc., capable of communicating with the storage device in the manner described above. The Memory device 102 includes an interface 103, a control section 104, one or more NVM chips 105, and a DRAM (Dynamic Random Access Memory) 110.

NAND flash Memory, phase change Memory, FeRAM (Ferroelectric RAM), MRAM (magnetoresistive Memory), RRAM (Resistive Random Access Memory), XPoint Memory, and the like are common NVM.

The interface 103 may be adapted to exchange data with a host by means such as SATA, IDE, USB, PCIE, NVMe, SAS, ethernet, fibre channel, etc.

The control unit 104 is used to control data transfer between the interface 103, the NVM chip 105, and the DRAM 110, and also used for memory management, host logical address to flash physical address mapping, erase leveling, bad block management, and the like. The control component 104 can be implemented in various manners of software, hardware, firmware, or a combination thereof, for example, the control component 104 can be in the form of an FPGA (Field-programmable gate array), an ASIC (Application-Specific Integrated Circuit), or a combination thereof. The control component 104 may also include a processor or controller in which software is executed to manipulate the hardware of the control component 104 to process IO (Input/Output) commands. The control component 104 may also be coupled to the DRAM 110 and may access data of the DRAM 110. FTL tables and/or cached IO command data may be stored in the DRAM.

Control section 104 includes a flash interface controller (or referred to as a media interface controller, a flash channel controller) that is coupled to NVM chip 105 and issues commands to NVM chip 105 in a manner that conforms to an interface protocol of NVM chip 105 to operate NVM chip 105 and receive command execution results output from NVM chip 105. Known NVM chip interface protocols include "Toggle", "ONFI", etc.

Chinese patent application No. 201510253428.1 entitled "microinstruction sequence execution method and apparatus thereof" provides an example of a media interface controller that applies storage media access commands to NVM chips by executing microinstructions. Chinese patent application No. 2020106080147 entitled "adaptive NVM read method and apparatus thereof", chinese patent application No. 202010615178.2 ", chinese patent application No. 202010207004.2", chinese patent application No. media interface controller and storage controller for read command fusion, chinese patent application No. 201810380329.3, chinese patent application No. method and apparatus for executing NVM commands out of order ", chinese patent application No. 201610836531.3, chinese patent application No. method and apparatus for generating NVM chip interface commands".

Fig. 2 shows a detailed block diagram of the control part of the storage device.

Hosts access storage devices with IO commands that follow a storage protocol. The control component generates one or more storage commands according to the IO commands from the host and provides the storage commands to the media interface controller. The media interface controller generates storage media access commands (e.g., program commands, read commands, erase commands) in accordance with the interface protocol of the NVM chip in accordance with the storage commands. The control unit also tracks that all storage commands generated from one IO command are executed and indicates the processing result of the IO command to the host.

Referring to fig. 2, the control means includes, for example, a host interface, a host command processing unit, a storage command processing unit, a media interface controller, and a storage media management unit. The host interface acquires the IO command provided by the host, generates a storage command and provides the storage command to the storage command processing unit. The storage command accesses, for example, a storage space of the same size, for example, 4 KB. A data unit recorded in the NVM chip corresponding to data accessed by one storage command is referred to as a data frame. A physical page records one or more frames of data. For example, a physical page is 17664 bytes in size, and a data frame is 4KB in size, then one physical page can store 4 data frames.

The storage medium management unit maintains a logical to physical address translation for each storage command. For example, the storage medium management unit includes an FTL table. For a read command, the storage medium management unit outputs a physical address corresponding to a logical address accessed by the storage command, for a write command, the storage medium management unit allocates an available physical address to the storage medium management unit, and records a mapping relation between the accessed logical address and the allocated physical address. The storage medium management unit also maintains functions such as garbage collection, wear leveling, etc. required to manage the NVM chips.

The storage command processing unit operates the media interface controller to send a storage media access command to the NVM chip according to the physical address provided by the storage media management unit. For clarity, commands sent by the storage command processing unit to the media interface controller are referred to as media interface commands, while commands sent by the media interface controller to the NVM chip are referred to as storage media access commands. The storage medium access commands follow the interface protocol of the NVM chip.

An NVM chip includes one or more Logical Units (LUNs). One or more dies (Die) may be included within the NVM chip package. Typically, a logic cell corresponds to a single die. The logical unit may include a plurality of planes (planes). Multiple planes within a logic unit may be accessed in parallel, while multiple logic units within an NVM chip may execute commands and report status independently of each other. The meaning for target, logical Unit, Plane (Plane) is provided in "Open NAND Flash Interface Specification (Revision 3.0)" available from http:// www.micron.com// media/Documents/Products/Other% 20Documents/ONFI3_0gold. as hx, which is part of the prior art. In this application, the use of Target (Target) and Logical Unit (LUN) is interchangeable unless otherwise indicated.

NVM chips typically store and read data on a page basis. And data is erased in blocks. A block (also referred to as a physical block) contains a plurality of pages (also referred to as physical pages). The physical page has a fixed size, e.g., 17664 bytes. Physical pages may also have other sizes. Each Plane (Plane) may include a plurality of physical blocks. Physical blocks from multiple logical units in an NVM chip and having the same physical address further constitute a large block. The plurality of logical units providing a physical block for a large block is called a logical unit group, and each logical unit in the logical unit group may provide one physical block for a large block.

For example, while FIG. 3A shows a block construction schematic, in FIG. 3A, a large block is constructed on every 16 logical units, each large block including a physical block from 16 logical units, in FIG. 3A, a large block 0 includes a physical block 0 from each of the 16 logical units, and a large block 2 includes a physical block 2 from each logical unit, other constructions of the large block may be constructed, as an example, in the Chinese application No. 201710752321.0. Also in fig. 3A, a physical block is indicated by a reference numeral in the form of Bb-a, where a indicates that the physical block is provided by a logical unit (LUNa), and b indicates that the block number of the physical block in the logical unit is b.

Fig. 3B shows a schematic diagram of a logic cell and plane (Plan). Each Logical Unit (LUN) comprises a plurality of planes (Plan). Referring to FIG. 3B, large blocks are constructed on logical units of 16 logical units (LUN0, LUN1, LUN2, …, LUN15), physical block B0 of LUN0-LUN15 constitutes large block 0, and physical block B1 of LUN0-LUN15 constitutes large block 1. Taking LUN2 as an example, LUN2 includes 4 planes (plane 0, plane 1, plane 2, and plane 3, where plane 0 and plane 3 are shown in fig. 3B, and plane 1 and plane 2 are not shown), and each plane within the LUN can perform read and write operations simultaneously, so as to improve the parallelism of NVM operations.

With the development of the times, the storage capacity of the NVM is also increasing in order to satisfy mass data storage. Large volumes of NVM have more Logical Units (LUNs), each LUN containing more physical blocks. The NVM manufactured in the factory inevitably has bad blocks. The occurrence and distribution of bad blocks is generally random. NVM has both bad blocks in the factory and new bad blocks appear on NVM as time passes and is used. The storage medium management unit of the control unit manages the bad physical blocks and stores the bad physical block information (e.g., by FTL algorithm). To identify and manage bad blocks, the NVM is factory marked with the location of the bad blocks. During the manufacturing process of a memory device including an NVM, the NVM included therein is scanned to identify bad blocks therein, where the bad blocks include both existing bad blocks when the NVM was shipped from a factory and newly generated bad blocks after shipment. The control section records the position of each bad block (e.g., a physical address, a block number, or a bitmap indicating a bad block) so that the storage medium management unit knows the existence of a bad block and that a normal physical block replaces the bad block. In the prior art, the method for recording the bad physical block information by the control unit is to generate a bad physical block bit for each bad physical block to be stored in a specified physical block of the NVM, and for a mass storage device, more storage resources are required to be consumed to store the bad block information.

Disclosure of Invention

NVM has a variety of specifications. For example, NVMs of the same or different vendors vary in number and size of physical blocks, number and size of physical pages, etc., which introduces additional burden on the controlling component to manage the NVM. To facilitate the use of diverse NVMs, the control unit or its storage management unit organizes the diverse NVMs into a standard or uniform form. For example, a unified morphological physical block includes 1000 physical pages, each of 16KB in size. It is understood that 1000 physical pages, 16KB are examples. Still by way of example, a NVM chip has physical blocks that actually include 512 physical pages, each physical page being 16KB in size. At this time, the 2 physical blocks of the NVM chip are combined to obtain physical blocks with unified form, each real physical block provides 500 physical pages for the physical blocks with unified form, and the rest physical pages are reserved or not used. It will be appreciated that the physical blocks of a unified form are constructed from one or more real physical blocks, depending on the actual specifications of the NVM chip. For simplicity, the unified form of the physical block is also referred to hereinafter as a "binning block". The use of binning blocks also facilitates the use of less storage resources to store physical block (binning block) information.

Generally, adjacent physical blocks are combined to obtain a merged block, so that the block address (block number) of the merged block has a direct mapping relationship with the block address of the physical block constituting the merged block. For example, 1 bit is added after the block address of the merged block, and the block address of each of 2 physical blocks constituting the merged block is obtained. And according to the address or the physical block number of the physical block communicated with the merging block, removing the lowest bit of the block address or the block number to obtain the merging block address or the merging block number.

However, due to the existence of bad blocks of the NVM, complexity is added to building a merged block (a physical block of uniform morphology). On one hand, since the probability of bad blocks existing in two or more adjacent physical blocks is multiplied (the multiple is equal to the number of physical blocks constituting a merged block), once a physical block is a bad block, the merged block constituted by the same physical block cannot be used, which results in waste of storage resources (physical blocks) of the NVM; on the other hand, the replacement technique of the bad (physical) block in the prior art cannot be applied to the merged block because the bad physical blocks in the merged blocks are distributed differently and cannot directly replace another merged block with the merged block. Some accidentally present bad blocks in the NVM are replaced by normal blocks with different addresses by a block replacement technique, and when the physical address of a bad block is accessed, the access is responded to by the normal block replacing the bad block. The block replacement technique thus constructs a logical block space, where "logical block space" is different from a logical address space constituted by LBAs (logical block addresses), but is intended to express that the logical block space includes consecutive block numbers, each of which is normally accessible. When the merge block is used, the block number of the logical block space represents the merge block number, and when a physical block is a bad block, the merge block number in the logical block space corresponding to the bad block is served by other normal merge blocks, so that other parts of the upper system or the control unit can operate the logical block space completely composed of normal blocks without considering the influence of the bad block.

In this case, it is desirable to construct a logic block space that does not contain bad blocks for use by upper layers.

According to the scheme provided by the embodiment of the application, the control component records the information of the merged block obtained by merging at least two physical blocks and merged at one time in each entry of the first information table, which means that the control component can record the information of a plurality of physical blocks through each entry in the first information table, so that the physical block information can be stored by consuming as little storage resources as possible; the control component records information of the merged block which is merged once, also records an incidence relation of a first physical address of a bad physical block in the first merged block and a second physical address of a good physical block in the second merged block corresponding to the bad physical block, merges the good physical block in the first merged block and the good physical block in the second merged block according to the incidence relation to obtain a good physical block which is merged twice, and constructs a logical block space which does not contain the bad physical block and has continuous addresses under the condition that the NVM chip has natural bad physical blocks so as to be convenient for upper layer use and further improve the performance of the storage device.

According to a first aspect of the present application, there is provided a method of first NVM bad block management according to the first aspect of the present application, comprising: scanning physical blocks in each Logical Unit (LUN) to generate a first information table, wherein the first information table comprises a plurality of entries, each entry comprises information of a merged block merged once, and each merged block comprises at least two physical blocks; determining a first merging block and a second merging block according to the first information table, determining at least one first merging block from the first merging block and determining a second merging block corresponding to each first merging block from the second merging block, wherein the first merging block and the second merging block are different merging blocks, the first merging block comprises a bad physical block, the second merging block comprises a good physical block, and the good physical block in the second merging block can replace the bad physical block in the first merging block for data storage; and determining a first physical address of a bad physical block in each first merging block and a second physical address of a good physical block in a corresponding second merging block, and recording the association relationship between the first physical address and the second physical address.

The method of managing bad blocks of a second NVM according to the first aspect of the present application is provided according to the method of managing bad blocks of a first NVM according to the first aspect of the present application, each merged block comprising: physical blocks in the same plane (plane) where at least two physical addresses are adjacent; or physical blocks with at least two physical addresses in multiple planes of the same Logical Unit (LUN).

According to the second NVM bad block management method of the first aspect of the present application, there is provided a third NVM bad block management method of the first aspect of the present application, wherein the information of the merged block merged at a time includes: the method comprises the steps of combining the types of blocks and the information of all physical blocks in the combined blocks, wherein the types of the combined blocks comprise good combined blocks and bad combined blocks which are combined at one time, the bad combined blocks comprise first bad combined blocks and second bad combined blocks, the first bad combined blocks are all bad physical blocks, the second bad combined blocks comprise good physical blocks and bad physical blocks, and the good combined blocks which are combined at one time are all good physical blocks.

There is provided a method of fourth NVM bad block management according to the first aspect of the present application, further comprising: combining the first combining block and the good physical block in the second combining block corresponding to the first combining block to obtain a good combining block which is combined for the second time; and the number of the physical blocks of the secondary combined good combining block is the same as that of the combining block, and all the physical blocks of the secondary combined good combining block are good physical blocks.

According to the fourth NVM bad block management method of the first aspect of the present application, there is provided a fifth NVM bad block management method of the first aspect of the present application, wherein the second type of bad combining block comprises: the high bit is a merged block of the good physical block with the high bit being the bad physical block or a merged block with the high bit being the good physical block with the high bit being the bad physical block, wherein the high bit and the high bit refer to the high bit and the high bit of two bits occupied by storing information of each physical block in the merged block.

According to the fourth or fifth NVM bad block management method of the first aspect of the present application, there is provided the sixth NVM bad block management method of the first aspect of the present application, wherein the second type of merging block comprises at least one merged good merging block and/or second type of bad merging block; the first type of merging block at least comprises a second type of bad merging block.

According to the method for managing the bad blocks of the NVM according to any one of the first to sixth aspects of the present application, there is provided the method for managing the bad blocks of the NVM according to the seventh aspect of the present application, wherein the determining the first merged block and the second merged block according to the first information table includes: and determining the number of bad merging blocks in each large block of the storage device according to the first information table, and determining a first merging block and a second merging block according to the number.

According to the seventh NVM bad block management method of the first aspect of the present application, there is provided an eighth NVM bad block management method of the first aspect of the present application, determining the first merged block and the second merged block according to the number, including: taking all merging blocks in a first large block with the maximum number of bad merging blocks and the specified number or all merging blocks comprising at least one good physical block as a second type merging block, and acquiring a first type merging block from other large blocks except the first large block in the storage device; or all the merged blocks in the second large blocks with the number larger than the preset threshold or all the merged blocks comprising at least one good physical block are taken as second merged blocks, and the first merged blocks are obtained from the merged blocks of other large blocks except the second large blocks in the storage device.

According to the method for managing the bad blocks of the NVM according to any one of the first to eighth aspects of the present application, there is provided the method for managing the bad blocks of the NVM according to the first aspect of the present application, wherein at least one first merged block is determined from the first merged blocks, and a second merged block corresponding to each first merged block is determined from the second merged blocks, the method comprising: for the merging block A of the first merging block, if one or more merging blocks B of a second merging block which are not allocated and are located in the same logic unit as the merging block A exist, the merging block B closest to the physical address of the merging block A is allocated to the merging block A, and the merging block A and the allocated merging block B are used as corresponding first merging block and second merging block.

According to the ninth NVM bad block management method of the first aspect of the present application, there is provided the tenth NVM bad block management method of the first aspect of the present application, further comprising: and regarding the merging block A of the first merging block, if the merging block B of the second merging block which is not distributed and is positioned in the same logic unit with the merging block A does not exist, taking the merging block of the large block where the merging block A is positioned as the second merging block.

According to the ninth or tenth NVM bad block management method of the first aspect of the present application, there is provided the eleventh NVM bad block management method of the first aspect of the present application, further comprising: for the merging block A of the first merging block, if one or more merging blocks B of a second merging block which are not allocated and located in the same plane with the merging block A in the same logic unit exist, the merging block B with the physical address closest to the merging block A is allocated to the merging block A, and the merging block A and the allocated merging block B are used as corresponding first merging block and second merging block.

According to the eleventh NVM bad block management method of the first aspect of the present application, there is provided the twelfth NVM bad block management method of the first aspect of the present application, further comprising: and regarding the merging block A of the first merging block, if no merging block B of a second merging block which is not allocated and is positioned in the same plane with the merging block A in the same logic unit exists, taking the merging block of the large block where the merging block A is positioned as the second merging block.

According to the method for managing the bad blocks of the NVM according to any one of the first to twelfth aspects of the present application, there is provided the method for managing the bad blocks of the NVM according to the thirteenth aspect of the present application, wherein at least one first merged block is determined from the first merged blocks, and a second merged block corresponding to each first merged block is determined from the second merged blocks, the method comprising: determining a plurality of third combined blocks and a first number thereof from the first combined blocks in the same Logic Unit (LUN) and a plurality of fourth combined blocks and a second number thereof from the second combined blocks according to the first information table, wherein the third combined blocks comprise good physical blocks and bad physical blocks, and the fourth combined blocks comprise good physical blocks or good physical blocks and bad physical blocks; and determining a first merging block and a second merging block according to the first quantity and the second quantity.

According to the thirteenth NVM bad block management method of the first aspect of the present application, there is provided a fourteenth NVM bad block management method of the first aspect of the present application, wherein the determining the first merged block and the second merged block according to the first number and the second number includes: if the first number is not larger than the second number, taking each third merging block as a first merging block, and taking a fourth merging block closest to each first merging block as a corresponding second merging block; or if the first number is larger than the second number, the fourth merging block is the most one second merging block, and the first merging block closest to the second merging block is the corresponding first merging block.

According to the fourteenth NVM bad block management method of the first aspect of the present application, there is provided the fifteenth NVM bad block management method of the first aspect of the present application, further comprising: if the first number is larger than the second number, determining that the at least one third merging block does not have a fifth merging block of the second merging block corresponding to the third merging block; and taking all the merging blocks in the row corresponding to the fifth merging block as a second type merging block.

The method for managing bad blocks of NVM according to any of the first to fifteenth aspects of the present application proposes the method for managing bad blocks of sixteenth NVM according to the first aspect of the present application, further comprising: adjusting the merging block type corresponding to each first merging block in the first information table from a primary merged bad merging block to a secondary merged good merging block to obtain a second information table; or generating a second information table, wherein each entry in the second information table contains information of the merged block merged twice, and the index of each entry in the second information table is the same as the index of the first merged block in the corresponding first information table.

The method for bad block management of NVM according to any of the third to sixteenth aspects of the present application proposes the method for bad block management of NVM according to the seventeenth aspect of the present application, further comprising: and generating a third information table according to the second information table and the association relation, wherein each entry in the third information table contains the source information of each physical block in the secondarily-merged good merging block.

According to the seventeenth NVM bad block management method of the first aspect of the present application, there is provided the eighteenth NVM bad block management method of the first aspect of the present application, wherein the source information includes at least one of the following information: in the two physical blocks forming the secondary combined good and combined block, the high bit of the information of each physical block forming the combined block of the combined block providing the first physical block indicates the good physical block, the low bit thereof indicates the bad physical block, and the high bit of the information of each physical block forming the combined block of the combined block providing the second physical block indicates the good physical block, the low bit thereof indicates the bad physical block; providing a low ratio of information of each physical block of the merged block of the first physical block, which constitutes the merged block, to indicate a good physical block and a high ratio to indicate a bad physical block, providing a low ratio of information of each physical block of the merged block of the second physical block, which constitutes the merged block, to indicate a bad physical block, and a high ratio to indicate a good physical block; providing a high bit of information of each physical block of the merged block of the first physical block to indicate a good physical block and a low bit to indicate a good physical block, providing a low bit of information of each physical block of the merged block of the second physical block to indicate a good physical block, and the high bit to indicate a bad physical block; the high bit providing information of each physical block constituting the merged block of the first physical block indicates a bad physical block and the low bit indicates a good physical block, and the high bit providing information of each physical block constituting the merged block of the second physical block indicates a bad physical block and the low bit indicates a good physical block.

According to the seventeenth or eighteenth NVM bad block management method of the first aspect of the present application, there is provided a nineteenth NVM bad block management method of the first aspect of the present application, further comprising: the second information table, the third information table, and the association relation are stored in a designated physical block of each Logical Unit (LUN).

According to the nineteenth NVM bad block management method of the first aspect of the present application, there is provided the twentieth NVM bad block management method of the first aspect of the present application, wherein the association relationship is stored in the form of an address mapping table.

According to the method for managing the bad blocks of the NVM according to any of the sixteenth to the twentieth aspects of the present application, there is provided the method for managing the bad blocks of the NVM according to the twenty-first aspect of the present application, wherein the information of the merged block corresponding to the first merged block in the second information table includes: the device comprises a marking bit, a type of a first merging block and a type of a second merging block corresponding to the first merging block, wherein the marking bit is used for marking whether a bad block in the first merging block can be replaced by the second merging block.

According to the twenty-first NVM bad block management method of the first aspect of the present application, there is provided a twenty-second NVM bad block management method of the first aspect of the present application, wherein the information of the merged block occupies 8 bits, wherein the flag bit occupies 1 bit, and the type of the second merged block and the type of the first merged block all occupy 3 bits.

According to a second aspect of the present application, there is provided a control unit according to the second aspect of the present application, comprising a processor and a memory, the memory storing program code, which when executed by the processor, performs the method for NVM bad block management according to any one of the first to twenty-second aspects of the present application.

According to a third aspect of the present application, there is provided a first method for processing an IO command according to the third aspect of the present application, including: receiving an I/O command sent by a host, and acquiring a merging block to be accessed by the I/O command; acquiring one or more physical blocks constituting a merged block; one or more physical blocks of the merged block are accessed in response to the I/O command.

According to the first method for processing an IO command of the third aspect of the present application, a second method for processing an IO command of the third aspect of the present application is provided, where a merge block includes a first-merged good merge block and a second-merged good merge block, where the first-merged good merge block is a merge block obtained by merging at least two good physical blocks at a time, and the first-merged good merge block is a good physical block in which all physical blocks are good physical blocks; the good merging block of the second merging refers to a merging block obtained by merging a first merging block and a good physical block in a second merging block corresponding to the first merging block, all physical blocks of the good merging block of the second merging are good physical blocks, the first merging block and the second merging block are merging blocks of the first merging, the first merging block at least comprises a bad physical block, the second merging block at least comprises a good physical block, and the good physical block in the second merging block can replace the bad physical block in the first merging block to perform data storage.

According to the first or second method for processing an IO command of the third aspect of the present application, there is provided a third method for processing an IO command of the third aspect of the present application, where acquiring one or more physical blocks constituting a merged block includes: judging whether the merging block is a good merging block for primary merging or a good merging block for secondary merging; and if the merging block is a good merging block merged at one time, determining one or more physical blocks in the good merging block merged at one time according to the number or the index of the good merging block merged at one time.

According to the third method for processing an IO command of the third aspect of the present application, a fourth method for processing an IO command of the third aspect of the present application is provided, which further includes: and if the merged block is a good merged block which is merged twice, querying a third information table to obtain a good physical block corresponding to the good merged block which is merged twice, wherein each entry in the third information table contains the source information of each physical block in the good merged block which is merged twice.

According to a fifth aspect of the present invention, there is provided a method for processing an IO command, the method for accessing a storage device according to the sixth aspect of the present invention, wherein if the I/O command is a read command or a write command, one physical block of the merged block is accessed in response to the I/O command.

According to the fourth or fifth method for processing an IO command of the third aspect of the present application, a method for processing an IO command of the sixth aspect of the present application is provided, where if the I/O command is an erase command, all physical blocks of the merged block are erased to respond to the I/O command.

According to the fourth or fifth method for processing an IO command of the third aspect of the present application, a seventh method for processing an IO command of the third aspect of the present application is provided, further including: receiving a write command sent by a host, selecting a merging block from unallocated merging blocks, and allocating a storage space corresponding to the merging block to the write command; and writing data into the storage space according to the write command.

According to a seventh method for processing an IO command of the third aspect of the present application, there is provided an eighth method for processing an IO command of the third aspect of the present application, where allocating a storage space corresponding to the merge block to the write command includes: identifying whether the merging block is a good merging block of secondary merging; if yes, the source information of each physical block in the merged block is obtained by inquiring a third information table, and the storage space corresponding to part or all of the physical blocks in the merged block is allocated to the write command according to the source information.

According to the fourth or eighth method for processing an IO command of the third aspect of the present application, a ninth method for processing an IO command of the third aspect of the present application is provided, where a read command sent by a host is received, and a physical address of a physical block corresponding to a logical block address carried in the read command is queried according to an FTL table; and reading data from the physical block corresponding to the physical address according to the read command, and sending the data to the host.

According to a fourth aspect of the present application, there is provided a first method for processing an IO command according to the fourth aspect of the present application, including: receiving a write command sent by a host; selecting a merging block from the merging blocks which are not fully written; allocating storage space from the selected merge block; writing the data corresponding to the write command into the allocated storage space; and recording the logical block address corresponding to the write command and the physical address of the allocated storage space.

According to the first method for processing IO commands of the fourth aspect of the present application, there is provided the second method for processing IO commands of the fourth aspect of the present application, further comprising: receiving a read command sent by a host; inquiring a physical address corresponding to the logical block address accessed by the read command; and reading data from the storage space corresponding to the physical address in response to the read command.

According to the fourth aspect of the present application, there is provided a method for processing an IO command according to the third aspect of the present application, wherein the allocating a storage space from the selected merge block includes, if the selected merge block is a good merge block for one merge, determining one or more physical blocks according to the selected merge block number; if the selected merging block is a good merging block for secondary merging, inquiring an information table to determine one or more physical blocks; the storage space is allocated from the one or more physical blocks.

According to a third method for processing an IO command of the fourth aspect of the present application, there is provided the fourth method for processing an IO command of the fourth aspect of the present application, wherein the information table is queried according to the block number of the selected merge block, and it is determined whether the selected merge block is a good merge block of the first merge or a good merge block of the second merge.

According to one of the first to fourth methods for processing an IO command in the fourth aspect of the present application, there is provided the fifth method for processing an IO command in the fourth aspect of the present application, wherein the merge block includes a first-merged good merge block and a second-merged good merge block, where the first-merged good merge block is a merge block obtained by merging at least two good physical blocks at a time, and the first-merged good merge block is a good physical block in which all the physical blocks are good physical blocks; the good merging block of the second merging refers to a merging block obtained by merging a first merging block and a good physical block in a second merging block corresponding to the first merging block, all physical blocks of the good merging block of the second merging are good physical blocks, the first merging block and the second merging block are merging blocks of the first merging, the first merging block at least comprises a bad physical block, the second merging block at least comprises a good physical block, and the good physical block in the second merging block can replace the bad physical block in the first merging block to perform data storage.

According to a fifth aspect of the present application, there is provided a control unit according to the fifth aspect of the present application, comprising a processor and a memory, the memory storing program code, which, when executed by the processor, performs the method of any one of the third and fourth aspects for accessing a storage device.

Compared with the prior art, the scheme provided by the embodiment of the application has at least the following beneficial effects:

1. in the solution provided in the embodiment of the present application, the control unit records information of a merged block obtained by merging at least two physical blocks in each entry of the first information table, which means that the control unit can record information of a plurality of physical blocks in each entry of the first information table, so that the control unit can consume as little storage resources as possible to store the physical block information.

2. The control component records information of the merged block which is merged once, also records an incidence relation of a first physical address of a bad physical block in the first merged block and a second physical address of a good physical block in the second merged block corresponding to the bad physical block, merges the good physical block in the first merged block and the good physical block in the second merged block according to the incidence relation to obtain a good physical block which is merged twice, and constructs a logical block space which does not contain the bad physical block and has continuous addresses under the condition that the NVM chip has natural bad physical blocks so as to be convenient for upper layer use and further improve the performance of the storage device.

Drawings

In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings needed to be used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments described in the present application, and other drawings can be obtained by those skilled in the art according to the drawings.

FIG. 1 illustrates a block diagram of a prior art storage device;

FIG. 2 illustrates a detailed block diagram of a control component of the storage device;

FIG. 3A shows a schematic of a prior art bulk configuration;

FIG. 3B shows a schematic diagram of a logic cell and Plane (Plane);

FIG. 4A shows a schematic structural diagram of a first information table of the present application;

FIG. 4B shows a flowchart of the NVM bad block management method of the present application;

FIG. 4C illustrates a schematic diagram of a first binning block and a second binning block of the present application;

FIG. 5A illustrates a schematic diagram of a first binning block and a second binning block within the same logic cell of the present application;

FIG. 5B illustrates a schematic diagram of a first binning block and a second binning block within yet another same logic cell of the present application;

FIG. 5C illustrates a schematic diagram of a first binning block and a second binning block in the same plane of the same logic cell of the present application;

FIG. 5D illustrates a schematic diagram of a first binning block and a second binning block in the same plane of yet another same logic cell of the present application;

FIG. 5E shows a schematic diagram of the second merge of the present application resulting in a second merged good merge block;

FIG. 5F shows a schematic diagram of another double merge of the present application resulting in a double merged good merge block;

FIG. 5G shows a schematic diagram of another double merge of the present application resulting in a double merged good merge block;

FIG. 6A shows a schematic diagram of a second table of information of the present application;

FIG. 6B is a schematic diagram of a second information table according to the present application;

fig. 6C is a schematic diagram illustrating information of a merge block corresponding to a first merge block in a second information table of the present application;

fig. 6D shows a schematic structural diagram in a third information table provided in the embodiment of the present application;

FIG. 7 is a flowchart illustrating another method for managing bad blocks of an NVM according to an embodiment of the present application.

FIG. 8A is a flow chart illustrating a method for accessing a storage device according to the present application;

FIG. 8B is a diagram illustrating a response to a read command according to an embodiment of the present disclosure;

FIG. 8C is a diagram illustrating a response to a write command according to an embodiment of the present application;

FIG. 8D is a diagram illustrating a response to a read command according to an embodiment of the present application;

FIG. 8E shows a schematic diagram of a response to an erase command according to an embodiment of the present application;

FIG. 9A shows a schematic diagram of responding to a write command as provided by yet another embodiment of the present application;

FIG. 9B shows a schematic diagram of responding to a read command according to another embodiment of the present application;

fig. 10 shows a schematic structural diagram of a control unit of the present application.

Detailed Description

The technical solutions in the embodiments of the present application are clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are some, but not all, embodiments of the present application. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.

Fig. 4A shows a schematic structural diagram of a first information table provided in the embodiment of the present application.

For example, the index of the merged block corresponding to each entry in the first information table may be a block number of the merged block, or a physical address of the merged block on the NVM chip; the merge block corresponding to each entry in the first information table may be composed of two or more physical blocks. The first information table shown in fig. 4A is constructed with the block number of the index as the merge block and each merge block containing two physical blocks (a first physical block and a second physical block).

As shown in fig. 4A, the first information table includes 3 entries, which are entry 0, entry 1 and entry 2, and each entry includes an index of a merge block, a type of the merge block, and information of each physical block in the merge block, where a block number of the merge block corresponding to entry 0 is 0, the type of the merge block is a good merge block of one merge, a physical block 0-0 indicated by a high bit in each piece of physical information in the merge block is a good physical block, and a physical block 0-1 indicated by a low bit in each piece of physical information in the merge block is also a good physical block; the block number of the merging block corresponding to the entry 1 is 1, the type of the merging block is a bad merging block which is merged at one time, a physical block 1-0 indicated by high bits in each physical information in the merging block is a bad physical block, and a physical block 1-1 indicated by low bits is also a bad physical block; the block number of the merging block corresponding to the entry 2 is 2, the type of the merging block is a bad merging block of one merging, a physical block 2-0 indicated by a high bit in each physical information in the merging block is a good physical block, and a physical block 2-1 indicated by a low bit is also a bad physical block. It should be understood that the physical block merge referred to in the embodiments of the present application does not refer to physical merge, but refers to an operation unit corresponding to data read/write/erase operations. For example, in response to an erase command, all physical blocks of the merged block are erased simultaneously. There are various ways to compose a merged block of a merge, including but not limited to: the system comprises physical blocks adjacent to at least two physical addresses in the same LUN and/or plane (plane); or physical blocks with at least two physical addresses in multiple planes of the same Logical Unit (LUN).

According to an embodiment of the present application, referring also to fig. 4A, a plurality of entries of the first information table record information of all once-merged blocks of the NVM (also referred to as once-merged block information).

Further, the types of physical blocks in the storage device include good physical blocks and bad physical blocks, wherein the good physical blocks refer to physical blocks capable of performing operations such as data read/write/erase, and the bad physical blocks are identified in a known or future generated manner. Since there are two types of physical blocks, there are various forms of a type of a once-merged block composed of at least two physical blocks. For example, taking the example that each merged block of one merge contains two physical blocks, the composition of the merged block of one merge includes two bad physical blocks, two good physical blocks, or one bad physical block and one good physical block. As an example, a merged block of one merging composed of all good physical blocks is referred to as a merged good block of one merging, and a merged block of one merging including a bad physical block is referred to as a bad merged block. Bad merge blocks again contain two cases: all physical blocks are bad physical blocks or comprise good physical blocks and bad physical blocks. As an example, a bad block is a bad block, and a bad block including a good block and a bad block is a bad block of the second type.

As another example, the merge block information of one merge includes: the type of the merging block which is merged at one time and the information of each physical block which forms the merging block, wherein the type of the merging block comprises a good merging block and a bad merging block which are merged at one time, and the bad merging block comprises a first type bad merging block and a second type bad merging block.

Further, in the solution provided in this embodiment of the present application, when the control unit stores the first information table, the information of each physical block constituting the merged block in each entry occupies a plurality of bits, the number of bits is the same as the number of physical blocks included in each merged block, and each bit stores information of one physical block. For example, taking the example that each merged block includes two physical blocks, the information of each physical block constituting the merged block in each entry occupies 2 bits, and each bit stores the information of one physical block. Since the physical block includes two cases, namely, good and bad, the information (2 bits) of each physical block constituting the bad merged block composed of two physical blocks includes the following two forms: the high bit indicates the good physical block and the low bit indicates the merging block of the bad physical block, or the high bit indicates the bad physical block and the low bit indicates the merging block of the good physical block, wherein the high bit and the high bit refer to the high bit and the high bit of two bits occupied by the information of each physical block constituting the merging block.

Fig. 4B shows a flowchart of a NVM bad block management method according to an embodiment of the present application. The flow illustrated in FIG. 4B is performed to build the merge block, for example, on a manufacturing line where the memory device is manufactured, or when the memory device is powered up.

In step 401, the control unit scans the physical blocks in each Logical Unit (LUN) to generate a first information table.

For example, the control component scans the bad block table of each LUN that stores bad block (physical block) information, and optionally identifies good blocks and bad blocks by accessing the physical blocks, and generates a first information table as illustrated in fig. 4A for each LUN. Alternatively, the first information table is recorded at the start position of the 0-number union block of each LUN.

Step 402, the control unit obtains the first merge block and the corresponding second merge block according to the first information table.

Specifically, the information of all the merged blocks of the NVM, which are merged once, recorded in the first information table includes information of good merged blocks (each physical block constituting the merged block is a good physical block) and information of bad merged blocks (a bad physical block exists in the physical blocks constituting the merged block) which are merged once, that is, the merged blocks which are merged once may also have bad merged blocks which cannot be used, so that all the merged blocks can be used or as many merged blocks as possible can be used in constructing a large block on the NVM. By way of example, some of the once-merged blocks in the NVM (the merged block having at least the good physical block and the merged block having at least the bad physical block) may be twice merged to obtain a twice-merged good merged block that can be used.

Further, in order to obtain a good merge block of the second merge that can be used in the second merge, it is necessary to select a merge block (a first merge block and a second merge block) that can be subjected to the second merge from all merge blocks of the first merge.

In the solution provided in the embodiment of the present application, there are various ways for the control component to determine the first merging block and the second merging block corresponding to the secondary merging, and for example, the control component determines the first merging block and the second merging block according to the first information table, determines at least one first merging block from the first merging blocks, and determines the second merging block corresponding to each first merging block from the second merging blocks. The first merge block refers to a merge block of one merge including a bad physical block, for example, the first merge block is a bad physical block in which part or all of the physical blocks are bad physical blocks; the second merge block refers to a merge block that includes a good physical block and is merged at one time, and the good physical block can replace a bad physical block in the first merge block for data storage, for example, the second merge block is a good physical block of all or part of the physical blocks. The processor divides the merged blocks which are merged once into two types according to the types of the merged blocks in the first information table and the physical block information for forming the merged blocks, wherein the two types are respectively a first type merged block and a second type merged block, the first type merged block is different from the second type merged block, the first type merged block comprises the first merged block, and the second type merged block comprises the second merged block.

Further, there are various ways for the control unit to determine the first type of binning block and the second type of binning block, in order to make it possible to construct large blocks on the NVM that all binning blocks can be used, or that as many binning blocks can be used as possible, while as few large blocks are disassembled to provide good physical blocks for other large blocks. In a possible implementation manner, the control component determines the number of bad merging blocks in each large block of the storage device according to the first information table, and determines the first type merging block and the second type merging block according to the number of bad merging blocks in each large block.

Optionally, the control component takes all the merged blocks in the first large blocks with the maximum number of bad merged blocks and the specified number of the merged blocks or all the merged blocks including at least one good physical block as second type merged blocks, and obtains the first type merged blocks from the merged blocks of other large blocks in the storage device except the first large blocks; or all the merged blocks in the second large blocks with the number larger than the preset threshold or all the merged blocks comprising at least one good physical block are taken as second merged blocks, and the first merged blocks are obtained from the merged blocks of other large blocks except the second large blocks in the storage device.

Specifically, the control unit determines the number of bad merged blocks in each large block, and then selects a first large block from all large blocks according to the number of bad merged blocks in each large block, where the first large block includes but is not limited to: and selecting the large blocks with the maximum number of bad merging blocks in all the large blocks, wherein the number of the bad merging blocks in all the large blocks is larger than the specified number of the large blocks or the large blocks are sorted according to the number of the bad merging blocks, and the specified number of the large blocks are selected from the sequence. The control section acquires the second-type merged block from the first large block and acquires the first-type merged block from all the merged blocks except the first large block, for example, by regarding all the merged blocks except the first large block as the first-type merged block or by selecting a merged block containing at least a bad physical block from all the merged blocks except the first large block as the first-type merged block.

Fig. 4C is a schematic diagram illustrating a first type merge block and a second type merge block in a storage device according to an embodiment of the present application.

According to embodiments of the present application, a large block includes multiple merged blocks from individual LUNs. By way of example, each merge block belonging to the same chunk has the same block address or merge block number.

As shown in fig. 4C, large block 0 includes a merged block 0 (composed of, for example, physical block 0 and physical block 1) from each of the 16 logical units, large block 1 is composed of a merged block 1 (composed of, for example, physical block 2 and physical block 3) from each logical unit, large block 2 is composed of a merged block 2 (composed of, for example, physical block 4 and physical block 3) from each logical unit, and large block N includes a merged block N (composed of, for example, physical block 2N and physical block 2N + 1) from each logical unit. And if the large block N is the large block with the largest number of bad merging blocks in all the large blocks, acquiring a second type of merging block from the large block N, and acquiring a first type of merging block from the large blocks 0-1.

Further, in the solution provided in this embodiment of the present application, the control unit determines at least one first merged block from the first merged blocks and determines a second merged block corresponding to each first merged block from the second merged blocks in various ways, including but not limited to:

in one possible implementation, for a merge block a of a first merge block, if there are one or more merge blocks B of a second merge block that are not allocated and are in the same logical unit as the merge block a, the control section allocates the merge block B closest to the physical address of the merge block a to the merge block a, and treats the merge block a and the allocated merge block B as corresponding first and second merge blocks.

Fig. 5A is a schematic diagram of a first merge block and a second merge block in the same logic unit according to an embodiment of the present application.

As shown in FIG. 5A, there exists merge block A of the first type of merge block and merge blocks B1 and B2 of the second type of merge block in logical unit LUN0, where merge block A contains a bad physical block, merge block B1 and merge block B2 each contain a good physical block, and neither merge block B1 nor merge block B2 is allocated the first merge block corresponding thereto. If the distance between merge block B1 and merge block a in LUN0 is smaller than the distance between merge block B2 and merge block a, merge block a is used as the first merge block and merge block B1 is used as the second merge block corresponding thereto. Where "distance" refers to the distance between the actual physical locations or addresses of the NVM chips in merge block a and merge block B1.

In yet another possible implementation, the control unit regards, for the merge block a of the first merge block, the merge block of the large block where the merge block a is located as the second merge block if there is no merge block B of the second merge block that is not allocated and is located in the same logical unit as the merge block a.

Fig. 5B is a schematic diagram of a first merge block and a second merge block in the same logic unit according to an embodiment of the present application.

As shown in fig. 5B, merge blocks a1, a2, and A3 of a first type of merge block and merge blocks B1 and B2 of a second type of merge block exist in logical unit LUN0, where merge blocks a1, a2, and A3 contain bad physical blocks, merge block B1 and merge block B2 each contain good physical blocks, merge block B1 is allocated to first merge block a1 corresponding thereto, merge block B2 is allocated to first merge block a2 corresponding thereto, that is, all merge blocks of the second type in LUN0 are allocated, no unallocated merge block of the second type exists, and for merge block A3 that does not match the second type of merge block, merge blocks (including good physical blocks) of the large block where merge block A3 is located are all used as the second type of merge block to provide good physical blocks for other first type of merge blocks.

In still another possible implementation, the control section assigns, for a merge block a of the first kind of merge block, if there are one or more merge blocks (B1, B2) of a second kind of merge block that are not assigned and that are in the same plane as the merge block a within the same logical unit, a merge block B1 that is closest to the physical address of the merge block a to the merge block a, and treats the merge block a and the assigned merge block B1 as corresponding first and second merge blocks.

Fig. 5C shows a schematic diagram of a first binning block and a second binning block in the same plane of the same logic unit according to the embodiment of the present application.

As shown in FIG. 5C, multiple planes (planes), each PL0 … PLN, are included in logical unit LUN 0. If PL0 includes merge blocks a1 and a2 of a first type of merge block and merge blocks B1 and B2 of a second type of merge block, where merge blocks a1 and a2 include bad physical blocks, merge blocks B1 and merge block B2 each include good physical blocks, and merge block B1 and merge block B2 are not allocated a corresponding first merge block, if merge block B1 is closer to merge block a1 than merge block B2 is closer to merge block a1, merge block a1 is used as the first merge block, merge block B1 is used as the corresponding second merge block, merge block B2 closest to merge block a1 is used as the corresponding second merge block, that is, all merge blocks of the second type in PL0 are not allocated, and there is no second type of merge block that is allocated.

In yet another possible implementation, the control unit regards, for the merge block a of the first merge block, the merge block of the large block where the merge block a is located as the second merge block if there is no merge block B of the second merge block that is not allocated and is in the same plane as the merge block a in the same logical unit. So that merge block a and other merge blocks of the chunk in which merge block a is located may be assigned to other chunks of the merge block as a second type of merge block.

Fig. 5D is a schematic diagram of a first merge block and a second merge block in the same plane of the same logic unit according to an embodiment of the present application.

As shown in FIG. 5D, logical unit LUN0 includes multiple planes (planes), which are respectively Plane 0(PL0) … and Plane N (PLN). If there are merge blocks a1, a2 and A3 of the first type of merge block and merge blocks B1 and B2 of the second type of merge block in PL0, where merge blocks a1, a2 and A3 contain bad physical blocks, merge block B1 and merge block B2 each contain good physical blocks, merge block B1 is assigned to the first merge block a1 corresponding thereto, merge block B2 is assigned to the first merge block a2 corresponding thereto, that is, all the merge blocks of the second type in PL0 are assigned, there is no unassigned merge block of the second type, and for merge block A3 there is no match block of the second type, the merge block of the large block in which merge block A3 is located is taken as the merge block of the second type.

In yet another possible implementation, the control component determines a plurality of third merged blocks and a first number thereof from the first merged blocks and a plurality of fourth merged blocks and a second number thereof from the second merged blocks in the same Logical Unit (LUN) according to the first information table, respectively, wherein the third merged blocks include good physical blocks and bad physical blocks, and the fourth merged blocks include good physical blocks or good physical blocks and bad physical blocks; and determining a first merging block and a second merging block according to the first quantity and the second quantity.

In yet another possible implementation manner, if the first number is not greater than the second number, the control component takes each third merge block as a first merge block, and takes a fourth merge block closest to each first merge block as its corresponding second merge block; or if the first number is larger than the second number, the control part takes each fourth merging block as the second merging block, and takes the first merging block closest to each second merging block as the corresponding first merging block.

In yet another possible implementation manner, if the first number is greater than the second number, the control component determines that there is no fifth merge block of the at least one third merge block corresponding to the second merge block; and taking all the merging blocks in the row corresponding to the fifth merging block as a second type merging block.

In step 403, the control unit determines and records the association relationship between the first physical address of the bad physical block in the first merged block and the second physical address of the good physical block in the second merged block corresponding to the first physical address.

Specifically, the control component determines a first physical address of a bad physical block in each first merged block and a second physical address of a good physical block in a corresponding second merged block, and records an association relationship between the first physical address and the second physical address. After the control component records the incidence relation between the first physical address and the second physical address, the control component can merge the first merging block and the good physical block in the second merging block corresponding to the first merging block according to the incidence relation to obtain a second merged good merging block; and the number of the physical blocks of the secondary combined good combining block is the same as that of the combining block, and all the physical blocks of the secondary combined good combining block are good physical blocks.

Further, two situations exist in the bad merged block of one merging: the first case is that all physical blocks constituting the merged block are bad blocks; the second case is that some of all the physical blocks constituting the merged block are bad blocks and some of the physical blocks are good blocks. As an example, for a first case bad merge block, that is, all physical blocks in the first merge block are bad physical blocks, a first merged good merge block may be selected from the first large block as a second merge block, all good physical blocks in the second merge block are replaced with all bad physical blocks in the first merge block to obtain a second merged good merge block, or a first merged bad merge block including at least one good physical block is selected from the first large block as a second merge block, and good physical blocks in the second merge blocks are replaced with all bad physical blocks in the first merge block to obtain a second merged good merge block; for the second bad merge block, that is, the first merge block includes a good physical block and a bad physical block, the good merge block which is merged once or the bad merge block which includes the good physical block and the bad physical block which is merged once can be selected from the first large block as the second merge block, and the good physical block in the second merge block and the bad physical block of the first merge block are replaced to obtain the good merge block which is merged twice.

Fig. 5E shows a schematic diagram of a good merge block obtained by twice merging according to the embodiment of the present application. The schematic diagram of obtaining the twice-merged good merged block shown in fig. 5E is performed when, for example, the first merged block is a block including a good physical block and a bad physical block, and the second merged block is a block including a good physical block and a bad physical block.

As shown in fig. 5E, plane 0(PL0) includes four merging blocks of one merging, which are merging block 0, merging block 1, merging block 2, and merging block 3, where merging block 0 and merging block 1 are bad merging blocks of one merging, merging block 2 and merging block 3 are good merging blocks of one merging, merging block 0 includes bad physical blocks 0-0 and good physical blocks 0-1, and merging block 1 includes bad physical blocks 1-0 and good physical blocks 1-1. And when the merging block 0 is a first merging block and the merging block 1 is a second merging block, replacing the bad physical block 0-0 in the merging block 0 with the good physical block 1-1 in the merging block 1 to obtain a secondary merged good merging block, wherein the secondary merged good merging block comprises the physical block 0-1 and the physical block 1-1.

Fig. 5F is a schematic diagram of another two-time combination method provided in this embodiment of the present application to obtain a two-time combined good combination block. For example, when the first merged block includes a good physical block and a bad physical block, and the second merged block includes all the physical blocks that are good physical blocks, the method shown in fig. 5F is performed to obtain a schematic diagram of a good merged block for the second merging.

As shown in fig. 5F, plane 0(PL0) includes four merging blocks of one merging, namely merging block 0, merging block 1, merging block 2, and merging block 3, where merging block 0 and merging block 1 are bad merging blocks of one merging, merging block 2 and merging block 3 are good merging blocks of one merging, merging block 0 includes bad physical blocks 0-0 and good physical blocks 0-1, and merging block 2 includes good physical blocks 2-0 and good physical blocks 2-1. And when the merging block 0 is a first merging block and the merging block 2 is a second merging block, replacing the bad physical block 0-0 in the merging block 0 with the good physical block 2-0 in the merging block 2 to obtain a secondary merged good merging block, wherein the secondary merged good merging block comprises a physical block 0-1 and a physical block 2-0.

Fig. 5G shows a schematic diagram of a second merging to obtain a second merged good merging block according to another embodiment of the present application. For example, if the first merged block includes all the physical blocks that are bad physical blocks, and the second merged block includes all the physical blocks that are good physical blocks, the schematic diagram of obtaining the good merged block for the second merging shown in fig. 5E is executed.

As shown in fig. 5F, plane 0(PL0) includes four merging blocks of one merging, namely merging block 0, merging block 1, merging block 2, and merging block 3, where merging block 0 and merging block 1 are bad merging blocks of one merging, merging block 2 and merging block 3 are good merging blocks of one merging, merging block 0 includes bad physical blocks 0-0 and bad physical blocks 0-1, and merging block 2 includes good physical blocks 2-0 and good physical blocks 2-1. And when the merging block 0 is a first merging block and the merging block 2 is a second merging block, replacing the bad physical block 0-0 and the bad physical block 0-1 in the merging block 0 with the good physical block 2-0 and the good physical block 2-1 in the merging block 2 to obtain a secondary merged good merging block, wherein the secondary merged good merging block comprises the physical block 2-0 and the physical block 2-1.

Further, after the merged block of the second merging is obtained, in order to record the information of the merged block of the second merging, the control component adjusts the merged block type corresponding to each first merged block in the first information table from the bad merged block of the first merging to the good merged block of the second merging to obtain a second information table; or generating a second information table, wherein each entry in the second information table contains information of the merged block merged twice, and the index of each entry in the second information table is the same as the index of the first merged block in the corresponding first information table. For example, the information of the merged block twice merged in the second information table may include only the type of the merged block twice merged, or may include both the type of the merged block twice merged and the information (source and/or physical address) of each physical block constituting the merged block twice merged.

Fig. 6A shows a schematic structural diagram of a second information table provided in the embodiment of the present application.

The second information table shown in fig. 6A is constructed by adding an information entry of at least one twice-merged block in the first information table and information of the twice-merged block in the second information table contains only the type of the twice-merged block. As shown in fig. 6A, the first information table includes 5 entries, which are entry 0, entry 1, entry 2, and entry 3, where entry 0, entry 1, and entry 2 contain merged block information of a primary merged block, and entry 3 contains merged block information of a secondary merged block, where information of each physical block in the merged block is 2 bits, and each bit indicates information of one physical block. Specifically, the block number of the merge block corresponding to entry 0 is 0, the type of the merge block is a good merge block of one-time merge, the good merge block includes a physical block 0-0 indicated by a high bit and a physical block 0-1 indicated by a low bit, and both physical block 0-0 and physical block 0-1 are good physical blocks; the block number of the merging block corresponding to the entry 1 is 1, the type of the merging block is a bad merging block which is merged at one time, the bad merging block comprises a physical block 1-0 indicated by a high bit and a physical block 1-1 indicated by a low bit, the physical block 1-0 is a good physical block, and the physical block 1-1 is a bad physical block; the block number of the merged block corresponding to the entry 2 is 2, the type of the merged block is a bad merged block of one merging, the bad merged block comprises a physical block 2-0 indicated by a high bit and a physical block 2-1 indicated by a low bit, the physical block 2-0 is a good physical block, and the physical block 2-1 is a bad physical block.

Further, in fig. 6A, the primary merged bad merge block corresponding to the entry 1 is the first-type merge block, the primary merged bad merge block corresponding to the entry 2 is the second-type merge block, and the primary merged bad merge blocks corresponding to the entry 1 and the entry 2 are merged (the physical block 2-0 corresponding to the entry 2 replaces the physical block 1-1 corresponding to the entry 1) to obtain a secondary merged good merge block. And adding a target to the first information table to record a second information table. The index (block number 1) of the merged block indicated by entry 1 in the second-order contract as the first-order merged block is taken as the index of the entry of the second information table, the type of the merged block in the entry of the second information table is taken as a second-order merged good merged block, and the information of each physical block of the merged block of the target is taken as a good merged block.

Alternatively, the second information table is generated by modifying the entry in the first information table, for example, the type of the merged block of the entry indexed to block number 1 in the first information table is updated to a good merged block of the second merging, while the other information is not changed.

Fig. 6B shows a schematic structural diagram of another second information table provided in the embodiment of the present application.

The second information table shown in fig. 6B is constructed by generating a separate second information table to record the secondarily merged merging block information, and the information of the secondarily merged merging block in the second information table contains only the type of the secondarily merged merging block.

For example, in the first information table, the merged block corresponding to entry 0 is a bad merged block of one merging, the index is block number 0, the included physical blocks are physical blocks 0-0 (bad physical block) indicated by high bits and physical blocks 0-1 (good physical block) indicated by low bits, the merged block corresponding to entry 1 is a bad merged block of one merging, the index is block number 1, and the included physical blocks are physical blocks 1-0 (good physical block) indicated by high bits and physical blocks 1-1 (bad physical block) indicated by low bits. If the primary merged bad merge block corresponding to the entry 0 is the first-type merge block and the primary merged bad merge block corresponding to the entry 1 is the second-type merge block, merging the entry 0 in the first information table and the primary merged bad merge block corresponding to the entry 1 to obtain the second information table shown in fig. 6B. Entry 0 is included in the second information table; the index corresponding to the entry 0 in the second information table is the same as the index corresponding to the entry 0 in the first information table, the entry 0 in the second information table contains a good merged block obtained by secondary merging, and all physical blocks in the good merged block obtained by secondary merging are good physical blocks.

Optionally, in fig. 6B, the index of the entry of the first information table is the position of the entry in the first information table, and the position corresponds to the block number of the merging block represented by the entry in a one-to-one manner. And the index of the entry of the second information table is the block number of the merging block represented by the entry, and the entry is provided only for the good merging block of the second merging in the second information table, but not for the bad merging block of the second merging.

Fig. 6C is a schematic diagram illustrating information of a merge block corresponding to a first merge block in a second information table according to an embodiment of the present application.

As shown in fig. 6C, the merging block information of any first merging block occupies 8 bits, and is sequentially a flag bit, a type of the second merging block, and a type of the first merging block, where the flag bit occupies 1 bit, and the type of the second merging block and the type of the first merging block both occupy 3 bits. The 3 bits occupied by the type of the first merged block and the type of the second merged block may be continuous 3 bits or separate 3 bits, which is not limited herein.

Further, after the first merge block and the second merge block are merged to obtain the second merged good merge block, the control component may further generate a third information table according to the second information table and the association relationship, where the third information table includes a plurality of entries, where each entry includes source information of each physical block in the second merged good merge block.

Fig. 6D shows a schematic structural diagram in a third information table provided in the embodiment of the present application.

The third information table shown in fig. 6D is constructed by generating a separate second information table to record the information of the secondarily merged combined block, the information of the secondarily merged combined block in the second information table containing only the type of the secondarily merged combined block. For example, in the first information table, the merged block corresponding to entry 0 is a bad merged block of one merging, the index is block number 0, the included physical blocks are physical blocks 0-0 (bad physical block) indicated by high bits and physical blocks 0-1 (good physical block) indicated by low bits, the merged block corresponding to entry 1 is a bad merged block of one merging, the index is block number 1, and the included physical blocks are physical blocks 1-0 (good physical block) indicated by high bits and physical blocks 1-1 (bad physical block) indicated by low bits. If the primary merged bad merge block corresponding to the entry 0 is a first type merge block and the primary merged bad merge block corresponding to the entry 1 is a second type merge block, merging the entry 0 in the first information table and the primary merged bad merge block corresponding to the entry 1 to obtain the entry 0 in the second information table, wherein the merge block corresponding to the entry 0 in the second information table is a secondary merged good merge block, the index is block number 0, and all physical blocks corresponding to the merge block are good physical blocks. And obtaining a third information table according to the information of the good physical block in the first merged bad merge block corresponding to the entry 0 and the entry 1 in the first information table, wherein the third information table includes the entry 0, the index of the entry 0 is block number 0, and the source information of each physical block in the merge block refers to the source of the second merged good merge block corresponding to the entry 0 in the second information table, that is, the physical block in the second merged good merge block corresponding to the entry 0 in the second information table is from the physical block (physical block 0-1) indicated by the low bit in the first merged bad merge block with block number 0 and the physical block (physical block 1-0) indicated by the high bit in the first merged bad merge block with block number 1.

In one possible implementation, the source information includes at least one of: in the two physical blocks forming the secondary combined good and combined block, the high bit of the information of each physical block forming the combined block of the combined block providing the first physical block indicates the good physical block, the low bit thereof indicates the bad physical block, and the high bit of the information of each physical block forming the combined block of the combined block providing the second physical block indicates the good physical block, the low bit thereof indicates the bad physical block; providing a low ratio of information of each physical block of the merged block of the first physical block, which constitutes the merged block, to indicate a good physical block and a high ratio to indicate a bad physical block, providing a low ratio of information of each physical block of the merged block of the second physical block, which constitutes the merged block, to indicate a bad physical block, and a high ratio to indicate a good physical block; providing a high bit of information of each physical block of the merged block of the first physical block to indicate a good physical block and a low bit to indicate a good physical block, providing a low bit of information of each physical block of the merged block of the second physical block to indicate a good physical block, and the high bit to indicate a bad physical block; the high bit providing information of each physical block constituting the merged block of the first physical block indicates a bad physical block and the low bit indicates a good physical block, and the high bit providing information of each physical block constituting the merged block of the second physical block indicates a bad physical block and the low bit indicates a good physical block.

Specifically, in the scheme provided in the embodiment of the present application, several scenarios for generating the quadratic merging good merging block may be expressed by different statements. For example, RPL _ LOW ═ 1 indicates that the twice-merged good merged block is merged by a first merged block whose lower bits are good physical blocks and a second merged block whose lower bits are good physical blocks; RPL _ LOW _ UP ═ 2 denotes that the twice-merged good merged block is merged by a first merged block whose lower bits are good physical blocks and a second merged block whose upper bits are good physical blocks; RPL _ UP _ LOW ═ 3 indicates that the twice-merged good merged block is merged by a first merged block whose upper bits are good physical blocks and a second merged block whose lower bits are good physical blocks; RPL _ UP ═ 4 denotes that the twice-merged good merged block is merged by a first merged block whose upper bits are good physical blocks and a second merged block whose upper bits are good physical blocks.

Further, the control means stores the second information table, the third information table, and the association corresponding to each logical unit in a designated physical block of each Logical Unit (LUN) after generating the first information table, the second information table, the third information table, and the association. For example, the specified physical block may be the first physical block in each logical unit.

In the solution provided in the embodiment of the present application, there are various ways of storing the association relationship, including but not limited to storing in the form of an address mapping table.

FIG. 7 is a flowchart illustrating another method for managing bad blocks of an NVM according to an embodiment of the present application. The flow illustrated in fig. 7 is performed to build the merge block, for example, on a production line where the memory device is manufactured, or when the memory device is powered up.

In step 701, the control unit scans the NVM chips of the storage device to construct a Reserved Block pool (Reserved Block pool). Specifically, the control component scans each physical block in an NVM chip of the storage device, determines a condition of a merged block in each large block in the NVM chip (the number of bad merged blocks and/or the number of good merged blocks), constructs a reserved block pool according to the condition of the merged block in the large block, for example, determines one or more large blocks containing the maximum number of bad merged blocks in the NVM chip according to the condition of the merged block, obtains a merged block at least including one good physical block in the one or more large blocks, and uses the merged block as an element in the reserved block pool, wherein the merged block (as a second type merged block) in the reserved block pool can be merged with a merged block (as a first type merged block) which contains the good physical block and the bad physical block while excluding the element in the reserved block pool in the NVM chip to obtain a logical block space formed by the good physical blocks.

Further, a logical block space composed of the full physical blocks is obtained by secondarily merging the second type merging block in the reserved block pool and the first type merging block in the NVM chip. The control section determines a first binning block by performing step 702. In step 702, the control unit determines whether there is a large block in the storage device that includes at least one non-good merge block. Specifically, the control unit judges whether the large blocks in the NVM chip except for the one or more large blocks containing the largest number of bad merge blocks include at least one non-good merge block one by one, wherein a non-good merge block is a merge block including both good physical blocks and bad physical blocks, that is, it is used as a first sort merge block.

Further, if there is a large block containing at least one non-good merge block in the NVM chip, then step 703 is executed, and the control component obtains the large block containing at least one non-good merge block. And step 704 is executed, the control unit judges whether the non-good merge blocks in the acquired large block can be replaced by the merge block acquired from the reserved block pool. As an example, for each non-good merge block, the control section determines whether at least one or more unallocated merge blocks can be found from the reserved block pool within the same Plane (Plane) or Logical Unit (LUN) as it is, and if so, takes the merge block closest to the non-good merge block as the merge block to replace it.

Further, if the non-good merge Block in the obtained large Block can be replaced by the merge Block obtained from the Reserved Block pool, step 705 is executed, and the control component replaces the non-good merge Block in the obtained large Block with the merge Block obtained from the Reserved Block pool. Specifically, the control unit replaces the bad physical block in the non-good merged block with the good physical block in the merged block obtained from the reserved block pool to obtain a logical block space composed of all good physical blocks. Otherwise, step 706 is executed to add all merge blocks in the fetched large block to the reserved block pool.

Fig. 8A shows a flowchart of a method for accessing a storage device according to an embodiment of the present application. For example, the storage device performs the access process described in FIG. 8A when receiving a read command, a write command, or an erase command sent by the host.

In step 801, the control unit receives an I/O command sent by the host and obtains a merged block to be accessed by the I/O command.

In step 802, a control component obtains one or more physical blocks that make up a merged block.

In step 803, the control unit accesses one or more physical blocks of the merged block in response to the I/O command.

In one possible implementation manner, the merge block includes a first-merged good merge block and a second-merged good merge block, where the first-merged good merge block is a merge block obtained by merging at least two good physical blocks at a time, and the first-merged good merge block is a good physical block in which all physical blocks are good physical blocks; the good merging block of the second merging refers to a merging block obtained by merging a first merging block and a good physical block in a second merging block corresponding to the first merging block, all physical blocks of the good merging block of the second merging are good physical blocks, the first merging block and the second merging block are merging blocks of the first merging, the first merging block at least comprises a bad physical block, the second merging block at least comprises a good physical block, and the good physical block in the second merging block can replace the bad physical block in the first merging block to perform data storage.

In yet another possible implementation, obtaining one or more physical blocks that constitute the merged block includes: judging whether the merging block is a good merging block for primary merging or a good merging block for secondary merging; and if the merging block is a good merging block merged at one time, determining one or more physical blocks in the good merging block merged at one time according to the number or the index of the good merging block merged at one time.

Specifically, after receiving the I/O command sent by the host, the control unit determines, according to the index (e.g., the block number of the merged block) indicated by the I/O command, whether the merged block to be accessed by the I/O command is a good merged block for one merging or a bad merged block for one merging according to the index and the first information table. If the merged block to be accessed by the I/O command is a good merged block for one merging, the physical block address to be accessed is directly calculated according to the block number of the merged block, for example, if the block number of the good merged block for one merging is X, the physical addresses of the corresponding good physical blocks are 2X and 2X + 1.

Further, if the merged block to be accessed by the I/O command is a bad merged block of a first merging, determining an index corresponding to the bad merged block of the first merging, querying whether an entry corresponding to the index exists in the second information table, and if so, determining that the merged block actually accessed by the I/O command is a good merged block of a second merging.

In another possible implementation manner, if the merged block is a good merged block merged twice, the third information table is queried to obtain good physical blocks corresponding to the good merged block merged twice, where each entry in the third information table includes source information of each physical block in the good merged block merged twice.

Specifically, the corresponding entry is queried in the third information table according to the index corresponding to the twice-merged good merging block, and the corresponding physical block is determined according to the source information of the physical block included in the entry.

In yet another possible implementation, if the I/O command is a read command or a write command, one physical block of the merged block is accessed in response to the I/O command.

Fig. 8B shows a schematic diagram of responding to a read command according to an embodiment of the present application.

In a storage device, mapping information from a Logical Block Address (LBA) (here, a "logical block" is used to distinguish from a "logical block space" used in the present application) to a merged block physical address is maintained by using an FTL (Flash Translation Layer). As shown in fig. 8B, the control unit receives an I/O command sent by the host, where the I/O command is a read command and the read command carries a logical block address LBA1, determines, according to the FTL table, a merge block 5 corresponding to the LBA1, where the merge block 5 is a merged block that is merged at a time, and the control unit directly calculates a corresponding physical block address according to a block number of the merge block 5, reads data from the physical block according to the physical block address, and transmits the data to the host.

Fig. 8C shows a schematic diagram of responding to a write command according to an embodiment of the present application.

As shown in fig. 8C, the control unit receives an I/O command sent by the host, where the I/O command is a write command and the write command carries the logical block address LBA 3. The logical block space provided by merge block 1 is allocated for the write command. And then determining that the merging block 1 is a good merging block for secondary merging by querying the second information table, querying by the control component according to the block number of the merging block 1 and the third information table to obtain the source of each physical block in the merging block 1, determining that the corresponding physical blocks are the physical block 2 and the physical block 202 respectively according to the source of each physical block, and writing data corresponding to the write command into the physical block 2 and/or the physical block 202. And record LBA3 in the FTL table with the address for merged block 1 (e.g., the block number of merged block 1).

FIG. 8D is a diagram illustrating a response to a read command according to an embodiment of the present disclosure.

As shown in fig. 8D, the control component receives an I/O command sent by the host, where the I/O command is a read command and the read command carries a logical block address LBA100, determines, according to the FTL table, a merge block 3 corresponding to the LBA100, then determines, by querying the second information table, that the merge block 3 is a good merge block of secondary merge, obtains, according to a block number of the merge block 3 and a third information table, a source of each physical block in the merge block 3, determines, according to the source of each physical block, that the corresponding physical block is a physical block 106 and a physical block 107, and reads data according to a physical address of the physical block 106 and/or the physical block 107 and sends the data to the host.

In yet another possible implementation, if the I/O command is an erase command, all physical blocks of the merged block are erased in response to the I/O command.

FIG. 8E shows a schematic diagram of responding to an erase command according to an embodiment of the present application.

As shown in fig. 8E, the control component receives an I/O command sent by the host, where the I/O command is an erase command and the erase command carries a logical block address LBA100, determines, according to the FTL table, a merge block 3 corresponding to the LBA100, then determines, by querying the second information table, that the merge block 3 is a good merge block of secondary merge, obtains, according to a block number of the merge block 3 and a third information table, a source of each physical block in the merge block 3, determines, according to the source of each physical block, that the corresponding physical blocks are a physical block 106 and a physical block 107, and erases data in the physical block 106 and the physical block 107 according to physical addresses of the physical block 106 and the physical block 107.

In the embodiment shown in fig. 8A to 8E, addresses (e.g., merge block numbers) for merge blocks corresponding to Logical Block Addresses (LBAs) are recorded in the FTL table. When a read command is processed, if a merge block corresponding to an address for a merge block recorded in the FTL table is a good merge block for secondary merge, it is further required to further obtain physical blocks constituting the good merge block for secondary merge according to a merge block number, and access one or more of the obtained physical blocks to respond to the read command. According to another embodiment of the present application, referring to fig. 9A and 9B, a physical address including a physical block number (or a physical block address) is recorded in the FTL table, so that when a read command is processed, it is not necessary to determine whether a merge block is good or bad, thereby further reducing processing delay.

In yet another possible implementation manner, the method further includes: receiving a write command sent by a host, selecting a merging block from unallocated merging blocks, and allocating a storage space corresponding to the merging block to the write command; and writing data into the storage space according to the write command.

In another possible implementation manner, allocating the storage space corresponding to the merged block to the write command includes: identifying whether the merging block is a good merging block of secondary merging; if yes, the source information of each physical block in the merged block is obtained by inquiring a third information table, and the storage space corresponding to part or all of the physical blocks in the merged block is allocated to the write command according to the source information.

FIG. 9A shows a schematic diagram of responding to a write command according to yet another embodiment of the present application.

In the example of fig. 9A, the FTL table records the correspondence of logical addresses and physical addresses, and the physical addresses include physical block addresses instead of merge block numbers. The logic blocks are still logic block spaces, wherein the merge block 1 and the merge block 3 are good merge blocks of a second merge, and the other merge blocks are good merge blocks of a first merge. When a write command is processed, a storage space into which data is not written is allocated for the write command from the logical block space. And the physical address (non-merge block number) of the allocated memory space is recorded in the FTL table.

As shown in fig. 9A, the control unit receives a write command sent by the host, where the write command carries a logical block address LBA 3. The storage space provided by the merge block 1 is allocated for this write command. Further, it is also identified that the merged block 1 is a good merged block for secondary merging, so that further querying the third information table results in the source of each physical block (e.g., physical block 2 and physical block 202) in the merged block 1, and also determines that it is provided by physical block 2 and/or physical block 202 according to the allocated storage space. By way of example, the allocated physical space is provided by physical blocks 202. The data corresponding to the write command is written to the physical block 202. And recording the LBA3 with the physical address including the physical block 202 in the FTL table.

In yet another possible implementation manner, the method further includes: receiving a read command sent by a host, and inquiring a physical address of a corresponding physical block of a logical block address carried by the read command according to an FTL (flash translation layer) table; and reading data from the physical block corresponding to the physical address according to the read command, and sending the data to the host.

FIG. 9B shows a schematic diagram of responding to a read command according to another embodiment of the present application.

In the example of fig. 9B, merge block 1 and merge block 3 of the logical block space are good merge blocks of the quadratic merge. The merge block 1 is composed of physical blocks 2 and 202, and the merge block 3 is composed of physical blocks 106 and 107. The physical blocks constituting the merged block are obtained through the first, second and/or third information tables. The FTL table records the corresponding relationship between the logical address and the physical address, and the physical address includes the physical block address rather than the merge block number.

As shown in fig. 9B, the control unit receives a read command sent by the host, where the read command carries a logical block address LBA3, determines a physical address of the physical block 202 corresponding to the LBA3 according to the FTL table, directly accesses the physical block 202 according to the physical address to obtain data to be read by the read command, and sends the data to the host.

Fig. 10 shows a schematic structural diagram of a control component provided in an embodiment of the present application. The control unit includes a host interface, a host command processing unit, a storage command processing unit, a media interface controller, and a storage media management unit. The media interface controller is coupled with the NVM chip, and the control unit receives an NVMe command sent by a host through the host interface, wherein the NVM command is used for instructing Rapid Diagnostic Test (RDT) testing and bad block management on a physical block in the storage device. A host command processing unit (processor) parses the NVMe commands and generates commands suitable for the storage command processing unit. In response to receiving the command, the storage command processing unit performs an operation of the media interface controller to access the NVM chip or performs an operation of the storage media management unit to maintain the first information table or the second information table. In this embodiment, the storage medium management unit maintains a third information table in addition to the first information table or the second information table. The present application may also be implemented by a media interface controller, whereby a media management unit operates a logical block space.

In the solution provided in the embodiment of the present application, the control unit records information of a merged block obtained by merging at least two physical blocks in each entry of the first information table, which means that the control unit can record information of a plurality of physical blocks in each entry of the first information table, so that the control unit can consume as little storage resources as possible to store the physical block information. In addition, the control component records information of the merged block which is merged once, also records an incidence relation of a first physical address of a bad physical block in the first merged block and a second physical address of a good physical block in the second merged block corresponding to the bad physical block, merges the good physical block in the first merged block and the good physical block in the second merged block according to the incidence relation to obtain a good physical block which is merged twice, and constructs a logical block space which does not contain the bad physical block and has continuous addresses under the condition that the NVM chip can have natural bad physical blocks, so that the upper layer can use the logical block space conveniently, and further the performance of the storage device is improved.

It is noted that for the sake of brevity, this application describes some methods and embodiments thereof as a series of acts and combinations thereof, but those skilled in the art will appreciate that the aspects of the application are not limited by the order of the acts described. Accordingly, one of ordinary skill in the art will appreciate that certain steps may be performed in other sequences or simultaneously, in accordance with the disclosure or teachings herein. Further, those skilled in the art will appreciate that the embodiments described herein are capable of alternative embodiments, i.e., acts or modules referred to herein are not necessarily required for the implementation of the solution or solutions described herein. In addition, the description of some embodiments of the present application is also focused on different schemes. In view of the above, those skilled in the art will understand that portions that are not described in detail in one embodiment of the present application may also be referred to in the related description of other embodiments.

In particular implementation, based on the disclosure and teachings of the present application, one of ordinary skill in the art will appreciate that the several embodiments disclosed in the present application may be implemented in other ways not disclosed herein. For example, as for the units in the foregoing embodiments of the electronic device or apparatus, the units are split based on the logic function, and there may be another splitting manner in the actual implementation. Also for example, multiple units or components may be combined or integrated with another system or some features or functions in a unit or component may be selectively disabled. The connections discussed above in connection with the figures may be direct or indirect couplings between the units or components in terms of connectivity between the different units or components. In some scenarios, the aforementioned direct or indirect coupling involves a communication connection utilizing an interface, where the communication interface may support electrical, optical, acoustic, magnetic, or other forms of signal transmission.

While the preferred embodiments of the present application have been described, additional variations and modifications in those embodiments may occur to those skilled in the art once they learn of the basic inventive concepts. Therefore, it is intended that the appended claims be interpreted as including preferred embodiments and all alterations and modifications as fall within the scope of the application. It will be apparent to those skilled in the art that various changes and modifications may be made in the present application without departing from the spirit and scope of the application. Thus, if such modifications and variations of the present application fall within the scope of the claims of the present application and their equivalents, the present application is intended to include such modifications and variations as well.

Claims

1. A method of NVM bad block management, comprising:

scanning physical blocks in each Logical Unit (LUN) to generate a first information table, wherein the first information table comprises a plurality of entries, each entry comprises information of a merged block merged once, and each merged block comprises at least two physical blocks;

determining a first merging block and a second merging block according to the first information table, determining at least one first merging block from the first merging block and determining a second merging block corresponding to each first merging block from the second merging block, wherein the first merging block and the second merging block are different merging blocks, the first merging block comprises a bad physical block, the second merging block comprises a good physical block, and the good physical block in the second merging block can replace the bad physical block in the first merging block for data storage;

and determining a first physical address of a bad physical block in each first merging block and a second physical address of a good physical block in a corresponding second merging block, and recording the association relationship between the first physical address and the second physical address.

2. The method of claim 1, further comprising:

combining the first combining block and the good physical block in the second combining block corresponding to the first combining block to obtain a good combining block which is combined for the second time; and the number of the physical blocks of the secondary combined good combining block is the same as that of the combining block, and all the physical blocks of the secondary combined good combining block are good physical blocks.

3. A method according to claim 1 or 2, wherein determining the first type of merged block and the second type of merged block from the first information table comprises:

and determining the number of bad merging blocks in each large block of the storage device according to the first information table, and determining a first merging block and a second merging block according to the number.

4. The method of claim 3, wherein determining the first type of merge block and the second type of merge block based on the number comprises:

taking all merging blocks in a first large block with the maximum number of bad merging blocks and the specified number or all merging blocks comprising at least one good physical block as a second type merging block, and acquiring a first type merging block from other large blocks except the first large block in the storage device; or

And taking all the merged blocks in the second large blocks with the number larger than the preset threshold value or all the merged blocks comprising at least one good physical block as second merged blocks, and acquiring the first merged blocks from the merged blocks of other large blocks except the second large blocks in the storage device.

5. A method according to any of claims 1-4, wherein determining at least one first merged block from the first merged blocks and a second merged block corresponding to each first merged block from the second merged blocks comprises:

for the merging block A of the first merging block, if one or more merging blocks B of a second merging block which are not allocated and are located in the same logic unit as the merging block A exist, the merging block B closest to the physical address of the merging block A is allocated to the merging block A, and the merging block A and the allocated merging block B are used as corresponding first merging block and second merging block.

6. The method according to any of claims 1-5, wherein determining at least one first merged block from the first merged blocks and a second merged block corresponding to each first merged block from the second merged blocks comprises:

determining a plurality of third combined blocks and a first number thereof from the first combined blocks in the same Logic Unit (LUN) and a plurality of fourth combined blocks and a second number thereof from the second combined blocks according to the first information table, wherein the third combined blocks comprise good physical blocks and bad physical blocks, and the fourth combined blocks comprise good physical blocks or good physical blocks and bad physical blocks;

and determining a first merging block and a second merging block according to the first quantity and the second quantity.

7. The method of claim 6, wherein determining the first binning block and the second binning block based on the first number and the second number comprises:

if the first number is not larger than the second number, taking each third merging block as a first merging block, and taking a fourth merging block closest to each first merging block as a corresponding second merging block; or

And if the first number is larger than the second number, each fourth merging block is used as one second merging block, and the first merging block closest to each second merging block is used as the corresponding first merging block.

8. The method according to any one of claims 1-7, further comprising:

adding at least one entry in the first information table to obtain a second information table, wherein the entry comprises information of a secondary combined block obtained by replacing a bad physical block in a first combined block by a good physical block in a second combined block corresponding to the bad physical block, the secondary combined block at least comprises the secondary combined good combined block, and the index of the entry is the same as that of the first combined block in the corresponding first information table; or

And generating a second information table, wherein each entry in the second information table contains information of the merged block merged twice, and the index of each entry in the second information table is the same as the index of the first merged block in the corresponding first information table.

9. The method of claim 8, further comprising:

and generating a third information table according to the second information table and the association relation, wherein each entry in the third information table contains the source information of each physical block in the secondarily-merged good merging block.

10. A control unit comprising a processor and a memory, the memory storing program code which, when executed by the processor, performs the method of any of claims 1 to 9.