CN113473055A - Signal transmission control method, microprocessor, and computer-readable storage medium - Google Patents
Signal transmission control method, microprocessor, and computer-readable storage medium Download PDFInfo
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- 238000000034 method Methods 0.000 title claims abstract description 61
- 230000008054 signal transmission Effects 0.000 title claims abstract description 31
- 238000004891 communication Methods 0.000 claims abstract description 26
- 238000004590 computer program Methods 0.000 claims description 14
- 238000010586 diagram Methods 0.000 description 14
- 230000005540 biological transmission Effects 0.000 description 10
- 230000008569 process Effects 0.000 description 8
- 230000006870 function Effects 0.000 description 7
- 238000012986 modification Methods 0.000 description 6
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- 230000002457 bidirectional effect Effects 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/76—Television signal recording
- H04N5/765—Interface circuits between an apparatus for recording and another apparatus
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/222—Studio circuitry; Studio devices; Studio equipment
- H04N5/262—Studio circuits, e.g. for mixing, switching-over, change of character of image, other special effects ; Cameras specially adapted for the electronic generation of special effects
- H04N5/268—Signal distribution or switching
Abstract
The invention discloses a signal transmission control method, a microprocessor and a computer readable storage medium, wherein the method comprises the following steps: the method comprises the steps that a microprocessor obtains relevant information of target equipment, wherein the relevant information comprises EDID information and instruction information, and the obtained relevant information is sent to an information request end, wherein the microprocessor is in communication connection with the information request end in one of the following modes: the microprocessor is connected with the information request end through a target line, the target line comprises at least one of a signal line and a power line, and the signal line comprises a differential signal line; the microprocessor is arranged at the information request end; under the condition that the microprocessor is arranged at the information request end, the related information can be directly burned in the microprocessor, or the related information can be acquired, burned and stored based on the connection with the target equipment and then read by the information request end, and the number of the wire cores can be reduced no matter which mode is adopted.
Description
Technical Field
The present invention relates to the field of signal transmission technologies, and in particular, to a signal transmission control method, a microprocessor, and a computer-readable storage medium.
Background
When signal transmission is performed, related information, such as Extended Display Identification Data (EDID), needs to be transmitted, and when the related information is transmitted, the number of cores of the adopted data line is large, and the cost of the data line is high.
Disclosure of Invention
The invention mainly aims to provide a signal transmission control method of a data line, a microprocessor and a computer readable storage medium, aiming at solving the technical problem of reducing the number of wire cores.
In order to achieve the above object, the present invention provides a signal transmission control method for a data line, the signal transmission control method comprising:
the method comprises the steps that a microprocessor obtains relevant information of target equipment, wherein the relevant information comprises EDID information and instruction information;
sending the acquired related information to an information request end, wherein the communication connection mode of the microprocessor and the information request end is one of the following modes:
the microprocessor is connected with the information request end through a target line, the target line comprises at least one of a signal line and a power line, and the signal line comprises a differential signal line;
the microprocessor is arranged at the information request end.
Optionally, the microprocessor is connected to the information request terminal through a target line, and the step of acquiring, by the microprocessor, the relevant information of the target device includes:
the microprocessor obtains the relevant information in the target device.
Optionally, the microprocessor is disposed at the information requesting end, and the step of acquiring the relevant information of the target device by the microprocessor includes:
the microprocessor acquires related information which is burned in advance and stored in the memory;
or the microprocessor acquires the relevant information of the target equipment, burns and stores the relevant information of the target equipment in the memory, so that the information request end can read the relevant information.
Optionally, after the step of acquiring the relevant information of the target device by the microprocessor, the method further includes:
and closing a data sending port after the relevant information is sent or the first preset time interval of the relevant information is not read.
Optionally, after the step of acquiring the relevant information of the target device by the microprocessor, the method further includes:
caching the related information;
closing a switch of a comparison circuit connected with the microprocessor and a switch borrowing a data path;
sending the related information to the information request terminal;
and after the related information is sent, the switch of the comparison circuit and the switch of the borrowing data path are turned on.
Optionally, the method further comprises:
when the time length for detecting that the level of the comparison circuit is smaller than the preset value is longer than or equal to the preset time length, stopping working;
re-reading the level of the comparison circuit;
and when the re-read level is greater than the preset value, executing the step that the microprocessor acquires the related information of the target equipment.
Optionally, the step of the microprocessor acquiring the related information of the target device includes:
and when the microprocessor detects a handshake instruction, acquiring the related information of the target equipment.
Optionally, the step of sending the acquired related information to an information requesting end includes:
and sending the acquired related information to an information request end through the detected non-working line.
In addition, in order to achieve the above object, the present invention further provides a microprocessor, wherein the microprocessor is connected with a memory, the memory stores a computer program, and the computer program realizes the steps of any one of the above methods when being executed by the microprocessor.
Furthermore, to achieve the above object, the present invention also provides a computer-readable storage medium having stored thereon a computer program which, when being executed by a processor, realizes the steps of the method of any one of the above. .
According to the signal transmission control method, the microprocessor and the computer readable storage medium provided by the embodiment of the invention, the microprocessor is used for acquiring the relevant information of the target device, wherein the relevant information comprises EDID information and instruction information, and the acquired relevant information is sent to the information request terminal, and the communication connection mode between the microprocessor and the information request terminal is one of the following modes: the microprocessor is connected with the information request end through a target line, the target line comprises at least one of a signal line and a power line, and the signal line comprises a differential signal line; the microprocessor is arranged at the information request end; under the condition that the microprocessor is arranged at the information request end, the related information can be directly burned in the microprocessor, or the related information can be acquired, burned and stored based on the connection with the target equipment and then read by the information request end, and the number of the wire cores can be reduced no matter which mode is adopted.
Drawings
Fig. 1 is a schematic diagram of an embodiment of a communication architecture to which an embodiment of the present invention relates;
fig. 2 is a schematic diagram of another embodiment of a communication architecture to which an embodiment of the present invention relates;
FIG. 3 is a schematic diagram of another embodiment of a communication architecture to which an embodiment of the present invention relates;
fig. 4 is a schematic diagram of another embodiment of a communication architecture to which an embodiment of the present invention relates;
FIG. 5 is a flowchart illustrating a signal transmission control method according to a first embodiment of the present invention;
fig. 6 is a flowchart illustrating a signal transmission control method according to a second embodiment of the present invention.
The implementation, functional features and advantages of the objects of the present invention will be further explained with reference to the accompanying drawings.
Detailed Description
It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
As shown in fig. 1, fig. 1 is a schematic diagram of a hardware architecture according to an embodiment of the present invention.
Further, a signal transmission control program may be included in a memory as a kind of computer storage medium.
The microprocessor may be configured to invoke a signal transmission control program stored in the memory and perform the following operations:
the method comprises the steps that a microprocessor obtains relevant information of target equipment, wherein the relevant information comprises EDID information and instruction information;
sending the acquired related information to an information request end, wherein the communication connection mode of the microprocessor and the information request end is one of the following modes:
the microprocessor is connected with the information request end through a target line, the target line comprises at least one of a signal line and a power line, and the signal line comprises a differential signal line;
the microprocessor is arranged at the information request end.
Further, the microprocessor may be configured to invoke a signal transmission control program stored in the memory and perform the following operations:
the microprocessor obtains the relevant information in the target device.
Further, the microprocessor may be configured to invoke a signal transmission control program stored in the memory and perform the following operations:
the microprocessor acquires related information which is burned in advance and stored in the memory;
or the microprocessor acquires the relevant information of the target equipment, burns and stores the relevant information of the target equipment in the memory, so that the information request end can read the relevant information.
Further, the microprocessor may be configured to invoke a signal transmission control program stored in the memory and perform the following operations:
and closing a data sending port after the relevant information is sent or the first preset time interval of the relevant information is not read.
Further, the microprocessor may be configured to invoke a signal transmission control program stored in the memory and perform the following operations:
caching the related information;
closing a switch of a comparison circuit connected with the microprocessor and a switch borrowing a data path;
sending the related information to the information request terminal;
and after the related information is sent, the switch of the comparison circuit and the switch of the borrowing data path are turned on.
Further, the microprocessor may be configured to invoke a signal transmission control program stored in the memory and perform the following operations:
when the time length for detecting that the level of the comparison circuit is smaller than the preset value is longer than or equal to the preset time length, stopping working;
re-reading the level of the comparison circuit;
and when the re-read level is greater than the preset value, executing the step that the microprocessor acquires the related information of the target equipment.
Further, the microprocessor may be configured to invoke a signal transmission control program stored in the memory and perform the following operations:
and when the microprocessor detects a handshake instruction, acquiring the related information of the target equipment.
Further, the microprocessor may be configured to invoke a signal transmission control program stored in the memory and perform the following operations:
and sending the acquired related information to an information request end through the detected non-working line.
Referring to fig. 2, a first embodiment of the present invention provides a data transmission control method, including:
step S10, the microprocessor acquires the relevant information of the target equipment, wherein the relevant information comprises EDID information and instruction information;
step S20, sending the acquired related information to an information request end, where the communication connection between the microprocessor and the information request end is one of the following ways:
the microprocessor is connected with the information request end through a target line, the target line comprises at least one of a signal line and a power line, and the signal line comprises a differential signal line;
the microprocessor is arranged at the information request end.
The microprocessor can be connected with the information request end through target lines, such as differential signal lines, power lines and other signal lines; or, the microprocessor can also be arranged at the information request end, the relevant information of the target device is burnt in the microprocessor in advance for the information request end to read, the microprocessor can also be arranged at the information request end, the information request end is firstly connected with the target device, the microprocessor reads, burns and stores the relevant information of the target device after the connection, and then sends the relevant information to the information request end, for example, if a differential signal line is adopted to transmit a low-speed signal, the original low-speed signal line can be removed, the number of fiber cores can be reduced, and the accuracy of data signal acquisition can be improved; the mode of the microprocessor arranged at the information request end comprises the following steps: integrating a microprocessor in an information request end, wherein the hardware structure equivalent to the information request end comprises the microprocessor, and related information of target equipment is burnt in advance in a memory connected with the microprocessor; the microprocessor can be arranged at a port of the data line and can be in communication connection with the information request end through the port, and the microprocessor controls the information transmitted through the port.
As shown in fig. 1 to 3, a microprocessor may be integrated on an interface of a data line and is in communication connection with a target device and an information request terminal, respectively, fig. 1 shows communication connection among the information request terminal, the microprocessor, and the target device, and in addition, as shown in fig. 2, a program of this embodiment may be programmed in a memory connected to the microprocessor, wherein related information may be directly programmed in the memory connected to the microprocessor, the microprocessor may be directly integrated in the information request terminal, and in practical applications, the information request terminal may be configured with the microprocessor to leave a factory, so that when a user uses a product, the related information is directly programmed, on this basis, the number of wire cores is reduced, a normal data transmission process can be implemented, and the user can use the product conveniently; as shown in fig. 3, both ends may also use the method of this embodiment, that is, the target device and the information request end are both connected to the microprocessor, the information request end is connected to the microprocessor through an interface, and the target device is connected to another microprocessor through an interface, so that both ends can use the method of this embodiment, and the number of cores can also be reduced.
In addition, regarding the reason that the number of cores can be reduced in the present embodiment, taking HDMI as an example, as further described with reference to fig. 4, please refer to fig. 4, fig. 4 shows a schematic diagram of a part of the HDMI part lines, including the differential signal lines TMDS, not all shown, and shows portions of low speed signal lines including CEC (Consumer Electronics Control), Reserved (N.C. on device), SCL (System clock line), SDA (Serial data), when the signal is transmitted by the method of this embodiment, the original signal transmitted by the low-speed signal line can be transmitted by the differential signal line TMDS instead, so that the low-speed signal line can be removed to obtain an improved manner on the right, on the basis of removing the low-speed signal wire, the diameter of the whole wire is shortened, the number of wire cores is reduced, and therefore the cost for producing the data wire can be reduced. Specifically, when the EDID information is transmitted, the microprocessor may transmit the low-speed signal through a differential signal line or through a power line in a carrier mode, and may also transmit the low-speed signal alone or through other data lines; wherein, use HDMI A Type interface as an example, it includes following differential signal pin foot: TMDS (Transition-modulated differential signaling) Data2, TMDS Data2 Shield, TMDS Data2, TMDS Data1+, TMDS Data1 Shield, TMDS Data 1-, TMDS Data0+, TMDS Data0 Shield, TMDS Data 0-, TMDS Clock +, TMDS Clock Shield, TMDS Clock-, and the following low-speed signal pin: CEC, Reserved (n.c. on device), SCL, SDA, the signal originally transmitted by the pin of the low-speed signal can be transmitted by the pin of the differential signal based on the method of this embodiment, so that the number of lines of the corresponding low-speed signal can be reduced; in addition, data lines such as HDMI and TYPE-C, USB (Universal Serial Bus) can also reduce the number of cores based on the method of the present embodiment.
In addition, during specific implementation, the original multiple common digital signals, such as CEC, Reserved, SCL, SDA, HPD (Hot Plug Detection), and other data signals, such as Configuration channel, Sideband use data signals, may also be merged into TTL232 or RS485 or LVDS signals through the microprocessor, and may be transmitted separately, or merged and loaded in other data lines in a time-sharing manner for transmission communication, or transmitted through a power line in a carrier manner; by combining and arranging common digital signal wires, the anti-interference capability of common digital signal transmission communication can be improved, the number of wire cores of the traditional data wire can be reduced, the diameter of the traditional data wire is thinned and softened, and the use comfort and portability of the traditional data wire are improved; meanwhile, the number of wire cores is reduced, and the reliability is improved.
The method of the embodiment can be widely used for various lines such as HDMI, TYPE-C, USB, etc., and various lines such as optical fiber data lines, metal data lines, hybrid data lines, various system conversion data lines; the method can be used independently at one end and simultaneously at two ends; the method can be used for realizing unidirectional transmission and bidirectional transmission, can be used for all, and can also be used for partial functions according to actual needs.
The microprocessor of this embodiment may be connected to the information sending end in a communication manner, and after acquiring the relevant information of the target device, the microprocessor sends the acquired relevant information to the information requesting end, where the microprocessor is connected to the information requesting end through a target line (a differential signal line and/or a power line or other signal lines); the pin positions can be identified based on the corresponding data lines which are set, the relation of the connection equipment is judged, such as a sending end or an information request end, or a master-slave relation, then the microprocessor can obtain the relevant information of the target equipment, wherein the microprocessor can obtain the relevant information which is burned in advance and stored in a storage medium, or the microprocessor is connected with the information request end and can obtain the relevant information sent by the target equipment, and the relevant information can be transmitted based on TTL232 or RS485 or LVDS or other modes, can be transmitted independently, can be transmitted through other data lines, and can be transmitted through a power line in a carrier wave mode; in addition, after the relevant information of the target device is acquired, the information can be directly transmitted through other data lines without changing the original system, and can also be transmitted through a power line in a carrier mode.
The related information takes EDID information as an example, when the microprocessor does not acquire the EDID information, the microprocessor regards the target device as no EDID information, transmits data according to a default mode set by an EDID information request terminal, can acquire bandwidth information of a data line, sends the bandwidth information to the EDID information request terminal, and can preset EDID according to the bandwidth capacity of the data line, so that effective transmission of the data is ensured; and after the microprocessor sends the EDID information or does not read the EDID information for a first preset time interval, closing the data sending port to form a circuit disconnection state.
In addition, in this embodiment, both ends of the data line may be provided with a microprocessor, the microprocessor connected to the information request end may open a data receiving port agreed in advance, and convert the received data into data that can be identified and read by the device connected thereto for reading by the device, and the information request end transmits the data according to the EDID information received from the target device; the microprocessor provides data information which can be read by the information request terminal and can be identified by the information request terminal, but the information request terminal cannot transmit data according to the EDID information requirement of the target equipment, the information request terminal is considered to have no such function, and the data is transmitted according to a default mode set by the information request terminal; the microprocessor fails to provide target equipment data information which can be identified and read by the information request terminal, the target equipment is considered to have no EDID information, and the data is transmitted according to a default mode set by the information request terminal; after the microprocessor provides the target data information which can be identified and read by the information request end or cannot provide the target equipment data information which can be identified and read by the information request end for a period of time, the microprocessor closes the data receiving port to form a circuit disconnection state; in order to improve the communication reading capability between the devices, the communication can be transmitted together by temporarily borrowing a plurality of temporarily inoperative lines; the microprocessor sends the acquired related information to an information request end through the detected non-working line; a switch circuit can be set at two ends of a line which borrows common digital signals to be transmitted through a switch device (such as an MOS tube); the comparator circuit (which can be a comparator carried by a microprocessor or an independent comparator) is connected with other circuit wires (such as a differential signal wire, but not limited to the differential signal wire), can be used for detecting the level state of the circuit in a single way or multiple ways, and can be additionally provided with a switch circuit capable of being controlled according to actual requirements; the comparison circuit and the switch circuit may be independent circuits or may be combined circuits.
When the microprocessor detects that the time length when the level of the comparison circuit is smaller than the preset value is larger than or equal to the preset time length, the microprocessor stops working; re-reading the level of the comparison circuit; when the re-read level is larger than the preset value, executing a step of acquiring relevant information of the target equipment by the microprocessor; and the microprocessor reads that the level of the comparison circuit is reduced to the preset value for more than a certain time, namely, the target device is considered to be offline, the microprocessor stops working, and after the level value preset by the comparison circuit is read again, the information transmission of the target device is restarted.
Lines which do not work simultaneously can be directly merged and used, for example, USB2.0 differential signals D +/D-in TYPE-C are directly merged and used with SuperSpeed differential signals (not specifically referring to 1# or 2 #); 20. all or a portion of the methods of the present invention may be used in combination with other methods or other circuitry or other devices in accordance with the principles of the present invention; all or part of the functions or methods of the invention can also be applied to the data output end or the data receiving end of the electronic product, and the number of the data wire cores can also be reduced to achieve the same effect.
Before communication between a master device and a slave device of many electronic products, device information needs to be read, for example, after an EDID (received resolution, bit value, frequency, format, sound and the like) information request terminal of the slave device reads information of a target device, data is transmitted in a wired or wireless mode according to the requirement of the target device, and if the EDID of the target device cannot be read, the data is transmitted in a default mode set by the EDID information request terminal; no matter whether the target equipment and the EDID information request terminal have set self information or not, handshake communication needs to be carried out firstly, the handshake communication time is short, during the handshake communication, other data (data lines) do not work except the data or data lines of the handshake communication, and after the handshake communication is finished, normal data transmission is carried out and the handshake communication is not carried out any more; and when the microprocessor detects a handshake triggering instruction, acquiring the EDID information of the target equipment.
In this embodiment, relevant information of a target device is obtained through a microprocessor, where the relevant information includes EDID information and instruction information, and the obtained relevant information is sent to an information request terminal, where a communication connection between the microprocessor and the information request terminal is one of the following manners: the microprocessor is connected with the information request end through a target line, the target line comprises at least one of a signal line and a power line, and the signal line comprises a differential signal line; the microprocessor is arranged at the information request end; under the condition that the microprocessor is arranged at the information request end, the related information can be directly burned in the microprocessor, or the related information can be acquired, burned and stored based on the connection with the target equipment and then read by the information request end, and the number of the wire cores can be reduced no matter which mode is adopted.
Further, referring to fig. 3, a second embodiment of the present invention provides a signal transmission control method, based on the first embodiment shown in fig. 2, after the step S10, the method further includes:
step S30, caching the relevant information;
step S40, closing the switch of the comparison circuit connected with the microprocessor and the switch borrowing the data path;
step S50, sending the relevant information to the information request end;
in step S60, after the end of transmitting the related information, the switch of the comparator circuit and the switch of the borrow data path are turned on.
The related information includes EDID information and instruction information, the instruction information includes but is not limited to CEC instruction, Reserved instruction, SCL instruction, SDA instruction and HPD instruction, the related instruction is cached, the switch of the comparison circuit and the switch of the borrowed data path circuit (which may be the same switch of the same circuit) are closed at the same time, then the CEC instruction, Reserved instruction, SCL instruction, SDA instruction and HPD instruction are transmitted, because the whole process time is very short (usually not more than 10ms), human eyes can hardly perceive, and after the instruction transmission is finished, the initial setting is recovered.
The microprocessor reads that the level of the comparison circuit is reduced to a preset value, the switch of the borrowed data path circuit is closed, a disconnection state is formed relative to the data being transmitted, a predetermined data port is opened to receive the data, and the whole process time is short (generally not more than 10ms), the amount of the lost data is small, and human eyes can hardly perceive the data. After the instruction transmission is finished, the initial setting is recovered without restarting; the microprocessor reads that the level of the comparison circuit is reduced to the preset value and exceeds a certain time, namely, the target device is determined to be offline, the information request end is informed to stop transmitting data, the information request end stops working, and after the level value preset by the comparison circuit is read again, the information reading of the target device is restarted.
In this embodiment, the relevant information is cached; closing a switch of a comparison circuit connected with the microprocessor and a switch borrowing a data path; sending the related information to the information request terminal; and after the related information is sent, the switch of the comparison circuit and the switch of the borrowing data path are turned on. Since the overall process time is short (typically no more than 10ms), the amount of lost data is small.
It should be noted that, in this document, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or system that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or system. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other like elements in a process, method, article, or system that comprises the element.
The above-mentioned serial numbers of the embodiments of the present invention are merely for description and do not represent the merits of the embodiments.
Through the above description of the embodiments, those skilled in the art will clearly understand that the method of the above embodiments can be implemented by software plus a necessary general hardware platform, and certainly can also be implemented by hardware, but in many cases, the former is a better implementation manner. With this understanding in mind, the technical solutions of the present invention may be embodied in the form of a software product stored in a storage medium (e.g., ROM/RAM, magnetic disk, optical disk) as described above, and including instructions for causing a microprocessor to execute the methods according to the embodiments of the present invention.
As will be appreciated by one skilled in the art, embodiments of the present invention may be provided as a method, system, or computer program product. Accordingly, the present invention may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, the present invention may take the form of a computer program product embodied on one or more computer-usable storage media having computer-usable program code embodied in the medium.
The present invention is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the invention. It will be understood that each flow and/or block of the flow diagrams and/or block diagrams, and combinations of flows and/or blocks in the flow diagrams and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
While preferred embodiments of the present invention have been described, additional variations and modifications in those embodiments may occur to those skilled in the art once they learn of the basic inventive concepts. Therefore, it is intended that the appended claims be interpreted as including preferred embodiments and all such alterations and modifications as fall within the scope of the invention.
It will be apparent to those skilled in the art that various changes and modifications may be made in the invention without departing from the invention
With clear spirit and scope. Thus, if such modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention is also intended to include such modifications and variations.
The above description is only a preferred embodiment of the present invention, and not intended to limit the scope of the present invention, and all modifications of equivalent structures and equivalent processes, which are made by using the contents of the present specification and the accompanying drawings, or directly or indirectly applied to other related technical fields, are included in the scope of the present invention.
Claims (10)
1. A signal transmission control method, characterized in that the method comprises:
the method comprises the steps that a microprocessor obtains relevant information of target equipment, wherein the relevant information comprises EDID information and instruction information;
sending the acquired related information to an information request end, wherein the communication connection mode of the microprocessor and the information request end is one of the following modes:
the microprocessor is connected with the information request end through a target line, the target line comprises at least one of a signal line and a power line, and the signal line comprises a differential signal line;
the microprocessor is arranged at the information request end.
2. The signal transmission control method according to claim 1, wherein the microprocessor is connected to the information request terminal via the target line, and the step of acquiring the information related to the target device by the microprocessor includes:
the microprocessor obtains the relevant information in the target device.
3. The signal transmission control method according to claim 1, wherein the microprocessor is disposed at the information requesting side, and the step of acquiring the related information of the target device by the microprocessor includes:
the microprocessor acquires the related information which is burned in advance and stored in a memory;
or the microprocessor acquires the relevant information of the target device, burns and stores the relevant information of the target device in the memory, so that the information request terminal can read the relevant information from the memory.
4. The signal transmission control method of claim 1, wherein the step of the microprocessor obtaining the information about the target device is followed by further comprising:
and closing a data sending port after the relevant information is sent or the first preset time interval of the relevant information is not read.
5. The signal transmission control method of claim 1, wherein the step of the microprocessor obtaining the information about the target device is followed by further comprising:
caching the related information;
closing a switch of a comparison circuit connected with the microprocessor and a switch borrowing a data path;
sending the related information to the information request terminal;
and after the related information is sent, the switch of the comparison circuit and the switch of the borrowing data path are turned on.
6. The signal transmission control method of claim 1, wherein the method further comprises:
when the time length for detecting that the level of the comparison circuit is smaller than the preset value is longer than or equal to the preset time length, stopping working;
re-reading the level of the comparison circuit;
and when the re-read level is greater than the preset value, executing the step that the microprocessor acquires the related information of the target equipment.
7. The signal transmission control method of claim 1, wherein the step of the microprocessor acquiring the information about the target device comprises:
and when the microprocessor detects a handshake instruction, acquiring the relevant information of the target device.
8. The signal transmission control method according to claim 1, wherein the step of sending the acquired related information to an information requesting side includes:
and sending the acquired related information to the information request terminal through the detected non-working line.
9. A microprocessor, characterized in that the microprocessor is connected to a memory, in which a computer program is stored, which computer program, when being executed by the microprocessor, realizes the steps of the method according to one of claims 1 to 8.
10. A computer-readable storage medium, characterized in that a computer program is stored on the computer-readable storage medium, which computer program, when being executed by a processor, carries out the steps of the method according to any one of claims 1 to 8.
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103533283A (en) * | 2006-11-07 | 2014-01-22 | 索尼株式会社 | Transmission apparatus, transmission method, receiving apparatus and receiving method |
| CN106791555A (en) * | 2016-12-29 | 2017-05-31 | 龙迅半导体（合肥）股份有限公司 | A kind of single netting twine extender of data transmission method, HDMI signals |
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Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103533283A (en) * | 2006-11-07 | 2014-01-22 | 索尼株式会社 | Transmission apparatus, transmission method, receiving apparatus and receiving method |
| CN106791555A (en) * | 2016-12-29 | 2017-05-31 | 龙迅半导体（合肥）股份有限公司 | A kind of single netting twine extender of data transmission method, HDMI signals |
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