CN113452237B

CN113452237B - Power supply controller capable of reducing audio noise and method for reducing audio noise

Info

Publication number: CN113452237B
Application number: CN202010221795.4A
Authority: CN
Inventors: 刘家旗; 林宥婕; 王彦勋; 江瑞培
Original assignee: Richtek Technology Corp
Current assignee: Richtek Technology Corp
Priority date: 2020-03-26
Filing date: 2020-03-26
Publication date: 2022-06-24
Anticipated expiration: 2040-03-26
Also published as: CN113452237A

Abstract

A power supply controller with audio noise reduction and a method for reducing audio noise are provided. The power supply controller with the function of reducing audio noise is used in a power supply circuit to reduce the audio noise of the laminated ceramic capacitor, and the power supply controller generates a control signal according to a voltage positioning signal and a voltage sensing signal and operates a power switch in a power stage circuit to convert an input voltage into an output voltage. The power supply controller includes: a conversion circuit and a pulse width modulation control circuit. The conversion circuit comprises a digital-to-analog converter and a slope control circuit. The slope control circuit adjusts the falling slope of the analog voltage positioning signal when the power supply controller operates in the noise reduction mode and the current level is higher than the required level, and generates the adjusted analog voltage positioning signal to limit the falling rate of the output voltage to be greater than 0 and not higher than a preset rate.

Description

Power supply controller capable of reducing audio noise and method for reducing audio noise

Technical Field

The present invention relates to a power supply controller, and more particularly, to a power supply controller capable of reducing audio noise. The invention also relates to a method for reducing audio noise.

Background

Multilayer Ceramic capacitors (MLCCs) are widely used in electronic products due to their low cost and small volume. The MLCC is formed by laminating parallel ceramic materials, which are a material having piezoelectric characteristics, and electrode materials. When an alternating voltage is applied to two ends of the MLCC, the MLCC deforms and impacts a circuit board around the MLCC, and if the impact frequency is within a frequency range (20 Hz-20 kHz) which can be heard by human ears, audio noise is generated. Many electronic products are used relatively close to the human ear, such as: notebook computers, tablet computers, smart phones, and the like. If these electronic products generate audio noise, the use experience will be affected, so the audio noise is a problem that designers of electronic products are in urgent need of reducing.

Generally, the MLCC is coupled to an output voltage. In order to reduce audio noise, one prior art technique adjusts the output voltage to stop changing when the voltage change frequency (i.e., the change frequency of the output voltage) across the MLCC falls within the audio frequency range. In this way, the variation frequency of the output voltage is 0, thereby avoiding the generation of audio noise.

One of the disadvantages of the prior art is that the output voltage is simply maintained at a fixed potential, so that the variation frequency of the output voltage is 0, and although the generation of audio noise is avoided, since the output voltage must be maintained at a higher potential all the time, the consumption of electric energy is relatively high, which results in a reduction in battery life of the electronic product, and limits the application range of the electronic product. Another disadvantage of this prior art is that even in the case that the output voltage changes at a frequency lower than the audio frequency range, if the output voltage changes too rapidly, i.e. the output voltage changes have rapid instantaneous changes in amplitude, from the point of view of fourier transform, frequency spreading, the pulses of this output voltage change, which consist of pulses of various frequencies, cause the MLCC to oscillate in the audio frequency range, which generates audio noise.

In view of the above, the present invention provides a power supply controller with reduced audio noise and a method for reducing audio noise, which extend the battery life under the condition of reducing audio noise, so as to increase the application range of electronic products.

Disclosure of Invention

In one aspect, the present invention provides a power supply controller with audio noise reduction for a power supply circuit to reduce audio noise of a multilayer ceramic capacitor, the power supply controller generating a control signal according to a voltage positioning signal and a voltage sensing signal to operate a power switch in a power stage circuit to convert an input voltage into an output voltage and to adjust the output voltage from a current level toward a requested level, the power supply controller comprising: a conversion circuit, comprising: a digital-to-analog converter for generating an analog voltage positioning signal according to the voltage positioning signal; and a slope control circuit, coupled to the digital-to-analog converter, for adjusting a falling slope of the analog voltage positioning signal when the power supply controller operates in a noise reduction mode and the current level is higher than the requested level, and generating an adjusted analog voltage positioning signal for limiting a falling rate of the output voltage to be greater than 0 and not higher than a preset rate; and a Pulse Width Modulation (PWM) control circuit coupled to the converting circuit for generating the control signal according to the adjusted analog voltage positioning signal and the voltage sensing signal.

In a preferred embodiment, the slope control circuit determines whether to enable the noise reduction mode based on a difference level between the current level and the requested level.

In a preferred embodiment, the slope control circuit determines whether to enable the noise reduction mode according to a dynamic voltage variation frequency of the analog voltage positioning signal.

In a preferred embodiment, the predetermined rate is not higher than 60 μ V/μ s.

In a preferred embodiment, the predetermined rate is adjustable.

In the aforementioned embodiment, the predetermined rate is preferably adjusted according to a difference level between the current level and the requested level and/or a dynamic voltage variation frequency of the analog voltage positioning signal.

From another aspect, the present invention provides a method for reducing audio noise in a power supply circuit to reduce audio noise of a multilayer ceramic capacitor, the method comprising: generating a control signal according to a voltage positioning signal and a voltage sensing signal, and operating a power switch in a power stage circuit to convert an input voltage into an output voltage and adjust the output voltage from a current level toward a requested level; generating an analog voltage positioning signal by analog conversion according to the voltage positioning signal; in a noise reduction mode, when the current level is higher than the required level, adjusting a falling slope of the analog voltage positioning signal to generate an adjusted analog voltage positioning signal for limiting a falling rate of the output voltage to be greater than 0 and not higher than a preset rate; and generating the control signal according to the adjusted analog voltage positioning signal and the adjusted voltage sensing signal.

In a preferred embodiment, the method for reducing audio noise further comprises: determining whether to enable the noise reduction mode according to a difference level between the current level and the requested level.

In a preferred embodiment, the method for reducing audio noise further comprises: and determining whether to enable the noise reduction mode according to a dynamic voltage change frequency of the dynamic voltage positioning signal.

The purpose, technical content, features and effects of the present invention will be more readily understood through the following detailed description of specific embodiments.

Drawings

Fig. 1 shows a schematic diagram of a power supply circuit according to the present invention.

Fig. 2A-2C show schematic diagrams of signal waveforms according to an embodiment of the present invention.

Fig. 3A and 3B are schematic diagrams illustrating signal waveforms according to another embodiment of the present invention.

Fig. 4A and 4B are schematic diagrams illustrating signal waveforms according to still another embodiment of the present invention.

Fig. 5 is a schematic diagram showing the comparison of the battery life of the present invention with that of the prior art.

Fig. 6 shows a schematic diagram comparing the volume of the present invention with that of the prior art.

Fig. 7A-7J show synchronous or asynchronous buck, boost, and boost-buck power stage circuits.

Description of the symbols in the drawings

1: power supply circuit

3: central processing unit

11 power stage circuit

12 power supply controller

121: conversion circuit

1211 digital to analog converter

1213 slope control circuit

123 PWM control circuit

GATE control signal

H, H1, H2 high level

L is low level

MLCC (multilayer ceramic capacitor)

SVID voltage positioning signal

S1, S2 slope

S1', S2

t is time

t1, t2 points in time

T1, T2, T3, T4, T5, T6 term

Toff 4-Toff 6, duration

VDAC analog voltage positioning signal

VDAC' adjusted analog voltage positioning signal

Vd1, Vd2 difference level

Vin is input voltage

Vout output voltage

VSEN voltage sensing signal

V1, V2, V3 levels

Detailed Description

The drawings in the present disclosure are schematic and are intended to show the coupling relationship between circuits and the relationship between signal waveforms, and the circuits, signal waveforms and frequencies are not drawn to scale.

Fig. 1 shows an embodiment of a power supply controller (power supply controller 12) with reduced audio noise according to the present invention. The power supply controller 12 is used in the power supply circuit 1 to reduce audio noise of a Multi-layer Ceramic Capacitor (MLCC). The power supply circuit 1 is used for converting an input voltage Vin into an output voltage Vout. The power supply circuit 1 includes a power stage circuit 11 and a power supply controller 12. The power supply controller 12 receives a Voltage Identification (VID) signal SVID generated by a Central Processing Unit (CPU) 3 and a Voltage sense signal VSEN related to the output Voltage Vout, and generates a control signal GATE to operate a power switch in the power stage circuit 11 to convert the input Voltage Vin into the output Voltage Vout. The voltage positioning signal SVID contains various information including information that requires changing the level of the output voltage, so that the power supply controller 12 adjusts the output voltage Vout from the current level toward the required level.

The CPU3 generates a voltage positioning signal SVID for requesting the power supply circuit 1 to position the output voltage Vout, so that the power supply circuit 1 dynamically and real-timely changes the output voltage Vout to adjust the output voltage Vout from the current level to the requested level, and supplies power to a load circuit, such as the CPU3 itself.

The power supply controller 12 is used in the power supply circuit 1 to reduce the audio noise of the MLCC. The power supply controller 12 includes a conversion circuit 121 and a Pulse Width Modulation (PWM) control circuit 123. The conversion circuit 121 includes a digital-to-analog converter (DAC) 1211 and a slope control circuit 1213. The digital-to-analog converter 1211 is used for generating an analog voltage positioning signal VDAC according to the voltage positioning signal SVID. The voltage positioning signal SVID transmits, for example, a command of the CPU3 including a frequency signal, communication-related information, a dynamic voltage positioning request, and the like to the power supply controller 12 in the form of a bus. The power supply controller 12 receives the voltage positioning signal SVID, for example, by a bus control circuit, converts the voltage positioning signal SVID into a digital signal, and transmits the digital signal to the digital-to-analog converter 1211. The digital-to-analog converter 1211 receives the digital signal and converts the digital signal into an analog voltage positioning signal VDAC.

In the embodiment, the slope control circuit 1213 is coupled to the digital-to-analog converter 1211, when the power supply controller 12 operates in the noise reduction mode and the current level of the output voltage Vout is higher than the required level of the analog voltage positioning signal VDAC, that is, when the CPU3 requests the power supply controller 12 to reduce the current level of the output voltage Vout to the required level, the slope of the analog voltage positioning signal VDAC is adjusted to generate the adjusted analog voltage positioning signal VDAC', so as to limit the reduction rate of the output voltage Vout to be greater than 0 and not higher than the predetermined rate.

The PWM control circuit 123 receives the adjusted analog voltage positioning signal VDAC' and the voltage sensing signal VSEN, and generates a control signal GATE to switch the power switch of the power stage circuit 11, so as to convert the input voltage Vin into the output voltage Vout. The voltage sensing signal VSEN is related to the output voltage Vout and fed back to the PWM control circuit 123. According to the present invention, the power stage circuit 31 may be configured as, for example, but not limited to, a synchronous or asynchronous buck, boost, buck, or boost-buck type power conversion circuit, as shown in fig. 7A-7J.

In the present embodiment, the power supply controller 12 has the function of reducing audio noise, so as to reduce the audio noise generated by the multilayer ceramic capacitor MLCC; the multilayer ceramic capacitor MLCC is coupled between the output voltage Vout and the ground potential.

Fig. 2A-2C show schematic diagrams of signal waveforms according to an embodiment of the present invention. For example, the analog positioning signal VDAC is shown in the signal waveform diagram of fig. 2A, in which the horizontal axis of the waveform diagram of the analog positioning signal VDAC is time t, and when the analog positioning signal VDAC is switched to the high level H, it is shown that the power supply circuit 1 is required to adjust the output voltage Vout to the level V1 shown in fig. 2B; when the analog voltage positioning signal VDAC switches to the low level L, it indicates that the power supply circuit 1 is required to regulate the output voltage Vout to the level V2 shown in fig. 2B. However, since the required level varies according to the requirement of the CPU3, and the frequency of the waveform of the analog positioning signal VDAC is not fixed, the power supply controller 12 cannot know the frequency of the waveform of the analog positioning signal VDAC in advance before receiving the analog positioning signal VDAC, that is, the frequency of the waveform of the analog positioning signal VDAC is not regular. For example, as shown in FIG. 2A, during period T1, the frequency of the analog voltage positioning signal VDAC waveform is low, and during period T2, the frequency of the analog voltage positioning signal VDAC waveform is high.

In one embodiment, as shown in FIG. 2B, whenever the analog voltage positioning signal VDAC is switched from the high level H to the low level L, i.e., the output voltage Vout is required to be changed and adjusted from the current level, e.g., the level V1 shown in the output voltage Vout signal waveform of FIG. 2B, to a lower required level, e.g., the potential V2 shown in the output voltage Vout signal waveform of FIG. 2B, the power supply controller 12 enables the noise reduction mode to limit the falling slope of the adjusted analog voltage positioning signal VDAC 'to the slope S1, such that the output voltage Vout falling rate S1' is adjusted toward the target of the level V2 in a ramp-down manner greater than 0 and not greater than a predetermined rate, but the adjustment of the output voltage Vout to the level V1 is completed before the next time the analog voltage positioning signal VDAC requires the change of the output voltage Vout (which is then switched from the low level L to the high level H), but keeps the output voltage Vout slowly falling, at most, to the required level.

In a typical application, in a case where the analog voltage positioning signal VDAC indicates that the output voltage Vout is required to be adjusted from a relatively low current level (e.g., level V2 shown in fig. 2B) to a relatively high required level (e.g., level V1 shown in fig. 2B), the power supply controller 12 will increase the output voltage Vout from the current level (e.g., level V2 shown in fig. 2B) to a relatively high required level (e.g., level V1 shown in fig. 2B) at a relatively fast rate, which indicates that the load circuit (e.g., CPU3 shown in fig. 1) supplied by the output voltage Vout has a power consumption requirement, and therefore, the output voltage Vout needs to be increased from the current level to the high required level at a high increasing rate, preferably without decreasing the increasing rate. In the case where the analog voltage positioning signal VDAC indicates that the output voltage Vout is required to be adjusted from a relatively high current level to a relatively low required level, generally speaking, the load circuit supplied by the output voltage Vout does not require high power consumption, but the purpose of saving power is to reduce the power consumption, so that according to the present invention, the reduction rate S1' of the output voltage Vout is reduced to reduce audio noise without consuming too much power, thereby prolonging the battery life.

It should be noted that if the analog voltage positioning signal VDAC indicates that the output voltage Vout is required to be adjusted from a relatively low current level to a relatively high required level, and the load circuit supplied by the output voltage Vout does not have a fast boosting requirement, the ramp-up rate may be reduced, and the ramp-up rate may be reduced in a manner of gradual ramp-up under acceptable audio noise.

It should be noted that the falling slope of the adjusted analog voltage positioning signal VDAC 'is limited to the slope S1, such that the falling rate S1' of the output voltage Vout is adjusted in a slow-falling manner greater than 0 and not greater than a predetermined rate toward the target of the required level. The slope S1 can be determined according to the audio noise tolerable to human ears, and the slope S1 can be determined according to the audio noise standard.

In one embodiment, as shown in fig. 2C, the power supply controller 12 may enable the noise reduction mode according to a Dynamic Voltage Identification (DVID) frequency of the analog Voltage positioning signal VDAC. As shown in fig. 2A, for example, during the time period T1, the frequency of the analog voltage positioning signal VDAC waveform is low (e.g., outside the audio frequency range), and therefore the power supply controller 12 does not enable the noise reduction mode; during a period T2 after time T1, the frequency of the analog voltage positioning signal VDAC waveform is high (e.g., within the audio frequency range), and thus the power supply controller 12 enables the noise reduction mode. In the noise reduction mode, the falling slope of the adjusted analog voltage positioning signal VDAC' is limited to the slope S1, so that the falling rate of the output voltage Vout is gradually decreased to a predetermined rate greater than 0 to adjust the output voltage Vout to the target level V2, but the output voltage Vout is adjusted to the level V1 without being switched from the low level L to the high level H before the next time the analog voltage positioning signal VDAC requires changing the output voltage Vout (the level L is then switched to the high level H), but the output voltage Vout is slowly decreased to the required level.

Fig. 3A and 3B are schematic diagrams illustrating signal waveforms according to another embodiment of the present invention. For example, the analog positioning signal VDAC is shown in the signal waveform diagram of fig. 3A, in which the horizontal axis of the waveform diagram of the analog positioning signal VDAC is time t, and when the analog positioning signal VDAC is switched to the high level H1, the power supply circuit 1 is required to regulate the output voltage Vout to the level V1 shown in fig. 3B; when the analog voltage positioning signal VDAC switches to the low level L, it indicates that the power supply circuit 1 is required to regulate the output voltage Vout to the level V2 shown in fig. 3B; when the analog positioning signal VDAC switches to another high level H2, it indicates that the power supply circuit 1 is required to regulate the output voltage Vout to a level V3 as shown in FIG. 3B.

In the embodiment illustrated in fig. 3A and 3B, unlike the embodiment shown in fig. 2C, when the analog voltage positioning signal VDAC is switched from the high level H1 to the other high level H2, i.e. in the period T3 after the time point T2, the analog voltage positioning signal VDAC requires that the output voltage Vout be changed and adjusted toward a lower required level from the current level, e.g. the level V1 shown in the output voltage Vout signal waveform of fig. 3B, as shown by the potential V3 shown in the output voltage Vout signal waveform of fig. 3B; however, the power supply controller 12 may determine whether to enable the noise reduction mode according to the difference level Vd1 between the current level and the request level, and in one embodiment, determine not to enable the noise reduction mode when the difference level Vd1 is not greater than a difference level threshold, i.e., not to limit the falling rate of the output voltage Vout. This is because the difference level Vd1 between the current level and the requested level is not greater than the difference level threshold, the audio noise is not noticeable and is acceptable, and the difference level threshold can be adjusted according to the actual requirement.

On the other hand, when the analog positioning signal VDAC is switched from the high level H1 to the low level L, i.e. in the period T2 after the time point T1, the analog positioning signal VDAC requests to change the output voltage Vout from the current level, e.g. the level V1 shown in the output voltage Vout signal waveform of fig. 3B, and adjust the output voltage Vout toward the lower required level, e.g. the potential V2 shown in the output voltage Vout signal waveform of fig. 3B; the power supply controller 12 determines to enable the noise reduction mode according to the difference level Vd2 between the current level and the requested level being greater than the difference level threshold, and limits the falling slope of the adjusted analog voltage positioning signal VDAC' to the slope S1, so that the falling rate of the output voltage Vout is adjusted toward the target of the level V2 in a slow-falling manner greater than 0 and not greater than a preset rate. Of course, in such an embodiment, whether the noise reduction mode is enabled or not may still be determined according to the frequency of the analog voltage positioning signal VDAC waveform, for example, during the period T1, the frequency of the analog voltage positioning signal VDAC waveform is low (e.g., outside the audio frequency range), and thus the power supply controller 12 does not enable the noise reduction mode. That is, the slope control circuit 1213 determines whether to enable the noise reduction mode according to the difference level between the current level and the requested level; on the other hand, the slope control circuit 1213 may also determine whether to enable the noise reduction mode according to the dynamic voltage variation frequency of the analog voltage positioning signal VDAC. Both of these mechanisms may be employed simultaneously or one of them may be employed, and all of them fall within the scope of the present invention.

Fig. 4A and 4B are schematic diagrams illustrating signal waveforms according to still another embodiment of the present invention. For example, the analog positioning signal VDAC is shown in the signal waveform diagram of fig. 4A, in which the horizontal axis of the waveform diagram of the analog positioning signal VDAC is time t, and when the analog positioning signal VDAC is switched to the high level H, it is shown that the power supply circuit 1 is required to adjust the output voltage Vout to the level V1 shown in fig. 4B; when the analog voltage positioning signal VDAC switches to the low level L, it indicates that the power supply circuit 1 is required to adjust the output voltage Vout as shown in fig. 4B toward the voltage V2.

In the embodiment illustrated in fig. 4A and 4B, the periods T4, T5, and T6 respectively show the analog voltage positioning signal VDAC with three different frequencies, wherein the frequency of the analog voltage positioning signal VDAC is the lowest during the period T4 and the highest during the period T6. As shown in fig. 4A and 4B, the power supply controller 12 operates in the noise reduction mode during the periods T4, T5, and T6, and limits the falling slope of the adjusted analog voltage positioning signal VDAC 'to the slope S2, so that the output voltage Vout falls at a rate S2', and the output voltage Vout is adjusted toward the target level V2 in a slow-falling manner greater than 0 and not higher than a predetermined rate.

The embodiments shown in fig. 4A and 4B are intended to illustrate that, in the noise reduction mode, the higher the dynamic voltage positioning change frequency of the analog voltage positioning signal VDAC, the shorter the time that the output voltage Vout is at the lower potential V2; conversely, the lower the dynamic voltage positioning change frequency of the analog voltage positioning signal VDAC, the longer the output voltage Vout is at the lower potential V2. As shown, the adjusted analog voltage positioning signal VDAC' has three different frequencies, as shown by periods T4, T5 and T6, and it can be seen that, in the period T4 with the lowest frequency, the output voltage Vout is at the lower potential V2, and the duration Toff4 is longest; in a period T5 in which the frequency is high, the output voltage Vout is at a potential V2 at a low potential, and the duration Toff5 is short; in the period T6 with the highest frequency, the output voltage Vout is at the potential V2 with a lower potential, and the duration Toff6 is shortest. The embodiment shown in fig. 4A and 4B shows that according to the present invention, the falling slope S2 is properly adjusted to make the falling rate S2' of the output voltage Vout not higher than the predetermined rate, so as to reduce the audio noise generated by the MLCC to an acceptable range, and to make the output voltage Vout stay at a lower level, so as to prolong the battery life and increase the application range of the electronic product.

In a preferred embodiment, the falling rate S2' is not higher than the predetermined rate of 60 μ V/μ S. In a preferred embodiment, the falling rate S2' is not higher than the predetermined rate of 30 μ V/μ S. In a preferred embodiment, the falling rate S2 is not higher than the predetermined rate by 12 μ V/μ S. In a more preferred embodiment, the falling rate S2' is adjusted to a predetermined rate of 6 μ V/μ S. In a preferred embodiment, the predetermined rate is adjustable, and the predetermined rate can be adjusted according to the application and the product of the product. In a preferred embodiment, the predetermined rate is adjusted according to a difference level between the current level and the requested level and/or a dynamic voltage variation frequency of the analog voltage positioning signal. For example, as shown in the waveform of the output voltage Vout signal of FIG. 3B, the normal falling rate S2' is not higher than the predetermined rate of 60 μ V/μ S, so that the amplitude of the falling of the output voltage Vout from the level V1 to a lower required level is not more than 60mV at the frequency (1-3 kHz) with the most serious audio noise, so as to meet the requirement of the noise specification.

Fig. 5 is a schematic diagram showing the comparison of the battery life of the present invention with that of the prior art. As shown, the thick dashed line illustrates a prior art plot of battery life versus frequency. Since the prior art stops changing the output voltage when the dynamic voltage positioning change frequency exceeds the frequency f1, and maintains the output voltage at a fixed potential, the change frequency of the output voltage is 0, and although the generation of audio noise is avoided, the output voltage must be maintained at a higher potential all the time, the power consumption is relatively high, and the battery endurance time of the electronic product is relatively short. In fig. 5, the thick solid line shows a graph of battery life versus frequency according to the present invention. Because the invention adopts the mode of voltage slow drop to regulate the output voltage, the output voltage can still be regulated to a lower potential under the condition of lower dynamic voltage positioning change frequency, thereby reducing the power consumption, maintaining higher battery endurance time and reducing audio noise.

Fig. 6 shows a schematic diagram comparing the volume of the present invention with that of the prior art. The thick dashed line illustrates a prior art plot of volume versus frequency and the thick solid line illustrates a plot of volume versus frequency according to the present invention. As shown in the figure, the power supply controller and the method for reducing the audio noise can obviously reduce the audio noise under different dynamic voltage positioning change frequencies, thereby showing that the invention is superior to the prior art.

The present invention has been described with respect to the preferred embodiments, but the above description is only for the purpose of making the content of the present invention easy to understand for those skilled in the art, and is not intended to limit the scope of the present invention. The embodiments described are not limited to single use, but may be used in combination, for example, two or more embodiments may be combined, and some components in one embodiment may be substituted for corresponding components in another embodiment. In addition, the term "processing or calculating or generating an output result according to a signal" in the present invention is not limited to the signal itself, and includes performing voltage-current conversion, current-voltage conversion, and/or ratio conversion on the signal, if necessary, and then performing processing or calculation according to the converted signal to generate an output result. It is understood that those skilled in the art can devise various equivalent variations and combinations, not necessarily all illustrated, without departing from the spirit of the invention. Accordingly, the scope of the present invention should be determined to encompass all such equivalent variations as described above.

Claims

1. A power supply controller with audio noise reduction for a power supply circuit to reduce audio noise of a laminated ceramic capacitor, the power supply controller generating a control signal according to a voltage positioning signal and a voltage sensing signal to operate a power switch in a power stage circuit to convert an input voltage to an output voltage and to adjust the output voltage from a current level toward a requested level, wherein the laminated ceramic capacitor is coupled to the output voltage, the power supply controller comprising:

a conversion circuit, comprising:

a digital-to-analog converter for generating an analog voltage positioning signal according to the voltage positioning signal; and

a slope control circuit, coupled to the digital-to-analog converter, for adjusting a falling slope of the analog voltage positioning signal when the power supply controller operates in a noise reduction mode and the current level is higher than the requested level, so as to generate an adjusted analog voltage positioning signal for limiting a falling rate of the output voltage to be greater than 0 and not higher than a predetermined rate; and

a pulse width modulation control circuit coupled to the conversion circuit for generating the control signal according to the adjusted analog voltage positioning signal and the voltage sensing signal.

2. The power supply controller according to claim 1, wherein the slope control circuit determines whether to enable the noise reduction mode according to a difference level between the current level and the requested level.

3. The power supply controller according to claim 1, wherein the slope control circuit determines whether to enable the noise reduction mode according to a dynamic voltage variation frequency of the analog voltage positioning signal.

4. The power supply controller with audio noise reduction of claim 1, wherein the predetermined rate is not higher than 60 μ ν/μ β.

5. The power supply controller with audio noise reduction of claim 1, wherein the predetermined rate is adjustable.

6. The power supply controller according to claim 5, wherein the predetermined rate is adjusted according to a difference level between the current level and the requested level and/or a dynamic voltage variation frequency of the analog voltage positioning signal.

7. A method for reducing audio noise in a power supply circuit to reduce audio noise of a multilayer ceramic capacitor, the method comprising:

generating a control signal according to a voltage positioning signal and a voltage sensing signal, and operating a power switch in a power stage circuit to convert an input voltage into an output voltage and adjust the output voltage from a current level toward a requested level;

generating an analog voltage positioning signal by analog conversion according to the voltage positioning signal;

in a noise reduction mode, when the current level is higher than the required level, adjusting a falling slope of the analog voltage positioning signal to generate an adjusted analog voltage positioning signal for limiting a falling rate of the output voltage to be greater than 0 and not higher than a preset rate; and

and generating the control signal according to the adjusted analog voltage positioning signal and the voltage sensing signal.

8. The method of reducing audio noise of claim 7, further comprising: determining whether to enable the noise reduction mode according to a difference level between the current level and the requested level.

9. The method of reducing audio noise of claim 7, further comprising: and determining whether to enable the noise reduction mode according to a dynamic voltage change frequency of the analog voltage positioning signal.

10. The method of claim 7, wherein the predetermined rate is not higher than 60 μ V/μ s.

11. The method of claim 7, wherein the predetermined rate is adjustable.

12. The method of claim 11, wherein the predetermined rate is adjusted according to a difference level between the current level and the requested level and/or a dynamic voltage variation frequency of the analog voltage positioning signal.