CN113451448B - LED epitaxial structure, p-type GaP layer coarsening method thereof and LED chip - Google Patents
LED epitaxial structure, p-type GaP layer coarsening method thereof and LED chip Download PDFInfo
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- 238000000034 method Methods 0.000 title claims abstract description 20
- 229910001218 Gallium arsenide Inorganic materials 0.000 claims abstract description 44
- 239000000758 substrate Substances 0.000 claims abstract description 25
- 238000003892 spreading Methods 0.000 claims abstract description 16
- 238000007788 roughening Methods 0.000 claims abstract description 8
- 239000011777 magnesium Substances 0.000 claims description 29
- XYFCBTPGUUZFHI-UHFFFAOYSA-N Phosphine Chemical compound P XYFCBTPGUUZFHI-UHFFFAOYSA-N 0.000 claims description 20
- RBFQJDQYXXHULB-UHFFFAOYSA-N arsane Chemical compound [AsH3] RBFQJDQYXXHULB-UHFFFAOYSA-N 0.000 claims description 20
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 claims description 9
- 229910052749 magnesium Inorganic materials 0.000 claims description 9
- 229910000077 silane Inorganic materials 0.000 claims description 9
- FYYHWMGAXLPEAU-UHFFFAOYSA-N Magnesium Chemical compound [Mg] FYYHWMGAXLPEAU-UHFFFAOYSA-N 0.000 claims description 8
- 229910000073 phosphorus hydride Inorganic materials 0.000 claims description 8
- 239000005922 Phosphane Substances 0.000 claims description 4
- 229910000064 phosphane Inorganic materials 0.000 claims description 4
- 230000004907 flux Effects 0.000 claims description 3
- MHYQBXJRURFKIN-UHFFFAOYSA-N C1(C=CC=C1)[Mg] Chemical compound C1(C=CC=C1)[Mg] MHYQBXJRURFKIN-UHFFFAOYSA-N 0.000 abstract description 4
- 238000005530 etching Methods 0.000 abstract description 3
- 238000004519 manufacturing process Methods 0.000 abstract description 3
- 239000004065 semiconductor Substances 0.000 abstract description 3
- 230000009286 beneficial effect Effects 0.000 abstract description 2
- 238000001816 cooling Methods 0.000 abstract description 2
- 230000007547 defect Effects 0.000 abstract description 2
- 229910005540 GaP Inorganic materials 0.000 description 99
- HZXMRANICFIONG-UHFFFAOYSA-N gallium phosphide Chemical compound [Ga]#P HZXMRANICFIONG-UHFFFAOYSA-N 0.000 description 98
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 32
- 238000010586 diagram Methods 0.000 description 4
- 239000000463 material Substances 0.000 description 3
- AJGDITRVXRPLBY-UHFFFAOYSA-N aluminum indium Chemical compound [Al].[In] AJGDITRVXRPLBY-UHFFFAOYSA-N 0.000 description 2
- 230000003993 interaction Effects 0.000 description 2
- IHGSAQHSAGRWNI-UHFFFAOYSA-N 1-(4-bromophenyl)-2,2,2-trifluoroethanone Chemical compound FC(F)(F)C(=O)C1=CC=C(Br)C=C1 IHGSAQHSAGRWNI-UHFFFAOYSA-N 0.000 description 1
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- ZSWFCLXCOIISFI-UHFFFAOYSA-N endo-cyclopentadiene Natural products C1C=CC=C1 ZSWFCLXCOIISFI-UHFFFAOYSA-N 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000007613 environmental effect Effects 0.000 description 1
- 229910052733 gallium Inorganic materials 0.000 description 1
- 229910052738 indium Inorganic materials 0.000 description 1
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 1
- 238000002488 metal-organic chemical vapour deposition Methods 0.000 description 1
- 230000000007 visual effect Effects 0.000 description 1
- 238000001039 wet etching Methods 0.000 description 1
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- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0062—Processes for devices with an active region comprising only III-V compounds
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/20—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
- H01L33/22—Roughened surfaces, e.g. at the interface between epitaxial layers
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Abstract
The invention relates to the technical field of semiconductors, in particular to an LED epitaxial structure, a method for roughening a p-type GaP layer of the LED epitaxial structure and an LED chip, wherein a GaAs substrate is placed in a reaction cavity to generate a p-type GaP current expansion layer; after the p-type GaP current spreading layer is generated; reducing the temperature in the reaction cavity by 60-120 ℃, reducing the introduction flow of the Ga source in the reaction cavity, and increasing the introduction flow of the cyclopentadienyl magnesium in the reaction cavity; and growing a p-type GaP coarsening layer on the p-type GaP current spreading layer. The invention has the beneficial effects that: the p-type GaP coarsened layer is obtained by cooling the GaP current expansion layer and carrying out low-length-speed high-doping intermittent growth GaP, the etching and coarsening of the GaP layer on the epitaxial structure are not needed, the light-emitting efficiency is improved, the manufacturing process is also reduced, and the introduction of defects during the etching and coarsening of the GaP layer is also avoided.
Description
Technical Field
The invention relates to the technical field of semiconductors, in particular to an LED (light emitting diode) epitaxial structure, a coarsening method of a p-type GaP (gallium phosphide) layer of the LED epitaxial structure and an LED chip with the epitaxial structure.
Background
The development of science and technology is changing day by day, scientific and technological products cover the aspects of life, the living environment is changed, the natural interaction interface of all things is thousands of, most importantly, the visual interaction is still, the display and light-emitting device is applied to mainstream electronic equipment, and as an element in the display device, the LED chip is widely applied by the characteristics of high brightness, low power consumption, long service life and environmental protection pollution.
But because LED chip semiconductor material refractive index is big to cause the angle of taking out of light to be little for its emergent light get rid of the efficiency low, the further promotion difficulty of luminance carries out the coarsening to LED epitaxial layer surface, can improve the light take out efficiency of LED chip, and then provides luminance. In the prior art, dry etching or wet etching is mainly used to roughen a GaP (gallium phosphide) layer in a chip manufacturing process, so as to improve the light emission rate, but this method may damage an epitaxial junction structure and affect the light emitting efficiency of an LED chip.
Disclosure of Invention
The present invention provides an LED epitaxial structure capable of improving light emission rate, a method for roughening a p-type GaP layer thereof, and an LED chip having the epitaxial structure, so as to solve the problems mentioned in the background art.
In order to achieve the purpose, the invention provides the following technical scheme:
the invention relates to a coarsening method of a p-type GaP layer of an LED epitaxial structure, which comprises the following steps:
s1, a GaAs (gallium arsenide) substrate is placed in a reaction cavity, the temperature in the cavity of the reaction cavity is set within the range of 550-800 ℃, and an n-type GaAs buffer layer, an n-type DBR (distributed Bragg reflector) reflecting layer, an n-type AlInP (aluminum phosphide) limiting layer, a multi-quantum well light-emitting layer, a p-type AlInP limiting layer and a p-type GaP current expanding layer are sequentially generated and covered on the GaAs substrate;
s2, after the p-type GaP current extension layer is generated; reducing the temperature in the reaction cavity by 60-120 ℃, reducing the introduction flow of a Ga (gallium) source in the reaction cavity, and increasing the introduction flow of the metallocene magnesium in the reaction cavity; and growing a p-type GaP coarsening layer on the p-type GaP current spreading layer.
As a further aspect of the invention, growing a p-type GaP coarsening layer on the p-type GaP current spreading layer includes:
s21, introducing a Ga source, arsine and a Mg (magnesium) source into the reaction cavity, generating a p-type GaP layer on the p-type GaP current expansion layer, and when the growth thickness of the p-type GaP layer reaches 5-20 nm; stopping introducing the Ga source for 2-10 seconds;
s22, continuously introducing the Ga source, continuously generating a new p-type GaP layer on the current p-type GaP layer, and stopping introducing the Ga source for 2-10 seconds after the thickness of the new p-type GaP layer reaches 5-20 nm;
s23, the step S22 is circulated for a plurality of times until the total thickness of all the p-type GaP layers reaches 20-400nm, and the p-type GaP coarsening layer is formed.
As a still further aspect of the present invention, the reducing the inflow rate of the Ga source in the reaction chamber includes:
and reducing the flow of the Ga source in the reaction cavity by 80-95%.
As a still further aspect of the present invention, the increasing the flow rate of the magnesium metallocene in the reaction chamber includes:
and increasing the flow of the metallocene magnesium in the reaction cavity by 0-200%.
As a further scheme of the present invention, the placing of the GaAs substrate into the reaction chamber, the setting of the temperature in the reaction chamber within the range of 550-:
s11, introducing a Ga source, arsine and silane into the reaction cavity to generate an n-type GaAs buffer layer on the GaAs substrate;
s12, introducing an Al (aluminum) source, a Ga source, arsine and silane into the reaction cavity to generate an n-type DBR reflecting layer on the n-type GaAs buffer layer;
s13, introducing an Al source, an In (indium) source, phosphane and silane into the reaction cavity, so that an n-type AlInP limiting layer is generated on the n-type DBR reflecting layer;
s14, introducing an Al source, a Ga source, an In source and phosphine into the reaction cavity to generate a multi-quantum well light-emitting layer on the n-type AlInP limiting layer;
s15, introducing an Al source, an In source, phosphine and an Mg source into the reaction cavity to generate a p-type AlInP limiting layer on the multiple quantum well light-emitting layer;
s16, introducing a Ga source, phosphine and an Mg source into the reaction cavity, and generating a p-type GaP expansion layer on the p-type AlInP limiting layer.
As a further scheme of the invention, the thickness of the n-type DBR reflecting layer is 200-1500nm, the thickness of the n-type AlInP limiting layer is 50-200nm, the thickness of the multi-quantum well light-emitting layer is 200-1000nm, the thickness of the p-type AlInP limiting layer is 50-200nm, and the thickness of the p-type GaP expanding layer is 1500-8000 nm.
The invention is an LED epitaxial structure, which includes:
the LED epitaxial structure comprises a GaAs substrate, and an n-type GaAs buffer layer, an n-type DBR reflecting layer, an n-type AlInP limiting layer, a multi-quantum well light-emitting layer, a p-type AlInP limiting layer, a p-type GaP current expanding layer and a p-type GaP coarsening layer which are sequentially arranged on the GaAs substrate, wherein the p-type GaP coarsening layer is obtained by using the coarsening method of the p-type GaP layer of the LED epitaxial structure.
As a further proposal of the invention, the thickness of the p-type GaP coarsening layer is 20-400 nm.
The invention is an LED chip, comprising: the LED epitaxial structure comprises an LED chip main body, wherein the LED epitaxial structure is arranged on the LED chip main body.
As a further scheme of the invention, the LED chip is a red LED chip.
Compared with the prior art, the invention has the beneficial effects that: the LED comprises an LED epitaxial structure, wherein the LED epitaxial structure comprises a p-type GaP coarsening layer, and the p-type GaP coarsening layer is obtained by using the coarsening method of the p-type GaP layer of the LED epitaxial structure. The light-emitting efficiency is improved, the manufacturing procedures are reduced, and the introduction of defects during etching and coarsening of the GaP layer is avoided.
Drawings
Fig. 1 is a schematic workflow diagram of a method for roughening a p-type GaP layer of an LED epitaxial structure according to embodiment 1 of the present invention;
fig. 2 is a schematic workflow diagram of step S1 in embodiment 2 of the present invention;
fig. 3 is a schematic workflow diagram of step S2 in embodiment 2 of the present invention;
fig. 4 is a schematic structural diagram of an LED epitaxial structure according to the present invention.
In the drawings: the light emitting diode comprises a 1-GaAs substrate, a 2-n type GaAs buffer layer, a 3-n type DBR reflecting layer, a 4-n type AlInP limiting layer, a 5-multi-quantum well light emitting layer, a 6-p type AlInP limiting layer, a 7-p type GaP current spreading layer and an 8-p type GaP coarsening layer.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
In the description of the present invention, it is to be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", and the like, indicate orientations and positional relationships based on those shown in the drawings, and are used only for convenience of description and simplicity of description, and do not indicate or imply that the device or element being referred to must have a particular orientation, be constructed and operated in a particular orientation, and thus, should not be considered as limiting the present invention. Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, features defined as "first", "second", may explicitly or implicitly include one or more of the described features. In the description of the present invention, "a plurality" means two or more unless specifically defined otherwise.
Example 1
Referring to fig. 1, in an embodiment of the present invention, a method for roughening a p-GaP layer of an LED epitaxial structure includes:
s1, generating a p-type GaP current expansion layer on a GaAs substrate
Putting a GaAs (gallium arsenide) substrate into a reaction cavity, setting the temperature in the cavity of the reaction cavity within the range of 550-800 ℃, and sequentially generating and covering an n-type GaAs buffer layer, an n-type DBR (distributed Bragg reflector) layer, an n-type AlInP limiting layer, a multi-quantum well light-emitting layer, a p-type AlInP limiting layer and a p-type GaP current expansion layer on the GaAs substrate;
s2, forming a p-type GaP coarsening layer on the p-type GaP extension layer
After the p-type GaP current spreading layer 7 grows and forms; the growth temperature is reduced by 60 ℃, the Ga source flow is reduced by 80-95%, the metallocene magnesium flow is not increased, and then a p-type GaP layer is intermittently grown on the p-type GaP current spreading layer 7; a p-type GaP coarsening layer 8 is formed.
Referring to fig. 2, in the present embodiment, s1, the step of forming a p-type GaP current spreading layer on a GaAs substrate is as follows:
s10, putting the GaAs substrate into a reaction cavity
Putting the GaAs (gallium arsenide) substrate 1 into an MOVCD (chemical vapor deposition device) reaction chamber, wherein the temperature of the MOCVD reaction chamber is set within the range of 550-800 ℃;
s11, generating an n-type GaAs buffer layer
Ga source, arsine and silane are introduced into the MOVCD reaction chamber to grow an n-type GaAs buffer layer 2 with the thickness of 100-,
s12, generating an n-type DBR reflecting layer
Introducing Al source, Ga source, arsine and silane into the MOVCD reaction chamber to grow 200-1500nm thick n-type DBR reflective layer (distributed Bragg reflective layer) 3,
s13, generating an n-type AlInP limiting layer
Introducing Al source, In source, phosphane and silane into MOVCD reaction chamber, growing 50-200nm thick n-type AlInP (aluminum indium phosphide) limiting layer 4,
s14, generating a multiple quantum well luminescent layer
Introducing Al source, Ga source, In source and phosphine into the MOVCD reaction chamber to grow 200-1000nm thick MQW (multiple quantum well) light-emitting layer 5,
s15, generating a p-type AlInP limiting layer
Introducing Al source, In source, phosphane and Mg source into MOVCD reaction chamber, growing 50-200nm thick p-type AlInP (aluminum indium phosphide) limiting layer 6,
s16, generating a p-type GaP extension layer
Ga source, phosphine and Mg source are introduced into the MOVCD reaction chamber, and a p-type GaP extension layer 7 with the thickness of 1500-8000nm is grown.
Specifically, referring to fig. 3, the steps of intermittently growing the p-type GaP layer in the embodiment are as follows:
s21, generating a p-type GaP layer on the p-type GaP current extension layer
Introducing a Ga source, arsine and a Mg source into the reaction cavity, generating a p-type GaP layer on the p-type GaP current expansion layer, and when the growth thickness of the p-type GaP layer reaches 5-20 nm; stopping introducing the Ga source for 2-10 seconds;
s22, repeatedly generating a new p-type GaP layer on the current p-type GaP layer
Continuing to introduce the Ga source, continuing to generate a new p-type GaP layer on the current p-type GaP layer, and stopping introducing the Ga source for 2-10 seconds after the thickness of the new p-type GaP layer reaches 5-20 nm;
s23, forming a p-type GaP coarsening layer
The step S22 is cycled for several times until the total thickness of all the p-type GaP layers reaches 20-400nm, and the p-type GaP coarsening layer 8 is formed.
Example 2
Steps S21, S22, S23 are further refined, wherein step S11 is configured to reduce the growth temperature by 120 ℃, reduce the Ga source flux by 80-95%, and increase the magnesium cyclopentadienyl flux by 200%.
The specific steps of intermittently growing the p-type GaP layer are as follows:
s21', after the p-type GaP current spreading layer 7 grows, the growth temperature is reduced by 120 ℃, the Ga source flow is reduced by 80-95%, and the metallocene magnesium flow is increased by 200%; introducing a Ga source, arsine and a Mg source on the p-type GaP current spreading layer 7 to grow a p-type GaP layer with the thickness of 5-20 nm; stopping introducing the Ga source for 2-10 seconds;
s22', continuously introducing the Ga source, arsine and the Mg source to increase the thickness of the p-type GaP layer by 5-20 nm; stopping introducing the Ga source for 2-10 seconds;
s23', the step S21 is cycled for several times to grow the thickness of the p-type GaP layer to 20-400nm, and a p-type GaP coarsening layer 8 is formed.
Preferably, the specific steps of intermittently growing the p-type GaP layer are as follows: after the p-type GaP current spreading layer 7 grows, the growth temperature is reduced by 60-120 ℃, the Ga source flow is reduced by 80-95%, and the cyclopentadienyl magnesium flow is increased by 0-200%; introducing a Ga source, arsine and a Mg source to grow a p-type GaP layer with the thickness of 10nm, and stopping the Ga source for 5 seconds; introducing a Ga source, arsine and a Mg source to grow a p-type GaP layer with the thickness of 10nm, and stopping the Ga source for 5 seconds; then, a p-type GaP layer with the thickness of 10nm is grown by introducing a Ga source, arsine and a Mg source, and a p-type GaP coarsening layer 8 with the thickness of 30nm is grown.
Example 3
The time for stopping the supply of the Ga source was controlled to 10 seconds, and a 60nm thick p-type GaP coarsened layer 8 was formed.
In an embodiment of the invention, a method for roughening a p-type GaP layer of an LED epitaxial structure comprises the following steps: after the p-type GaP current expansion layer 7 is grown, the growth temperature is reduced by 80 ℃, the flow of the Ga source is reduced by 80%, the flow of the cyclopentadienyl magnesium is increased by 100%, the Ga source, the arsine and the Mg source are introduced to grow the p-type GaP layer with the thickness of 20nm, and the Ga source is stopped for 10 seconds; introducing a Ga source, arsine and a Mg source to grow a p-type GaP layer with the thickness of 20nm, and stopping the Ga source for 10 seconds; then, a p-type GaP layer with the thickness of 20nm is grown by introducing a Ga source, arsine and a Mg source, and a p-type GaP coarsening layer 8 with the thickness of 60nm is grown.
Example 4
Further elaboration of steps S21, S22, S23,
the specific steps of intermittently growing the p-type GaP layer are as follows: after the p-type GaP current expansion layer 7 is grown, the growth temperature is reduced by 80 ℃, the flow of the Ga source is reduced by 95 percent, the flow of the cyclopentadienyl magnesium is increased by 100 percent, the Ga source, the arsine and the Mg source are introduced to grow the p-type GaP layer with the thickness of 20nm, and the Ga source is stopped for 10 seconds; introducing a Ga source, arsine and a Mg source to grow a p-type GaP layer with the thickness of 20nm, and stopping the Ga source for 10 seconds; then introducing a Ga source, arsine and a Mg source to grow a p-type GaP layer with the thickness of 20 nm; a 60nm thick p-type GaP roughening layer 8 is grown.
Example 5
Referring to fig. 4, the embodiment of the present invention further provides an application using the above embodiment.
An LED epitaxial structure includes a GaAs substrate 1, and an n-type GaAs buffer layer 2, an n-type DBR reflection layer 3, an n-type AlInP confinement layer 4, an MQW (multi-quantum well) light-emitting layer 5, a p-type AlInP confinement layer 6, a p-type GaP current spreading layer 7, and a p-type GaP coarsening layer 8 that are sequentially grown on the GaAs substrate 1, wherein the p-type GaP coarsening layer 8 is obtained by using the coarsening method of the p-type GaP layer of the LED epitaxial structure of embodiment 4. Wherein the thickness of the n-type GaAs buffer layer is as follows: 100-1000nm, the thickness of the n-type DBR reflection layer is 200-1500nm, the thickness of the n-type AlInP limiting layer is 50-200nm, the thickness of the multiple quantum well light-emitting layer is 200-1000nm, the thickness of the p-type AlInP limiting layer is 50-200nm, the thickness of the p-type GaP extension layer is 1500-8000nm, and the thickness of the p-type GaP coarsening layer is 20-400 nm.
The embodiment of the invention also provides a product adopting the specific embodiment, and the LED chip comprises an LED chip main body, wherein the LED chip main body is provided with the LED epitaxial structure as in the embodiment 5. The LED chip is a red LED chip.
Specifically, the LED epitaxial structure comprises a GaAs substrate 1, and an n-type GaAs buffer layer 2, an n-type DBR reflecting layer 3, an n-type AlInP limiting layer 4, a multi-quantum well light-emitting layer 5, a p-type AlInP limiting layer 6, a p-type GaP current expanding layer 7 and a p-type GaP coarsening layer 8 which are sequentially grown on the GaAs substrate 1.
The working principle of the invention is as follows: sequentially growing an n-type GaAs buffer layer 2, an n-type DBR reflecting layer 3, an n-type AlInP limiting layer 4, an MQW light-emitting layer 5, a p-type AlInP limiting layer 6 and a p-type GaP current expanding layer 7 on a GaAs substrate 1 of an LED epitaxial structure, and then cooling, high doping and intermittently growing GaP on the GaP current expanding layer 7 to obtain a p-type GaP coarsening layer 8; the probability of damage is reduced, and the light emitting efficiency is improved.
In the description of the present specification, reference to the description of the terms "one embodiment", "some embodiments", "an illustrative embodiment", "an example", "a specific example", or "some examples", etc., means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the present invention. In this specification, schematic representations of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.
It will be evident to those skilled in the art that the invention is not limited to the details of the foregoing illustrative embodiments, and that the present invention may be embodied in other specific forms without departing from the spirit or essential attributes thereof. The present embodiments are therefore to be considered in all respects as illustrative and not restrictive, the scope of the invention being indicated by the appended claims rather than by the foregoing description, and all changes which come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein. Any reference sign in a claim should not be construed as limiting the claim concerned.
Furthermore, it should be understood that although the present description refers to embodiments, not every embodiment may contain only a single embodiment, and such description is for clarity only, and those skilled in the art should integrate the description, and the embodiments may be combined as appropriate to form other embodiments understood by those skilled in the art.
Claims (10)
1. A coarsening method of a p-type GaP layer of an LED epitaxial structure is characterized by comprising the following steps:
s1, placing a GaAs substrate into a reaction cavity, setting the temperature in the cavity of the reaction cavity within the range of 550-800 ℃, and sequentially generating an upper n-type GaAs buffer layer, an n-type DBR reflecting layer, an n-type AlInP limiting layer, a multi-quantum well light-emitting layer, a p-type AlInP limiting layer and a p-type GaP current expanding layer on the GaAs substrate;
s2, after the p-type GaP current extension layer is generated; reducing the temperature in the reaction cavity by 60-120 ℃, reducing the introduction flow of the Ga source in the reaction cavity, and increasing the introduction flow of the metallocene magnesium in the reaction cavity; and growing a p-type GaP coarsening layer on the p-type GaP current spreading layer.
2. The method of claim 1, wherein growing a p-type GaP roughening layer on the p-type GaP current spreading layer comprises:
s21, introducing a Ga source, arsine and a Mg source into the reaction cavity, and generating a p-type GaP layer on the p-type GaP current spreading layer, wherein when the growth thickness of the p-type GaP layer reaches 5-20 nm; stopping introducing the Ga source for 2-10 seconds;
s22, continuing to introduce the Ga source, continuing to generate a new p-type GaP layer on the current p-type GaP layer, and stopping introducing the Ga source for 2-10 seconds after the thickness of the new p-type GaP layer reaches 5-20 nm;
s23, circulating the step S22 for several times until the total thickness of all the p-type GaP layers reaches 20-400nm, and forming the p-type GaP coarsening layer.
3. The method of claim 2, wherein the reducing the flux of the Ga source in the reaction chamber comprises:
and reducing the flow of the Ga source in the reaction cavity by 80-95%.
4. The method of claim 2, wherein the increasing the throughput of the metallocene in the reaction chamber comprises:
and increasing the flow of the metallocene magnesium in the reaction cavity by 0-200%.
5. The method for roughening the p-type GaP layer of the LED epitaxial structure according to claim 3 or 4, wherein the step of placing the GaAs substrate into a reaction chamber, the temperature inside the reaction chamber is set within the range of 550-:
s11, introducing a Ga source, arsine and silane into the reaction cavity to generate an n-type GaAs buffer layer on the GaAs substrate;
s12, introducing an Al source, a Ga source, arsine and silane into the reaction cavity to generate an n-type DBR reflecting layer on the n-type GaAs buffer layer;
s13, introducing an Al source, an In source, phosphane and silane into the reaction cavity to generate an n-type AlInP limiting layer on the n-type DBR reflecting layer;
s14, introducing an Al source, a Ga source, an In source and phosphine into the reaction cavity to generate a multi-quantum well light-emitting layer on the n-type AlInP limiting layer;
s15, introducing an Al source, an In source, phosphine and an Mg source into the reaction cavity to generate a p-type AlInP limiting layer on the multiple quantum well light-emitting layer;
s16, introducing a Ga source, phosphine and an Mg source into the reaction cavity, and generating a p-type GaP expansion layer on the p-type AlInP limiting layer.
6. The method of claim 5, wherein the thickness of the n-type DBR reflective layer is 200-1500nm, the thickness of the n-type AlInP confinement layer is 50-200nm, the thickness of the multiple quantum well light-emitting layer is 200-1000nm, the thickness of the p-type AlInP confinement layer is 50-200nm, and the thickness of the p-type GaP extension layer is 1500-8000 nm.
7. An LED epitaxial structure, comprising:
a GaAs substrate, and an n-type GaAs buffer layer, an n-type DBR reflection layer, an n-type AlInP limiting layer, a multi-quantum well light-emitting layer, a p-type AlInP limiting layer, a p-type GaP current spreading layer and a p-type GaP coarsening layer which are sequentially arranged on the GaAs substrate, wherein the p-type GaP coarsening layer is obtained by using the coarsening method of the p-type GaP layer of the LED epitaxial structure according to any one of claims 1 to 6.
8. The LED epitaxial structure of claim 7, wherein the thickness of the p-type GaP coarsening layer is 20-400 nm.
9. An LED chip, comprising: an LED chip body provided with an LED epitaxial structure according to any one of claims 7 to 8.
10. The LED chip of claim 9, wherein said LED chip is a red LED chip.
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