CN113436966B - Method for processing analog integrated circuit with enhanced radiation resistance - Google Patents

Method for processing analog integrated circuit with enhanced radiation resistance Download PDF

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CN113436966B
CN113436966B CN202110704001.4A CN202110704001A CN113436966B CN 113436966 B CN113436966 B CN 113436966B CN 202110704001 A CN202110704001 A CN 202110704001A CN 113436966 B CN113436966 B CN 113436966B
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alpha
transistor
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CN113436966A (en
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林和
牛崇实
洪学天
黄宏嘉
张维忠
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Hongda Xinyuan Shenzhen Semiconductor Co ltd
Jinxin Advanced Technology Research Institute Shanxi Co ltd
Jinxin Electronics Manufacturing Shanxi Co ltd
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Jinxin Advanced Technology Research Institute Shanxi Co ltd
Jinxin Electronics Manufacturing Shanxi Co ltd
Hongda Xinyuan Shenzhen Semiconductor Co ltd
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    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
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Abstract

The invention provides a processing method of an analog integrated circuit with enhanced radiation resistance. The method comprises the following steps: after forming an integrated circuit containing active elements and passive elements in an isolated single-crystal region of a silicon substrate, making the radiation-sensitive cascaded transistors in the integrated circuit containing the active elements and the passive elements into transistors in a composite form; irradiating the composite transistor through alpha-particles, and introducing radiation defects of the composite transistor into an emitter-base junction to adjust a gain coefficient of the composite transistor; irradiating all elements in the integrated circuit with gamma particles; after gamma-particles have irradiated all the elements, the integrated circuit is subjected to a stabilization annealing process, the stabilization annealing time corresponding to the prototype annealing time in the process of forming the integrated circuit.

Description

Analog integrated circuit processing method with enhanced radiation resistance
Technical Field
The invention provides a processing method of an analog integrated circuit with enhanced radiation resistance, belonging to the technical field of microelectronics.
Background
Electronic components and integrated circuits with high reliability and high performance are urgently needed in the intelligent society, particularly analog integrated circuits with enhanced radiation resistance to constant ionizing radiation are needed, but the market for the analog integrated circuits with enhanced radiation resistance is rare at present. The existing radiation-resistant linear and analog integrated circuits generally adopt special device structure designs, such as a ring gate structure, and the like to improve the radiation resistance of the devices. Improving the radiation resistance of integrated circuits through complex circuit and device structure designs can significantly increase the cost and introduce more factors that affect the reliability of the devices.
Disclosure of Invention
The method can be used for silicon-based bipolar and field effect devices and related integrated circuits, and can be popularized and applied to other types of radiation-resistant semiconductor devices and integrated circuits (such as silicon carbide (SiC), gallium nitride (GaN), gallium arsenide (GaAs), and the like). The method is used for solving the problems that an integrated circuit with radiation resistance is rare in the prior art, the radiation resistance processing method of the existing integrated circuit is high in cost and easy to cause unstable circuit performance, and adopts the following technical scheme:
a method of analog integrated circuit processing with enhanced radiation immunity, the method comprising:
after forming an integrated circuit containing active elements and passive elements in an isolated single-crystal region of a silicon substrate, making the radiation-sensitive cascaded transistors in the integrated circuit containing the active elements and the passive elements into transistors in a composite form;
irradiating the composite transistor by alpha-particles, and introducing radiation defects of the composite transistor into an emitter-base junction to adjust a gain coefficient of the composite transistor;
irradiating all elements in the integrated circuit with gamma particles;
after gamma-particles have irradiated all elements, the integrated circuit is subjected to a stabilization annealing process, the stabilization annealing time being identical to the prototype annealing time in the process of forming the integrated circuit.
Further, the forming of an integrated circuit containing active and passive components in an isolated single-crystal region of a silicon substrate comprises:
forming an oxide layer with the thickness of 0.6 mu m on the surface of a single-crystal silicon region of a matrix crystal through oxidation treatment in the single-crystal silicon region, and forming a bipolar transistor and a diffusion resistor through impurity diffusion and redistribution, and metallization and diffusion of contact;
formed in the single-crystal Si region to 0.7-0.8 μm and having a doping concentration of 2E17/cm 2 And the bipolar transistor and the diffusion resistor are connected by a conductive line to form the integrated circuit.
Further, the transistor in a composite form includes a first transistor and a second transistor, and a gain of the transistor in a composite form is determined by the following formula:
h21_e=h21_e^1+h21_e^2+h21_e^1×h21_e^2
wherein, h21_ e ^1 and h21_ e ^2 respectively represent the gains of the first transistor and the second transistor, and as can be seen from the above formula, cascade connection of h21_ e ^1 to h21_ e ^1,2 values to 10-20 can be obtained on the transistors.
Further, irradiating the transistor in a composite form with α -particles includes:
placing the substrate with the integrated circuit in an irradiation apparatus having an alpha-particle source based on the plutonium-239 isotope;
reducing the energy of the alpha-particles by adjusting the distance between the substrate surface and the alpha-particle source or by using an alpha-particle attenuation film so that the maximum of the alpha-particle distribution falls on the arrangement depth of the emitter p-n junction;
integrated circuits with transistors in a compound form are irradiated with alpha-particles.
Further, the irradiation flux of the alpha-particles is 1E10/cm 2 To 5E11/cm 2
Further, the irradiation flux of the gamma-particles was 5E16/cm 2 To 5E17/cm 2
Further, the annealing temperature range of the stable annealing is 180-220 ℃.
Further, the method further comprises:
applying a 3 μm thick photoresist layer from the plane of the integrated circuit to a substrate before irradiating the transistor in composite form with alpha-particles;
a window above an emitter region constituting the transistor is formed by photolithography.
Further, the method further comprises:
setting an integrated circuit to have the same operating parameters as a circuit produced by criticizing includes:
controlling circuit parameters of an illuminated integrated circuit, the circuit parameters including a voltage gain K n (ii) a Input current bias I vh (ii) a Input current difference I ex (ii) a Input zero offset voltage U sm (ii) a Circuit I at nominal supply voltage p The current consumed;
determining effective parameters for index selection characterizing the product's resistance to continuous gamma radiation, said effective parameters comprising an index of allowable resistance-radiation flux phi K At said index-radiation flux phi Of K The value of the integrated circuit parameter does not exceed the allowed range according to the technical specification (variation according to K n-not more than 30%), wherein the index is the radiation flux phi K The initial reduction rate of the gain corresponding to the value of (a) is obtained by the following formula:
η=(Kn(Ф^1)-Kn(Ф^2))/(Kno(Ф^2-Ф^1))
wherein Kn (phi 1) and Kn (phi 2) respectively represent integrated circuit gain values when the fluxes phi 1 and phi 2> phi 1; kno (phi 2-phi 1) represents the gain value before the integrated circuit is irradiated.
Further, in the irradiation of the transistor in the composite form by the α -particles, the irradiation time is obtained by the following formula:
Figure 100002_DEST_PATH_IMAGE001
wherein, the first and the second end of the pipe are connected with each other,T α represents the irradiation time of the transistor in the composite form irradiated by alpha-particles;H α representing the actual irradiation flux of the current alpha-particles;H maxα representing the upper limit value of the alpha-particle irradiation flux range;H αmin represents the lower limit value of the alpha-particle irradiation flux range;T 1 the standard irradiation time of the alpha-particles is shown,T 1 the value range of (A) is 30min-45min; deltaT α Showing the variation of the irradiation time of the alpha-particles after the irradiation flux is adjusted in the alpha-particle irradiation process;T yα indicating the length of time that irradiation has been performed;H bα represents the adjusted alpha-particle irradiation flux;
in irradiating all elements in the integrated circuit with gamma particles, the irradiation time is obtained by the following formula:
Figure 100002_DEST_PATH_IMAGE002
wherein the content of the first and second substances,T γ representing the irradiation time of the gamma-particles to irradiate the transistor in the composite form;H γ representing the actual irradiation flux of the current gamma-particles;H γmax represents the upper limit value of the gamma-particle irradiation flux range;H γmin represents the lower limit value of the gamma-particle irradiation flux range;T 2 the standard irradiation time of the gamma-particles is shown,T 2 the value range of (A) is 25min-35min; deltaT γ Showing the gamma-particle irradiation time variation after the irradiation flux is adjusted in the gamma-particle irradiation process;T indicating the length of time that irradiation has been performed;H indicating the adjusted gamma-particle irradiation flux.
The invention has the beneficial effects that:
1. the invention provides a processing method of an analog integrated circuit with enhanced radiation resistance, which adopts a special process to enhance the radiation resistance of the integrated circuit so as to reduce the degradation of the electrical performance of the integrated circuit in an irradiation environment.
2. The invention enhances the ionization radiation resistance of the circuit by introducing radiation high temperature treatment (RHT) into the process. One of the primary approaches is to reduce the degradation of electrical performance parameters of analog integrated circuits upon exposure to continuous ionizing radiation by sequentially irradiating and annealing radiation-sensitive circuit elements with alpha-particles and gamma-particles.
3. The invention adopts a special process to form active and passive elements in an isolated single crystal region of a silicon substrate, then the radiation-sensitive cascaded transistors of the circuit are made into a composite form, and the flux is 1E10/cm 2 To 5E11/cm 2 The alpha-particles of (a) introduce radiation defects into the emitter-base junction to tune the gain factor of the compound transistor,
4. a relevant feature of the circuit design of the present invention is that the radiation immunity of the operational amplifier is primarily dependent on the sensitivity of the transistor providing high gain to radiation when operating in the active mode. The decrease in transistor gain is related to the formation of radiative recombination centers in the silicon body and near-surface regions.
5. The invention uses continuous irradiation of alpha-particles and gamma-particles, thereby ensuring that irradiation defects are introduced into the structure and reducing the sensitivity of parameters to subsequent irradiation when the parameters are used in equipment. The gamma-particle radiation eliminates the 'fast' degradation component of h21e (phi), and the alpha-particle treatment introduces the volume radiation defect into the device structure. In addition, alpha-radiation is employed to fine-tune the gain of the transistors used in the differential cascade of circuits.
6. The invention ensures that a given circuit gain is achieved by alpha-particle irradiation of only the active region, e.g. the transistor, since no passive components (diffusion resistors) or no alpha-particle treatment for the differential cascode stabilization current generator are required.
Drawings
FIG. 1 is a flow chart of the method of the present invention.
Detailed Description
The preferred embodiments of the present invention will be described in conjunction with the accompanying drawings, and it should be understood that they are presented herein only to illustrate and explain the present invention and not to limit the present invention.
The present invention provides a method for processing an analog integrated circuit with enhanced radiation resistance, which aims to reduce the reduction of the electrical performance parameters of the analog integrated circuit when the analog integrated circuit is exposed to continuous ionizing radiation by orderly irradiating and annealing radiation-sensitive circuit elements by alpha-particles and gamma-particles so as to manufacture the analog and linear integrated circuit with enhanced radiation resistance to the constant ionizing radiation
Example 1
A method of fabricating an analog integrated circuit having enhanced radiation immunity, as shown in fig. 1, the method comprising:
s1, after an integrated circuit containing an active element and a passive element is formed in an isolated single crystal region of a silicon substrate, a radiation-sensitive cascaded transistor in the integrated circuit containing the active element and the passive element is made into a transistor in a composite form;
s2, irradiating the composite transistor through alpha-particles, and introducing radiation defects of the composite transistor into an emitter-base junction to adjust a gain coefficient of the composite transistor;
s3, irradiating all elements in the integrated circuit by utilizing gamma-particles;
and S4, after all the elements are irradiated by the gamma-particles, performing stable annealing treatment on the integrated circuit, wherein the stable annealing time is consistent with the prototype annealing time in the integrated circuit forming process, and specifically, the stable annealing time is 60 minutes.
Wherein the forming of an integrated circuit containing active and passive components in an isolated single crystal region of a silicon substrate comprises:
s101, forming an oxide layer with the thickness of 0.6 mu m on the surface of a single-crystal silicon region of a substrate crystal through oxidation treatment in the single-crystal silicon region, and forming a bipolar transistor and a diffusion resistor through impurity diffusion and redistribution and contact metallization and diffusion;
s102, formed in the single-crystal Si region to 0.7-0.8 μm and having a doping concentration of2E17/cm 2 And the bipolar transistor and the diffusion resistor are connected by a conductive line to form the integrated circuit.
S103, the composite transistor comprises a first transistor and a second transistor, and the gain of the composite transistor is determined by the following formula:
h21_e=h21_e^1+h21_e^2+h21_e^1×h21_e^2
wherein, h21_ e ^1 and h21_ e ^2 respectively represent the gains of the first transistor and the second transistor, and as can be seen from the formula, the cascade of h21_ e ^1 to 100-400 can be obtained when the values of h21_ e ^1,2 are 10-20 on the transistors.
Specifically, a 3 μm thick photoresist layer was applied to the substrate from the plane of the integrated circuit before irradiating the transistor in a composite form with α -particles;
specifically, irradiating a transistor in a composite form with α -particles includes:
s201, placing the substrate with the integrated circuit in an irradiation device with an alpha particle source based on a plutonium-239 isotope;
s202, reducing the energy of alpha-particles by adjusting the distance between the surface of the substrate and an alpha-particle source or by adopting an alpha-particle attenuation film so as to enable the maximum value of alpha-particle distribution to fall on the arrangement depth of the p-n junction of the emitter;
s203, irradiating the integrated circuit with the transistor in the composite form with alpha-particles.
In this example, the irradiation flux of the alpha-particles was 5E11/cm 2 . The irradiation flux of the gamma-particles is 5E17/cm 2 . The annealing temperature range of the stable annealing is 200 ℃.
Example 2
Embodiment 2 differs from embodiment 1 in that the irradiation flux of γ -particles is set to 5 ee 16 particles/cm.
Example 3
Embodiment 3 differs from embodiment 1 in that α -particle irradiation is performed with the fluence of 1E10 particles/cm.
Example 4
Example 4 is different from example 1 in that the temperature of the stabilization annealing was set to 220 ℃.
Example 5
Example 5 is different from example 1 in that the temperature of the stabilization annealing is set to 180 ℃.
The working principle of the technical scheme of the embodiment 1-5 is as follows:
the transistors of the radiation-sensitive cascade of the circuit are made in composite form, passing through a flux of 1E10 particles/cm 2 -5E11 particles/cm 2 The irradiation of (a) introduces radiation defects into the emitter-base junction region, thereby adjusting the gain factor of the compound transistor. Then at 5E16 particles/cm 2 -5E17 particles/cm 2 All elements in the circuit are irradiated and annealed at 180-220 ℃.
When the analog microcircuit is used for radiating fields, its parameters undergo irreversible changes, where the most sensitive to radiation are the gain factor kn and the input current Ie. In addition to the decrease and increase due to exposure to radiation, the zero point offset also changes, and the difference between the input currents at the inverting and non-inverting inputs also increases.
The radiation immunity of an operational amplifier is mainly determined by the sensitivity of the transistors providing high gain to radiation, operating in the active mode. The decrease in transistor gain is related to the formation of radiative recombination centers in the silicon body and near-surface regions.
In the proposed method, the resistance of the circuit to ionizing radiation is enhanced by introducing radiation high temperature treatment (RHT) into the process. For this purpose, continuous irradiation of α -particles and γ -particles is used, thereby ensuring that irradiation defects are introduced into the structure, reducing the sensitivity of the parameters to subsequent irradiation when used in the apparatus. The gamma-particle radiation eliminates the 'fast' degradation component of h21e (phi), and the alpha-particle treatment introduces the volume radiation defect into the device structure. In addition, the gain of the transistors used in the differential cascade of the circuit must be fine-tuned using alpha-radiation. In the proposed method only the transistors are subjected to alpha-particle irradiation, thereby ensuring that a given circuit gain is achieved, since no passive components (diffusion resistors) or alpha-particle processing for differential cascaded regulated current generators are required.
Since the introduction of radiation defects into the active region of the transistor results in a gain reduction, the required cascade amplification can be achieved by using a composite transistor, the gain of which is expressed by the following equation:
h21_e=h21_e^1+h21_e^2+h21_e^1×h21_e^2(1)
where h21_ e ^1 and h21_ e ^2 are the gains of the first and second transistors, respectively. As can be seen from the expression (1), when the value of h21_ e ^1,2 is 10-20, the cascade connection of h21_ e ^ 100-400 can be obtained on the transistor.
According to this method, all transistors in the circuit are recommended to be irradiated with 5E15 particles/cm after making contact and inter-element connections and irradiating with a-particles 2 -5E17 particles/cm 2 Gamma irradiation treatment of flux. The flux was determined experimentally and corresponds to the "saturation" of the transistor's h21_ e ionization variation due to the irradiation flux; at a flux of more than 5E17 particles/cm 2 In the case of a p-n junction reverse current, the noise characteristics of the transistor deteriorate, and the temperature dependence of the parameters is stronger. Therefore, performance characteristics of the integrated circuit, such as an input current value, etc., cannot be guaranteed.
The main amplification cascade of operational amplifiers is made according to a differentiating circuit. The transistors in the differential cascade must have the same characteristics. After treatment with gamma particles, unbalanced voltages may occur because the radiation characteristics of the oxide coating may be slightly different and the values of h21_ e of the transistors may be different.
In the proposed method, the parameters of the transistor are adjusted by irradiation with alpha-particles from an isotope source. It was found that the parameters of the transistor would equilibrate after irradiation with particles. The reason for this is that alpha-radiation introduces radiation defects into the base more efficiently than the near surface region and the variation in transistor gain is determined by the recombination process in the space charge region of the emitter-base p-n junction.
For fine adjustment of the h21_ E value, the radiation flux used was adjusted to 1E10-5E11 particles/cm 2. At fluxes greater than 5E11 particles/cm 2, the value of h21_ E of the individual transistors decreases to below 10 and the parameters of the reverse current of the p-n junction, etc., decrease. At fluxes below 1E10 particles/cm 2, the variation of h21_ E values is less than 10%, which makes it impossible to balance the characteristics of the transistors that need to be tuned. In addition, the integrated circuit is prone to self-excitation in the case of too high parasitic positive feedback generated by the gain of the transistor.
In order to prevent the reverse current of the collector p-n junction from increasing after the treatment, the reverse current in the proposed method is controlled by changing the efficiency of the emitter and the recombination rate of minority carriers in the base of the transistor. For this purpose, the run of alpha-particles in silicon is set equal to the depth of the emitter p-n junction of the vertical transistor. The introduction of radiation defects into the bulk charge region of the emitter transition region increases the recombination losses of carriers, resulting in a reduction of h21_ e, while the collector junction, p-n junction and collector region are virtually undamaged. The application of the above process increases the critical flux for transistor damage when using gamma irradiation treatment because one of the causes of transistor failure is compensation of the silicon due to radiative defects in the collector, creating a series resistance.
In the method proposed in this implementation, the stabilization annealing is carried out at a temperature of 180-220 ℃. Annealing of radiation defects causing rapid changes in h21_ e values was initiated at an upper temperature limit (220 ℃), temperatures below 180 ℃ not allowing stabilization of circuit parameters. In some cases, after the integrated circuit wafer is fabricated, it must be heated to 300-350 ℃ (for example, when the wafer is placed in an Au — Si eutectic package or bonded with polyimide varnish), then the process can also proceed in the following order: first, the process of adjusting the gain may be accomplished by irradiation with alpha-particles, followed by dicing and packaging of the wafer, followed by gamma-quantum irradiation and stabilization annealing. The stabilization anneal time is consistent with the prototype anneal time.
The method of the present embodiment has been tested in the manufacture of analog bipolar integrated circuits (operational amplifiers). The circuit is an industrial analog operational amplifier. In contrast to what is known, in the proposed composite transistor circuit scheme, a second amplifier stage (providing a gain of about 280-300) and an output stage are fabricated. The first amplifier stage (gain of about 4-5) has no decisive effect on the reduction of the gain of the operational amplifier. At the same time, it was found that the radiative heat treatment of the input stage transistor with alpha-particles significantly reduces the input current of the amplifier.
The technical solutions of the above embodiments 1 to 5 have the following effects: special processes are adopted to enhance the radiation resistance of the integrated circuit so as to reduce the degradation of the electrical performance of the integrated circuit under the irradiation environment. By introducing radiation high temperature treatment (RHT) into the process, the resistance of the circuit to ionizing radiation is enhanced. One of the primary approaches is to reduce the degradation of electrical performance parameters of analog integrated circuits upon exposure to continuous ionizing radiation by sequentially irradiating and annealing radiation-sensitive circuit elements with alpha-particles and gamma-particles. After forming active and passive components in isolated single crystal regions of a silicon substrate using a special process, the radiation sensitive cascaded transistors of the circuit are made to composite form by applying a flux of 1E10/cm 2 To 5E11/cm 2 The α -particles of (a) introduce radiation defects into the emitter-base junction to tune the gain factor of the composite transistor, a relevant feature of the circuit design is that the radiation immunity of the operational amplifier is primarily dependent on the sensitivity to radiation of the transistor providing high gain operating in the active mode. The decrease in transistor gain is related to the formation of radiative recombination centers in the silicon body and near-surface regions. Continuous irradiation of alpha-particles and gamma-particles is used, thereby ensuring introduction of irradiation defects into the structure and reducing the sensitivity of the parameters to subsequent irradiation when used in equipment. The gamma-particle radiation eliminates the 'fast' degradation component of h21e (phi), and the alpha-particle treatment introduces the volume radiation defect into the device structure. In addition, alpha-radiation is employed to fine-tune the gain of the transistors used in the differential cascade of circuits. Only the active region, e.g. the transistor, is subjected to alpha-particle irradiation, thereby ensuring that a given circuit gain is achieved, since no passive components (diffusion resistors) or alpha-particle processing for a differential cascaded regulated current generator are required.
Example 6
Embodiment 6 is a further limitation of the method for processing an asic with enhanced radiation resistance as set forth in embodiment 1, and specifically, the method for processing an asic with enhanced radiation resistance further includes:
a window above an emitter region constituting the transistor is formed by photolithography.
And, the analog integrated circuit processing method with enhanced radiation-resistant performance further comprises:
setting an integrated circuit to have the same operating parameters as a circuit produced by criticizing includes:
controlling circuit parameters of an irradiated integrated circuit, the circuit parameters including a voltage gain K n (ii) a Input current bias I vh (ii) a Difference of input current I ex Inputting zero offset voltage U sm (ii) a Circuit I at nominal supply voltage p The current consumed;
determining effective parameters for index selection characterizing the product's resistance to continuous gamma radiation, said effective parameters comprising an index of allowable resistance-radiation flux phi к At said index-radiation flux phi Kappa light The value of the integrated circuit parameter does not exceed the allowable range according to the technical specification (according to the variation of kappa-not more than 30%), wherein the index is the radiation flux phi к The initial reduction rate of the gain corresponding to the value of (a) is obtained by the following formula:
η=(Kn(Ф^1)-Kn(Ф^2))/(Kno(Ф^2-Ф^1))
wherein Kn (phi ^ 1) and Kn (phi ^ 2) respectively represent integrated circuit gain values when the fluxes phi ^1 and phi ^2> phi ^ 1; kno (phi 2-phi 1) represents the gain value before the integrated circuit is irradiated. It can be concluded from the data obtained that the variation of the parameters of the radiation hyperthermia treatment remains within the ranges proposed and given in the characterising part of the present description, reaching the objectives of the present patent.
While ensuring that the increase in radiation resistance of the circuit does not degrade the initialized values of the parameters associated with RHT operation. The optimal RHT mode is as follows: irradiation with α -particles at a flux of 1E10-5E11 particles/cm 2 and γ -particles at a flux of 5E16-5E17/cm2, where Φ κ exceeds 5E15 particles/cm 2 (values obtained on circuits fabricated on KSDI structures according to the prototype method).
When the possible combination of parameters of the RHT mode exceeds the proposed interval (temperature of the stabilizing heat treatment is higher than 220 ℃), the radiation resistance of the proposed circuit does not exceed that of a circuit manufactured using only the prototype method of alpha-RHT, but is significantly higher than the value of a mass-produced circuit with the same initial performance characteristics.
The radiation resistance of the integrated circuit is ensured by carrying out the stabilization annealing at a temperature lower than 180 ℃, but, when the long-term stability of the electrical parameters is studied (100 hours at 125 ℃, with a supply voltage of + 12.6V applied), a reduction in the values of Kn and Ie is found, which is unacceptable according to the technical conditions (see the figure, which clearly shows an annealing phase in the range 150-170 ℃ to maintain the stability of the characteristics at 125 ℃), and
the effect of the above technical scheme is as follows: when irradiation is carried out with a flux of gamma-particles higher than 5E17/cm2, the radiation resistance of the IC Ie parameters is low. The proposed method for manufacturing an analog integrated circuit has the following advantages compared to known methods: the radiation resistance of the integrated circuit is improved for the initial value of the parameter specified according to the technical conditions, and the stability and repeatability of the integrated circuit parameter are improved in batch production.
Example 7
Example 7 is a further definition of the method for fabricating an analog integrated circuit with enhanced radiation resistance as set forth in example 1, in particular, the irradiation time during which the transistor in a composite form is irradiated by α -particles is obtained by the following formula:
Figure 449658DEST_PATH_IMAGE001
wherein the content of the first and second substances,T α represents the irradiation time of the transistor in the composite form irradiated by alpha-particles;H α representing the actual irradiation flux of the current alpha-particles;H αmax an upper limit value representing an alpha-particle irradiation flux range;H minα represents the lower limit of the alpha-particle irradiation flux rangeA value;T 1 the standard irradiation time of the alpha-particles is shown,T 1 the value range of (a) is 30min-45min; deltaT α Showing the variation of the irradiation time of the alpha-particles after the irradiation flux is adjusted in the alpha-particle irradiation process;T yα indicating the length of time that irradiation has been performed;H represents the adjusted alpha-particle irradiation flux;
in irradiating all elements in the integrated circuit with gamma particles, the irradiation time is obtained by the following formula:
Figure 897956DEST_PATH_IMAGE002
wherein, the first and the second end of the pipe are connected with each other,T γ representing the irradiation time of the gamma-particles to irradiate the transistor in the composite form;H γ representing the actual irradiation flux of the current gamma-particles;H γmax representing the upper limit value of the gamma-particle irradiation flux range;H γmin represents the lower limit value of the gamma-particle irradiation flux range;T 2 the standard irradiation time of the gamma-particles is expressed,T 2 the value range of (A) is 25min-35min; deltaT γ Showing the gamma-particle irradiation time variation after the irradiation flux is adjusted in the gamma-particle irradiation process;T indicating the length of time that irradiation has been performed;H the adjusted gamma-particle irradiation flux is shown.
The working principle of the technical scheme is as follows: in the process of respectively carrying out alpha-particle irradiation and gamma-particle irradiation, corresponding irradiation time is set in advance according to integrated circuit processing standards, alpha-particle irradiation and gamma-particle irradiation are respectively carried out according to the set irradiation time and the corresponding irradiation flux, and if the irradiation flux is adjusted in the irradiation process, the adjusted irradiation time is adjusted accordingly.
The effect of the above technical scheme is: by adopting the mode to carry out the radiation-resistant treatment of the integrated circuit, the radiation-resistant treatment efficiency and precision can be effectively improved, the effective monitoring strength and the monitoring accuracy in the irradiation process are improved, the circuit performance influence caused by the mismatching of the irradiation time and the irradiation flux is prevented, and the circuit stability is reduced. Meanwhile, the irradiation time and the corresponding adjustment time after the irradiation flux is adjusted are obtained through the formula, so that the accuracy of the irradiation process and the matching between the irradiation time and the irradiation flux can be further improved. Therefore, no matter how many times the integrated circuit is adjusted in the anti-radiation treatment project, accurate irradiation corresponding time can be obtained, excessive irradiation attempts in time are not needed, and the accuracy and the treatment efficiency of the anti-radiation treatment of the integrated circuit are improved to a great extent.
It will be apparent to those skilled in the art that various changes and modifications may be made in the present invention without departing from the spirit and scope of the invention. Thus, if such modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention is also intended to include such modifications and variations.

Claims (9)

1. A method of analog integrated circuit processing with enhanced radiation immunity, the method comprising:
after forming an integrated circuit containing active elements and passive elements in an isolated single crystal region of a silicon substrate, making a radiation-sensitive cascaded transistor in the integrated circuit containing the active elements and the passive elements into a transistor in a composite form;
irradiating the composite transistor through alpha-particles, and introducing radiation defects of the composite transistor into an emitter-base junction to adjust a gain coefficient of the composite transistor;
irradiating all elements in the integrated circuit with gamma particles;
after gamma-particles irradiate all elements, performing stable annealing treatment on the integrated circuit, wherein the stable annealing time is consistent with the prototype annealing time in the process of forming the integrated circuit;
wherein, in the process of irradiating the transistor in the composite form by the alpha-particles, the irradiation time is obtained by the following formula:
Figure DEST_PATH_IMAGE001
wherein, the first and the second end of the pipe are connected with each other,T α represents the irradiation time of the composite transistor irradiated by alpha-particles;H α representing the actual irradiation flux of the current alpha-particles;H maxα representing the upper limit value of the alpha-particle irradiation flux range;H minα represents the lower limit value of the alpha-particle irradiation flux range;T 1 the standard irradiation time of the alpha-particles is shown,T 1 the value range of (A) is 30min-45min; delta ofT α Showing the variable quantity of the alpha-particle irradiation time after the irradiation flux is adjusted in the alpha-particle irradiation process;T yα indicating the length of time that irradiation has been performed;H bα represents the adjusted alpha-particle irradiation flux;
in irradiating all elements in the integrated circuit with gamma particles, the irradiation time is obtained by the following formula:
Figure DEST_PATH_IMAGE002
wherein the content of the first and second substances,T γ representing the irradiation time of the gamma-particles to irradiate the transistor in the composite form;H γ representing the actual irradiation flux of the current gamma-particles;H γmax represents the upper limit value of the gamma-particle irradiation flux range;H γmin represents the lower limit value of the gamma-particle irradiation flux range;T 2 the standard irradiation time of the gamma-particles is shown,T 2 the value range of (A) is 25min-35min; delta ofT γ Showing the gamma-particle irradiation time variation after the irradiation flux is adjusted in the gamma-particle irradiation process;T indicating the length of time that irradiation has been performed;H indicating the adjusted gamma-particle irradiation flux.
2. The analog integrated circuit processing method of claim 1, wherein said forming integrated circuits containing active and passive components in isolated single-crystal regions of a silicon substrate comprises:
forming an oxide layer with the thickness of 0.6 mu m on the surface of a single-crystal silicon region of a matrix crystal through oxidation treatment in the single-crystal silicon region, and forming a bipolar transistor and a diffusion resistor through impurity diffusion and redistribution, and metallization and diffusion of contact;
formed in the single-crystal Si region to 0.7-0.8 μm and having a doping concentration of 2E17/cm 2 And the bipolar transistor and the diffusion resistor are connected by a conductive line to form the integrated circuit.
3. The method of claim 1, wherein the transistors in composite form comprise a first transistor and a second transistor, and wherein the gain of the transistors in composite form is determined by the equation:
h21_e=h21_e^1+h21_e^2+h21_e^1×h21_e^2
wherein h21_ e ^1 and h21_ e ^2 denote the gains of the first transistor and the second transistor, respectively.
4. The method of claim 1, wherein irradiating the composite form of the transistor with α -particles comprises:
placing the substrate with the integrated circuit in an irradiation apparatus having an alpha-particle source based on the plutonium-239 isotope;
reducing the energy of the alpha-particles by adjusting the distance between the substrate surface and the alpha-particle source or by using an alpha-particle attenuation film so that the maximum value of the alpha-particle distribution falls on the arrangement depth of the emitter p-n junction;
integrated circuits with transistors in a compound form are irradiated with alpha-particles.
5. The method of claim 1 or 3, wherein the alpha-particles have an irradiance flux of 1E10/cm 2 To 5E11/cm 2
6. The method of claim 1, wherein the gamma particles have an irradiance flux of 5E16/cm 2 To 5E17/cm 2
7. The method of claim 1, wherein the stable anneal is performed at an anneal temperature in a range of about 180-220 ℃.
8. The method of claim 1, further comprising:
applying a 3 μm thick photoresist layer to a substrate from the plane of the integrated circuit before irradiating the composite form of transistor with alpha-particles;
a window above an emitter region constituting the transistor is formed by photolithography.
9. The method of claim 1, further comprising:
controlling circuit parameters of an illuminated integrated circuit, the circuit parameters including a voltage gain K n (ii) a Input current bias I vh (ii) a Difference of input current I ex Inputting zero offset voltage U sm (ii) a Circuit I at nominal supply voltage p The current consumed;
selecting and determining effective parameters for an index characterizing the resistance of a product to continuous gamma radiation, said effective parameters including an index allowing the resistance-the radiation flux phi к Wherein the index is the radiation flux phi к The initial reduction rate of the gain corresponding to the value of (a) is obtained by the following formula:
η=(Kn(Ф^1)-Kn(Ф^2))/(Kno(Ф^2-Ф^1))
wherein Kn (phi 1) and Kn (phi 2) respectively represent integrated circuit gain values when the fluxes phi 1 and phi 2> phi 1; kno (phi 2-phi 1) represents the gain value before the integrated circuit is irradiated.
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