CN113433998A - Power driver - Google Patents

Power driver Download PDF

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Publication number
CN113433998A
CN113433998A CN202110763311.3A CN202110763311A CN113433998A CN 113433998 A CN113433998 A CN 113433998A CN 202110763311 A CN202110763311 A CN 202110763311A CN 113433998 A CN113433998 A CN 113433998A
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China
Prior art keywords
mos
power
mos tube
low
tube
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CN202110763311.3A
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Chinese (zh)
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CN113433998B (en
Inventor
刘伟峰
张旭阳
张丽
汤华莲
吴勇
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Wuhu Research Institute of Xidian University
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Wuhu Research Institute of Xidian University
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    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05FSYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F1/00Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
    • G05F1/10Regulating voltage or current
    • G05F1/46Regulating voltage or current wherein the variable actually regulated by the final control device is dc
    • G05F1/56Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
    • G05F1/561Voltage to current converters

Abstract

The invention discloses a power driver, which comprises a driving circuit and a bootstrap circuit, wherein the bootstrap circuit comprises an MOS tube M5, the source electrode and the grid electrode of the MOS tube M5 are both powered by an external power supply VM, and the drain electrode of the MOS tube M5 is connected with the high-voltage end of a bootstrap capacitor Cb in the driving circuit. According to the power driver, the bootstrap circuit of the power driver charges the bootstrap capacitor in the driving circuit by using the external power supply VM, so that when a higher external power supply VM is used, the stacking of diodes is avoided, the design difficulty of the linear regulator LDO is reduced, and the power consumption and heat generation of the LDO are reduced.

Description

Power driver
Technical Field
The present invention relates to the field of electronic circuit technology, and more particularly, to a power driver.
Background
The intelligent power integrated circuit is realized by integrating a power tube of a driving motor and an electronic control module of the motor on the same chip. A power driver is a typical smart power integrated circuit.
When the low-side power tube is turned on by the low-side driving circuit under the control of the low-side switching signal, the internal power supply starts to charge the bootstrap capacitor, so that the high-voltage end of the bootstrap capacitor reaches the voltage of the internal power supply. After the low-side power tube is closed, the high-side driving circuit opens the high-side power tube under the control of a high-side switching signal, so that the low-voltage end of the bootstrap capacitor reaches the voltage of an external power supply. Due to the action of the charging switch, the voltage of the high-voltage end of the bootstrap capacitor cannot leak to the internal power supply, so that the voltage of the high-voltage end of the bootstrap capacitor can reach the sum of the voltages of the internal power supply and the external power supply.
In the prior art, a switch for preventing voltage leakage at the high-voltage end of the bootstrap capacitor generally adopts a diode or a high-voltage-resistant MOS (metal oxide semiconductor) tube, and no matter which type of switch is used, power is required to be supplied by an internal power supply. The internal power source is generated by the linear regulator LDO, so the power driver using the internal power source increases the design difficulty of the LDO.
Disclosure of Invention
The embodiment of the invention provides a power driver, which is used for solving the problem that the design of an LDO (low dropout regulator) is difficult by using the power driver with an internal power supply in the prior art.
In one aspect, an embodiment of the present invention provides a power driver, including: a driver circuit and a bootstrap circuit;
the bootstrap circuit comprises a MOS tube M5, the source electrode and the grid electrode of the MOS tube M5 are both powered by an external power supply VM, and the drain electrode of the MOS tube M5 is connected with the high-voltage end of a bootstrap capacitor Cb in the driving circuit.
In one possible implementation, the bootstrap circuit further includes: MOS tubes M6 and M7, the drain of MOS tube M6 is powered by external power supply VM, the grid of MOS tube M6 is connected with internal power supply VDD, the source of MOS tube M6 is connected with the grid of MOS tube M7; the source of MOS transistor M7 is connected to the source of MOS transistor M5.
In one possible implementation, the bootstrap circuit further includes: MOS tubes M8 and M9, the drain electrode of MOS tube M8 is connected with the drain electrode of MOS tube M7, the source electrode of MOS tube M8 is grounded, the drain electrode of MOS tube M9 is connected with the source electrode of MOS tube M6, the source electrode of MOS tube M9 is grounded, and the grid electrodes of MOS tubes M8 and M9 are both connected with a power supply Vb 2.
In one possible implementation, the bootstrap circuit further includes: MOS tubes M3 and M4, the source of MOS tube M3 is connected with external power supply VM, the drain of MOS tube M3 is connected with the source of MOS tube M5, the source of MOS tube M4 is connected with external power supply VM, the drain of MOS tube M4 is connected with the drain of MOS tube M6, and the grids of MOS tubes M3 and M4 are both connected with power supply Vb 1.
In one possible implementation, the MOS transistor M5 is an NLDMOS device.
In one possible implementation, the driving circuit includes: a high side driver circuit and a low side driver circuit; the input end of the high-side driving circuit inputs a high-side switching signal, and two power supply ends of the high-side driving circuit are respectively connected with the high-voltage end and the low-voltage end of the bootstrap capacitor Cb; the input end of the low-side driving circuit inputs a low-side switching signal, and two power supply ends of the low-side driving circuit are respectively connected with an internal power supply VDD and the ground.
In a possible implementation manner, the output end of the high-side driving circuit is connected with the gate of the high-side power tube M1, the drain of the high-side power tube M1 is connected with the external power supply VM, and the source of the high-side power tube M1 is connected with the low-voltage end of the bootstrap capacitor Cb; the output end of the low-side drive circuit is connected with the grid electrode of the low-side power tube M2, the drain electrode of the low-side power tube M2 is connected with the low-voltage end of the bootstrap capacitor Cb, and the source electrode of the low-side power tube M2 is grounded.
The power driver provided by the invention has the following advantages:
1. the maximum voltage of the external power supply VM can reach the maximum voltage withstanding value of an NLDMOS device of the used BCD process, and the voltage of the external power supply VM is greatly improved.
2. The floating bootstrap capacitor voltage is isolated from the internal power supply, and the influence of the bootstrap circuit on the internal power supply is weakened.
3. The design difficulty of the LDO is reduced.
4. The power consumption and the heat production are separated from the output pipe of the LDO, so that the power consumption and the heat production of the output pipe of the LDO are reduced.
5. The circuit structure is simple.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
FIG. 1 is a circuit diagram of a conventional power driver in the prior art;
FIG. 2 is a circuit diagram of a prior art power driver with multiple diode stacks;
FIG. 3 is a schematic circuit diagram of a prior art power driver using high voltage MOS transistors;
fig. 4 is a circuit diagram of a power driver according to an embodiment of the invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
In the prior art, as shown in fig. 1. The MOS transistors M1 and M2 in the conventional power driver are power driving transistors, wherein the MOS transistor M1 close to the external power source VM is called a high-side power transistor, and the MOS transistor M2 close to the ground GND is called a low-side power transistor. The voltage difference Vbs between the two ends of the bootstrap capacitor Cb is Vb-Vs, which provides an operating voltage domain for the driving circuit of the MOS transistor M1, referred to as a high-side driving circuit. The internal power VDD and the ground GND provide an operating voltage domain for a driving circuit of the MOS transistor M2, which is called a low-side driving circuit. When the low side on signal turns on the MOS transistor M2 through the low side driver, Vs becomes GND, and the internal power supply VDD charges the bootstrap capacitor Cb through the diode D1, Vb becomes VDD. When the MOS transistor M2 is turned off, the high-side open signal turns on the MOS transistor M1, so that Vs is equal to VM, and the diode D1 prevents the charge in the bootstrap capacitor Cb from leaking to the internal power supply VDD, so that Vb is equal to VDD + VM.
The limitation of the power driver of fig. 1 is that the value of the external power source VM is limited due to the limited reverse bias voltage of the diode D1. To solve this problem, the prior art proposes a power driver as in fig. 2. The power driver in fig. 2 uses multiple diodes stacked to get higher reverse bias voltage, increasing the value of external power supply VM, but the diodes are increased to make Vbs smaller and smaller, and bootstrap capacitor Cb is powered by internal power supply VDD, which adds difficulty to the design of LDO.
To solve the problems caused by the diode stack in fig. 2, the prior art proposes a power driver as in fig. 3. The power driver as in fig. 3 uses the high-voltage-withstanding MOS transistor M3 as a switch to solve the problem of limitation of the external power supply VM, but a gate driving circuit and a back gate driving circuit are required to be added to turn on or off the MOS transistor M3 and prevent false triggering of the MOS transistor M3 caused by potential fluctuation of the bootstrap capacitor Cb. Although the power driver in fig. 3 solves the stacking problem of the diodes, the MOS transistor M3 and its gate driving circuit and back gate driving circuit are added, the circuit design complexity increases, and the bootstrap capacitor Cb is still powered by the internal power supply VDD.
Aiming at the problems in the prior art, the invention provides a power driver which comprises a driving circuit and a bootstrap circuit, wherein the bootstrap circuit charges a bootstrap capacitor in the driving circuit by using an external power supply VM, and when a higher external power supply VM is used, the stacking of diodes is avoided, meanwhile, the design difficulty of a linear regulator LDO is also reduced, and the power consumption and the heat generation of the LDO are reduced.
Fig. 4 is a circuit diagram of a power driver according to an embodiment of the invention. The present invention provides a power driver, comprising: a driver circuit and a bootstrap circuit;
the bootstrap circuit comprises a MOS tube M5, the source electrode and the grid electrode of the MOS tube M5 are both powered by an external power supply VM, and the drain electrode of the MOS tube M5 is connected with the high-voltage end of a bootstrap capacitor Cb in the driving circuit.
Illustratively, the MOS transistor M5 is an NLDMOS (N-type lateral double-diffused MOS) device, which has a high breakdown voltage value, which can generally reach several tens of volts, so the maximum voltage of the external power supply VM can reach the maximum breakdown voltage value of the MOS transistor M5, which increases the voltage of the external power supply VM. The NLDMOS device is manufactured by using a BCD (Bipolar junction device) process, namely, a Bipolar, a CMOS (complementary Metal oxide semiconductor) and a DMOS device are integrated on the same chip by the BCD process. The power driver in the invention reduces the design difficulty of the linear voltage regulator LDO because the bootstrap capacitor is charged by using the external power supply VM, has simpler circuit structure compared with the traditional power driver, and simultaneously separates the power consumption and the heat production of the linear voltage regulator LDO, thereby reducing the power consumption and the heat production of the linear voltage regulator LDO.
In one possible embodiment, the bootstrap circuit further includes: MOS tubes M6 and M7, the drain of MOS tube M6 is powered by external power supply VM, the grid of MOS tube M6 is connected with internal power supply VDD, the source of MOS tube M6 is connected with the grid of MOS tube M7; the source of MOS transistor M7 is connected to the source of MOS transistor M5.
Illustratively, the MOS transistor M6 is also an NLDMOS device, and the MOS transistor M7 is a PLDMOS (P-type lateral double-diffused MOS) device. After the connection, the MOS transistors M6 and M7 form two source followers, so that the potential of the internal power supply VDD is approximately copied to the point a, that is, the source voltage of the MOS transistor M5 is approximately equal to the voltage of the internal power supply VDD.
In one possible embodiment, the bootstrap circuit further includes: MOS tubes M8 and M9, the drain electrode of MOS tube M8 is connected with the drain electrode of MOS tube M7, the source electrode of MOS tube M8 is grounded, the drain electrode of MOS tube M9 is connected with the source electrode of MOS tube M6, the source electrode of MOS tube M9 is grounded, and the grid electrodes of MOS tubes M8 and M9 are both connected with a power supply Vb 2.
Illustratively, the MOS transistors M8 and M9 are both common NMOS devices.
In one possible embodiment, the bootstrap circuit further includes: MOS tubes M3 and M4, the source of MOS tube M3 is connected with external power supply VM, the drain of MOS tube M3 is connected with the source of MOS tube M5, the source of MOS tube M4 is connected with external power supply VM, the drain of MOS tube M4 is connected with the drain of MOS tube M6, and the grids of MOS tubes M3 and M4 are both connected with power supply Vb 1.
Illustratively, the MOS transistors M3 and M4 are also PLDMOS devices.
In one possible embodiment, the driving circuit includes: a high side driver circuit and a low side driver circuit; the input end of the high-side driving circuit inputs a high-side switching signal, and two power supply ends of the high-side driving circuit are respectively connected with the high-voltage end and the low-voltage end of the bootstrap capacitor Cb; the input end of the low-side driving circuit inputs a low-side switching signal, and two power supply ends of the low-side driving circuit are respectively connected with an internal power supply VDD and the ground. The output end of the high-side driving circuit is connected with the grid electrode of a high-side power tube M1, the drain electrode of the high-side power tube M1 is connected with an external power supply VM, and the source electrode of the high-side power tube M1 is connected with the low-voltage end of a bootstrap capacitor Cb; the output end of the low-side drive circuit is connected with the grid electrode of the low-side power tube M2, the drain electrode of the low-side power tube M2 is connected with the low-voltage end of the bootstrap capacitor Cb, and the source electrode of the low-side power tube M2 is grounded.
The working flow of the power driver in the invention is as follows:
when the voltage Vb at the high-voltage end of the bootstrap capacitor Cb is lower than the voltage at a, the current Ia charges the bootstrap capacitor Cb through the parasitic diode of the MOS transistor M5, and the current Ia is greater than 0. When the voltage Vb at the high-voltage end of the bootstrap capacitor Cb is higher than the voltage at a, the MOS transistor M5 is in an off state as an NLDMOS device, and presents a high-resistance state for the voltage Vb, and at this time, the current Ia is equal to 0. Thus, the voltage of the external power supply VM can reach the maximum voltage withstanding value of an NLDMOS device of the used BCD technology, namely, tens of volts. The MOS transistors M3, M4, M8 and M9 supply currents to the MOS transistors M5, M6 and M7, and can control the charging current of the bootstrap capacitor Cb. Noise generated by the floating of the voltage Vb is coupled to the point a through the parasitic capacitance Cgd of the MOS transistor M5 and is discharged to the ground GND through the current Ib.
When the low side open signal turns on the low side power transistor M2 through the low side driver circuit, so that the low voltage terminal voltage Vs of the bootstrap capacitor Cb equals GND, the current Ia flowing from the external power supply VM charges the bootstrap capacitor Cb, and the voltage Vb equals VDD. When the low-side power transistor M2 is turned off, the high-side open signal turns on the high-side power transistor M1, so that the voltage Vs becomes VM, the MOS transistor M5 is in an off state as an NLDMOS device, and a high-impedance state is present for the voltage Vb, which prevents the charge in the bootstrap capacitor Cb from leaking to the point a, so that the voltage Vb becomes VDD + VM.
While preferred embodiments of the present invention have been described, additional variations and modifications in those embodiments may occur to those skilled in the art once they learn of the basic inventive concepts. Therefore, it is intended that the appended claims be interpreted as including preferred embodiments and all such alterations and modifications as fall within the scope of the invention.
It will be apparent to those skilled in the art that various changes and modifications may be made in the present invention without departing from the spirit and scope of the invention. Thus, if such modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention is also intended to include such modifications and variations.

Claims (7)

1. A power driver, comprising: a driver circuit and a bootstrap circuit;
the bootstrap circuit comprises a MOS tube M5, the source electrode and the grid electrode of the MOS tube M5 are both powered by an external power supply VM, and the drain electrode of the MOS tube M5 is connected with the high-voltage end of a bootstrap capacitor Cb in the driving circuit.
2. A power driver according to claim 1, wherein the bootstrap circuit further comprises: MOS tubes M6 and M7, the drain of the MOS tube M6 is powered by the external power supply VM, the gate of the MOS tube M6 is connected with an internal power supply VDD, and the source of the MOS tube M6 is connected with the gate of the MOS tube M7;
the source electrode of the MOS tube M7 is connected with the source electrode of the MOS tube M5.
3. A power driver according to claim 2, wherein the bootstrap circuit further comprises: the MOS tube M8 and M9, the drain electrode of MOS tube M8 is connected with the drain electrode of MOS tube M7, the source electrode of MOS tube M8 is grounded, the drain electrode of MOS tube M9 is connected with the source electrode of MOS tube M6, the source electrode of MOS tube M9 is grounded, and the grid electrodes of MOS tubes M8 and M9 are both connected with a power supply Vb 2.
4. A power driver according to claim 2, wherein the bootstrap circuit further comprises: MOS pipe M3 and M4, MOS pipe M3's source electrode meets external power source VM, MOS pipe M3's drain electrode meets MOS pipe M5's source electrode, MOS pipe M4's source electrode meets external power source VM, MOS pipe M4's drain electrode meets MOS pipe M6's drain electrode, MOS pipe M3 and M4's grid all connect power Vb 1.
5. The power driver as claimed in claim 1, wherein the MOS transistor M5 is an NLDMOS device.
6. A power driver according to claim 1, wherein the driving circuit comprises: a high side driver circuit and a low side driver circuit;
a high-side switching signal is input to an input end of the high-side driving circuit, and two power supply ends of the high-side driving circuit are respectively connected with a high-voltage end and a low-voltage end of the bootstrap capacitor Cb;
the input end of the low-side driving circuit inputs a low-side switching signal, and two power ends of the low-side driving circuit are respectively connected with an internal power supply VDD and the ground.
7. The power driver as claimed in claim 6, wherein the output terminal of the high-side driving circuit is connected to the gate of a high-side power transistor M1, the drain of the high-side power transistor M1 is connected to the external power VM, and the source of the high-side power transistor M1 is connected to the low-voltage terminal of the bootstrap capacitor Cb;
the output end of the low-side driver circuit is connected with the grid electrode of a low-side power tube M2, the drain electrode of the low-side power tube M2 is connected with the low-voltage end of the bootstrap capacitor Cb, and the source electrode of the low-side power tube M2 is grounded.
CN202110763311.3A 2021-07-06 2021-07-06 Power driver Active CN113433998B (en)

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Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20080290841A1 (en) * 2007-05-23 2008-11-27 Richtek Technology Corporation Charging Circuit for Bootstrap Capacitor and Integrated Driver Circuit Using Same
CN101771345A (en) * 2008-12-30 2010-07-07 东部高科股份有限公司 Fast differential level shifter and boot strap driver including the same
CN103529901A (en) * 2013-10-28 2014-01-22 无锡中星微电子有限公司 Circuit used for supplying power for bootstrap circuit
JP2015171237A (en) * 2014-03-07 2015-09-28 パナソニックIpマネジメント株式会社 Motor driving device
US20180004238A1 (en) * 2016-06-30 2018-01-04 Conexant Systems, Llc Gate boosting circuit and method for an integrated power stage
CN207184324U (en) * 2017-09-22 2018-04-03 无锡麟力科技有限公司 Control circuit applied to bootstrap capacitor power loss recovery in DC DC converters
CN108233901A (en) * 2016-12-14 2018-06-29 科域科技有限公司 Bootstrap diode emulator circuit
CN109155627A (en) * 2016-05-25 2019-01-04 宜普电源转换公司 Enhanced FET gate driver integrated circuit
CN109155581A (en) * 2016-04-22 2019-01-04 三菱电机株式会社 Power-converting device

Patent Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20080290841A1 (en) * 2007-05-23 2008-11-27 Richtek Technology Corporation Charging Circuit for Bootstrap Capacitor and Integrated Driver Circuit Using Same
CN101771345A (en) * 2008-12-30 2010-07-07 东部高科股份有限公司 Fast differential level shifter and boot strap driver including the same
CN103529901A (en) * 2013-10-28 2014-01-22 无锡中星微电子有限公司 Circuit used for supplying power for bootstrap circuit
JP2015171237A (en) * 2014-03-07 2015-09-28 パナソニックIpマネジメント株式会社 Motor driving device
CN109155581A (en) * 2016-04-22 2019-01-04 三菱电机株式会社 Power-converting device
CN109155627A (en) * 2016-05-25 2019-01-04 宜普电源转换公司 Enhanced FET gate driver integrated circuit
US20180004238A1 (en) * 2016-06-30 2018-01-04 Conexant Systems, Llc Gate boosting circuit and method for an integrated power stage
CN108233901A (en) * 2016-12-14 2018-06-29 科域科技有限公司 Bootstrap diode emulator circuit
CN207184324U (en) * 2017-09-22 2018-04-03 无锡麟力科技有限公司 Control circuit applied to bootstrap capacitor power loss recovery in DC DC converters

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