CN113433406A - Key detection circuit and terminal equipment - Google Patents
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Abstract
The disclosure relates to a key detection circuit and a terminal device, wherein the key detection circuit comprises a control unit and a key unit; the control unit comprises a GPIO-1 interface, a GPIO-2 interface, an ADC-1 interface and an ADC-2 interface; the key unit comprises a plurality of resistors connected in series between the GPIO-1 interface and the GPIO-2 interface, and adjacent resistors are grounded through a key switch; the ADC-1 interface is used for detecting a first voltage value of the first detection point; the first detection point is a GPIO-1 interface; the ADC-2 interface is used for detecting a second voltage value of the second detection point; the second detection point is positioned between the two resistors which are closest to the GPIO-1 interface; the control unit is used for determining the position of the pressed key switch according to the first voltage value, the second voltage value and the resistance values of the resistors. When the key is not pressed, no loop in the circuit consumes electricity. The power consumption of the key detection circuit is reduced, and the endurance time of the battery is prolonged.
Description
Technical Field
The disclosure relates to the technical field of keys, in particular to a key detection circuit and a terminal device.
Background
In the related art, a terminal with keys comprises a key detection circuit, most of the key detection circuits divide voltage by connecting a plurality of resistors in series between a power supply and the ground, and when the keys are pressed down, the keys are determined to be pressed down by measuring the voltage at a certain position between the resistors, so that the key detection function is realized. However, such a key detection circuit has a continuous current loss of several tens of microamperes or more, and even in a state where the terminal is not used, the amount of electricity in the battery is lost, thereby reducing the service life of the battery.
Disclosure of Invention
In view of this, the present disclosure provides a key detection circuit and a terminal device, so as to reduce power consumption of the key detection circuit and improve battery endurance.
According to an aspect of the present disclosure, there is provided a key detection circuit including a control unit and a key unit; the control unit comprises a first general purpose input/output interface (GPIO-1), a second general purpose input/output interface (GPIO-2), a first analog-to-digital converter interface (ADC-1) and a second analog-to-digital converter interface (ADC-2);
the key unit comprises a plurality of resistors connected in series between the first general input/output interface and the second general input/output interface, and adjacent resistors are grounded through a key switch;
the first analog-to-digital converter interface is used for detecting a first voltage value of a first detection point; wherein the first detection point is the first general input/output interface;
the second analog-to-digital converter interface is used for detecting a second voltage value of a second detection point; the second detection point is positioned between two resistors which are closest to the first general input/output interface;
the control unit is used for determining the position of the pressed key switch according to the first voltage value, the second voltage value and the resistance values of the resistors.
In a possible implementation manner, when the key detection circuit is initialized, the first general input/output interface is set as an output interface to output a first voltage, the second general input/output interface is set as an input interface, and a level change of the second general input/output interface triggers an interrupt;
the triggering interrupt refers to that the control unit responds to the level change of the second general input/output interface and executes an interrupt processing program corresponding to the level change.
In a possible implementation manner, a level change of the second general input/output interface triggers an interrupt, including:
when any key switch is pressed, the second general input/output interface is changed from high level to low level, and the control unit responds to the second general input/output interface changed from high level to low level and executes a first interrupt processing program;
the first interrupt handler includes a handler to wake up the control unit in a sleep state.
In one possible implementation, the first interrupt handler further includes: and the processing program is used for triggering the first analog-to-digital converter interface to detect the first voltage value of the first detection point and triggering the second analog-to-digital converter interface to detect the second voltage value of the second detection point.
In one possible implementation, the first interrupt handler further includes: and determining the position of the pressed key switch according to the first voltage value, the second voltage value and the resistance values of the plurality of resistors.
In a possible implementation manner, a level change of the second general input/output interface triggers an interrupt, including:
when the key is released, the level at the second general input/output interface is changed from low level to high level;
the control unit responds to the second general input/output interface changing from low level to high level and executes a second interrupt processing program;
the second interrupt handler is to restore the control unit to a sleep state.
In one possible implementation, the control unit is configured to: after the position of the pressed key switch is determined, whether the key switch is released within a first preset time is judged, if not, the following steps are executed in a circulating mode until the key switch is released:
setting the first general input/output interface as an input interface;
judging whether the key switch is released before the first general input/output interface is set as an input interface within a second preset time length;
and if not, setting the first general input/output interface as an output interface and setting the first general input/output interface as a high level after the second preset time length is reached.
In one possible implementation manner, the determining whether the key switch is released includes:
and if the control unit detects that the level of the second general input/output interface is changed from low level to high level, the control unit judges that the key switch is released.
According to another aspect of the present disclosure, a terminal device is provided, which includes the key detection circuit.
According to the key detection circuit, the output end and the input end of the key unit are respectively connected with the GPIO port of the control unit, no loop can consume electric quantity in the key detection circuit under the condition that the key is not pressed, and when the key is pressed, different loops are formed by the pressed key, so that the change of the resistance value of the circuit is caused, the change of the voltage detected by the voltage detection point in the circuit is caused, and the pressed key is determined. Therefore, the power consumption of the key detection circuit is reduced, and the endurance time of the battery is prolonged.
Other features and aspects of the present disclosure will become apparent from the following detailed description of exemplary embodiments, which proceeds with reference to the accompanying drawings.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate exemplary embodiments, features, and aspects of the disclosure and, together with the description, serve to explain the principles of the disclosure.
Fig. 1 shows a key detection circuit according to the prior art.
FIG. 2 shows a key detection circuit according to an embodiment of the present disclosure.
Fig. 3 shows a leakage detection and leakage protection flow diagram according to an embodiment of the present disclosure.
Detailed Description
Various exemplary embodiments, features and aspects of the present disclosure will be described in detail below with reference to the accompanying drawings. In the drawings, like reference numbers can indicate functionally identical or similar elements. While the various aspects of the embodiments are presented in drawings, the drawings are not necessarily drawn to scale unless specifically indicated.
The word "exemplary" is used exclusively herein to mean "serving as an example, embodiment, or illustration. Any embodiment described herein as "exemplary" is not necessarily to be construed as preferred or advantageous over other embodiments.
Furthermore, in the following detailed description, numerous specific details are set forth in order to provide a better understanding of the present disclosure. It will be understood by those skilled in the art that the present disclosure may be practiced without some of these specific details. In some instances, methods, means, elements and circuits that are well known to those skilled in the art have not been described in detail so as not to obscure the present disclosure.
Fig. 1 shows a key detection circuit according to the prior art. As shown in fig. 1, in the key detection circuit, a plurality of resistors (resistors R1, R2, R3) are connected in series between a power supply Voltage (VCC) and a ground to divide the voltage. A Micro Control Unit (MCU) controls the ADC1 interface and ADC2 interface to scan the voltages at the detection points. For example, when the key K1 is pressed, the ADC1 (analog-to-digital converter) interface detects a voltage at a detection point between R1 and R2, and determines that the key K1 is pressed by calculating a value of the detected voltage. When the key K2 is pressed, the ADC2 (analog-to-digital converter) interface detects the voltage at the detection point between R2 and R3, and determines that the key K2 is pressed from the detected voltage value.
However, in the key detection circuit of the prior art, a plurality of resistors (resistors R1, R2, and R3) are connected in series between the power supply and the ground to perform voltage division. That is, the power supply and the ground are always on, i.e., a minute current continues to flow. Therefore, the key detection circuit has electric quantity loss all the time, and the service life of the battery is reduced.
FIG. 2 shows a key detection circuit according to an embodiment of the present disclosure. As shown in fig. 2, the key detection circuit includes a control unit, a key unit; the control unit may include a first general purpose input/output interface (GPIO-1 interface for short) and a second general purpose input/output interface (GPIO-2 interface for short), a first analog-to-digital converter interface (ADC-1 interface for short), and a second analog-to-digital converter interface (ADC-2 interface for short).
The key unit comprises a plurality of resistors connected in series between the GPIO-1 interface and the GPIO-2 interface, and adjacent resistors are grounded through a key switch.
The ADC-1 interface is used for detecting a first voltage value of a first detection point; wherein the first detection point may be the GPIO-1 interface. The ADC-2 interface is used for detecting a second voltage value of a second detection point; wherein the second detection point is located between two resistors closest to the GPIO-1 interface, such as a connection line between R12 and R13 in FIG. 2.
The control unit is used for determining the key position according to the first voltage value, the second voltage value and the resistance values of the resistors.
In a possible implementation manner, functions of pins of the first General-purpose input/output interface GPIO-1(General-purpose input/output, GPIO) and the second General-purpose input/output interface GPIO-2 in the control unit may be controlled by a program for a user, and the pins may be set as General-purpose input interface (GPI), General-purpose output interface (GPO), or General-purpose input/output (GPIO) interfaces according to use needs.
In one possible implementation, as shown in fig. 2, the key unit includes a plurality of resistors, such as resistors R1-R13, connected in series between the GPIO-1 interface and the GPIO-2 interface. The adjacent resistors are grounded through a key switch. The number of resistors can be set as desired based on the number of key switches. The resistance values of the plurality of resistors can be set to a certain resistance value according to actual needs, and the resistance values of the resistors can be equal, for example, the resistance value of each resistor can be set to 10K ohms. As shown in fig. 2, R1 and R2 are grounded through a key switch K1, R2 and R3 are grounded through a key switch K2, R3 and R4 are grounded through a key switch K3 and … …, and R12 and R13 are grounded through a key switch K12.
As shown in fig. 2, the first detection point is a detection point at the GPIO-1 interface. The second detection point is located between two resistors which are closest to the GPIO-1 interface, and as shown in FIG. 2, the second detection point is located between the resistors R12 and R13.
In a possible implementation manner, the control unit is configured to determine the position of the pressed key switch according to the first voltage value U1 and the second voltage value U2 and the resistance values of the plurality of resistors. For example, the control unit presets the corresponding relationship between the ratio U2/U1 of the second voltage value to the first voltage value and the key position. The correspondence may be stored in the control unit in the form of a table.
For example, when the key switch K1 in fig. 2 is pressed, a loop is formed from the GPIO-1 interface to ground via R2 to R13, and at this time, the ratio U2/U1 of the second voltage value to the first voltage value is equal to (R2+ … R12)/(R2+ … R13), and in the case that the resistance values of R1 to R13 are equal, that is, U2 is 11/12 of U1; when the K2 is pressed down, a loop from the GPIO-1 interface to the ground through R3-R13 is formed, at the moment, the ratio U2/U1 of the second voltage value to the first voltage value is equal to (R3+ … R12)/(R3+ … R13), and when the resistance values of R1-R13 are equal, that is, U2 is 10/11 of U1; by analogy, when K11 is pressed, U2 is 1/2 of U1, and when K12 is pressed, the voltage of U2 is 0.
For example, table 1 shows the correspondence relationship between the ratio U2/U1 of the second voltage value to the first voltage value and the key position according to an embodiment of the disclosure. That is, when the control unit detects the second voltage value and the first voltage value, the control unit determines the position of the pressed key by calculating the ratio U2/U1 of the second voltage value to the first voltage value and according to the corresponding relationship between U2/U1 and the key position shown in Table 1.
TABLE 1 corresponding relationship between the ratio of the second voltage value to the first voltage value U2/U1 and the key position
In a possible implementation manner, after the control unit calculates the ratio U2/U1 of the second voltage value to the first voltage value, the pressed key switch is determined by the corresponding relationship between the ratio U2/U1 of the second voltage value to the first voltage value and the key switch preset in the control unit.
Therefore, the key detection circuit disclosed by the invention has the advantages that the output and the input ends of the key unit are respectively connected with the GPIO ports of the control unit, no loop in the key detection circuit can consume electric quantity under the condition that the key is not pressed down, and different loops are formed by the pressed key when the key is pressed down, so that the change of the resistance value of the circuit is caused, the change of the voltage detected by the voltage detection point in the circuit is caused, and the pressed key is determined. Therefore, the power consumption of the key detection circuit is reduced, and the endurance time of the battery is prolonged.
Furthermore, in the prior art, the power voltage is used as the reference voltage to determine the pressed key, since the battery voltage may change after a certain period of use, the reference voltage is used to calculate which key is pressed, and there may be an error, for example, in the case that the key 1 is pressed, and the calculated result is the pressed key 2. In the embodiment of the present disclosure, when the pressed key is determined, the first voltage value (reference voltage) is detected in real time, that is, the accuracy of determining the pressed key is higher. Therefore, the technical problem that the key which is pressed is determined to be different from the actually pressed key due to the fact that the power supply voltage is used as the reference voltage is solved in the technical scheme of the embodiment of the disclosure.
In a possible implementation manner, when the key detection circuit is initialized, the first general input/output interface may be set as an output interface to output a first voltage, the second general input/output interface is set as an input interface (the level of the input interface is a high level under the influence of the first voltage), and a level change of the second general input/output interface triggers an interrupt; the triggering of the interrupt may refer to the control unit executing an interrupt handler corresponding to a level change in response to the level change of the second general input/output interface. The interface states of the first general input/output interface and the second general input/output interface can be set in a programming mode. The present disclosure does not limit the specific manner in which the state of the interface is set. When the setting is initialized, each key is not pressed, and the control unit can be in a dormant state. The initialization setting may be entered when the key detection circuit is powered on, or after all keys are released.
In a possible implementation manner, when the key detection circuit is initialized, the GPIO-1 interface is set as an output interface to output a first voltage, where the first voltage may be 1.8V or 3.3V, and the magnitude of the first voltage may be set according to a power supply voltage, for example, 1V smaller than the power supply voltage; and setting the GPIO-2 interface as an input interface, wherein the GPIO-2 interface is at a high level, and the level change of the GPIO-2 interface can trigger an interrupt. The triggering interrupt can be that the control unit responds to the level change of the GPIO-2 interface and executes an interrupt processing program corresponding to the level change.
Therefore, when the key detection circuit is initialized, the states of the GPIO-1 interface and the GPIO-2 interface when no key is pressed are set, and as the second general input/output interface is set to be in a high-impedance state, continuous current loss cannot occur in a circuit formed by the divider resistor, namely, the power consumption of the key detection circuit is reduced.
In a possible implementation manner, the triggering of the interrupt by the level change of the second general input/output interface may include: when any key switch is pressed, the second general input/output interface is changed from high level to low level, and the control unit responds to the second general input/output interface changed from high level to low level and executes a first interrupt processing program; the first interrupt handler includes a handler to wake up the control unit in a sleep state. The first interrupt handler may be preset in the control unit, and the GPIO-2 interface level change corresponds to the interrupt handler.
In one possible implementation, in the case that a key is pressed, the pressed key is directly grounded, and the GPIO-2 interface changes from high level to low level. The level change of the GPIO-2 interface triggers an interrupt, that is, the control unit executes a first interrupt handler corresponding to the level change according to the level change of the GPIO-2 interface, where the first interrupt handler may include a handler for waking up the control unit in a sleep state. In case the control unit is woken up, the ADC-1 interface detects a first voltage value U1 at a first detection point and the ADC-2 interface detects a second voltage value at a second detection point. The control unit may determine the position of the pressed key switch according to the first and second voltage values U1 and U2 and the resistance values of the plurality of resistors.
Therefore, the key detection circuit triggers the sensing of the keys through the level change of the GPIO-2 interface and drives the ADC-1 interface and the ADC-2 interface to carry out voltage detection. Compared with the related art in which the ADC continuously performs voltage detection on the voltage sampling point in the voltage dividing circuit, in the embodiment of the present disclosure, the wake-up of the control unit is triggered when the key is pressed, and the voltage detection on the voltage detection point is performed after the control unit is woken up. When no key is pressed, the ADC in the control unit is not triggered to execute the processing program of key detection. In this way, losses of power due to continuous ADC detection are largely avoided.
In a possible implementation manner, the first interrupt handler may further include a handler for triggering the ADC-1 interface to detect a first voltage value U1 at the first detection point and triggering the ADC-2 interface to detect a second voltage value U2 at the second detection point.
In a possible implementation, the first interrupt handler may further include a handler to determine a position of the pressed key switch according to the first and second voltage values U1 and U2 and resistance values of the plurality of resistors.
The processing program of ADC voltage detection or the processing program of calculating which key is pressed is arranged in the first interrupt processing program, when the key is pressed, the first interrupt processing program is triggered, namely when the key is pressed, the ADC voltage detection point is processed in the first interrupt processing program to carry out voltage detection and/or calculate which key is pressed. In this way, the ADC voltage detection is processed in the interrupt processing program and/or which key is pressed is calculated, so that when the control unit senses the trigger condition that the key is pressed, the voltage detection and/or the key is processed in the interrupt processing program corresponding to the trigger condition, and the efficiency of sensing that the key is pressed can be improved.
In a possible implementation manner, a level change of the second general input/output interface may trigger an interrupt, and the method may further include: when the key is released, the level at the second general input/output interface is changed from low level to high level; the control unit responds to the second general input/output interface changing from low level to high level and executes a second interrupt processing program; the second interrupt handler is to restore the control unit to a sleep state. In a dormant state, the key detection circuit can restore the initialization setting, namely, the first general input/output interface is set as an output interface to output a first voltage, and the second general input/output interface is set as an input interface to wake up the control unit when the key is pressed next time.
Taking the key detection circuit in fig. 2 as an example, when the key K2 is released, the loop between the first GPIO-1 and the ground is disconnected, and at this time, the level of the second GPIO-2 changes from the original low level to the high level, and the control unit executes an interrupt processing procedure corresponding to the level change in response to the second GPIO-2 changing from the low level to the high level, for example, the control unit returns to the sleep state.
Therefore, after the key is released, the control unit is restored to the dormant state according to the trigger of the level change of the second general input/output interface GPIO-2, so that the control unit enters the dormant state under the condition that the key is not pressed down, and the power consumption of the control unit is reduced.
In one possible implementation, the control unit may be further configured to: after the position of the pressed key switch is determined, whether the key switch is released within a first preset time is judged, if not, the following steps are executed in a circulating mode until the key switch is released:
setting the first general input/output interface as an input interface;
judging whether the key switch is released before the first general input/output interface is set as an input interface within a second preset time length;
and if not, setting the first general input/output interface as an output interface and setting the first general input/output interface as a high level after the second preset time length is reached.
Because the steps are executed under the condition that the time that the key switch is not released is longer than the first preset time, continuous current loss in the circuit caused by long-time pressing of the key is avoided. Therefore, the above steps may also be referred to as a leakage protection process.
In one possible implementation manner, the determining whether the key switch is released includes: and if the control unit detects that the level of the second general input/output interface is changed from low level to high level, the control unit judges that the key switch is released.
Fig. 3 shows a leakage detection and leakage protection flow diagram according to an embodiment of the present disclosure.
In a possible implementation manner, the first preset time period may be set according to actual needs, as shown in fig. 3, and the first time period may be 5 seconds. For example, after the position of the pressed key switch is determined, a timer for 5 seconds is started, whether the key is released or not is judged according to the level change of the second general input/output interface within 5 seconds, if the control unit detects that the level of the second general input/output interface is changed from low level to high level within 5 seconds of the timer, the key switch is judged to be released, the timer is closed, and the flow is ended.
For example, the control unit may be further configured to: when the position of the pressed key switch is determined to be K3, the flow shown in fig. 3 is started, a timer for 5 seconds is started, and it is determined whether or not the key switch K3 is released within 5 seconds. When the timer is over time, that is, the key switch is still not released after exceeding 5 seconds (the first gpio interface is grounded through the key switch K3, and there is a continuous current loss), the following steps (leakage protection process) are executed in a loop until the key switch K3 is released:
setting the first general purpose input/output interface (GPIO-1) as an input interface, and starting a timer with the time length of 1 second;
judging whether the key switch is released before the first general input/output interface is set as an input interface within 1 second after the timer is started; if yes, closing the timer and ending the process;
and if not, setting the first general purpose input/output interface (GPIO-1) as an output interface after 1 second, and setting the first general purpose input/output interface as a high level.
By setting the first general input/output interface as an input interface, the first general input/output interface is no longer an output interface and does not output the first voltage, and no current is generated in a path connecting the first general input/output interface with the ground through the pressed key switch. The first general input/output interface is the input interface within 1 second of the preset time of the timer, so that the condition of current loss can not exist continuously even if a certain key switch is not released, and continuous electric leakage caused by unreleased keys is avoided.
Since the first general input/output interface is set as the input interface, even if the key switch is released, the level of the second general input/output interface does not change to the high level, that is, if the key switch is released within the above-mentioned 1 second, the control unit does not detect the level change of the second general input/output interface.
In order to avoid the situation that the control unit cannot detect the level change of the second general input/output interface after the key switch is released, the first general input/output interface is set as the output interface and is set as the high level after the timer exceeds 1 second.
Thus, if the key switch is released, at the moment when the first general input/output interface is set as the output interface and set as the high level, the level of the second general input/output interface changes from the low level to the high level, and the control unit detects that the level of the second general input/output interface changes from the low level to the high level. The following steps are performed again: setting the first general input/output interface as an input interface, and starting a timer with the time length of 1 second; and judging whether the key switch is released before the first general input/output interface is set as the input interface within 1 second after the timer is started. Since the control unit detects that the key is released before the first general input/output interface is set as the input interface, the whole leakage protection process is ended if the key is released as a result of the determination. At this time, since the key is released and the leakage protection process is finished, the key detection circuit will recover the initialization setting.
And if the control unit does not detect that the key is released after the first general input/output interface is set as the output interface and set as the high level, continuing to execute the above-mentioned leakage protection process until the key is released.
Therefore, under the condition that the key is pressed for a long time or is triggered due to the fact that the key is pressed by foreign matters, current loss formed by a key loop can be avoided through the leakage protection process, and electric energy loss under the condition of leakage is reduced.
A terminal device comprises the key detection circuit. The terminal equipment has a key function. For example, the terminal device may be a remote controller, a mobile phone with keys, and the like.
In a possible implementation manner, as shown in fig. 2, a resistor R14 is connected between the GPIO-2 interface and the second detection point, so that when the key switch K12 is pressed, it is avoided that the ADC-2 interface is directly grounded, which may cause an abnormality.
Therefore, the output and the input ends of the key unit are respectively connected with the GPIO ports of the control unit, no loop in the key detection circuit can consume electric quantity under the condition that the key is not pressed, and different loops are formed by the pressed key when the key is pressed, so that the change of the resistance value of the circuit is caused, the change of the voltage detected by the voltage detection point in the circuit is caused, and the pressed key is determined. Therefore, the power consumption of the key detection circuit is reduced, and the endurance time of the battery is prolonged.
Having described embodiments of the present disclosure, the foregoing description is intended to be exemplary, not exhaustive, and not limited to the disclosed embodiments. Many modifications and variations will be apparent to those of ordinary skill in the art without departing from the scope and spirit of the described embodiments. The terms used herein were chosen in order to best explain the principles of the embodiments, the practical application, or technical improvements to the techniques in the marketplace, or to enable others of ordinary skill in the art to understand the embodiments disclosed herein.
Claims (9)
1. A key detection circuit is characterized by comprising a control unit and a key unit; the control unit comprises a first general purpose input/output interface (GPIO-1), a second general purpose input/output interface (GPIO-2), a first analog-to-digital converter interface (ADC-1) and a second analog-to-digital converter interface (ADC-2);
the key unit comprises a plurality of resistors connected in series between the first general input/output interface and the second general input/output interface, and adjacent resistors are grounded through a key switch;
the first analog-to-digital converter interface is used for detecting a first voltage value of a first detection point; wherein the first detection point is the first general input/output interface;
the second analog-to-digital converter interface is used for detecting a second voltage value of a second detection point; the second detection point is positioned between two resistors which are closest to the first general input/output interface;
the control unit is used for determining the position of the pressed key switch according to the first voltage value, the second voltage value and the resistance values of the plurality of resistors.
2. The key detection circuit of claim 1,
when the key detection circuit is initialized, the first general input/output interface is set as an output interface to output a first voltage, the second general input/output interface is set as an input interface, and the level change of the second general input/output interface triggers interruption;
the triggering interrupt refers to that the control unit responds to the level change of the second general input/output interface and executes an interrupt processing program corresponding to the level change.
3. The key detection circuit of claim 2, wherein the level change of the second general input/output interface triggers an interrupt, comprising:
when any key switch is pressed, the second general input/output interface is changed from high level to low level, and the control unit responds to the second general input/output interface changed from high level to low level and executes a first interrupt processing program;
the first interrupt handler includes a handler to wake up the control unit in a sleep state.
4. The key detection circuit of claim 3, wherein the first interrupt handler further comprises: and the processing program is used for triggering the first analog-to-digital converter interface to detect the first voltage value of the first detection point and triggering the second analog-to-digital converter interface to detect the second voltage value of the second detection point.
5. The key detection circuit of claim 3, wherein the first interrupt handler further comprises: and determining the position of the pressed key switch according to the first voltage value, the second voltage value and the resistance values of the plurality of resistors.
6. The key detection circuit of claim 2, wherein the level change of the second general input/output interface triggers an interrupt, comprising:
when the key is released, the level at the second general input/output interface is changed from low level to high level;
the control unit responds to the second general input/output interface changing from low level to high level and executes a second interrupt processing program;
the second interrupt handler is to restore the control unit to a sleep state.
7. The key detection circuit according to any of claims 1-6, wherein the control unit is configured to:
after the position of the pressed key switch is determined, whether the key switch is released within a first preset time is judged, if not, the following steps are executed in a circulating mode until the key switch is released:
setting the first general input/output interface as an input interface;
judging whether the key switch is released before the first general input/output interface is set as an input interface within a second preset time length;
and if not, setting the first general input/output interface as an output interface and setting the first general input/output interface as a high level after the second preset time length is reached.
8. The key detect circuit of claim 7, wherein determining whether the key switch is released comprises:
and if the control unit detects that the level of the second general input/output interface is changed from low level to high level, the control unit judges that the key switch is released.
9. A terminal device, characterized in that the terminal device comprises a key detection circuit according to any of claims 1-8.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110680402.0A CN113433406B (en) | 2021-06-18 | Key detection circuit and terminal equipment |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110680402.0A CN113433406B (en) | 2021-06-18 | Key detection circuit and terminal equipment |
Publications (2)
| Publication Number | Publication Date |
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| CN113433406A true CN113433406A (en) | 2021-09-24 |
| CN113433406B CN113433406B (en) | 2024-06-04 |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN117526918A (en) * | 2024-01-04 | 2024-02-06 | 广州市科锐达光电技术股份有限公司 | Switch control device and advertisement exhibition system |
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