CN113422607A - Multi-channel time-interleaved analog-to-digital converter and using method thereof - Google Patents

Multi-channel time-interleaved analog-to-digital converter and using method thereof Download PDF

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CN113422607A
CN113422607A CN202110609904.4A CN202110609904A CN113422607A CN 113422607 A CN113422607 A CN 113422607A CN 202110609904 A CN202110609904 A CN 202110609904A CN 113422607 A CN113422607 A CN 113422607A
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牛汉
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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12—Analogue/digital converters
    • H03M1/1205—Multiplexed conversion systems
    • H03M1/121—Interleaved, i.e. using multiple converters or converter parts for one channel
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
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    • H03M1/1009—Calibration
    • H03M1/1028—Calibration at two points of the transfer characteristic, i.e. by adjusting two reference values, e.g. offset and gain error
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12—Analogue/digital converters
    • H03M1/50—Analogue/digital converters with intermediate conversion to time interval

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Abstract

The invention discloses a multi-channel time-interleaved analog-digital converter, comprising: at least one correction signal generating circuit for generating a built-in correction signal; at least one error parameter extraction circuit, which is used for obtaining the error parameters of each channel of the system from the output signal obtained by sampling the corrected signal after passing through the TI-ADC system; the algorithm of the error parameter extraction circuit inputs the generated correction signal into the TI-ADC system, and acquires the digital signal converted by each channel from the output end, so that the frequency spectrum of the TI-ADC system after sampling the correction signal can be obtained, and the frequency spectrum contains the stray frequency spectrum components introduced by each channel error parameter in the TI-ADC system; the error signal compensation circuit is used for real-time error compensation and obtaining error parameters according to an error extraction algorithm; the multi-channel time-interleaved analog-to-digital converter does not employ external circuitry.

Description

Multi-channel time-interleaved analog-to-digital converter and using method thereof
Technical Field
The invention relates to the technical field of analog-digital conversion, in particular to an analog-digital converter, and particularly relates to a multi-channel time-interleaved analog-digital converter and a using method thereof.
Background
Time-interleaved analog-to-digital converters ADCs are gaining importance in bandwidth electronic systems. To break one of the combined limitations of existing chip technology on ADC speed, accuracy and power consumption, the industry has attempted to run multiple slower ADCs in parallel in time to achieve higher sampling rates. The error is because different channels cannot guarantee complete consistency in the production of the flow sheet, and thus many parameters are not uniform. Reference may be made to w.c. black and d.a.hodges, "Time interleaved converter arrays," IEEE j.solid-State Circuits, vol.15, No.6, pp.1022-1029, dec.1980.
Currently, three errors are mainly considered by the industry:
(1) DC offset error
(2) Gain error
(3) Clock skew error
The above errors are mainly found according to the general guidelines N.Kurosawa, H.Kobayashi, K.Maruyama, H.Sugawara, and K.Kobayashi, "Explicit analysis of channel mismatch effects in time-interleaved ADC systems," IEEE transactions. circuits Syst.I, fundam. theory application. vol, vol.48, No.3, pp.261-271, Mar.2001.
Because of errors between different channels, the conversion result cannot be equivalent to that of a single channel, i.e. the conversion result is introduced into some unsuitable signals, and the ADC architecture can be better utilized only by eliminating the unsuitable signals.
Existing digitizer error correction can be divided into two categories, those based on operation in the time domain and those based on operation in the frequency domain.
The core idea of the time domain method is that an ADC sampling result which can be relatively used as a standard is obtained through some technical operations, then error values introduced in the process of using each ADC channel can be obtained through comparing ADC sampling results of different channels, and the obtained corresponding error values can be subjected to error compensation at the output end to improve the performance of the system. The main existing techniques in the time domain method are: 1. adding a reference ADC channel (B.xu and Y.Chiu, "Comprehensive background calibration of temporal estimated analog-to-digital converters," IEEE trans. circuits Syst.I, Reg. papers, vol.62, No.5, pp.1306-1314, May 2015.) [1 ]; based on the input signal statistical properties (N.L. Dortz et al, "A1.62 GS/s Time-Interleaved SAR ADC with full digital back mismatch averaging outputting representing outputting reflecting 70 dBFS" "in IEEE ISSCC dig. Tech. papers, Feb.2014, pp.386-388) [2 ].
The core idea of the frequency domain method is to perform operations on a certain frequency domain on an obtained sampling signal to construct a signal (which may also be referred to as a correction signal) with a specific spectrum mode, calculate a spectral component of a spurious signal caused by an error according to the constructed signal, and then remove the spurious component at an output end. The frequency domain method exists with the main techniques consisting of: 1. pseudo-aliased signals (J.Matsuno, T.Yamaji, M.Furuta, and T.Itakura, "All-digital background subtraction technique for time-interleaved ADC using pseudo-aliasing signal," IEEE transactions. circuits Syst.I, Reg.papers, vol.60, No.5, pp.1113-1121, May 2013.) [3 ]; and 2. the hilbert transform in combination with the frequency shift transform (y.qiu, y. -j.liu, j.zhou, g.zhang, d.chen, and n.du, "adaptive bias back ground calibration technique for the same channel timeinterface ADC," IEEE trans. circuits system.i, reg. papers, vol.65, No.8, pp.2503-2514, aug.2018.) [4 ].
However, in the process of implementing the technical solution in the prior art, the applicant finds that the following technical problems exist in the technical solution in the prior art:
1. the sampling result is compared in real time by adopting a technology of increasing a reference ADC channel in a time domain, and the reference ADC is added with excessive circuit design in an analog domain, so that the robustness of an original chip can be reduced, and the complexity and the power consumption are increased. For example, a reference ADC circuit and a corresponding analog front-end circuit need to be added in the design of [1], and in addition, because of the sampling switching between the reference ADC and the original TI-ADC, an additional conversion design is also needed for the front-end sample-and-hold circuit. Compared with the design scheme, the design scheme does not need the additional design at the analog circuit end.
2. Techniques for performing corrections based on statistical characteristics of the input signal are limited by the statistics of the input signal itself, and correction algorithms are available only when the input signal satisfies certain statistical characteristics. At the same time, larger data is needed to calculate the statistical properties, resulting in slower convergence of the correction results. Such as [2]]Calculating errors by statistical averaging of DC offset errors and gain errorsDifference parameter, the amount of sampling data required for error parameter calculation is 105Compared with the design scheme, the error parameter extraction and compensation are carried out at 4096 sampling points, and the equivalent correction performance can be achieved.
3. In the frequency domain operation-based technique, additional circuits are required to perform frequency domain operations, such as constructing the correction signal by using hilbert transform and frequency shift transform, which greatly increases the complexity and various overheads of the circuits. Constructing the correction signal by frequency shift operation and hilbert transform as in [4] would require additional 1194 registers, 4166 lookup tables and other logic overhead, and the power of the large number of registers and logic would be further increased for high sample rate ADCs.
Disclosure of Invention
The technical problem to be solved by the invention is to provide a multi-channel time-interleaved analog-digital converter, which solves the technical problems of low chip robustness, high circuit complexity and power consumption, large calculated data amount, slow convergence of a correction result and high system overhead cost of the analog-digital converter in the prior art, and at least achieves one of the technical effects of improving the chip robustness, reducing the circuit complexity and power consumption, calculating the data amount and the system overhead cost and improving the convergence speed of the correction result.
In order to solve the technical problems, the technical scheme of the invention is as follows:
a multi-channel time-interleaved analog-to-digital converter comprising:
at least one correction signal generating circuit for generating a built-in correction signal; the correction signal generating circuit consists of a frequency dividing circuit, a system clock and a multi-order RC low-pass filter circuit;
the frequency dividing circuit consists of a multi-stage D trigger chain, and a system clock can obtain a low-frequency square wave signal f through the frequency dividing circuitLOMixing the clocks of all channels, and then reducing the frequency of the mixed clock by a first-order D trigger to obtain fs/2; then the two signals are mixed and gated, and the correction signal used by the TI-ADC system can be obtained through a multi-stage RC low-pass filter circuit; the TI-ADC system is provided with a plurality of channels;
at least one error parameter extraction circuit, which is used for obtaining the error parameters of each channel of the system from the output signal obtained by sampling the correction signal after passing through the TI-ADC system;
the error parameter extraction circuit adopts an error parameter extraction algorithm, the generated correction signal is input into the TI-ADC system, and the digital signal converted by each channel is acquired from the output end, so that the frequency spectrum of the TI-ADC system after sampling the correction signal can be obtained, and the frequency spectrum contains the stray frequency spectrum component introduced by each channel error parameter in the TI-ADC system;
the error signal compensation circuit is used for real-time error compensation and extracting error parameters according to an error parameter extraction algorithm;
the multi-channel time-interleaved analog-to-digital converter does not employ external circuitry.
Preferably, the error parameter comprises a DC offset error omError in gain gmAnd clock skew error deltatm(ii) a The number of the DC offset error, the gain error and the always-on skew error is m.
Preferably, the multi-stage RC low-pass filter circuit is a 5-stage RC low-pass filter circuit.
More preferably, the compensation circuit employs an error signal compensation algorithm, which is expressed by the following equation:
Figure BDA0003095308610000031
wherein the content of the first and second substances,
Figure BDA0003095308610000032
outputting for the corrected channel m; omIs a DC offset error parameter; gmIs a gain error parameter; v'out，mOutputting a differential value for the channel m; δ tmIs a clock skew error parameter.
Particularly preferably, the error parameter extraction algorithm can directly extract the error parameters in the corresponding TI-ADC system from the spectral distribution.
The problem to be solved by another aspect of the present invention is to provide a method for using a multi-channel time-interleaved analog-to-digital converter, comprising the following steps:
(S1) signal generation: generating a correction signal;
(S2) signal acquisition: inputting the correction signal into a TI-ADC system to acquire output signals of each channel;
(S3) error parameter calculation: inputting the obtained output signals into an error extraction circuit, and calculating to obtain corresponding error parameters of each channel according to an error parameter extraction algorithm;
(S4) the system outputs real-time compensation: and the output of the TI-ADC system is compensated in real time through a compensation circuit.
Preferably, for the TI-ADC system with m channels, the error parameter extraction algorithm has m corresponding DC offset errors, m gain errors and m clock skew errors, which can be expressed as o in time domainm，gmAnd deltatm；om，gmAnd deltatmThe corresponding frequency domain component after the Fourier transform is denoted as OM，GMAnd TM；
The correction signal sampled by the TI-ADC system introduces m-1 spurious components on the spectrum,
the corresponding spurious spectral component introduced by these two errors is P.OMAnd
Figure BDA0003095308610000041
wherein the DC error omIntroduced spurious spectral component P.OMAt fs/M frequency point, gain error gmIntroduced spurious spectral components
Figure BDA0003095308610000042
At nfs/M±fsig。
Preferably, the spectral components at M-1 frequency points can be expressed as:
Figure BDA0003095308610000043
normalizing the spectral components may result in:
ILnorm，k＝GM，k+j2πfsigTM，k.；
the positions of Fourier transform which can obtain error parameters according to the Fourier transform principle and are symmetrical about fs/2 on a frequency spectrum are conjugate with each other:
Figure BDA0003095308610000044
Figure BDA0003095308610000045
the signals introduced by different error parameters in the spurious components at the symmetrical position relative to fs/2 on the frequency spectrum are expressed as follows:
Figure BDA0003095308610000046
Figure BDA0003095308610000047
the spectral spurious component can be distinguished and extracted according to the real part and the imaginary part of the variable, and then the error parameter on the time domain can be calculated according to the IDFT algorithm to obtain:
gm＝IDFTM(GM)，；
δtm＝IDFTM(TM).；
the DC offset error parameter on the time domain can be recovered by calculating according to the same IDFT algorithm:
Figure BDA0003095308610000051
om＝IDFTM(OM).。
wherein the parameter letters involved are as follows:
number of M system channels
gmGain error parameter
δtmClock skew error parameter
omDC offset error parameter
GMGain error parameter Fourier transform spectral components
TMFourier transform spectral components of clock skew error parameters
OMDC offset error parameter Fourier transform spectral components
fsSystem sampling frequency
fcal correction signal frequency
P Fourier change sampling point number coefficient
Figure BDA0003095308610000052
Corrected channel m output
Vout，mUncorrected channel mOut
V′out，mThe channel m outputs a differential value.
One or more technical solutions provided by the present application have at least the following technical effects or advantages:
above-mentioned technical scheme, because adopt correction signal production circuit to combine error parameter extraction circuit and error parameter extraction circuit algorithm and combine error signal compensation circuit and do not use adaptive filter in a large number, also do not use external circuit, make the cost of correction less than the scheme of existing part, the correction is based on the direct extraction to the error parameter simultaneously, the correction rate is fast, easily satisfy required correction performance simultaneously, the cost on the analog domain reduces greatly, the complexity of circuit design has been reduced, the timeliness that the error parameter obtained is faster simultaneously. The technical problems that an analog-digital converter chip in the prior art is low in robustness, high in circuit complexity and power consumption, large in calculation data quantity, slow in convergence of a correction result and high in system overhead cost are effectively solved, and the technical effects that the chip robustness is improved, the circuit complexity and power consumption are reduced, the calculation data quantity and the system overhead cost are reduced, and the convergence speed of the correction result is improved are achieved.
Drawings
FIG. 1 is a circuit diagram of a calibration signal generation circuit;
FIG. 2 is a schematic diagram of a correction signal spectrum for error parameter extraction;
FIG. 3 is a circuit diagram of error parameter extraction;
FIG. 4 is a circuit diagram of an error signal compensation circuit;
FIG. 5 is a graph comparing the frequency spectrum before and after correction.
Detailed Description
The following further describes embodiments of the present invention with reference to the drawings. It should be noted that the description of the embodiments is provided to help understanding of the present invention, but the present invention is not limited thereto. In addition, the technical features involved in the embodiments of the present invention described below may be combined with each other as long as they do not conflict with each other.
Existing digitizer error correction can be divided into two categories, those based on operation in the time domain and those based on operation in the frequency domain. The sampling result is compared in real time by adopting a technology of increasing a reference ADC channel in a time domain, and the reference ADC is added with excessive circuit design in an analog domain, so that the robustness of an original chip can be reduced, and the complexity and the power consumption are increased. In the frequency domain operation-based technique, additional circuits are required to perform frequency domain operations, such as constructing the correction signal by using hilbert transform and frequency shift transform, which greatly increases the complexity and various overheads of the circuits.
The technical scheme of the embodiment of the application solves the problems of low robustness, high circuit complexity and power consumption, large calculated data amount, slow convergence of a correction result and high system overhead cost of an analog-digital converter chip in the prior art by providing the multichannel time-interleaved analog-digital converter and the using method thereof, and has the beneficial effects of improving the chip robustness, reducing the circuit complexity and power consumption, and calculating the data amount and the system overhead cost and improving the convergence speed of the correction result under the condition that a few correction signal generating circuits are combined with an error parameter extracting circuit and an error parameter extracting circuit algorithm and then combined with an error signal compensating circuit without using a large number of self-adaptive filters or using an external circuit.
The general idea of the embodiment of the invention for solving the technical problems is as follows:
a multi-channel time-interleaved analog-to-digital converter comprising:
at least one correction signal generating circuit for generating a built-in correction signal; the correction signal generating circuit consists of a frequency dividing circuit, a system clock and a multi-stage RC low-pass filter circuit;
the frequency dividing circuit consists of a multi-stage D trigger chain, and a system clock can obtain a low-frequency square wave signal f through the frequency dividing circuitLOMixing the clocks of all channels, and then reducing the frequency of the mixed clock by a first-order D trigger to obtain fs/2; then, after the two signals are mixed and gated, a correction signal used by the TI-ADC system can be obtained through a multi-stage RC low-pass filter circuit; the TI-ADC system is provided with a plurality of channels;
the error parameter extraction circuit is used for obtaining error parameters of each channel of the system from output signals obtained by sampling the corrected signals after the corrected signals pass through the TI-ADC system;
the error parameter extraction circuit adopts an error parameter extraction algorithm, the generated correction signal is input into the TI-ADC system, and the digital signal converted by each channel is collected from the output end, so that the frequency spectrum of the TI-ADC system after sampling the correction signal can be obtained, and the frequency spectrum contains the stray frequency spectrum component introduced by each channel error parameter in the TI-ADC system;
the error signal compensation circuit is used for real-time error compensation and extracting error parameters according to an error parameter extraction algorithm;
the multi-channel time-interleaved analog-to-digital converter does not employ external circuitry.
In order to better understand the technical solution, the technical solution will be described in detail with reference to the drawings and the specific embodiments.
A multi-channel time-interleaved analog-to-digital converter comprising:
a plurality of correction signal generating circuits for generating built-in correction signals; the correction signal generating circuit consists of a frequency dividing circuit, a system clock and a multi-stage RC low-pass filter circuit;
the frequency dividing circuit consists of a multi-stage D trigger chain, and a system clock can obtain a low-frequency square wave signal f through the frequency dividing circuitLOMixing the clocks of all channels, and then reducing the frequency of the mixed clock by a first-order D trigger to obtain fs/2; then, after the two signals are mixed and gated, a correction signal used by the TI-ADC system can be obtained through a multi-stage RC low-pass filter circuit; the TI-ADC system is provided with a plurality of channels;
the error parameter extraction circuits are used for obtaining error parameters of all channels of the system from output signals obtained by sampling the corrected signals after the corrected signals pass through the TI-ADC system;
the error parameter extraction circuit adopts an error parameter extraction algorithm, the generated correction signal is input into the TI-ADC system, and the digital signal converted by each channel is collected from the output end, so that the frequency spectrum of the TI-ADC system after sampling the correction signal can be obtained, and the frequency spectrum contains the stray frequency spectrum component introduced by each channel error parameter in the TI-ADC system;
the error signal compensation circuits are used for real-time error compensation and extracting error parameters according to an error parameter extraction algorithm;
the multi-channel time-interleaved analog-to-digital converter employs a built-in circuit instead of an external circuit.
Specifically, the error parameter includes a DC offset error omError in gain gmAnd clock skew error deltatm(ii) a The number of DC offset errors, gain errors and always skew errors is m.
Specifically, the multi-stage RC low-pass filter circuit is a 5-stage RC low-pass filter circuit.
More specifically, the compensation circuit employs an error signal compensation algorithm, which is shown by the following equation:
Figure BDA0003095308610000071
wherein the content of the first and second substances,
Figure BDA0003095308610000072
outputting for the corrected channel m; omIs a DC offset error parameter; gmIs a gain error parameter; v'out，mOutputting a differential value for the channel m; δ tmIs a clock skew error parameter.
Particularly, the error parameter extraction algorithm can directly extract the error parameters in the corresponding TI-ADC system from the spectrum distribution.
The embodiment of the invention also provides a using method of the multichannel time-interleaving analog-digital converter, which comprises the following steps:
(S1) signal generation: generating a correction signal;
(S2) signal acquisition: inputting the correction signal into a TI-ADC system to acquire output signals of each channel;
(S3) error parameter calculation: inputting the obtained output signals into an error extraction circuit, and calculating to obtain corresponding error parameters of each channel according to an error parameter extraction algorithm;
(S4) the system outputs real-time compensation: and the output of the TI-ADC system is compensated in real time through a compensation circuit.
The embodiment of the invention is a TI-ADC multichannel time-interleaving analog-digital converter correction circuit, and the working principle mainly relates to three modules:
1. a correction signal generation circuit;
2. an error parameter extraction algorithm and circuit; and
3. error signal compensation circuit
The specific working principle is as follows:
1. a correction signal generation circuit: the circuit consists of three parts for generating a built-in correction signal. The frequency dividing circuit is composed of a multi-stage D flip-flop chain (as shown in fig. 1 (a)), and a low-frequency square wave signal fLO can be obtained by passing a system clock through the frequency dividing circuit. As shown in FIG. 1(b), fs/2 can be obtained by mixing the clocks of the channels and then down-converting the mixed clocks by a first-order D flip-flop. And then the two signals are mixed and gated, and then a correction signal used by the TI-ADC system can be obtained through a multi-stage RC low-pass filter circuit (the specific order of the filter is selected according to the specific correction requirement, and the selection of the extra area and the correction signal effect is considered in the design and is determined as 5-stage filtering).
2. Error parameter extraction algorithm and circuit: the algorithm is the core of the technology and is used for obtaining error parameters of each channel of the system from output signals obtained by sampling correction signals after passing through a TIADC system. The circuit is a specific implementation of the algorithm as shown in fig. 3. The generated correction signal is input into the TI-ADC system, and the digital signal converted by each channel is collected from the output end, so that a spectrum (as shown in fig. 2) sampled by the TI-ADC system for the correction signal can be obtained, and the spectrum includes the spurious spectrum component introduced by each channel error parameter in the TI-ADC system. The spurious spectrum generated by the DC offset error is positioned at the fs/M frequency multiplication point, but the spurious spectrum components generated by the gain error and the clock skew error can be aliased at the same position, and the problem of direct extraction from the spectrum is not solved in the prior art. The error parameter extraction algorithm of the technical scheme can directly extract the error parameters of each channel of the corresponding system from the frequency spectrum distribution. The method comprises the following specific steps:
it is known that for an m-channel TI-ADC system, the corresponding DC offset error, gain error and clock skew error are m, which can be expressed as o in time domainm，gmAnd δ tmTheir corresponding frequency domain components after Fourier transform are denoted as OM，GMAnd TM. The correction signal sampled by the TI-ADC system introduces m-1 spurious components on the frequency spectrum, as shown in fig. 2, the frequency spectrum after the correction signal sampling when the error is 0 is shown in the uppermost graph, and SI is the frequency spectrum component of the original correction signal. Middle diagram is the presence of om，gmCorrecting the sampled spectrum of the signal in error, and the corresponding spurious spectrum component introduced by the two errors is P.OMAnd
Figure BDA0003095308610000081
wherein the DC error omIntroduced spurious spectral component P.OMAt fs/M frequency point, gain error gmIntroduced spurious spectral components
Figure BDA0003095308610000082
At nfs/M±fsig. The bottom graph of fig. 2 is a spectrum plot of the corrected signal after sampling in the presence of all three errors, where the gain error g can be seenmAnd clock skew error deltatmIntroduced spurious spectral component TMAnd the spurious component spectrum components can not be directly measured due to the fact that the spurious components are positioned on the same frequency point and are subjected to aliasing phenomenon. According to theoretical analysis, the frequency spectrum components on the group (M-1 total frequency points) can be expressed as
Figure BDA0003095308610000083
The normalized quantity is the original signal SI, and the normalized quantity can be obtained
ILnorm，k＝GM，k+j2πfsigTM，k.
The positions of the Fourier transform which can obtain error parameters according to the Fourier transform principle and are symmetrical about fs/2 on the frequency spectrum are conjugate mutually
Figure BDA0003095308610000091
Figure BDA0003095308610000092
After substituting the above equation, we have found a phenomenon that can be used to separate two kinds of error parameter-induced spectrum information (how this is expressed is not so much), that is, the signals induced by different error parameters in the spurious components symmetrically located with respect to fs/2 on the spectrum are expressed as follows:
ILnorm，k＝Re{GM，k}-2πfsigIm{TM，k}+jIm{GM，k}+j2πfsigRe{TM，k}，
ILnorm，M-k＝Re{GM，k}+2πfsigIm{TM，k}-jIm{GM，k}+j2πfsigRe{TM，k}.
to carry out
Figure BDA0003095308610000093
Figure BDA0003095308610000094
Therefore, the spectrum spurious component introduced by the original aliasing error parameter can be distinguished and extracted according to the real part and the imaginary part of the variable.
And then the error parameter on the time domain can be obtained by calculation according to the IDFT algorithm.
gm＝IDFTM(GM)，
δtm＝IDFTM(TM).
In addition, because the frequency point of the DC offset error and the other two kinds of frequency points are not mixed, the frequency spectrum information of the frequency point can be obtained according to the existing coherent filter. And then, calculating according to the same IDFT algorithm to recover and obtain the DC offset error parameter on the time domain.
Figure BDA0003095308610000095
om＝IDFTM(OM).
Figure BDA0003095308610000096
Figure BDA0003095308610000101
3. An error signal compensation circuit: the technical scheme adopts a real-time error compensation design, wherein error parameters are obtained according to an error extraction algorithm: the DC offset error is compensated by subtracting a corresponding error parameter Om from a subtracter at the output end; the gain error is compensated by multiplying the multiplier by the corresponding error parameter 1/gm in the output section; the clock skew error compensation is more complex than the first two terms, and the compensation process needs to use an additional derivative filter to obtain Vin ', and then the Vin' is multiplied by the clock skew parameter and then subtracted from the output end. The error signal compensation algorithm is shown in the following formula, and the specific circuit is shown in fig. 4.
Figure BDA0003095308610000102
The working process of the ADC is as follows:
1. generating a correction signal;
2. inputting the correction signal into a TI-ADC system to acquire output signals of each channel;
3. inputting the obtained output signals into an error extraction circuit, and calculating to obtain corresponding error parameters of each channel according to an error extraction algorithm;
4. and the output of the TI-ADC system is compensated in real time through a compensation circuit.
Before correction, the spectra are compared with the corrected spectra, as shown in fig. 5, the upper spectra are the spectra without correction, and the lower spectra are the spectra with correction:
specifically, the correction model is:
the 16-channel TI ADC sampling rate 2GS/s is equivalent to the single-channel sampling rate 125 MS/s.
(1) Inputting a single-frequency signal, and assuming a thermal noise substrate to be-120 dB, and reducing an error stray frequency spectrum component from-50 dBc to about-100 dBc;
(2) based on 16QAM modulation, 300M bandwidth OFDM signal input, the error spur spectral components are reduced from-50 dBc to about-80 dBc.
Therefore, the error stray frequency spectrum component is obviously reduced before and after the correction by the embodiment of the invention.
Fig. 1-5 include a general english notation, and the chinese translation corresponding to the english notation is as follows:
Figure BDA0003095308610000111
the embodiments of the present invention have been described in detail with reference to the accompanying drawings, but the present invention is not limited to the described embodiments. It will be apparent to those skilled in the art that various changes, modifications, substitutions and alterations can be made in these embodiments without departing from the principles and spirit of the invention, and the scope of protection is still within the scope of the invention.

Claims (9)

1. A multi-channel time-interleaved analog-to-digital converter, characterized by: the method comprises the following steps:
at least one correction signal generating circuit for generating a built-in correction signal; the correction signal generating circuit consists of a frequency dividing circuit, a system clock and a multi-order RC low-pass filter circuit;
the frequency dividing circuit consists of a multi-stage D trigger chain, and a system clock can obtain a low-frequency square wave signal f through the frequency dividing circuitLOMixing the clocks of all channels, and then reducing the frequency of the mixed clock by a first-order D trigger to obtain fs/2; then the two signals are mixed and gated, and the correction signal used by the TI-ADC system can be obtained through a multi-stage RC low-pass filter circuit; the TI-ADC system is provided with a plurality of channels;
at least one error parameter extraction circuit, which is used for obtaining the error parameters of each channel of the system from the output signal obtained by sampling the correction signal after passing through the TI-ADC system;
the error parameter extraction circuit adopts an error parameter extraction algorithm, the generated correction signal is input into the TI-ADC system, and the digital signal converted by each channel is acquired from the output end, so that the frequency spectrum of the TI-ADC system after sampling the correction signal can be obtained, and the frequency spectrum contains the stray frequency spectrum component introduced by each channel error parameter in the TI-ADC system;
the error signal compensation circuit is used for real-time error compensation and extracting error parameters according to an error parameter extraction algorithm;
the multi-channel time-interleaved analog-to-digital converter does not employ external circuitry.
2. The multi-channel time-interleaved analog-to-digital converter of claim 1 wherein: the error parameter comprises a DC offset error omError in gain gmAnd clock skew error deltatm(ii) a The number of the DC offset error, the gain error and the always-on skew error is m.
3. The multi-channel time-interleaved analog-to-digital converter of claim 2 wherein: the multi-order RC low-pass filter circuit is a 5-order RC low-pass filter circuit.
4. A multi-channel time-interleaved analog-to-digital converter as claimed in claim 3 wherein: the compensation circuit adopts an error signal compensation algorithm, and the error signal compensation algorithm is shown as the following formula:
Figure FDA0003095308600000011
wherein the content of the first and second substances,
Figure FDA0003095308600000012
outputting for the corrected channel m; omIs a DC offset error parameter; gmIs a gain error parameter; v'out，mOutputting a differential value for the channel m; δ tmIs a clock skew error parameter.
5. The multi-channel time-interleaved analog-to-digital converter of claim 4 wherein: the error parameter extraction algorithm can directly extract the error parameters in the corresponding TI-ADC system from the spectrum distribution.
6. Use of a multi-channel time-interleaved analog-to-digital converter according to any of claims 1-5, characterized in that: the method comprises the following steps:
(S1) signal generation: generating a correction signal;
(S2) signal acquisition: inputting the correction signal into a TI-ADC system to acquire output signals of each channel;
(S3) error parameter calculation: inputting the obtained output signals into an error extraction circuit, and calculating to obtain corresponding error parameters of each channel according to an error parameter extraction algorithm;
(S4) the system outputs real-time compensation: and the output of the TI-ADC system is compensated in real time through a compensation circuit.
7. Use of a multi-channel time-interleaved analog-to-digital converter according to claim 6, characterized in that: for a TI-ADC system with m channels, corresponding DC offset errors, gain errors and clock skew errors of the TI-ADC system are m, and the number of the DC offset errors, the gain errors and the clock skew errors can be expressed as o in a time domainm，gmAnd δ tm；om，gmAnd δ tmThe corresponding frequency domain component after the Fourier transform is denoted as OM，GMAnd TM；
The correction signal sampled by the TI-ADC system introduces m-1 spurious components on the spectrum,
the corresponding spurious spectral component introduced by these two errors is P.OMAnd
Figure FDA0003095308600000021
wherein the DC error omIntroduced spurious spectral component P.OMAt fs/M frequency point, gain error gmIntroduced spurious spectral components
Figure FDA0003095308600000022
At nfs/M±fsig。
8. Use of a multi-channel time-interleaved analog-to-digital converter according to claim 7, characterized in that: the spectral components at M-1 frequency points can be represented as:
Figure FDA0003095308600000023
normalizing the spectral components may result in:
ILnorm，k＝GM，k+j2πfsigTM，k·；
the positions of Fourier transform which can obtain error parameters according to the Fourier transform principle and are symmetrical about fs/2 on a frequency spectrum are conjugate with each other:
Figure FDA0003095308600000024
Figure FDA0003095308600000025
the signals introduced by different error parameters in the spurious components at the symmetrical position relative to fs/2 on the frequency spectrum are expressed as follows:
Figure FDA0003095308600000026
Figure FDA0003095308600000027
the spectral spurious component can be distinguished and extracted according to the real part and the imaginary part of the variable, and then the error parameter on the time domain can be calculated according to the IDFT algorithm to obtain:
gm＝IDFTM(GM)，；
δtm＝IDFTM(TM).；
the DC offset error parameter on the time domain can be recovered by calculating according to the same IDFT algorithm:
Figure FDA0003095308600000031
om＝IDFTM(oM).。
9. use of a multi-channel time-interleaved analog-to-digital converter according to claim 7 or 8, characterized in that: the parameter letters involved are as follows:
Figure FDA0003095308600000032
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Publication number Priority date Publication date Assignee Title
CN117478130A (en) * 2023-12-28 2024-01-30 南京美辰微电子有限公司 Multiphase sampling clock generation circuit of time interleaving ADC

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117478130A (en) * 2023-12-28 2024-01-30 南京美辰微电子有限公司 Multiphase sampling clock generation circuit of time interleaving ADC
CN117478130B (en) * 2023-12-28 2024-04-02 南京美辰微电子有限公司 Multiphase sampling clock generation circuit of time interleaving ADC

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