CN113411163A - Decoding method, apparatus and readable storage medium - Google Patents
Decoding method, apparatus and readable storage medium Download PDFInfo
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- CN113411163A CN113411163A CN202110651811.8A CN202110651811A CN113411163A CN 113411163 A CN113411163 A CN 113411163A CN 202110651811 A CN202110651811 A CN 202110651811A CN 113411163 A CN113411163 A CN 113411163A
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/0001—Systems modifying transmission characteristics according to link quality, e.g. power backoff
- H04L1/0006—Systems modifying transmission characteristics according to link quality, e.g. power backoff by adapting the transmission format
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/0001—Systems modifying transmission characteristics according to link quality, e.g. power backoff
- H04L1/0023—Systems modifying transmission characteristics according to link quality, e.g. power backoff characterised by the signalling
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Abstract
The invention discloses a decoding method, decoding equipment and a readable storage medium. The decoding method comprises the following steps: firstly, acquiring coded first bit stream data; then, judging whether the logic value of a first designated bit in the first bit stream data is equal to the logic value of a second designated bit; if the bit values are equal, determining a decoding mode of the first bit stream data according to the identification values corresponding to part of preset bit positions in the first bit stream data; and finally, obtaining and outputting decoded data according to the decoding mode of the first bit stream data. The decoding method provided by the invention has simple and effective steps, simplifies the logical operation process of decoding, improves the reliability of decoding and is convenient for a system to receive correct signals.
Description
Technical Field
The present invention relates to the field of data transmission technologies, and in particular, to a decoding method, a decoding device, and a readable storage medium.
Background
When the data signal is transmitted, the data signal needs to be correspondingly scrambled and correspondingly decoded, so as to enhance the data transmission effect and the transmission quality.
The decoding method is a process of restoring a digital code to its content or converting an electric pulse signal, an optical signal, a radio wave, or the like into information, data, or the like represented by it by a specific method. Decoding is the process by which the recipient recovers the received symbols or codes into information, each encoding algorithm having a particular decoding algorithm associated therewith. In the field of display technology, each bitstream mostly contains a fixed number of bits, and then in the decoding process, it is often necessary to perform an overall processing on one bitstream, resulting in a high hardware cost for supporting decoding. Moreover, different display products may correspond to different decoding modes.
However, for the reliability and safety of signal transmission, the existing decoding method is generally complicated, which results in that the data decoding speed is too slow, thereby affecting the signal transmission quality. Moreover, the hardware cost for implementing the conventional decoding method cannot be reduced due to the complexity.
Disclosure of Invention
Embodiments of the present invention provide a decoding method, a decoding apparatus, and a readable storage medium, which can simplify the logic operation of a decoding circuit, reduce the design complexity of the circuit, and improve the reliability of decoding, so that a system can receive a correct signal.
The embodiment of the invention provides a decoding method, which comprises the following steps:
acquiring coded first bit stream data;
judging whether the logic value of a first designated bit in the first bit stream data is equal to the logic value of a second designated bit;
if the bit values are equal, determining a decoding mode of the first bit stream data according to the identification values corresponding to part of preset bit positions in the first bit stream data;
and obtaining and outputting decoded data according to the decoding mode of the first bit stream data.
In an embodiment of the present invention, the method further comprises:
and performing logical operation on the logical values of part of preset bits in the first bit stream data to obtain the identification values corresponding to the part of preset bits in the first bit stream data.
In an embodiment of the present invention, the step of performing a logical operation on a part of preset bits in the first bit stream data to obtain an identification value corresponding to the part of preset bits in the first bit stream data is before or after the step of determining whether a logical value of a first specified bit in the first bit stream data is equal to a logical value of a second specified bit in the first bit stream data.
In an embodiment of the present invention, the determining a decoding manner of the first bit stream data according to the identification value corresponding to the part of the preset bits in the first bit stream data includes:
judging whether the identification value is equal to a preset value or not;
and if so, inverting the logic values of a third designated bit, a fourth designated bit, a fifth designated bit and a sixth designated bit in the first bit stream data.
In an embodiment of the present invention, the determining a decoding method of the first bit stream data according to the identification value corresponding to the part of the preset bits in the first bit stream data further includes:
and if not, inverting the logic values of the seventh designated bit, the eighth designated bit and the ninth designated bit in the first bit stream data.
In an embodiment of the present invention, the obtaining and outputting decoded data according to the decoding mode of the first bitstream data includes:
obtaining second bit stream data according to the decoding mode of the first bit stream data;
and discarding the logic value of the tenth appointed bit in the second bit stream data to obtain and output the decoding data.
In an embodiment of the present invention, the determining whether the logic value of the first specified bit and the logic value of the second specified bit in the bitstream data are equal further includes:
and if not, discarding the logic value of the eleventh designated bit in the first bit stream data to obtain and output the decoded data.
In an embodiment of the present invention, the first designated bit is a zeroth bit, and the second designated bit is a first bit.
According to the above object of the present invention, there is provided a decoding apparatus including a processor for executing instructions to implement the decoding method, and a readable storage medium.
In accordance with the above object of the present invention, there is provided a readable storage medium storing instructions which, when executed by a processor, implement the decoding method.
The invention has the beneficial effects that: judging whether the logic value of a first designated bit in first bit stream data is equal to the logic value of a second designated bit, if so, performing logic operation on the logic values of partial bits in the first bit stream data to obtain second bit stream data, and then discarding the logic value of a third designated bit in the second bit stream data to obtain decoded data; the decoding method provided by the invention has simple and effective steps, simplifies the logical operation process of decoding, improves the reliability of decoding and is convenient for a system to receive correct signals.
Drawings
The technical solution and other advantages of the present invention will become apparent from the following detailed description of specific embodiments of the present invention, which is to be read in connection with the accompanying drawings.
FIG. 1 is a flowchart of a decoding method according to an embodiment of the present invention;
FIGS. 2 and 3 are diagrams illustrating a specific step of a decoding method according to an embodiment of the present invention;
fig. 4 and fig. 5 are diagrams illustrating another specific steps of a decoding method according to an embodiment of the present invention.
Detailed Description
The technical solution in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. It is to be understood that the described embodiments are merely exemplary of the invention, and not restrictive of the full scope of the invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The following disclosure provides many different embodiments or examples for implementing different features of the invention. To simplify the disclosure of the present invention, the components and arrangements of specific examples are described below. Of course, they are merely examples and are not intended to limit the present invention. Furthermore, the present invention may repeat reference numerals and/or letters in the various examples, such repetition is for the purpose of simplicity and clarity and does not in itself dictate a relationship between the various embodiments and/or configurations discussed. In addition, the present invention provides examples of various specific processes and materials, but one of ordinary skill in the art may recognize applications of other processes and/or uses of other materials.
Meanwhile, it should be noted that the symbols or expressions appearing in the embodiments of the present invention have the following meanings:
in the corresponding bit stream, the lowest bit is the zeroth bit N [0], the next lowest bit is the first bit N [1], and so on until the highest bit. For example, the bit stream data is 0101, and the zeroth bit number corresponding to the zeroth bit is 0, the first bit number corresponding to the first bit is 1, the second bit number corresponding to the second bit is 0, and the third bit number corresponding to the third bit is 1. Other bits may be analogized in turn.
"a ═ B" represents: a is identical to B.
"a ═ B" represents: b is assigned to A.
"a ═ B" represents: b is assigned to A after negation.
"-B" represents: not, i.e. negating B.
"^ B" stands for: and (4) carrying out exclusive-or operation.
N [ i ] represents: corresponding to the ith bit in the data stream.
For high color depth display products, the original data of the high color depth display products generally has a higher bit stream number when the data is transmitted. In order to ensure the display effect of the high color depth display product, the original data of the high color depth display product needs to be processed by adopting a higher-bit encoding and decoding technology, so that the correctness and the integrity of the original data in the transmission process are ensured.
In the embodiment of the present invention, the bit number is 8 bits as an example, and after the original data is encoded, the 8 bits of data are converted into 9 bits of data. Therefore, when the formed 9-bit data is decoded, a corresponding 9-bit decoding technique is required to decode the data.
In summary, an embodiment of the present invention provides a decoding method, referring to fig. 1, the decoding method includes the following steps:
and S1, acquiring the coded first bit stream data.
S2, determining whether the logical value of the first designated bit in the first bit stream data is equal to the logical value of the second designated bit.
And S3, if the bit values are equal, determining the decoding mode of the first bit stream data according to the identification values corresponding to the part of the preset bit positions in the first bit stream data.
And S4, obtaining and outputting decoded data according to the decoding mode of the first bit stream data.
In an implementation and application process, in the decoding method according to an embodiment of the present invention, by determining whether a logic value of a first specified bit in first bit stream data is equal to a logic value of a second specified bit, if so, determining a decoding mode of the first bit stream data according to an identification value corresponding to a part of preset bits in the first bit stream data, and obtaining decoded data according to the decoding mode of the first bit stream data; the decoding method provided by the invention has simple and effective steps, simplifies the logical operation process of decoding, improves the reliability of decoding and is convenient for a system to receive correct signals.
Specifically, the embodiment of the present invention is described with reference to a decoding method for converting 9-bit data into 8-bit data. When the encoded data is decoded, the encoded data is decoded by adopting a double judgment mode, so that the aim of improving the decoding quality is fulfilled.
Firstly, encoding original 8-bit data to obtain encoded first bit stream data, wherein the first bit stream data is 9-bit data.
Then, a preset logic value of a first designated bit and a preset logic value of a second designated bit are selected from the first bit stream data, and whether the logic values of the first designated bit and the second designated bit are equal is judged.
Then, if the logical value of the first designated bit is equal to the logical value of the second designated bit, the decoding method of the first bit stream data is determined according to the identification value corresponding to the part of the preset bits in the first bit stream data.
And finally, decoding the first bit stream data according to the decoding mode of the first bit stream data to obtain decoded data, and outputting the decoded data.
The following describes a decoding method provided by an embodiment of the present invention with reference to a specific embodiment.
In an embodiment of the present invention, referring to fig. 2, the decoding method specifically includes the following steps:
s101, obtaining the coded first bit stream data.
8-bit original data is encoded to obtain 9-bit first bit stream data.
S102, judging whether the logic value of the first specified bit in the first bit stream data is equal to the logic value of the second specified bit.
And acquiring the logic values of the first specified bit and the second specified bit in the first bit stream data, and judging whether the logic values of the first specified bit and the second specified bit are equal or not.
The decoding method provided by the embodiment of the invention is divided into two directions to be performed according to the condition that the logic value of the first designated bit is equal to or not equal to the logic value of the second designated bit.
The method specifically comprises the following steps:
when the logic value of the first designated bit is equal to the logic value of the second designated bit.
S103, performing logical operation on the logical value of part of preset bits in the first bit stream data to obtain an identification value corresponding to the part of preset bits in the first bit stream data.
And S104, determining a decoding mode of the first bit stream data according to the identification value corresponding to the part of the preset bit bits in the first bit stream data.
Specifically, when the identification value is a preset value, that is, when the identification value is 1, the decoding method of the first bitstream data includes: and inverting the logic values of the third designated bit, the fourth designated bit, the fifth designated bit and the sixth designated bit in the first bit stream data to obtain second bit stream data.
When the identification value bit is preset, that is, when the indication value is 0, the decoding method of the first bit stream data includes: and inverting the logic values of the seventh designated bit, the eighth designated bit and the ninth designated bit in the first bit stream data to obtain second bit stream data.
And S105, obtaining and outputting the decoded data according to the decoding mode of the first bit stream data.
Specifically, the second bitstream data is obtained according to the decoding method of the first bitstream data in step S104.
Then, the logic value of the tenth designated bit in the second bit stream data is discarded to obtain 8-bit decoded data, and the decoded data is output.
When the logical value of the first designated bit is not equal to the logical value of the second designated bit.
The logic value of the eleventh designated bit in the first bit stream data is discarded to obtain 8-bit decoded data, and the decoded data is output.
It should be noted that the tenth designated bit and the eleventh designated bit may be the first bit or the last bit in the first bit stream data.
Referring to fig. 3, the decoding method in this embodiment specifically includes the following steps:
first, 8-bit original data is encoded to obtain 9-bit first bit stream data M [8:0 ].
Next, it is determined whether the logic value of the zeroth bit M [0] is equal to the logic value of the first bit M [1 ].
If the logic value of the zeroth bit is equal to the logic value of the first bit M [1], obtaining an identification value X corresponding to a part of preset bits in the first bit data, wherein the identification value X is obtained by performing XOR operation on the logic value of the fifth bit M [5] and the logic value of the sixth bit M [6 ].
Wherein, if the logic value of the fifth bit M [5] and the logic value of the sixth bit M [6] are the same, the flag value X is 0, and if the logic value of the fifth bit M [5] and the logic value of the sixth bit M [6] are different, the flag value X is 1.
And then judging whether the identification value X is equal to a preset value, namely whether the identification value X is equal to 1.
And if the identification value X is equal to 1, inverting the logic value of a first bit M [1], the logic value of a fourth bit M [4], the logic value of a sixth bit M [6] and the logic value of a seventh bit M [7] in the first bit stream data to obtain second bit stream data.
If the identification value X is not equal to 1 but equal to 0, the logic value of the fifth bit M [5], the logic value of the sixth bit M [6] and the logic value of the eighth bit M [8] in the first bit stream data are inverted to obtain second bit stream data.
Finally, the logic of the zeroth bit M [0] in the second bit stream data is abandoned to obtain 8-bit decoding data, and the decoding data is output.
If the logic value of the zeroth bit M [0] is not equal to the logic value of the first bit M [1], directly discarding the logic value of the zeroth bit M [0] in the first bit stream data to obtain 8-bit decoded data, and outputting the decoded data.
In another embodiment of the present invention, referring to fig. 4, the decoding method specifically includes the following steps:
s201, obtaining the coded first bit stream data.
8-bit original data is encoded to obtain 9-bit first bit stream data.
S202, carrying out logical operation on the logical value of part of preset bits in the first bit stream data to obtain an identification value corresponding to the part of preset bits in the first bit stream data.
S203, determine whether the logic value of the first designated bit in the first bit stream data is equal to the logic value of the second designated bit.
And acquiring the logic values of the first specified bit and the second specified bit in the first bit stream data, and judging whether the logic values of the first specified bit and the second specified bit are equal or not.
The decoding method provided by the embodiment of the invention is divided into two directions to be performed according to the condition that the logic value of the first designated bit is equal to or not equal to the logic value of the second designated bit.
The method specifically comprises the following steps:
when the logic value of the first designated bit is equal to the logic value of the second designated bit.
S204, determining a decoding mode of the first bit stream data according to the identification value corresponding to the part of the preset bit bits in the first bit stream data.
Specifically, when the identification value is a preset value, that is, when the identification value is 1, the decoding method of the first bitstream data includes: and inverting the logic values of the third designated bit, the fourth designated bit, the fifth designated bit and the sixth designated bit in the first bit stream data to obtain second bit stream data.
When the identification value bit is preset, that is, when the indication value is 0, the decoding method of the first bit stream data includes: and inverting the logic values of the seventh designated bit, the eighth designated bit and the ninth designated bit in the first bit stream data to obtain second bit stream data.
And S205, obtaining and outputting the decoded data according to the decoding mode of the first bit stream data.
Specifically, the second bitstream data is obtained according to the decoding manner of the first bitstream data in step S204.
Then, the logic value of the tenth designated bit in the second bit stream data is discarded to obtain 8-bit decoded data, and the decoded data N [7:0] is output.
When the logical value of the first designated bit is not equal to the logical value of the second designated bit.
The logic value of the eleventh designated bit in the first bit stream data is discarded to obtain 8-bit decoded data, and the decoded data is output.
It should be noted that the tenth designated bit and the eleventh designated bit may be the first bit or the last bit in the first bit stream data.
Referring to fig. 5, the decoding method in this embodiment specifically includes the following steps:
first, 8-bit original data is encoded to obtain 9-bit first bit stream data M [8:0 ].
Then, an identification value X corresponding to a part of preset bits in the first bit stream data is obtained, wherein the identification value X is obtained by performing XOR operation on a logic value of a fifth bit M [5] and a logic value of a sixth bit M [6 ].
Wherein, if the logic value of the fifth bit M [5] and the logic value of the sixth bit M [6] are the same, the flag value X is 0, and if the logic value of the fifth bit M [5] and the logic value of the sixth bit M [6] are different, the flag value X is 1.
Then, it is determined whether the logic value of the zeroth bit M [0] is equal to the logic value of the first bit M [1 ].
If the logic value of the zeroth bit M [0] is equal to the logic value of the first bit M [1 ].
Further, it is determined whether the identification value X is equal to a preset value, i.e., whether the identification value X is equal to 1.
And if the identification value X is equal to 1, inverting the logic value of a first bit M [1], the logic value of a fourth bit M [4], the logic value of a sixth bit M [6] and the logic value of a seventh bit M [7] in the first bit stream data to obtain second bit stream data.
If the identification value X is not equal to 1 but equal to 0, the logic value of the fifth bit M [5], the logic value of the sixth bit M [6] and the logic value of the eighth bit M [8] in the first bit stream data are inverted to obtain second bit stream data.
Finally, the logic value of the zeroth bit M [0] in the second bit stream data is discarded to obtain 8-bit decoded data, and the decoded data N [7:0] is output.
If the logic value of the zeroth bit M [0] is not equal to the logic value of the first bit M [1], directly discarding the logic value of the zeroth bit M [0] in the first bit stream data to obtain 8-bit decoded data, and outputting the decoded data N [7:0 ].
In the decoding method provided in the embodiment of the present invention, a specific decoding operation method for the first bit stream data is obtained by performing two determinations on the 9-bit first bit stream data, then 9-bit second bit stream data is obtained through the operation, and the logic value of the tenth specified bit or the logic value of the eleventh specified bit in the second bit stream data is discarded to obtain 8-bit decoded data, and the decoded data is output. The decoding method provided by the embodiment of the invention has simple and effective steps, simplifies the logical operation process of decoding, improves the reliability of decoding and is convenient for a system to receive correct signals.
In addition, the embodiment of the invention also provides a decoding device and a readable storage medium, wherein the decoding device comprises a processor and the readable storage medium, and the processor is used for executing the instructions to realize the decoding method provided by the embodiment of the invention. The readable storage medium stores instructions, and the instructions realize the decoding method provided by the embodiment of the invention when being executed by the processor.
The decoding device includes a processor, wherein the processor is operable to execute encoding and decoding instructions and decode encoded data. When the decoding equipment provided by the embodiment of the application decodes data, the multi-bit stream data can be decoded, the decoding effect is better, and the integrity and the accuracy of the data in the decoding transmission process can be ensured.
The decoding of the target bitstream may be performed within a processor of the display panel. The processor controls the operation of the decoding device, and may also be referred to as a Central Processing Unit (CPU). The processor may be an integrated circuit chip having the processing capability of the signal sequence. The processor may also be a general purpose processor, a digital signal sequence processor (DSP), an Application Specific Integrated Circuit (ASIC), an off-the-shelf programmable gate array (FPGA) or other programmable logic device, discrete gate or transistor logic, discrete hardware components. A general purpose processor may be a microprocessor or the processor may be any conventional processor or the like.
In the foregoing embodiments, the descriptions of the respective embodiments have respective emphasis, and for parts that are not described in detail in a certain embodiment, reference may be made to related descriptions of other embodiments.
The decoding method, the decoding device, and the readable storage medium provided by the embodiments of the present invention are described in detail above, and the principles and embodiments of the present invention are described herein by applying specific examples, and the description of the above embodiments is only used to help understanding the technical solutions and the core ideas of the present invention; those of ordinary skill in the art will understand that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; and such modifications or substitutions do not depart from the spirit and scope of the corresponding technical solutions of the embodiments of the present invention.
Claims (10)
1. A decoding method, comprising the steps of:
acquiring coded first bit stream data;
judging whether the logic value of a first designated bit in the first bit stream data is equal to the logic value of a second designated bit;
if the bit values are equal, determining a decoding mode of the first bit stream data according to the identification values corresponding to part of preset bit positions in the first bit stream data;
and obtaining and outputting decoded data according to the decoding mode of the first bit stream data.
2. The decoding method according to claim 1, further comprising:
and performing logical operation on the logical values of part of preset bits in the first bit stream data to obtain the identification values corresponding to the part of preset bits in the first bit stream data.
3. The decoding method according to claim 2, wherein the step of performing a logical operation on a part of the preset bits in the first bit stream data to obtain the identification value corresponding to the part of the preset bits in the first bit stream data is performed before or after the step of determining whether the logical value of the first specified bit and the logical value of the second specified bit in the first bit stream data are equal.
4. The decoding method according to claim 1, wherein the determining a decoding manner of the first bit stream data according to the identification value corresponding to the part of the preset bits in the first bit stream data comprises the following steps:
judging whether the identification value is equal to a preset value or not;
and if so, inverting the logic values of a third designated bit, a fourth designated bit, a fifth designated bit and a sixth designated bit in the first bit stream data.
5. The decoding method according to claim 4, wherein the determining the decoding mode of the first bit stream data according to the identification value corresponding to the part of the preset bits in the first bit stream data further comprises:
and if not, inverting the logic values of the seventh designated bit, the eighth designated bit and the ninth designated bit in the first bit stream data.
6. The decoding method according to claim 1, wherein said obtaining and outputting decoded data according to a decoding manner of the first bitstream data comprises the steps of:
obtaining second bit stream data according to the decoding mode of the first bit stream data;
and discarding the logic value of the tenth appointed bit in the second bit stream data to obtain and output the decoding data.
7. The decoding method according to claim 1, wherein said determining whether the logical value of the first specified bit and the logical value of the second specified bit in the bitstream data are equal further comprises the steps of:
and if not, discarding the logic value of the eleventh designated bit in the first bit stream data to obtain and output the decoded data.
8. The decoding method according to claim 1, wherein the first designated bit is a zeroth bit and the second designated bit is a first bit.
9. A decoding device comprising a processor and a readable storage medium, the processor being configured to execute instructions to implement the decoding method of any one of claims 1 to 8.
10. A readable storage medium storing instructions, which when executed by a processor implement the decoding method of any one of claims 1 to 8.
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Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2007066880A1 (en) * | 2005-09-14 | 2007-06-14 | Lg Electronics Inc. | Method and apparatus for encoding/decoding |
| CN110086575A (en) * | 2019-05-06 | 2019-08-02 | 深圳市华星光电技术有限公司 | Coding method, coding/decoding method, relevant apparatus and storage medium |
| CN112492386A (en) * | 2020-11-09 | 2021-03-12 | Tcl华星光电技术有限公司 | Decoding method, decoding device and readable storage medium |
| CN112929673A (en) * | 2021-01-19 | 2021-06-08 | Tcl华星光电技术有限公司 | Decoding method, decoding apparatus, and readable storage medium |
-
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Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2007066880A1 (en) * | 2005-09-14 | 2007-06-14 | Lg Electronics Inc. | Method and apparatus for encoding/decoding |
| CN110086575A (en) * | 2019-05-06 | 2019-08-02 | 深圳市华星光电技术有限公司 | Coding method, coding/decoding method, relevant apparatus and storage medium |
| CN112492386A (en) * | 2020-11-09 | 2021-03-12 | Tcl华星光电技术有限公司 | Decoding method, decoding device and readable storage medium |
| CN112929673A (en) * | 2021-01-19 | 2021-06-08 | Tcl华星光电技术有限公司 | Decoding method, decoding apparatus, and readable storage medium |
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