CN113411076A - Gate driving method for accurately controlling IGBT peak voltage and improving switching characteristics - Google Patents

Abstract

The invention discloses a grid driving method for accurately controlling IGBT peak voltage and improving switching characteristics, which belongs to the technical field of power electronics_PKDetermining the digital quantity of the proportional relation, and finally outputting the digital quantity to a Field Programmable Gate Array (FPGA) on a driving board; the FPGA chip combines the digital quantity with a reference value V_refThe corresponding digital quantity is subjected to proportional-integral PI operation to generate IGBT turn-off transient di obtained by a PI regulator_CDrive voltage at stage/d t and di at turn-off transient_CThe/d t stage is applied to the IGBT gate; the invention realizes the v-pair under different load currents_PKLower turn-off delay and turn-off loss; and adapt to the change of working conditions; the control method is more v than the existing control method_PKThe control method has high precision.

Description

Gate driving method for accurately controlling IGBT peak voltage and improving switching characteristics

Technical Field

The invention belongs to the technical field of power electronics, and particularly relates to a grid driving method for accurately controlling IGBT peak voltage and improving switching characteristics, in particular to a pair v_PKSelf-adjusting peak control gate with direct sampling and controlA pole drive method.

Background

The IGBT device turn-off transient terminal voltage peak value directly influences the safe operation and reliability of the device and the system, and accurate control of the terminal voltage peak value has obvious significance for improving the bus voltage and the IGBT utilization rate, widening the safe working area of the device and further improving the power processing capacity of the device.

The three factors of the voltage peak value of the turn-off transient terminal, the bus voltage, the tube current reduction speed and the size of the stray inductance of the commutation loop form a positive correlation: the expression is shown as formula (1), wherein v is_PKFor IGBT turn-off transient terminal voltage peak value, V_busIs a DC bus voltage v_osTo turn off transient terminal voltage overshoot, L_SFor commutation loop stray inductance, di_CAnd/dt is the tube current decrease rate. Accordingly, there are two main measures for controlling the peak value of the terminal voltage at present: adjusting the main circuit; active gate control is employed.

v_PK＝V_bus+vo_s＝V_bus+L_S|di_C/dt| (1)

The typical method for adjusting the main circuit is to optimize the busbar structure to reduce the stray inductance of the commutation loop, and finally realize the control of the voltage of the turn-off transient terminal, but from the viewpoint of feasibility and cost, the stray inductance of the busbar cannot be reduced too low generally. In order to achieve precise control of the terminal voltage peak, it is then necessary to start with control on the drive side. At present, many grid driving methods control terminal voltage peak values by adjusting the current dropping speed of a turn-off transient tube. To adjust di_CDt, a part of the existing driving methods, indirectly controlling di by applying a preset driving amount_C(dt); the remaining driving method is to sample and control the slope di directly_CAnd/dt. Although the two modes can obviously inhibit the terminal voltage peak value, the control of the terminal voltage peak value is inaccurate and cannot adapt to the change of the commutation working condition (the working condition comprises bus voltage, load current, junction temperature of a semiconductor device, stray inductance of a commutation loop and the like) because the sampling and the control cannot be directly applied to the terminal voltage peak value. And between these two kindsDirect control of di_CDifferent from the dt method, there is also a more effective Hybrid driving method (Hybrid Active Gate Drive, HAGD method) that can directly sample and suppress the terminal voltage peak, and when the terminal voltage peak exceeds its reference value V_refOnly then is it suppressed, fig. 1 shows a schematic diagram of the HAGD method suppressing the peak terminal voltage.

As can be seen from fig. 1, when the terminal voltage exceeds the reference value V_refAt this time, the voltage-controlled current source VCCS is triggered to inject an extra current i into the IGBT gate_OPCTherefore, the current reduction speed of the IGBT tube is slowed down, and the end voltage peak value is restrained. i.e. i_OPCIs expressed as formula (2), where the coefficient α is the gain of the VCCS in fig. 1. It is clear that the HAGD method controls di more directly or indirectly than it does, due to the direct sampling and suppression of terminal voltage peaks_CThe method of/dt is more adaptive to working condition changes. However, if the tube current decreases rapidly, the peak value of the terminal voltage exceeds the reference value V_ref，i_OPCThere will be even larger amplitudes. The suppressed terminal voltage peak will then still exceed or even significantly exceed the reference value V according to equation (2)_ref。

i_OPC＝α·(v_CE-V_ref) (2)

In summary, for terminal voltage peak control, di is controlled directly and indirectly_CThe drive method of/dt can not adapt to the change of the commutation working condition, and the control precision of the opposite terminal voltage peak value can not be ensured like the HAGD method. These disadvantages have diminished the practical value of existing gate drive methods for end voltage peak control. In the actual system design, in order to ensure that the turn-off transient peak voltage of the IGBT is always within an acceptable range, on one hand, a large safety margin needs to be reserved for the bus voltage, which results in that the power processing capability of the IGBT cannot be fully utilized; on the other hand, the switching speed of the IGBT needs to be reduced by increasing the driving resistance, so that turn-off delay and turn-off loss of the IGBT are increased, and the electric energy conversion efficiency of the system is affected.

The invention provides a pair v from the driving side of the IGBT_PKApplying straightSelf-adjusting Peak Voltage Control (SRPVC) grid driving method connected with sampling and Control_PKThe control is accurate and is suitable for the change of the current conversion working condition. The driving method can realize v pairs_PKAnd other switching characteristics, under which, on the one hand, v is then controlled and regulated_PKAccurate control or limitation can be carried out, and on the other hand, the turn-off delay and turn-off loss of the IGBT device are also obviously reduced.

Disclosure of Invention

The invention aims to provide a grid driving method for accurately controlling IGBT peak voltage and improving switching characteristics, which is characterized by comprising the following steps:

1. accurately collecting the voltage peak value of the IGBT turn-off transient terminal voltage at each time through a peak voltage detection and digitization circuit;

2. digitalizing the peak value of the turn-off transient terminal voltage to obtain the peak value voltage v_PKTo a digital quantity that determines the proportional relationship,

3. outputting the digital quantity to a Field Programmable Gate Array (FPGA) chip (Field Programmable Gate Array, hereinafter referred to as FPGA) on a driving board;

4, the FPGA chip compares the digital quantity with a reference value V_refPerforming Proportional-Integral PI operation on the corresponding digital value to obtain corresponding driving voltage value v_PK；

5. Step 4, the FPGA chip combines the digital quantity with a reference value V_refThe corresponding digital quantity is used for proportional-integral PI operation to generate the turn-off transient di obtained by the PI regulator_CThe/d t stage drives the voltage and at the off-transient di_CThe/d t stage is applied to the IGBT gate.

6. According to PWM switching command signal and sampling signal di_C/d t identifying the stage of the IGBT currently in, and thus for the turn-off transient di_CControl is applied in the/dt stage;

di of the detection of the turn-off transient_CStage/d t to enable a delay stage for IGBT turn-off transients, dv_CEDt stage and di_CThree of the/d t stages effect decoupled control, fromTo accurately control v_PKMeanwhile, the turn-off delay and turn-off loss can be kept low;

for turn-off transient di in said step 6_CControl applied during the/d t stage may be applied at di_CHigh driving voltage v applied in the stage of/d t_G,ifHTo obtain a small terminal voltage peak value v_PK,LOr by applying a small value of the drive voltage v_G,ifLTo obtain a large terminal voltage peak value v_PK,H(ii) a Or at delay and dv_CEThe stage of/d t always applies the lowest driving voltage V_EESo as to obtain the lowest turn-off delay and turn-off loss and realize the optimization of turn-off delay and loss.

Under the self-regulation control, the device will be v under the rated load current_PKControl to V_ref(ii) a In addition, the sum dv_CEV of the/dt stage_GIs kept at the lowest V_EETo achieve minimal turn-off delay and loss.

The invention has the beneficial effect of realizing v pair under different load currents_PKWhile achieving lower turn-off delay and turn-off losses compared to lower IGBTs of existing methods. Since it is directly opposite to v_PKSampling and controlling are carried out, so that the peak voltage is accurately controlled and is adaptive to working condition change. The precision of the control method is higher than that of all the existing v_PKThe control method has high precision.

Drawings

Fig. 1 is a schematic diagram of an opposite-end voltage peak suppression method in the HAGD driving method.

Fig. 2 is a control block diagram of the terminal voltage peak value by the driving method.

Fig. 3 is a schematic time-domain waveform of the voltage peak at the control terminal of the SRPVC in the driving method, wherein (a) the turn-off transient is divided into 4 stages; (b) the working process of the SRPVC method in practical application is shown. V in FIG. 3_GIs IGBT drive voltage, V_CC、V_EERespectively an on-state and an off-state driving voltage value, V_thIs the threshold voltage of IGBT, i_C、v_CECurrent and terminal voltage of IGBT tube, I_LIs the load current.

FIG. 4 is a comparison of IGBT turn-off transient performance under the SRPVC method and the CGD method of the present driving method, wherein (a) the SRPVC method applies more than V_EEDrive voltage v of_G,if(ii) a (b) The turn-off performance of the CGD and SRPVC methods at low load current was compared.

FIG. 5 is a waveform of a turn-off transient test under the SRPVC and CGD driving methods of the present invention at 600V/300A; wherein, (a) CGD method, not v_PKControl, IGBT Gate drive resistor R_g4 Ω; (b) SRPVC Process as_PKControl, IGBT Gate drive resistor R_g＝4Ω。

FIG. 6 shows a 600V bus voltage, turn-off transient experimental waveform at different load currents; wherein, (a) CGD method, not v_PKControl, IGBT Gate drive resistor R_g8.5 Ω; (b) SRPVC Process as_PKControl, IGBT Gate drive resistor R_g＝4Ω。

FIG. 7 shows a bus voltage of 600V, different from I_LComparing the turn-off transient performances of the CGD and the SRPVC; wherein, (a) terminal voltage peak comparison; b) turn-off delay comparison; (c) and (5) comparing turn-off losses.

FIG. 8 is the turn-off transient di_CAnd a/d t stage detection circuit.

Fig. 9 is a driving voltage generating circuit.

Fig. 10 shows peak voltage v_PKA sampling circuit.

Detailed Description

The present invention provides a gate driving method for accurately controlling the peak voltage of an IGBT to improve the switching characteristics, and the present invention is further described in detail with reference to the accompanying drawings and embodiments.

Fig. 2 is a control block diagram of the terminal voltage peak value according to the driving method, and the self-adjusting gate driving method for accurately controlling the IGBT peak voltage shown in the drawing specifically includes the following steps:

1. the peak value of the voltage of the IGBT turn-off transient terminal at each time is accurately collected through a peak voltage detection and digitization circuit,

2. digitalizing the peak value of the turn-off transient terminal voltage to obtain the peak value voltage v_PKTo a digital quantity of a determined proportional relationship byStep 1 and step 2 realize the peak voltage sampling, can avoid the use of the high-speed component, thus while realizing accurate sampling, have reduced the cost of realizing of the sampling circuit;

3. outputting the digital quantity to a Field Programmable Gate Array (FPGA) chip (Field Programmable Gate Array, hereinafter referred to as FPGA) on a driving board;

4, the FPGA chip compares the digital quantity with a reference value V_refPerforming Proportional-Integral PI operation on the corresponding digital value to obtain corresponding driving voltage value v_PK；

5. Step 4, the FPGA chip combines the digital quantity with a reference value V_refThe corresponding digital quantity is used for proportional-integral PI operation to generate the turn-off transient di obtained by the PI regulator_CThe/d t stage drives the voltage and at the off-transient di_CThe/d t stage is applied to the IGBT gate; di requiring detection of turn-off transient_CStage/d t to enable delay stage of IGBT turn-off transient d v_CEStage/d t and di_CThe three stages of the/d t stage realize decoupling control, so that the v is accurately controlled_PKMeanwhile, the turn-off delay and turn-off loss can be kept low;

6. according to PWM switching command signal and sampling signal di_C/d t identifying the stage of the IGBT currently in, and thus for the turn-off transient di_CThe/d t stage exerts control; for turn-off transient di_CControl applied during the/d t stage may be applied at di_CHigh driving voltage v applied in the stage of/d t_G,ifHTo obtain a small terminal voltage peak value v_PK,LOr by applying a small value of the drive voltage v_G,ifLTo obtain a large terminal voltage peak value v_PK,H(ii) a Or at delay and dv_CEThe stage of/d t always applies the lowest driving voltage V_EESo as to obtain the lowest turn-off delay and turn-off loss and realize the optimization of turn-off delay and loss.

The driving method is specifically shown in FIG. 2 for v_pkWorking principle of applying self-adjusting control: firstly, the peak value of the voltage of the IGBT terminal in the transient state of each turn-off is accurately sampled through a peak voltage detection and digitization circuit, and then the peak value is digitized to obtain the actual peak valueVoltage v_PKAnd finally, outputting the digital quantity to a Field Programmable Gate Array (FPGA) on a driving board. The FPGA chip combines the digital quantity with a reference value V_refAnd carrying out Proportional-Integral (PI) operation on the corresponding digital quantity to obtain a corresponding driving voltage value. In order to be able to switch off the IGBT in three phases (delay phase, dv)_CEStage/d t, di_CStage/d t) to achieve decoupled control, thereby accurately controlling v_PKAt the same time, it is necessary to detect di at the turn-off transient_CWhether the/d t stage can keep the turn-off delay and turn-off loss low; thus, the method also requires switching the command signal and the sampling signal di according to the PWM_C/d t identifying the stage of the IGBT currently in, and thus for the turn-off transient di_CThe/d t stage applies control. The final part of the control method is to generate the drive voltage value obtained by the PI regulator and to switch off the transient di_CThe/d t stage is applied to the IGBT gate. V in FIG. 2_G,ifI.e. the calculated and generated turn-off transient di_CThe/d t stage drive voltage.

The control process of the present invention works in a basic mode of switching cycle by switching cycle, self-regulation, since it is directed at v_PKSampling and controlling are carried out, so that the peak voltage is accurately controlled and is adaptive to working condition change. The precision of the control method is higher than that of all the existing v_PKThe control method has high precision.

Examples

Fig. 3 is a schematic time-domain waveform of the voltage peak at the control terminal of the SRPVC in the driving method, wherein (a) the turn-off transient is divided into 4 stages; (b) the working process of the SRPVC method in practical application is shown;

the 4 stages from left to right indicated by the arrows in FIG. 3 are delay stages, d v_CEStage/d t, di_CA/d t stage and an off-state stage. Concretely provides SRPVC method pair v_PKTime domain waveform schematic diagram for self-adjusting control and theoretical control effect. In FIG. 3(a), note that the SRPVC process is paired with v_PKDoes not affect the performance of the IGBT device in the delay and dv/dt stage3(a), the lowest driving voltage V can be always applied in the delay and dv/d t stages_EETo obtain the lowest turn-off delay and turn-off loss. SRPVC Process Pair v_PKThe accuracy of the control and the adaptability to different commutation conditions are important. FIG. 3(b) shows the operation of the SRPVC process in practical applications. As shown in fig. 3(b), the SRPVC method should apply a large driving voltage v at the 1 st turn-off transient due to unclear commutation conditions (load current, bus voltage, commutation loop stray inductance, IGBT model, etc.)_G,if,1This results in a lower peak safe voltage v_PK,1. Then, the SRPVC method would sample the actual v at each turn-off transient_PKValue of v obtained_PKDigital quantity and peak reference value V_refThe digital quantity of (a) is made poor. As introduced above, they are passed as a difference result through the PI regulator within the FPGA for generating the next turn-off transient di_CDrive voltage at/dt stage. The adjusting process is always in a working state, and the adaptability of the SRPVC method to various current conversion working conditions is ensured. In fig. 3(b), at the I-th turn-off transient, the load current has been changed from I at the beginning_L,1Increase to I_L,iAnd accordingly, to implement v_PK＝V_refThe SRPVC process has also been described for di_CThe drive voltage of the/dt stage starts from the initial v_G,if,1Is reduced to v_G,if,i. Thus, in fig. 3(b), the SRPVC method achieves a reference terminal voltage peak, i.e., v, at the i-th turn-off transient_PK,i＝V_ref. Similar to FIG. 3(a), FIG. 3(b) will also delay and dv/dt periods of v_GLimited to the lowest driving voltage value V_EEThereby realizing the optimization of turn-off delay and loss.

FIG. 4 is a comparison of the instant turn-off performance of the IGBT under the SRPVC driving method and the Conventional driving method (CGD), in which V is greater than V is applied to the SRPVC method (a) in FIG. 4_EEDrive voltage v of_G,ifRealizing v identical to CGD_PK＝V_ref. At the same time, the SRPVC process is at delay and dv_CEStage/d t applying minimum driving voltage V_EEDue to the drive resistance R of the SRPVC_gLess than CGD, and therefore a large load currentThe turn-off delay and loss of the SRPVC are obviously lower than those of the CGD method.

In fig. 4, (b) compares the turn-off performance of the CGD and SRPVC methods at small load currents. When I is_LAs becomes smaller, since the miller level falls, as shown in fig. 4(b), the turn-off delay becomes larger in both driving methods, and the terminal voltage rising speed | dv_CEThe/d t | will decrease. But due to the drive resistance R of the SRPVC method_gSmaller and therefore | dv under SRPVC control_CEThe/d t | is always larger than the CGD, while the turn-off delay and loss are always smaller than the CGD.

In combination with the above analysis of FIG. 4, the SRPVC method of the present invention can achieve the v-pair at different load currents_PKWhile achieving lower IGBT turn-off performance (i.e., lower turn-off delay and turn-off loss) than existing methods.

The control effect of SRPVC is further demonstrated by giving experimental waveforms as follows:

1) accurate control of SRPVC v_PKExperimental waveform of (2)

Off transient experimental waveforms for a plurality of consecutive pulses as shown in fig. 5; the different horizontal lines in the diagram represent v for each turn-off transient_PK(ii) a Specifically, under 600V/300A, the switching-off transient experimental waveforms of the SRPVC driving method and the CGD method are given; wherein the reference value V of the terminal voltage peak value_ref900V, (a) CGD method, not V_PKControl, R_g4 Ω; (b) SRPVC Process as_PKControl, R_g＝4Ω；

From fig. 5(a), it can be seen that v of the 1 st turn-off transient is seen when using the CGD method_PK,1＝880V<V_ref. Since there is no pair v_PKAfter that, in accordance with the load current I_LConstantly increasing, v_PKAnd is also increasing and is turning off the transient v at the last 10 th turn-off_PK,101000V, much greater than V_ref。

As can be seen from FIG. 5(b), SRPVC process pair v_PKApplying a self-regulating control test waveform, v for pulse 1_PK,1＝860V<V_ref. Note this initial v_PKLess than the initial v in FIG. 5(a)_PKThis is to safely turn off to prevent the voltage peak just starting to exceed V_refDi at the initial turn-off transient_CStage/d t applying higher v_G,if,1. FIG. 5(b) initial v_G,if,10V, much greater than the initial V in (a)_G,if,1＝V_EEThen the initial v in (b)_PKSmaller than (a). Under self-adjusting control, in order to make v_PKIs closer to V_refV of the 2 nd transient in (b)_G,ifV is greater than 1 st_G,ifSmaller, with the aim of accelerating i_CLowering the speed to increase v appropriately_PK. Thereafter, as the load current increases, in order to control v_PKDoes not exceed and is as close as possible to V_refDriving voltage v_G,ifWill be increased gradually to slow down i_CThe rate of descent. In the last off-transient, v_G,ifAbout +4V is achieved, and under the self-regulation control, the device is under the rated load current, and V can be converted into V as shown in (b)_PKControl to V_ref. In addition, the sum dv_CEV of the/dt stage_GIs kept at the lowest V_EETo achieve minimal turn-off delay and loss.

2) SRPVC control v_PKMeanwhile, the IGBT turn-off performance is improved compared with the CGD method

The principle of comparing the turn-off performance is that under the rated current of 300A, the CGD and SRPVC methods select a certain driving resistance value R_gSo that their terminal voltage peak v_PKAll reach V_ref. Then respectively selecting driving resistors R in CGD and SRPVC methods_gNext, experiments under each load current were performed to verify the turn-off performance.

Reference value V of terminal voltage peak value here_refTaken as 900V. The CGD method is carried out under the condition of 600V/300A commutation at R_gA peak off transient terminal voltage of 900V can be obtained at 8.5 Ω. While, according to the above analysis, the SRPVC method is in the case of v_PKWhen self-adjusting control is applied, the small R can be_gNext, optimization of turn-off performance (reduction of turn-off delay, turn-off loss) is expected. The SRPVC method can select smaller R_g＝4Ω。

As shown in fig. 6Turning off the transient experimental waveform under the bus voltage of 600V and different load currents; wherein, (a) CGD method, not v_PKControl, R_g8.5 Ω; (b) SRPVC Process as_PKControl, R_g4 Ω; under the driving resistance value, the CGD and SRPVC methods are used to make the turn-off transient experiment under various load currents,

as shown in FIG. 6(a), at maximum current, i.e., rated 300A load current, v under the CGD method_PK＝V_ref900V. With decreasing load current, the turn-off delay then rises slightly, | dv_CE/d t|、|di_CFalling/d t terminal voltage peak value v_PKAnd also becomes smaller.

The turn-off transient waveform under the SRPVC method is shown in FIG. 6(b), due to the smaller driving resistance R_gDespite its turn-off delay, | dv_CE/d t|、|di_CThe trend of/d t | changes with load current is the same as the CGD method, but the magnitude of the change is much smaller. In addition, comparing FIGS. 6(a), (b), as previously analyzed, the SRPVC process utilizes a smaller R_gThus, lower turn-off delay and higher | dv can be achieved_CE/d t |, the latter leading to lower turn-off losses. As shown in FIG. 6(b), at v_PKUnder the self-regulation control, the SRPVC method automatically applies larger driving voltage v under larger load current (250A, 300A)_G,if(0V, +4V) control V_PKIs equal to V_ref(ii) a At lower load currents, even if the lowest drive voltage v is applied_G,if＝V_EEPeak value of terminal voltage v_PKIs still less than V_ref。

The turn-off transient characteristics obtained by the CGD and SRPVC methods, including terminal voltage peak, turn-off delay, turn-off loss, were summarized and compared at different load currents as shown in fig. 6. The turn-off characteristics of the CGD and SRPVC methods at each load current of 50A to 300A are shown in fig. 7 (a) as a comparison of the terminal voltage peak; (b) turn-off delay comparison and (c) turn-off loss comparison. As can be seen from FIG. 7, at a bus voltage of 600V, I is different_LNext, comparing the turn-off transient performance of the SRPVC method with that of the CGD method, the peak value v of the IGBT terminal voltage_PKIs always less than or equal to V_ref. At the same time, since the SRPVC method employs the delay and dv for the turn-off transient as described above_CEAnd the optimization control of the/d t stage reduces the turn-off delay and the loss by 53 percent and 28 percent respectively compared with the existing CGD method.

FIG. 8 shows the turn-off transient di_CStage/d t detection circuit, wherein E is power ground of IGBT and potential v thereof_EThe expression is shown as formula (3), wherein L_EIs the kelvin inductance value between the drive ground E and the power ground E of the IGBT. At the turn-off transient di_CThe/dt phase, as the tube current decreases, according to equation (3), v_EIs a positive potential. By diode blocking, resistive voltage division and buffers, di_CThe/d t stage will generate a positive v_sigA signal. v. of_sigAnd the FPGA chip is connected to the FPGA chip on the driving board, so that the FPGA can know the current state of the IGBT.

FIG. 9 shows a driving voltage generation circuit, by which the SRPVC method requires accurate control of v_PKThe FPGA outputs Digital signals to a high-speed Digital-to-Analog Converter (DAC), the DAC amplifies the output voltage and current through an Operational Amplifier (OP) and a push-pull, and finally generates a required driving voltage v_G. Output digital quantity CODE and v of FPGA_GIs represented by the formula (4), wherein k is₁Is a coefficient, V_biasFor bias voltages, M is the number of parallel digital bits output by the FPGA of FIG. 9. According to the formula (4), the FPGA can generate various driving voltage values with high numerical resolution by outputting different digital values.

3. Peak value v of terminal voltage_PKA sampling circuit as shown in fig. 10. In fig. 10, the IGBT terminal voltage v_CEFirstly, obtaining signal level voltage v through resistance-capacitance voltage division_CE,divThen, the peak value is detected and maintained through a peak value detection circuit consisting of two operational amplifiers to obtain v_smp,PK. The peak can then be converted to a v-delta acceptable for FPGA by an Analog-to-Digital Converter (ADC)_PKA proportional digital quantity. v. of_smp,PKAnd terminal voltage v_PKHas the relationship of formula (5), wherein k_VIs the resistance-capacitance voltage division ratio in fig. 10. And then v can be obtained_PKProportional value k between digital quantity output to FPGA by ADC_PKAs shown in formula (6), wherein k_ADCIs the gain of the ADC input to the output. Equation (6) reflects the sampled digital quantity and the actual peak value v_PKThere is a simple proportional relationship between them, so v can be easily adjusted_PKAnd (5) controlling.

According to the illustration of FIG. 2, to realize v pairs_PKThe FPGA chip on the driving board can accurately control the digital quantity and the reference value V_refAnd carrying out Proportional-Integral (PI) operation on the corresponding digital quantity to obtain a corresponding driving voltage value. V_refCorresponding digital quantity N_PK,refCan be calculated according to the formula (7).

v_smp,PK＝v_PKk_V (5)

k_PK＝k_Vk_ADC (6)

N_PK,ref＝V_refk_PK (7)。

Claims (4)

1. A grid driving method for accurately controlling IGBT peak voltage and improving switching characteristics is characterized by comprising the following steps:

step 1, accurately collecting the analog magnitude of the voltage peak value of the IGBT turn-off transient state terminal at each time through a peak voltage detection and digitization circuit;

step 2, digitalizing the peak value of the voltage at the turn-off transient state by an Analog-to-Digital Converter (ADC) to obtain the voltage v equal to the actual peak value_PKA digital quantity proportional to the determined relationship;

step 3, outputting the digital quantity to a Field Programmable Gate Array (FPGA) chip (Field Programmable Gate Array, hereinafter referred to as FPGA) on a driving board;

step 4, the FPGA chip combines the digital quantity with the reference value V_refThe corresponding digital quantity is subtracted, and then the Proportional-Integral PI operation is carried out to obtain the corresponding driving voltage value v_G；

Step 5, the digital quantity and the reference value V are processed by the FPGA chip in step 4_refThe corresponding digital quantity is used for proportional-integral PI operation to generate the turn-off transient di obtained by the PI regulator_CDriving voltage during the/dt phase and di during the turn-off transient_CThe/dt stage is applied to the IGBT gate;

step 6, switching the command signal and the sampling signal di according to the PWM_CDt identifies the current IGBT stage, and thus the turn-off transient di_CControl is applied at the/dt stage.

2. The gate driving method for accurately controlling peak voltage of IGBT to improve switching characteristics as claimed in claim 1, wherein said detecting di of turn-off transient_CDt stage to enable a delay stage for IGBT turn-off transients, dv_CEDt stage and di_CThe three stages of the/dt stage realize decoupling control, thereby accurately controlling v_PKMeanwhile, the turn-off delay and turn-off loss can be kept low.

3. The gate driving method for accurately controlling peak voltage of IGBT to improve switching characteristics as claimed in claim 1, wherein step 6 is performed on the turn-off transient di_CControl may be applied during the/dt phase_CApplication of high drive voltages v in the/dt stage_G,ifHTo obtain a small terminal voltage peak value v_PK,LOr by applying a small value of the drive voltage v_G,ifLTo obtain a large terminal voltage peak value v_PK,H(ii) a Or at delay and dv_CEThe dt stage always applies the lowest driving voltage V_EESo as to obtain the lowest turn-off delay and turn-off loss and realize the optimization of turn-off delay and loss.

4. The gate driving method for accurately controlling the peak voltage of the IGBT to improve the switching characteristics as claimed in claim 1, wherein the driving voltage value v is_PKUnder the self-regulation control, the device will convert v into V under the rated load current_PKControl to V_ref(ii) a In addition, the sum dv_CEV of the/dt stage_GIs kept at the lowest V_EETo achieve minimal turn-off delay and loss.

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