CN113410176A - OLED device and manufacturing method thereof - Google Patents
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- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
- H10K59/131—Interconnections, e.g. wiring lines or terminals
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
- H10K59/1201—Manufacture or treatment
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
- H10K59/122—Pixel-defining structures or layers, e.g. banks
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Abstract
The invention provides an OLED device and a manufacturing method thereof, which can enable the original chip circuit substrate to be directly externally connected with materials of a display part of the OLED device by adding three processes of a conductive contact plug, an anode and a pixel defining layer on the basis of the original structure of the chip circuit substrate completing a BEOL (back end of line) process, so that the finally manufactured device can have an OLED display function, namely the OLED display device is obtained. In addition, the conductive contact plug, the anode, the pixel defining layer and other structures can be directly manufactured on the basis of the original structure of the chip circuit substrate which finishes the BEOL process, so that the problem that additional space is occupied by a bonding wire and a sealing area when the OLED display panel and the chip circuit substrate are electrically connected together by means of a packaging process and the like can be avoided, the size of the finally manufactured OLED device is further reduced, and the method is particularly suitable for manufacturing OLED micro-displays such as glasses and the like.
Description
Technical Field
The invention relates to the technical field of OLED device manufacturing, in particular to an OLED device and a manufacturing method thereof.
Background
An Organic Light Emitting Diode (OLED) micro display belongs to a silicon-based display. Due to the excellent electrical characteristics of silicon-based devices and the extremely fine device dimensions, a high degree of integration of the display IC substrate can be achieved. The general OLED microdisplay fabrication methods are generally: firstly, directly preparing a display part such as an OLED light-emitting unit on a silicon substrate to form an OLED display panel, and preparing a chip circuit and the like for controlling and driving the display part to work on another substrate through a Front End of Line (FEOL) process and a Back End of Line (BEOL) process to form a chip circuit substrate, as shown in FIG. 1, the chip circuit substrate 100 is provided with a top metal interconnection Line 101, a passivation layer 102 and an aluminum pad 103, the passivation layer 102 covers the top metal interconnection Line 101, and the bottom of the aluminum pad 103 is embedded in the passivation layer 102 and is contacted with the top of part of the top metal interconnection Line 101; and then electrically connecting the OLED display panel with the drive control chip substrate by using methods such as film packaging, cover plate packaging and the like to finally obtain the OLED micro-display.
In the method, on one hand, the chip circuit substrate cannot be directly externally connected with the material of the OLED display part, and on the other hand, when the OLED display panel and the chip circuit substrate are electrically connected together by means of a packaging process and the like, the bonding wire and the sealing area occupy extra space, which is not beneficial to further reducing the size of the display.
Disclosure of Invention
The invention aims to provide an OLED display device and a manufacturing method thereof, which can directly connect the OLED display part with the external material of the drive control chip substrate after the structure of the drive control chip substrate is manufactured, so that the area of the finally formed display device is smaller.
In order to solve the above technical problem, the present invention provides a method for manufacturing an OLED device, including:
providing a chip circuit substrate which finishes a back-end process and is provided with a plurality of top-layer metal interconnection lines;
forming an insulating covering layer to cover the chip circuit substrate, and etching the insulating covering layer until the surface of the corresponding top-layer metal interconnection line is exposed to form a contact hole;
forming a conductive contact plug in the contact hole;
forming a plurality of mutually discrete anodes on a part of the surface of the insulating covering layer, wherein the bottom of each anode is electrically contacted with the top of the corresponding conductive contact plug;
forming a patterned pixel defining layer on the surface of each of the anodes and its surrounding insulating cover layer, the pixel defining layer having a pixel opening on the upper surface of each of the anodes;
and forming an organic light-emitting layer to fill each pixel opening, and forming a cathode to at least cover the organic light-emitting layer so as to form an OLED light-emitting element on the chip circuit substrate.
Optionally, the chip circuit substrate further has a passivation layer, where the passivation layer covers an upper surface of each top-layer metal interconnection line and has at least one opening, each opening exposes a partial region of the corresponding top-layer metal interconnection line, and a pad is formed in each opening.
Optionally, after forming the patterned pixel defining layer and before forming the organic light emitting layer, further comprising: and opening the insulating covering layer above the bonding pad through photoetching and etching processes so as to expose the upper surface of the bonding pad.
Optionally, the step of forming the insulating cover layer having the contact hole on the chip circuit substrate includes:
forming a dielectric covering layer on the passivation layer and the surface of the pad, and burying the pad;
carrying out top planarization on the medium covering layer so that the medium covering layer has a flat upper surface;
sequentially forming a hard mask covering layer and a photoresist layer with a contact hole pattern on the surface of the medium covering layer, wherein the contact hole defined by the contact hole pattern is aligned with a partial region of the corresponding top-layer metal interconnection line;
and etching the insulating covering layer by taking the photoresist layer as a mask until the corresponding surface of the top metal interconnection line is exposed so as to form the contact hole.
Optionally, the step of forming the conductive contact plug in the contact hole includes:
depositing a conductive material on the insulating covering layer and the surface of the contact hole, wherein the deposited conductive material at least can fill the contact hole;
and carrying out chemical mechanical polishing on the deposited conductive material until the upper surface of the insulating covering layer is exposed so as to form the conductive contact plug filled in the contact hole.
Optionally, the step of forming a plurality of anodes on the surface of the insulating cover layer includes:
forming an anode material layer to cover the insulating covering layer and the surface of the conductive contact plug;
forming a photoresist layer with an anode pattern on the anode material layer;
and etching the anode material layer by taking the photoresist layer as a mask so as to form a plurality of mutually-separated anodes which are positioned above each conductive contact plug.
Optionally, the step of forming the patterned pixel defining layer comprises:
forming a pixel defining layer covering the insulating cover layer and the surfaces of the anodes;
forming a photoresist layer having a pixel defining pattern on the pixel defining layer;
and etching the pixel defining layer by taking the photoresist layer as a mask so as to remove the redundant pixel defining layer and form a corresponding pixel opening on the upper surface of each anode.
Optionally, the contact hole is an annular contact hole, the conductive contact plug is an annular plug, and a region surrounded by the conductive contact plug is made of a light-transmitting and non-conductive material.
Based on the same inventive concept, the present invention also provides an OLED device, comprising:
the chip circuit substrate is provided with a plurality of top-layer metal interconnection lines;
the insulating covering layer covers the chip circuit substrate and is provided with a contact hole which exposes the upper surface of the part of the corresponding top-layer metal interconnection line;
the conductive contact plug is filled in the contact hole;
a plurality of mutually discrete anodes formed on a part of the surface of the insulating cover layer, and the bottom of each anode is in contact with the top of the corresponding conductive contact plug;
a patterned pixel defining layer formed on the surface of each of the anodes and the insulating cover layer therearound, the pixel defining layer having a pixel opening on the upper surface of each of the anodes;
an organic light emitting layer filled in each of the pixel openings; and the number of the first and second groups,
and the cathode at least covers the organic light-emitting layer.
Optionally, in the OLED device, the chip circuit substrate further has a passivation layer, where the passivation layer covers an upper surface of each top-layer metal interconnection line and has at least one opening, each opening exposes a partial region of the corresponding top-layer metal interconnection line, and a pad is formed in each opening; the insulating cover layer also has an opening exposing the upper surface of the pad.
Optionally, in the OLED device, the insulating cover layer includes a dielectric cover layer and a hard mask cover layer stacked on the passivation layer in sequence, and the dielectric cover layer covers the passivation layer and the surface of the pad and has a flat upper surface.
Optionally, in the OLED device, the contact hole is an annular contact hole, the conductive contact plug is an annular plug, and a region surrounded by the conductive contact plug is made of a light-transmitting and non-conductive material.
Compared with the prior art, the technical scheme of the invention has the following beneficial effects:
1. the original chip circuit substrate can be directly externally connected with the material of the display part of the OLED device by adding three processes of the conductive contact plug, the anode and the pixel defining layer on the basis of the original structure of the chip circuit substrate completing the BEOL processing procedure, so that the finally manufactured device can have the OLED display function, namely the OLED display device is obtained.
2. The conductive contact plug, the anode, the pixel defining layer and other structures can be directly manufactured on the basis of the original structure of the chip circuit substrate which finishes the BEOL process, so that the problem that additional space is occupied by a bonding wire and a sealing area when the OLED display panel and the chip circuit substrate are electrically connected together by means of a packaging process and the like can be avoided, the size of the finally manufactured OLED device is further reduced, and the method is particularly suitable for the manufacturing requirements of OLED micro-displays such as glasses and the like.
3. Because the corresponding anode and the top metal interconnection line are directly and electrically connected through the conductive contact plug filled in the contact hole, the thickness of the finally manufactured OLED device is further reduced, and the OLED device is particularly suitable for the manufacturing requirement of an ultrathin OLED micro-display.
4. The conductive contact plug is an annular plug, and the area surrounded by the conductive contact plug is made of a light-transmitting and non-conductive material, so that light emitted by the formed OLED device can more pass through the area surrounded by the conductive contact plug, and the light emitting efficiency of the formed OLED device is improved.
Drawings
FIG. 1 is a cross-sectional view of a conventional BEOL fabricated chip circuit substrate;
FIG. 2 is a flow chart of a method of fabricating an OLED device according to an embodiment of the present invention;
fig. 3A to 3I are schematic cross-sectional views of devices in a method for manufacturing an OLED device according to an embodiment of the present invention.
Detailed Description
The technical solution proposed by the present invention will be further described in detail with reference to the accompanying drawings and specific embodiments. The advantages and features of the present invention will become more apparent from the following description. It is to be noted that the drawings are in a very simplified form and are not to precise scale, which is merely for the purpose of facilitating and distinctly claiming the embodiments of the present invention.
Referring to fig. 2, an embodiment of the invention provides a method for manufacturing an OLED device, including:
s1, providing a chip circuit substrate for finishing the back-end process, wherein the chip circuit substrate is provided with a plurality of top-layer metal interconnection lines;
s2, forming an insulating covering layer to cover the chip circuit substrate, and etching the insulating covering layer until the corresponding surface of the top metal interconnection line is exposed to form a contact hole;
s3, forming a conductive contact plug in the contact hole;
s4, forming a plurality of mutually-separated anodes on partial surfaces of the insulating covering layer, wherein the bottom of each anode is electrically contacted with the top of the corresponding conductive contact plug;
s5, forming a patterned pixel defining layer on the surface of each anode and the insulating covering layer around the anode, wherein the pixel defining layer is provided with a pixel opening on the upper surface of each anode;
s6, opening the insulating covering layer above the bonding pad through photoetching and etching processes to expose the upper surface of the bonding pad;
and S7, forming an organic light emitting layer to fill each pixel opening, and forming a cathode to at least cover the organic light emitting layer.
Referring to fig. 3A, in step S1, a chip circuit substrate for performing front-end-of-line (FEOL) and back-end-of-line (BEOL) processes is provided, wherein the front-end-of-line processes mainly fabricate electronic devices (not shown) such as transistors, diodes, resistors, capacitors, inductors, etc. on a semiconductor substrate (not shown, such as a silicon wafer), and the specific process of forming the transistors includes: firstly, a device region (active area) of a transistor is divided on a semiconductor substrate through a shallow trench isolation process, then, the corresponding device region is converted into an N-type region and a P-type region through an ion implantation process, then, a grid is manufactured on the corresponding device region through a grid first process or a grid last process, and then, a source (source) and a drain (drain) of each transistor are formed through the ion implantation process. The back-end process is mainly used for wiring, so that corresponding electric connection is realized among different electronic elements, and a bonding pad is led out, and the specific process comprises the following steps: forming a plurality of layers of metal interconnection lines by processes of interlayer dielectric layer deposition, tungsten plug forming, Damascus copper interconnection inlaying (single inlaying or dual inlaying) and the like, wherein the different layers of metal interconnection lines are connected by conductive plugs filled in the through holes; after top-layer metal interconnection lines 301a and 301b are formed, a passivation layer 302 is formed on the top-layer metal interconnection lines 301a and 301b and the interlayer dielectric layer 300 to protect device structures such as the top-layer metal interconnection lines 301a and 301b, wherein the top-layer metal interconnection line 301a is used for being electrically connected with an anode of a formed OLED light-emitting element in the subsequent process, and the top-layer metal interconnection line 301b is used for leading out a pad 303 in the subsequent process; then, the passivation layer 302 is etched to form at least one opening (not shown) exposing a portion of the upper surface of the corresponding top-level metal interconnection line 301 b; thereafter, a pad 303 is formed in each opening by a process such as deposition and etching of a metal such as aluminum or a process such as ball-planting.
Referring to fig. 3A and 3B, in step S2, a dielectric capping layer 304 may be first formed on the passivation layer 302 and the surface of the pad 303 by a deposition process (such as various CVD, various PVD or ALD, etc.), wherein the dielectric capping layer 304 is made of an oxide formed by, for example, silicon oxide, silicon nitride, silicon oxynitride, ethyl silicate (TEOS), phosphosilicate glass (PSG), borophosphosilicate glass (BPSG), a low-K dielectric material having a dielectric constant K of less than 3.9, an organic insulating material (such as acrylic resin, epoxy resin, phenolic resin, polyamide resin, polyimide resin, etc.), other suitable dielectric materials, or a combination thereof. Illustratively, the low-K dielectric material includes Fluorinated Silicate Glass (FSG), carbon-doped silicon oxide, polyimide, and the like, and combinations thereof. The thickness of the dielectric cap layer 304 is thick enough to completely bury the pad 303 therein and to subsequently provide a flat top surface that does not expose the upper surface of the pad 303. Then, the dielectric cap layer 304 is top-planarized by a Chemical Mechanical Polishing (CMP) process until the thickness and the top surface flatness of the dielectric cap layer 304 meet requirements, so that the dielectric cap layer 304 has a flat upper surface, the bonding pad 303 is buried therein, and a flat process platform is provided for subsequent processes. Next, a hard mask capping layer 305 is covered on the dielectric capping layer 304 by a deposition process (such as various chemical vapor deposition CVD processes, various physical vapor deposition PVD processes, or atomic layer vapor deposition ALD processes, etc.), and a photoresist layer 306 is further covered on the hard mask capping layer 305 by a spin coating process, etc., wherein the material of the hard mask capping layer 305 includes at least one of silicon oxide, silicon nitride, and silicon oxynitride, for example. Then, the photoresist layer 306 is patterned by a series of photolithography processes such as exposure and development to form a contact hole pattern in the photoresist layer 306, wherein the contact hole pattern defines contact holes aligned with the corresponding partial regions of the top-level metal interconnection lines 301 a. Then, using the photoresist layer 306 with the contact hole pattern as a mask, the hard mask covering layer 305, the dielectric covering layer 304 and the passivation layer 302 are sequentially etched until a portion of the upper surface of the top metal interconnection line 301a is exposed, so as to form a contact hole 307. Finally, the photoresist layer 306 is removed.
It should be noted that, in this embodiment, the material of each layer and each structure of the chip circuit substrate needs to meet the performance requirement of the OLED device, and particularly, the reflectivity needs to be matched with the light extraction performance of the OLED device.
The top-layer metal interconnection line 301a is adaptively disposed according to a pixel array of the OLED device, and on one hand, the top-layer metal interconnection line 301a may serve as a line for electrically connecting a subsequently formed OLED light-emitting element (i.e., a light-emitting diode) with a corresponding electronic element such as a transistor in the chip circuit substrate, and on the other hand, may also serve as a reflective layer for reflecting light emitted by the OLED light-emitting element transmitted thereto, so as to improve the light-emitting efficiency of the OLED device. In addition, the contact hole pattern in the photoresist layer 306 is annular, so that an annular contact hole (i.e., a groove surrounded by a solid pillar) is formed in a region of the top-layer metal interconnection line 301a corresponding to each subsequent anode, so that the subsequently formed conductive contact plug is an annular plug, which can ensure the electrical connection reliability between the anode of the subsequently formed OLED light-emitting element (i.e., light-emitting diode) and the corresponding top-layer metal interconnection line 301a, and can reduce the shielding of the conductive contact plug on light emitted by the OLED device, so that the corresponding light can pass through the inner region surrounded by the conductive contact plug, thereby finally improving the light-emitting efficiency of the formed OLED device. In other embodiments of the present invention, in order to reduce the difficulty of etching the contact hole 307, avoid the photoresist layer 306 from generating polymer residues during the process of etching the dielectric capping layer 304 and the passivation layer 302 to affect the morphology of the formed contact hole 307, and improve the reliability of transferring the contact hole pattern to the lower layer, the contact hole pattern in the photoresist layer 306 may be first transferred into the hard mask capping layer 305, then the photoresist layer 306 is removed, and then the dielectric capping layer 304 and the passivation layer 302 are etched by using the hard mask capping layer 305 as a mask until the upper surface of the portion of the top metal interconnection line 301a is exposed, so as to form the contact hole 307.
Referring to fig. 3C, in step S3, the contact holes 307 may be filled with a conductive material by ALD, CVD, PVD, electroplating, electroless plating, any other suitable process or combination until the contact holes 307 are filled, and when the contact holes 307 are filled with a conductive material by deposition process such as ALD, CVD, PVD, etc., the deposited conductive material also covers the surface of the hard mask cap layer 305 and at least fills the contact holes 307, and the conductive material used to fill the contact holes 307 may include, but is not limited to, tungsten, cobalt, copper, aluminum, polysilicon, doped silicon, silicide, or any combination thereof. Then, the deposited conductive material may be subjected to chemical mechanical polishing until the upper surface of the hard mask capping layer 305 is exposed to form the conductive contact plug 308 filled in the contact hole 307. The bottom of each conductive contact plug 308 is in electrical contact with the top of a corresponding top-level metal interconnect line 301 a.
Referring to fig. 3D and 3E, in step S4, an anode material layer 309 may be covered on the surfaces of the hard mask covering layer 305 and the conductive contact plug 308 by ALD, CVD, PVD or any other suitable process, and a photoresist layer 310 may be further coated on the surface of the anode material layer 309, wherein the anode material layer 309 may be made of a metal material such as aluminum, copper, silver, or a transparent conductive material such as Indium Tin Oxide (ITO), Indium Zinc Oxide (IZO), but is not limited to these materials, and the anode material layer 309 may be a single-layer film structure or a multi-layer film stack structure. Then, the photoresist layer 310 is exposed, developed, and the like by using an anode mask of the OLED light emitting device (light emitting diode) to form anode patterns in the photoresist layer 310, wherein each anode pattern is aligned with a corresponding conductive contact plug 308. Next, using the photoresist layer 310 as a mask, the anode material layer 309 is etched until the surface of the hard mask covering layer 305 is exposed, so as to form a plurality of anodes 309a located above the conductive contact plugs 308 and separated from each other. Thereafter, the photoresist layer 310 may be removed using a conventional dry or wet stripping process. It can be seen that the arrangement of the conductive contact plugs 308 and the top-level metal interconnection lines 301a needs to be designed based on the arrangement of the anodes of the OLED light-emitting elements (light-emitting diodes), or in other words, the arrangement of the conductive contact plugs 308 and the top-level metal interconnection lines 301a needs to be designed based on the arrangement of the pixel array of the OLED. It should be noted that, in other embodiments of the present invention, in order to simplify the process, a lift-off process may be used to fabricate the anode 309a, and the specific process is as follows: after coating, exposing and developing the hard mask covering layer 305 with a photoresist, using a patterned photoresist film as a mask, evaporating the required anode material with the photoresist, and then removing the photoresist film while stripping off the excess anode material on the photoresist film, so that only the anode 309a remains on the hard mask covering layer 305. Obviously, regardless of the process from which anode 309a is formed, the bottom of anode 309a is higher than the top of pad 303 so that the chip circuit substrate may directly circumscribe the OLED material. In addition, the anode 309a is directly connected with the top metal interconnection line 301a through the vertical conductive contact plug 308, so that the distance is short, and the manufacturing of an ultrathin OLED device can be facilitated.
Referring to fig. 3F and 3G, in step S5, a Pixel Defining Layer (PDL) 311 may be covered on the surfaces of the hard mask covering layer 305 and each of the anodes 309a by using ALD, CVD, PVD or any other suitable process, and a photoresist layer 312 may be further coated on the surface of the Pixel defining layer 311, wherein the material of the Pixel defining layer 311 may be, but is not limited to, silicon oxide, silicon nitride, silicon oxynitride, or the like. Then, the photoresist layer 312 is exposed and developed by a photolithography process using a pixel defining layer mask of the OLED device, so as to form a pixel defining pattern in the photoresist layer 312, wherein the pixel defining pattern can be used to define each sub-pixel position. Next, using the photoresist layer 312 with the pixel defining pattern as a mask, the pixel defining layer is etched to expose the surface of the hard mask covering layer 305, so as to remove the excess pixel defining layer, and a corresponding pixel opening 311b is formed on the upper surface of each anode 309 a. Each pixel opening 311b is used to define a corresponding sub-pixel, the remaining pixel defining layer 311a covers the sidewall of each anode 309a, the top region of each anode 309a except for the pixel opening 311b, and the region between adjacent anodes 309a, so as to ensure the spacing and insulating isolation between the subsequently formed pixels, and the remaining pixel defining layer 311a also exposes the surface of the hard mask layer 305 on the region where the pad 303 is located. Thereafter, the photoresist layer 312 is removed.
Referring to fig. 3H and 3I, in step S6, a photoresist layer 313 is first coated on the surfaces of the hard mask covering layer 305, the pixel defining layer 311a and the anode 309a, and the photoresist layer 313 is exposed and developed to mask the pixel defining layer 311a and the anode 309a and expose the region where the pad 303 is located. Then, the hard mask covering layer 304 and the dielectric covering layer 305 above the bonding pad 303 are etched by using the photoresist layer 313 as a mask, and the bonding pad 303 is etched to a certain degree to form an opening 314 exposing a part of the upper surface of the bonding pad 303, at this time, the bonding pad 303 is in a groove shape, so that the contact area between the bonding pad 303 and a corresponding electrical structure (such as a cathode of an OLED light-emitting element or a welding lead and the like) formed in the opening 314 later is increased, and the reliability of the outward connection of the bonding pad 303 is enhanced. The photoresist layer 313 is removed to re-expose the pixel defining layer 311a, the pixel opening 311b and the anode 309 a.
With continued reference to fig. 3I, in step S7, an organic light emitting layer (not shown) is first formed in the corresponding pixel opening 311b by using a suitable process technique such as evaporation or inkjet printing, and the organic light emitting layer may also be disposed on the upper surface of the pixel defining layer 311a, but the organic light emitting layer does not cover the opening 314 above the pad 303. The organic light emitting layer may include a hole injection layer, a hole transport layer, a light emitting layer, an electron transport layer, and an electron injection layer. The structure of the organic light emitting layer may be changed into various shapes generally known to those skilled in the art. Next, a cathode material layer (not shown) may be coated on the surfaces of the hard mask capping layer 305, the organic light emitting layer and the pixel defining layer 311a by any suitable process, such as ALD, CVD, PVD, electroplating, and a photoresist layer (not shown) may be further coated on the surface of the cathode material layer, wherein the cathode material layer may be a metal material, such as aluminum, copper, silver, and the like, or a transparent conductive material, such as Indium Tin Oxide (ITO), Indium Zinc Oxide (IZO), but is not limited to these materials, and the cathode material layer may be a single-layer film structure or a multi-layer film stack structure. Then, the photoresist layer is subjected to photolithography processes such as exposure and development by using a cathode mask of the OLED light emitting element (light emitting diode) to form cathode patterns in the photoresist layer, each of which is aligned with a corresponding anode 309 a. Next, the cathode material layer is etched using the photoresist layer as a mask to remove the excess cathode material layer, and cathodes (not shown) corresponding to the anodes 309a are formed on the surface of the organic light emitting layer. Thereafter, the photoresist layer having the cathode pattern may be removed using a conventional dry stripping or wet stripping process. At this time, the stacked structure between each anode 309a to the upper cathode constitutes a corresponding OLED light emitting element. In this step, a part of the remaining cathode material layer may be filled in the opening 314, so that the bottom of the formed cathode contacts the top of the pad 303, and at this time, the corresponding electronic component in the chip circuit substrate can be connected to the cathode through the top metal interconnection line 301b and the pad 303, that is, at this time, not only a part of the circuit in the chip circuit substrate can be used for driving and controlling the anode of the OLED light-emitting element, but also another part of the circuit can be used for driving and controlling the cathode of the OLED light-emitting element, so that the chip circuit substrate can finally control and drive the OLED light-emitting element to emit light. In addition, the bonding pad 303 is groove-shaped, so that the contact area between the cathode and the bonding pad 303 is increased, and the electrical connection reliability between the chip circuit substrate and the OLED light-emitting element is improved.
Based on the same inventive concept, referring to fig. 3A to 3I, the present embodiment further provides an OLED device manufactured by the above method for manufacturing an OLED device, including: a chip circuit substrate, an insulating cover layer, a conductive contact plug 308, a plurality of mutually separated anodes 309a, a patterned pixel defining layer 311a, an organic light emitting layer (not shown) and a cathode.
The chip circuit substrate is provided with a front-end-of-line (FEOL) and a back-end-of-line (BEOL) which are used for completing electronic elements such as transistors, diodes, resistors, capacitors, inductors and the like, an interlayer dielectric layer 300 and a plurality of layers of metal interconnection lines formed in the interlayer dielectric layer 300, wherein the top layer metal interconnection lines are at least provided with two types of top layer metal interconnection lines 301a and top layer metal interconnection lines 301b, the top layer metal interconnection lines 301a are used for being connected with corresponding anodes, and the top layer metal interconnection lines 301b are used for leading out bonding pads 303. The chip circuit substrate further has a passivation layer 302, the passivation layer 302 covers the upper surface of each of the top-layer metal interconnection lines 301a and 301b and has an opening for forming a pad 303, each of the openings exposes a partial region of the corresponding top-layer metal interconnection line 301b, and a pad 303 is formed in each of the openings.
The insulating capping layer includes a dielectric capping layer 304 and a hard mask capping layer 305 sequentially stacked on the passivation layer 302, and the dielectric capping layer 304 covers the passivation layer 302 and the surface of the pad 303 and has a flat upper surface, and the insulating capping layer has a contact hole 307 penetrating the dielectric capping layer 304 and the hard mask capping layer 305 and exposing a portion of the upper surface of the corresponding top-level metal interconnection line 301a and an opening 314 penetrating the dielectric capping layer 304 and the hard mask capping layer 305 and exposing the upper surface of the pad 303.
The conductive contact plug 308 is filled in the contact hole 307, the conductive contact plug 308 is a ring-shaped plug, and the region surrounded by the ring is the non-conductive dielectric covering layer 304 and the hard mask covering layer 305.
A plurality of anodes 309a are formed on a portion of the surface of the hard mask capping layer 305 and are separated from each other, and the bottom of each anode 309a is in contact with the top of a corresponding conductive contact plug 308.
A patterned pixel defining layer 311a is formed on the surface of each of the anodes 309a and the surrounding hard mask blanket 305, the pixel defining layer 311a having a pixel opening 311b on the upper surface of each of the anodes 309 a. The pixel defining layer 311a also exposes the region where the pad 303 is located.
The organic light emitting layer is filled in each of the pixel openings 311b, and the cathode at least covers the organic light emitting layer 311 b. The stack structure between each anode 309a to the overlying cathode constitutes a respective OLED light-emitting element.
Optionally, the cathode is further filled in the opening 314 of the insulating cover layer above the bonding pad 303, and in this case, not only a part of the circuit in the chip circuit substrate can be used for driving and controlling the anode of the OLED light-emitting element, but also another part of the circuit can be used for driving and controlling the cathode of the OLED light-emitting element, so that the chip circuit substrate can finally control and drive the OLED light-emitting element to emit light. In addition, the bonding pad 303 is groove-shaped, so that the contact area between the cathode and the bonding pad 303 is increased, and the electrical connection reliability between the chip circuit substrate and the OLED light-emitting element is improved.
In this embodiment, the material of each structure may refer to the description in the above manufacturing method of the OLED device, and is not described herein again.
In summary, the OLED device and the manufacturing method thereof of the present invention can make the original chip circuit substrate directly connect with the material of the display portion of the OLED device by adding three processes of the conductive contact plug, the anode and the pixel defining layer on the basis of the original structure of the chip circuit substrate completing the BEOL process, so that the finally manufactured device can have the OLED display function, i.e., the OLED display device is obtained. In addition, the conductive contact plug, the anode, the pixel defining layer and other structures can be directly manufactured on the basis of the original structure of the chip circuit substrate which finishes the BEOL process, so that the problem that additional space is occupied by a bonding wire and a sealing area when the OLED display panel and the chip circuit substrate are electrically connected together by means of a packaging process and the like can be avoided, the size of the finally manufactured OLED device is further reduced, and the method is particularly suitable for manufacturing OLED micro-displays such as glasses and the like.
The above description is only for the purpose of describing the preferred embodiments of the present invention, and is not intended to limit the scope of the present invention, and any variations and modifications made by those skilled in the art based on the above disclosure are within the scope of the appended claims.
Claims (12)
1. A method of fabricating an OLED device, comprising:
providing a chip circuit substrate which finishes a back-end process and is provided with a plurality of top-layer metal interconnection lines;
forming an insulating covering layer to cover the chip circuit substrate, and etching the insulating covering layer until the surface of the corresponding top-layer metal interconnection line is exposed to form a contact hole;
forming a conductive contact plug in the contact hole;
forming a plurality of mutually discrete anodes on a part of the surface of the insulating covering layer, wherein the bottom of each anode is electrically contacted with the top of the corresponding conductive contact plug;
forming a patterned pixel defining layer on the surface of each of the anodes and its surrounding insulating cover layer, the pixel defining layer having a pixel opening on the upper surface of each of the anodes;
and forming an organic light-emitting layer to fill each pixel opening, and forming a cathode to at least cover the organic light-emitting layer so as to form an OLED light-emitting element on the chip circuit substrate.
2. The method for manufacturing the OLED device according to claim 1, wherein the chip circuit substrate further has a passivation layer covering an upper surface of each of the top-layer metal interconnection lines and having at least one opening, each of the openings exposes a partial area of the corresponding top-layer metal interconnection line, and a pad is formed in each of the openings.
3. The method of manufacturing an OLED device of claim 2, further comprising, after forming the patterned pixel defining layer and before forming the organic light emitting layer: and opening the insulating covering layer above the bonding pad through photoetching and etching processes so as to expose the upper surface of the bonding pad.
4. The method of manufacturing the OLED device of claim 2, wherein the step of forming the insulating cover layer having the contact hole on the chip circuit substrate includes:
forming a dielectric covering layer on the passivation layer and the surface of the pad, and burying the pad;
carrying out top planarization on the medium covering layer so that the medium covering layer has a flat upper surface;
sequentially forming a hard mask covering layer and a photoresist layer with a contact hole pattern on the surface of the medium covering layer, wherein the contact hole defined by the contact hole pattern is aligned with a partial region of the corresponding top-layer metal interconnection line;
and etching the insulating covering layer by taking the photoresist layer as a mask until the corresponding surface of the top metal interconnection line is exposed so as to form the contact hole.
5. The method of manufacturing the OLED device of claim 1, wherein the step of forming the conductive contact plug in the contact hole includes:
depositing a conductive material on the insulating covering layer and the surface of the contact hole, wherein the deposited conductive material at least can fill the contact hole;
and carrying out chemical mechanical polishing on the deposited conductive material until the upper surface of the insulating covering layer is exposed so as to form the conductive contact plug filled in the contact hole.
6. The method of manufacturing an OLED device of claim 1 wherein the step of forming a plurality of anodes on the surface of the insulating cover layer includes:
forming an anode material layer to cover the insulating covering layer and the surface of the conductive contact plug;
forming a photoresist layer with an anode pattern on the anode material layer;
and etching the anode material layer by taking the photoresist layer as a mask so as to form a plurality of mutually-separated anodes which are positioned above each conductive contact plug.
7. The method of manufacturing the OLED device of claim 1, wherein the step of forming the patterned pixel defining layer includes:
forming a pixel defining layer covering the insulating cover layer and the surfaces of the anodes;
forming a photoresist layer having a pixel defining pattern on the pixel defining layer;
and etching the pixel defining layer by taking the photoresist layer as a mask so as to remove the redundant pixel defining layer and form a corresponding pixel opening on the upper surface of each anode.
8. The method according to any one of claims 1 to 7, wherein the contact hole is an annular contact hole, the conductive contact plug is an annular plug, and a region surrounded by the conductive contact plug is a light-transmitting and non-conductive material.
9. An OLED device, comprising:
the chip circuit substrate is provided with a plurality of top-layer metal interconnection lines;
the insulating covering layer covers the chip circuit substrate and is provided with a contact hole which exposes the upper surface of the part of the corresponding top-layer metal interconnection line;
the conductive contact plug is filled in the contact hole;
a plurality of mutually discrete anodes formed on a part of the surface of the insulating cover layer, and the bottom of each anode is in contact with the top of the corresponding conductive contact plug;
a patterned pixel defining layer formed on the surface of each of the anodes and the insulating cover layer therearound, the pixel defining layer having a pixel opening on the upper surface of each of the anodes;
an organic light emitting layer filled in each of the pixel openings; and the number of the first and second groups,
and the cathode at least covers the organic light-emitting layer.
10. The OLED device of claim 9, wherein the chip circuit substrate further has a passivation layer covering an upper surface of each of the top-level metal interconnection lines and having at least one opening, each of the openings exposing a partial area of the corresponding top-level metal interconnection line, and each of the openings having a pad formed therein; the insulating cover layer also has an opening exposing the upper surface of the pad.
11. The OLED device of claim 10, wherein the insulating cover layer includes a dielectric cover layer and a hard mask cover layer sequentially stacked on the passivation layer, and the dielectric cover layer covers the passivation layer and the surface of the pad and has a flat upper surface.
12. The OLED device according to any one of claims 9 to 11, wherein the contact hole is an annular contact hole, the conductive contact plug is an annular plug, and a region surrounded by the conductive contact plug is a light-transmitting and non-conductive material.
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