CN113394986A - Power equalization method for high-frequency chain matrix converter - Google Patents

Power equalization method for high-frequency chain matrix converter Download PDF

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CN113394986A
CN113394986A CN202110685850.XA CN202110685850A CN113394986A CN 113394986 A CN113394986 A CN 113394986A CN 202110685850 A CN202110685850 A CN 202110685850A CN 113394986 A CN113394986 A CN 113394986A
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power
impedance
virtual impedance
frequency chain
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李圣清
王晨阳
郑剑
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Hunan University of Technology
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M5/00—Conversion of ac power input into ac power output, e.g. for change of voltage, for change of frequency, for change of number of phases
    • H02M5/02—Conversion of ac power input into ac power output, e.g. for change of voltage, for change of frequency, for change of number of phases without intermediate conversion into dc
    • H02M5/04—Conversion of ac power input into ac power output, e.g. for change of voltage, for change of frequency, for change of number of phases without intermediate conversion into dc by static converters
    • H02M5/10—Conversion of ac power input into ac power output, e.g. for change of voltage, for change of frequency, for change of number of phases without intermediate conversion into dc by static converters using transformers
    • H02M5/12—Conversion of ac power input into ac power output, e.g. for change of voltage, for change of frequency, for change of number of phases without intermediate conversion into dc by static converters using transformers for conversion of voltage or current amplitude only
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J3/00—Circuit arrangements for ac mains or ac distribution networks
    • H02J3/38—Arrangements for parallely feeding a single network by two or more generators, converters or transformers
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/08—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
    • H02M1/088—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters for the simultaneous control of series or parallel connected semiconductor devices
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/32—Means for protecting converters other than automatic disconnection
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/42—Circuits or arrangements for compensating for or adjusting power factor in converters or inverters
    • H02M1/4208—Arrangements for improving power factor of AC input
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M5/00—Conversion of ac power input into ac power output, e.g. for change of voltage, for change of frequency, for change of number of phases
    • H02M5/02—Conversion of ac power input into ac power output, e.g. for change of voltage, for change of frequency, for change of number of phases without intermediate conversion into dc
    • H02M5/04—Conversion of ac power input into ac power output, e.g. for change of voltage, for change of frequency, for change of number of phases without intermediate conversion into dc by static converters
    • H02M5/22—Conversion of ac power input into ac power output, e.g. for change of voltage, for change of frequency, for change of number of phases without intermediate conversion into dc by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M5/275—Conversion of ac power input into ac power output, e.g. for change of voltage, for change of frequency, for change of number of phases without intermediate conversion into dc by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M5/293—Conversion of ac power input into ac power output, e.g. for change of voltage, for change of frequency, for change of number of phases without intermediate conversion into dc by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

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Abstract

The invention discloses a power equalizing method of a high-frequency chain matrix converter, which comprises the following steps: introducing self-adaptive virtual impedance, and reshaping the equivalent output impedance of the high-frequency chain matrix converter; the amplitude and the phase of the virtual impedance are adjusted in a self-adaptive manner by utilizing the output power information and the power factor of the high-frequency chain matrix converter, so that different branches have the same equivalent output impedance; and the load power is distributed according to the capacity proportion by a droop control fine-tuning compensation link. The power equalizing method realizes the adaptive adjustment of the virtual impedance only by using local power information and power factors by introducing the equivalent output impedance of the adaptive virtual impedance reshaping converter, and further realizes the proportional distribution of load power according to capacity through a droop control fine adjustment compensation link so as to improve the stability and reliability of a parallel system.

Description

Power equalization method for high-frequency chain matrix converter
Technical Field
The invention relates to the technical field of new energy converter control, in particular to a power equalization method for a high-frequency chain matrix converter.
Background
A High Frequency Link Matrix Converter (HFLMC) is a power Converter suitable for the present era and is also a core part for implementing the cross-over conversion in the micro-grid system, which is evolved from several existing Matrix Converter topologies at present. Compared with other AC/DC converters, the HFLMC has the advantages of a high-frequency transformer isolation circuit, a small number of energy conversion stages, no need of a large-capacity electrolytic capacitor and the like. The method has wide application prospect in various power systems, wind power generation, AC/DC power transmission and other aspects.
Many scholars have studied the topological decoupling and switching loss of a single HFLMC. In 2019, in 12 th edition of electrical engineering and science, a three-phase four-leg high-frequency link matrix rectifier under an unbalanced power grid and a junction-decoupling saddle wave pulse width modulation method thereof, a control strategy based on a topology decoupling idea is provided, a matrix converter for converting single-phase alternating current into three-phase alternating current is decoupled into 2 conventional three-phase voltage source inverters in a topology manner, and the analysis process of the matrix converter is greatly simplified. In 2017, research on the decoupling vector modulation principle of a voltage type matrix rectifier in solar energy journal of 12 th edition proposes that a matrix converter formed by bidirectional switches is analyzed from the angle of a unidirectional controllable switch converter by using a decoupling idea, and high-frequency and power-frequency alternating current pulse output and positive and negative direct current output are realized by improving the synthesis sequence of space vectors. In 2019, in 2 nd phase 2, the TSMC-PET direct-drive wind power generation system of the high-frequency chain is based on a multi-port structure of a high-frequency chain two-stage matrix converter, and a three-port high-frequency chain direct-drive wind power system grid-connected topology and a control strategy thereof are provided. The system has stronger smooth grid-connected power and low-voltage ride through capability through the control of the energy storage port.
These studies analyze the same points of the HFLMC and the common matrix converter from the control point of view, establish the relation between mathematical modeling and performance analysis, and provide a theoretical basis for the application of the HFLMC. But the power sharing problem of a plurality of HFLMC parallel systems in a high-power occasion is rarely researched. Since the HFLMC can be equivalent to a voltage source, the multi-HFLMC parallel system can use the power sharing strategy of the multi-inverter parallel system for reference. For power equalization of a multi-inverter parallel system, a flexible droop control method according to load change is proposed in a microgrid adaptive droop control strategy based on multi-agent consistency in 12 th power automation equipment of 2017, but the distribution accuracy of the load has a large error under the condition of light load. In 13 th edition of the 2017, the load current distribution method of the distributed energy storage system for improving the SOC droop control eliminates the influence of line impedance by changing a droop coefficient, but the defect of voltage drop is caused, and the voltage stability is influenced. In the microgrid active average resistive droop control strategy based on virtual impedance in the 10 th power automation equipment in 2020, a resistive droop control strategy is adopted, but due to the existence of equivalent inductive reactance of a converter, the power average accuracy is influenced.
Therefore, on the basis of the existing converter power sharing method, how to provide a power sharing method for a parallel system of multiple high-frequency chain matrix converters for solving the problem of unbalanced output power distribution of the parallel system of the high-frequency chain matrix converters due to unequal impedance parameters of each output line becomes a problem to be solved by the technical staff in the field.
Disclosure of Invention
In view of the above problems, the present invention provides a power sharing method for a high frequency chain matrix converter, which solves at least some of the above technical problems, and can significantly improve the power sharing accuracy of a parallel system of the high frequency chain matrix converter, so as to meet the parallel operation requirement of multiple converters.
The embodiment of the invention provides a power equalization method for a high-frequency chain matrix converter, which comprises the following steps:
s1, introducing self-adaptive virtual impedance, and reshaping the equivalent output impedance of the high-frequency chain matrix converter;
s2, adjusting the amplitude and the phase of the virtual impedance in a self-adaptive manner by using the output power information and the power factor of the high-frequency chain matrix converter, so that different branches have the same equivalent output impedance;
and S3, based on the step S2, the load power is distributed according to the capacity proportion through a droop control fine adjustment compensation link.
Further, the step S2 includes:
s21, obtaining the voltage drop provided by the virtual impedance and the virtual impedance according to the self-adaptive virtual impedance introduced in the step S1;
s22, calculating an output power factor according to the active power and the reactive power of the high-frequency chain matrix converter obtained in the step S21;
s23, based on the step S22, adopting an adaptive impedance angle method to make cos (theta)v-αn) 1 is always true; in the formula: thetavIs the virtual impedance argument, αnIs a power factor angle;
s24, obtaining a voltage drop Δ E provided by the virtual impedance at this time based on the step S23;
and S25, on the basis of the step S24, different branches have the same equivalent output impedance.
Further, the step S21 includes:
obtaining the virtual impedance according to the adaptive virtual impedance introduced in the step S1, where the obtained virtual impedance is set as:
Zv＝Zv∠θv＝Rv+jXv
in the formula: rv＝Zvcosθv；Xv＝Zvsinθv；θvIs the virtual impedance argument, j is the imaginary unit;
the voltage drop expression provided by the virtual impedance is as follows:
Figure BDA0003124628190000031
in the formula: snFor outputting apparent power, theta, to the convertervAs virtual impedance argument, E*Outputting the voltage amplitude, alpha, for the virtual impedance no-loadnIs the power factor angle.
Further, the step S22 includes:
calculating an output power factor according to the output side information of the high frequency chain matrix converter obtained in the step S21, and making the argument of the virtual impedance equal to the argument of the virtual impedance power factor:
Figure BDA0003124628190000041
in the formula: thetavIs the virtual impedance argument, αnIs the power factor angle, PnActive power, Q, output for high frequency chain matrix convertersnReactive power, S, output for high-frequency chain matrix convertersnOutputting apparent power for the converter;
according to the output power factor and the voltage drop provided by the virtual impedance, obtaining:
Figure BDA0003124628190000042
in the formula: zvAnd delta X is a virtual impedance, delta R is a difference value of two groups of high-frequency chain matrix converter circuit reactances, theta is a virtual impedance angle, and alpha is a load side power factor angle.
Further, the step S24 includes:
based on the step S23, the voltage drop Δ E provided by the virtual impedance at this time is:
Figure BDA0003124628190000043
in the formula: e*Outputting the voltage amplitude, P, for the virtual impedance no-load1Active power, P, output for the first group of high frequency chain matrix converters2Active power, Q, output for a second set of high frequency chain matrix converters1Reactive power, Q, output for a first group of high frequency chain matrix converters2Reactive power, R, output for a second set of high frequency chain-link matrix converters1Is a first group of high frequency chain matrix converter line resistance, R2Is a first set of high frequency chain matrix converter line resistances, X1For the line reactance, X, of the first group of high-frequency chain matrix converters2A second group of high-frequency chain matrix converter line reactance; Δ R ═ R1-R2，ΔX＝X1-X2。
Further, the step S3 includes:
s31, introducing a droop control fine tuning compensation link to obtain a transfer function after introducing the virtual impedance;
and S32, obtaining the equivalent output impedance added with the virtual impedance on the basis of the step S31.
Further, the step S31 includes:
introducing a droop control fine tuning compensation link to obtain a transfer function after introducing the virtual impedance as follows:
uo＝G(s)uref-(G(s)Zv(s)+Zo(s))io
＝G(s)uref-Zeq(s)io
in the formula: g(s) is a system gain function, Zo(s) is the initial equivalent output impedance, Zeq(s) is the equivalent output impedance after adding the virtual impedance, urefIs a reference voltage, ioFor the load side output current, Zv(s) is the added virtual impedance.
Further, the step S32 includes:
on the basis of the step S31, obtaining an equivalent output impedance expression added with the virtual impedance as follows:
Figure BDA0003124628190000051
in the formula: Δ ═ LfCfs2+GPIkpikpwm+kpikpwmCfs+1；
Figure BDA0003124628190000052
kpiIs the current loop proportionality coefficient, kpwmIs the converter gain, CfIs a filter capacitor, LfIs filter inductance, s is complex frequency, kiuIs a voltage loop integral coefficient, kpuIs the voltage loop scale factor, Zv(s) is the added virtual impedance.
Further, the step S3 further includes:
s33, mixing Zv(s)＝Rv+sXvSubstituting the equivalent output impedance expression in step S32, we obtain:
Figure BDA0003124628190000053
in the formula: Δ ═ LfCfs2+GPIkpikpwm+kpikpwmCfs+1；
Figure BDA0003124628190000061
RvIs a virtual resistance, s is a complex frequency, XvIs a virtual reactance, LvIs a virtual inductor, CfIs a filter capacitor, LfIs a filter inductance, kpiIs the current loop proportionality coefficient, kpwmIs the converter gain, kiuIs a voltage loop integral coefficient, kpuIs the voltage loop scaling factor;
s34, and further based on the step S33, the load power is allocated in proportion to the capacity.
The technical scheme provided by the embodiment of the invention has the beneficial effects that at least:
the embodiment of the invention provides a power equalization method for a high-frequency chain matrix converter, which comprises the following steps: introducing self-adaptive virtual impedance, and reshaping the equivalent output impedance of the high-frequency chain matrix converter; the amplitude and the phase of the virtual impedance are adjusted in a self-adaptive manner by utilizing the output power information and the power factor of the high-frequency chain matrix converter, so that different branches have the same equivalent output impedance; and the load power is distributed according to the capacity proportion by a droop control fine-tuning compensation link. The power equalizing method realizes the adaptive adjustment of the virtual impedance only by using local power information and power factors by introducing the equivalent output impedance of the adaptive virtual impedance reshaping converter, and further realizes the proportional distribution of load power according to capacity through a droop control fine adjustment compensation link so as to improve the stability and reliability of a parallel system.
Additional features and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention will be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.
The technical solution of the present invention is further described in detail by the accompanying drawings and embodiments.
Drawings
The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description serve to explain the principles of the invention and not to limit the invention. In the drawings:
fig. 1 is a HFLMC parallel topology diagram according to an embodiment of the present invention;
FIG. 2 is an equivalent mathematical model of a HFLMC parallel system according to an embodiment of the present invention;
fig. 3 is a HFLMC parallel active/voltage characteristic curve according to an embodiment of the present invention;
FIG. 4 is a block diagram of an adaptive virtual impedance control according to an embodiment of the present invention;
FIG. 5 is a dual-loop control diagram incorporating an adaptive virtual impedance according to an embodiment of the present invention;
FIG. 6(a) is a graph of AC bus voltage provided by an embodiment of the present invention;
fig. 6(b) is an FFT analysis diagram of the ac bus voltage provided by the embodiment of the present invention;
fig. 7(a) is an active power distribution curve provided by the embodiment of the present invention;
fig. 7(b) is a reactive power distribution curve provided by an embodiment of the present invention;
FIG. 8 is a graph of the variation of HFLMC frequency according to one embodiment of the present invention;
FIG. 9 is a schematic diagram of a circulating current analysis of a HFLMC parallel system provided by an embodiment of the invention;
FIG. 10(a) is a graph of an AC bus voltage waveform provided by an embodiment of the present invention;
fig. 10(b) is an FFT analysis diagram of the ac bus voltage provided by the embodiment of the present invention;
FIG. 11 shows the waveforms of the phase A output voltage and current provided by the present invention;
fig. 12 is an active power distribution curve provided by the embodiment of the present invention;
FIG. 13 is a reactive power distribution curve provided by an embodiment of the present invention;
FIG. 14 is a graph of the variation of HFLMC frequency according to one embodiment of the present invention;
FIG. 15 is a circulating current analysis of a HFLMC parallel system provided by an embodiment of the invention;
fig. 16 is an active power curve for switching load according to the embodiment of the present invention;
fig. 17 is a reactive power curve when switching a load according to an embodiment of the present invention;
fig. 18(a) is a voltage waveform diagram of an ac bus when a load suddenly changes according to an embodiment of the present invention;
fig. 18(b) is an FFT analysis diagram of the ac bus voltage when the load suddenly changes according to the embodiment of the present invention;
FIG. 19 is a graph of AC bus voltage amplitude with varying loads according to an embodiment of the present invention.
Detailed Description
Exemplary embodiments of the present disclosure will be described in more detail below with reference to the accompanying drawings. While exemplary embodiments of the present disclosure are shown in the drawings, it should be understood that the present disclosure may be embodied in various forms and should not be limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the disclosure to those skilled in the art.
The embodiment of the invention provides a power sharing method for a high-frequency chain matrix converter, and the technical scheme is further explained in detail below.
Referring to fig. 1, a high frequency chain matrix converter parallel system is established, which is a topology diagram of a HFLMC (high frequency chain matrix converter) parallel structure. In the figure, a bidirectional switch is adopted to realize bidirectional flow of energy, and HFT represents a high-frequency transformer, so that compared with a common transformer, the volume and the weight of a parallel system can be reduced, electric isolation can be realized, and engineering application is facilitated. L is1、C1Three-phase inductance and capacitance are used in the filtering link; zr1、ZLRespectively, the line equivalent impedance and the load equivalent impedance. By adopting a decoupling and coupling integrated modulation strategy, not only can the safe current conversion of the bidirectional switch be realized, but also the parallel operation of the HFLMC can be further realized, and a theoretical basis is provided for the parallel operation of the HFLMC.
Further, when a decoupling and coupling integrated modulation strategy is adopted, the high-frequency chain matrix converter can be equivalent to a positive group of common matrix converter and a negative group of common matrix converter, so that the high-frequency chain matrix converter can be equivalent to a voltage source for analysis. Referring to fig. 2, 2 HFLMC parallel equivalent models are shown, wherein the common connection point voltage is set to U & lt 0 DEG, R1、X1Respectively representing equivalent output resistance and inductance, ILFor the current flowing through the load and for the purpose of analysis, the HFLMC output port is equivalent to a voltage source
Figure BDA0003124628190000081
And
Figure BDA0003124628190000082
and (4) showing.
As can be seen from FIG. 2, the active power P output by the HFLMCnAnd reactive power QnCan be expressed as:
Figure BDA0003124628190000083
Figure BDA0003124628190000084
in formulae (1) and (2): u is AC bus voltage amplitude, EnFor converter n output voltage amplitude, ZnIs the equivalent output impedance magnitude, theta, of the transformer nnFor the equivalent output impedance argument of the transformer n,
Figure BDA0003124628190000085
is the phase angle of the output voltage of converter n.
Further, droop control strategy analysis based on the adaptive virtual impedance is performed. First, a conventional droop control analysis was performed. In the HFLMC parallel system, the impedance of the output impedance is large, so that the equivalent output resistance Rn is large>>Equivalent output reactance Xn, in this case cos θn＝1，sinθn＝0，θnIs the equivalent output impedance argument of transformer n. Due to the phase angle of the output voltage of the converter n
Figure BDA0003124628190000091
The values in practice are generally small and can be approximated
Figure BDA0003124628190000092
Active power P output by HFLMCnAnd reactive power QnThe formula is simplified as follows:
Figure BDA0003124628190000093
in formula (3): u is AC bus voltage amplitude, ZnIs the equivalent output impedance magnitude of the transformer n, EnFor the amplitude of the output voltage of the converter n,
Figure BDA0003124628190000094
is the phase angle of the output voltage of converter n.
As can be seen from formula (3), PnAnd En、QnAnd
Figure BDA0003124628190000095
respectively, are approximately linear. P by negative feedback regulationnE of large inverternThe amplitude is reduced, so that the output voltages of the two groups of high-frequency chain matrix converters are in the same phase; the output Q is likewise regulated by negative feedbacknOf large inverters
Figure BDA0003124628190000096
The output is delayed, so that the output voltage amplitudes of the two groups of high-frequency chain matrix converters are equal. The corresponding droop control equation is:
Figure BDA0003124628190000097
in formula (4): omeganTo output the voltage frequency, EnFor the output voltage amplitude, omega*In order to output the voltage frequency in a no-load manner,
Figure BDA0003124628190000098
for no-load output of voltage amplitude, alphamIs a reactive sag factor, betamIs the active sag factor, PnActive power, Q, output for HFLMCnThe reactive power output by the HFLMC.
Considering the line impedance drop, the output voltage of the micro-source is expressed in relation to the common node voltage as:
Figure BDA0003124628190000099
in formula (5): enFor output voltage amplitude, U is the AC bus voltage amplitude, PnActive power, Q, output for HFLMCnReactive power, R, output for HFLMCnIs an equivalent output resistance, XnIs the equivalent output reactance.
Further, by combining the equations (4) and (5), the projected curve of the micro-source output voltage on the POE surface, i.e., the output characteristic curve of the converter under different droop coefficients and line impedances, can be obtained, see fig. 3In the figure, y1 and y2 respectively correspond to voltage droop coefficients beta1、β2The curve of (d); gjIs the jth converter equivalent curve. It can be known from fig. 3 that too large droop coefficient easily causes large voltage deviation, and too small droop coefficient causes large active power deviation and is not beneficial to power sharing. Similarly, power deviation may also be caused by using different droop control coefficients, and the same droop coefficient is generally used in parallel systems to reduce power deviation. The same droop coefficient can be adopted to ensure the power distribution precision of the parallel system and improve the running stability of the parallel system.
Further, the voltage of the converter voltage lost through line impedance is approximately:
Figure BDA0003124628190000101
in formula (6): u is the alternating current bus voltage amplitude, P is active power, R is the line equivalent resistance, Q is reactive power, X is the line equivalent reactance.
It can be seen from equation (6) that the line voltage loss due to the large line impedance is large, and the frequency given in the droop control can achieve no-static-error tracking, i.e. f1 ≈ f2 and Q1 ≈ Q2, where f1 and f2 are the system frequencies of the two sets of inverters respectively, and Q1 and Q2 are the reactive powers output by the two sets of inverters respectively. If the voltage at the load is ensured to be the rated value, the output voltage of the converter must be increased, and the active power output by the converter is reduced according to the droop control principle, so that the active power output by the converter is different.
Further, a droop control method of the adaptive virtual impedance is introduced. In order to solve the problem of unbalanced power of each branch when 2 HFLMCs run in parallel, a self-adaptive virtual impedance control method is introduced. The equivalent output impedance of the HFLMC is reshaped by introducing the adaptive virtual impedance, thereby eliminating the effect of the equivalent wiring impedance. The reshaped equivalent output impedance can be automatically adjusted according to the output power information of the branch circuit, so that the impedance difference between the branch circuits is eliminated. The control block diagram is shown with reference to fig. 4. The virtual impedance is set as: zv＝Zv∠θv＝Rv+jXvWherein R isv＝Zvcosθv；Xv＝Zvsinθv；θvIs the virtual impedance argument, j is the imaginary unit. In this strategy, the mode of the virtual impedance is adjusted in real time by the power information of the converters in the system, and the effect is to provide additional voltage drop to compensate the voltage difference between the matrix converter parallel systems and offset the influence of the difference of the line impedance on the active power distribution.
The voltage drop provided by the virtual impedance is:
Figure BDA0003124628190000111
in formula (7): xnIs an equivalent output reactance, RnIs an equivalent output resistance, PnActive power, Q, output for HFLMCnReactive power output for HFLMC, E*Outputting the voltage amplitude, Z, for the virtual impedance no-loadvθ is the virtual impedance angle.
Further, considering that the design method of the impedance angle influences the performance of the control strategy, the above formula is organized as follows:
Figure BDA0003124628190000112
in formula (8): snFor outputting apparent power, theta, to the convertervAs virtual impedance argument, E*Outputting the voltage amplitude, alpha, for the virtual impedance no-loadnIs the power factor angle.
If the virtual impedance angle is set to be a fixed value, an operating point with the impedance angle equal to the power factor angle always exists, and at the moment, the voltage drop provided by the virtual impedance is always zero, so that the voltage between the converters cannot be compensated. For this reason, it is considered to adjust the virtual impedance angle simultaneously to avoid an unadjustable operating point, i.e., to avoid an invalid operating point, while whether or not its virtual impedance angle is constant depends on the change in the power factor angle. Calculating the output power factor according to the output side information of each converter, and making the virtual impedance angle equal to the power factor angle, i.e.
Figure BDA0003124628190000113
In formula (9): thetavIs the virtual impedance argument, αnIs the power factor angle, PnActive power, Q, output for high frequency chain matrix convertersnReactive power, S, output for high-frequency chain matrix convertersnOutputting apparent power to the converter.
Using an adaptive impedance angle method such that cos (theta)v-αn) 1 (formula: thetavIs the virtual impedance argument, αnPower factor angle) is always true, and the mode Z of the virtual impedance is ensured under any power factorvThe system impedance has complex impedance characteristic for the purpose of bounded quantity, and according to the existing research, the system impedance can still be controlled according to the resistive droop equation. The voltage drop Δ E provided by the virtual impedance should be equal to the difference between the voltage drops across the two matrix converter line impedances, i.e. there is
Figure BDA0003124628190000121
In formula (10): e*Outputting the voltage amplitude, P, for the virtual impedance no-load1Active power, P, output for the first group of high frequency chain matrix converters2Active power, Q, output for a second set of high frequency chain matrix converters1Reactive power, Q, output for a first group of high frequency chain matrix converters2Reactive power, R, output for a second set of high frequency chain-link matrix converters1Is a first group of high frequency chain matrix converter line resistance, R2Is a first set of high frequency chain matrix converter line resistances, X1For the line reactance, X, of the first group of high-frequency chain matrix converters2A second group of high-frequency chain matrix converter line reactance; Δ R ═ R1-R2，ΔX＝X1-X2。
In combination with formula (8) and formula (10), there are:
Figure BDA0003124628190000122
in formula (11): zvIs a virtual impedance, R1Is a first group of high frequency chain matrix converter line resistance, R2Is a first set of high frequency chain matrix converter line resistances, X1For the line reactance, X, of the first group of high-frequency chain matrix converters2A second group of high-frequency chain matrix converter line reactance; Δ R ═ R1-R2，ΔX＝X1-X2θ is a virtual impedance angle, and α is a load-side power factor angle.
Further, after introducing the adaptive virtual impedance, a double-loop control structure of inductor current feedback is adopted for the output side of the converter, and the control block diagram is shown in fig. 5 in combination with the adaptive virtual impedance compensation control. The double-ring control structure comprises a voltage outer ring and a current inner ring, wherein the voltage outer ring is used for ensuring the stability of the system, and the current inner ring can improve the response speed of the system.
The transfer function after introducing the virtual impedance is:
uo＝G(s)uref-(G(s)Zv(s)+Zo(s))io
＝G(s)uref-Zeq(s)io (12)
in formula (12): g(s) is a system gain function, Zo(s) is the initial equivalent output impedance, Zeq(s) is the equivalent output impedance after adding the virtual impedance, urefIs a reference voltage, ioFor the load side output current, Zv(s) is the added virtual impedance.
The expression of the equivalent output impedance added with the virtual impedance is as follows:
Figure BDA0003124628190000131
in formula (13): Δ ═ LfCfs2+GPIkpikpwm+kpikpwmCfs+1；
Figure BDA0003124628190000132
kpiIs the current loop proportionality coefficient, kpwmIs the converter gain, CfIs a filter capacitor, LfIs filter inductance, s is complex frequency, kiuIs a voltage loop integral coefficient, kpuIs the voltage loop scale factor, Zv(s) is the added virtual impedance.
Will Zv(s)＝Rv+sXvCan be substituted by formula (13):
Figure BDA0003124628190000133
in formula (14): Δ ═ LfCfs2+GPIkpikpwm+kpikpwmCfs+1；
Figure BDA0003124628190000134
RvIs a virtual resistance, s is a complex frequency, XvIs a virtual reactance, LvIs a virtual inductor, CfIs a filter capacitor, LfIs a filter inductance, kpiIs the current loop proportionality coefficient, kpwmIs the converter gain, kiuIs a voltage loop integral coefficient, kpuIs the voltage loop scaling factor.
Further, to verify the correctness and validity of the adaptive virtual impedance droop control strategy proposed in this embodiment, 3 HFLMC parallel systems with a capacity ratio of S1: S2: S3 ═ 2:1:1 are selected for analysis, and 3 HFLMC parallel system models are built on a Matlab/Simulink software platform, and circuit participation simulation parameters thereof are shown in table 1. The system simulation step size is set to 5 multiplied by 10-6s, setting the simulation time to be 1.5s, and completely accessing the load 1, the load 2 and the load 3 in a stable load state; in the dynamic load state, load 1 is switched in at 0.3s, loads 2 and 3 are switched in at 0.6s, load 2 is switched out at 1s, and load 2 is switched out at 1.2sAnd 3, verifying the correctness and the validity of the control strategy in the chapter.
TABLE 1 HFLMC parallel system parameters
Figure BDA0003124628190000141
Figure BDA0003124628190000151
Further, droop control simulation of the high-frequency chain matrix converter parallel system is carried out. Referring to fig. 5, 6(a) and 6(b), in the state that the load keeps stable operation, the amplitude of the ac bus voltage is 307.2V, the total harmonic distortion rate is 1.33%, the bus voltage can be kept relatively stable, and the voltage drop degree is low. Referring to fig. 7(a), 7(b) and 8, since there is a difference in impedance of 3 lines, when the adaptive virtual impedance is not applied, the 3 HFLMCs with unequal capacity cannot bear the load according to the set capacity ratio, and the active power sharing degree is low. Similarly, according to the consistency principle, the reactive power of the parallel system cannot be distributed according to the capacity ratio, the reactive power curve has larger fluctuation, the transient process is lengthened, and the stability of the system is reduced.
Referring to fig. 9, 10(a) and 10(b), since neither the active power nor the reactive power of the HFLMC parallel system can share the load power in the capacity ratio, the converter frequency is greatly disturbed, the circulating current between the parallel systems reaches 15A, and a large amount of system capacity is occupied. In summary, the resistive droop control strategy keeps the voltage amplitude of the alternating-current bus relatively stable under the condition that the line resistances are different, but the HFLMC parallel system with unequal capacity cannot share the load according to the capacity proportion, and the parallel system has larger circulation current and occupies the system capacity.
Further, droop control parallel system simulation based on the adaptive virtual impedance is carried out. Referring to fig. 11 and 12, after the adaptive virtual impedance is added, the ac bus voltage is 306.5V, the total harmonic distortion rate of the voltage is 1.16%, and compared with the resistive droop control strategy, the ac bus voltage drop degree is lower, but the parallel system can still be kept stable. Referring to fig. 13 and 14, after the adaptive virtual impedance is added, the 3 HFLMCs output active power can share the load according to the capacity proportion, the stability degree is good, the active power sharing degree is effectively improved, the reactive power can share the load according to the capacity proportion, and only a long transient process exists in the reactive power sharing process.
Referring to fig. 15 and 16, the higher the power sharing of the HFLMC parallel system, the smaller the circulating current between the parallel systems. Compared with a resistive droop control strategy, under the adaptive virtual impedance droop control strategy, the alternating-current voltage drop degree of the HFLMC parallel system is not deteriorated, under the adjustment of the adaptive virtual impedance, the power sharing degree of the parallel system is improved, the frequency response overshoot of the converter system is reduced, the transient time is shortened, and the circulation current of the parallel system is reduced. Therefore, the adaptive virtual impedance droop control strategy can eliminate the influence of power distribution accuracy reduction caused by line impedance difference by reshaping the HFLMC equivalent output impedance.
Referring to fig. 17, 18(a), 18(b) and 19, in the case of load fluctuation, the adaptive virtual impedance droop control strategy can share the load according to the capacity proportion, where the stability of the active power curve is good, a short-time transient process exists only during load switching, and the reactive power can guarantee to share the load according to the capacity proportion, but under the condition of light load, the stability degree of the reactive power is poor, and the transient time is long. And when the load is suddenly reduced, the voltage of the alternating-current bus can be steeply increased, and under the condition that the fluctuation of the load is small, the voltage of the alternating-current bus can be kept stable. From the above analysis, it can be seen that, under the dynamic load condition, the adaptive virtual impedance droop control strategy can still realize that the HFLMC parallel system shares the load according to the capacity ratio, but when the load is suddenly increased or suddenly decreased, a sudden drop or a sudden rise of the ac bus voltage is caused.
In summary, aiming at the problem that the output power of each converter cannot share the load according to the capacity proportion due to unequal impedance parameters of each line, the embodiment of the invention remodels the equivalent output impedance of the HFLMC by introducing the adaptive virtual impedance, so that different branches have the same equivalent output impedance, and further improves the power distribution precision through the droop control fine tuning compensation link. Through theoretical analysis and simulation verification, the following conclusions are drawn:
(1) under the condition that line impedance has difference, power deviation exists in HFLMC output power, particularly, the transient process of a reactive power curve is long, the frequency stability is poor, and the voltage stability of an alternating current bus can be ensured only in a stable load state.
(2) Under the same condition, the self-adaptive virtual impedance can adjust the output power of each HFLMC, improve the power distribution precision, reduce the circulation current among systems, and maintain the AC bus voltage near 311V in a stable load state.
(3) Under the condition that the load fluctuates, the load can still be shared according to the capacity proportion by adding the self-adaptive virtual impedance, but when the load is suddenly increased or suddenly decreased, the voltage amplitude of the alternating-current bus can be suddenly decreased and increased.
It will be apparent to those skilled in the art that various changes and modifications may be made in the present invention without departing from the spirit and scope of the invention. Thus, if such modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention is also intended to include such modifications and variations.

Claims (9)

1. A power equalizing method for a high frequency chain matrix converter is characterized by comprising the following steps:
s1, introducing self-adaptive virtual impedance, and reshaping the equivalent output impedance of the high-frequency chain matrix converter;
s2, adjusting the amplitude and the phase of the virtual impedance in a self-adaptive manner by using the output power information and the power factor of the high-frequency chain matrix converter, so that different branches have the same equivalent output impedance;
and S3, based on the step S2, the load power is distributed according to the capacity proportion through a droop control fine adjustment compensation link.
2. The power-sharing method for the high-frequency chain matrix converter according to claim 1, wherein the step S2 includes:
s21, obtaining the voltage drop provided by the virtual impedance and the virtual impedance according to the self-adaptive virtual impedance introduced in the step S1;
s22, calculating an output power factor according to the active power and the reactive power of the high-frequency chain matrix converter;
s23, based on the step S22, adopting an adaptive impedance angle method to make cos (theta)v-αn) 1 is always true; in the formula: thetavIs the virtual impedance argument, αnIs a power factor angle;
s24, obtaining a voltage drop Δ E provided by the virtual impedance at this time based on the step S23;
and S25, on the basis of the step S24, different branches have the same equivalent output impedance.
3. The power-sharing method for the high-frequency chain matrix converter according to claim 2, wherein the step S21 includes:
obtaining the virtual impedance according to the adaptive virtual impedance introduced in the step S1, where the obtained virtual impedance is set as:
Zv＝Zv∠θv＝Rv+jXv
in the formula: rv＝Zvcosθv；Xv＝Zvsinθv；θvIs the virtual impedance argument, j is the imaginary unit;
the voltage drop expression provided by the virtual impedance is as follows:
Figure FDA0003124628180000011
in the formula: snFor outputting apparent power, theta, to the convertervAs virtual impedance argument, E*Outputting the voltage amplitude, alpha, for the virtual impedance no-loadnIs the power factor angle.
4. The power-sharing method for the high-frequency chain matrix converter according to claim 2, wherein the step S22 includes:
calculating an output power factor according to the output side information of the high frequency chain matrix converter obtained in the step S21, and making the argument of the virtual impedance equal to the argument of the virtual impedance power factor:
Figure FDA0003124628180000021
in the formula: thetavIs the virtual impedance argument, αnIs the power factor angle, PnActive power, Q, output for high frequency chain matrix convertersnReactive power, S, output for high-frequency chain matrix convertersnOutputting apparent power for the converter;
according to the output power factor and the voltage drop provided by the virtual impedance, obtaining:
Figure FDA0003124628180000022
in the formula: zvAnd delta X is a virtual impedance, delta R is a difference value of two groups of high-frequency chain matrix converter circuit reactances, theta is a virtual impedance angle, and alpha is a load side power factor angle.
5. The power-sharing method for the high-frequency chain matrix converter according to claim 2, wherein the step S24 includes:
based on the step S23, the voltage drop Δ E provided by the virtual impedance at this time is:
Figure FDA0003124628180000031
in the formula: e*Outputting the voltage amplitude, P, for the virtual impedance no-load1Active power, P, output for the first group of high frequency chain matrix converters2Active power, Q, output for a second set of high frequency chain matrix converters1Reactive power, Q, output for a first group of high frequency chain matrix converters2Reactive power, R, output for a second set of high frequency chain-link matrix converters1Is a first group of high frequency chain matrix converter line resistance, R2Is a first set of high frequency chain matrix converter line resistances, X1For the line reactance, X, of the first group of high-frequency chain matrix converters2A second group of high-frequency chain matrix converter line reactance; Δ R ═ R1-R2，ΔX＝X1-X2。
6. The power-sharing method for the high-frequency chain matrix converter according to claim 1, wherein the step S3 includes:
s31, introducing a droop control fine tuning compensation link to obtain a transfer function after introducing the virtual impedance;
and S32, obtaining the equivalent output impedance added with the virtual impedance on the basis of the step S31.
7. The power-sharing method for the high-frequency chain matrix converter according to claim 6, wherein the step S31 includes:
introducing a droop control fine tuning compensation link to obtain a transfer function after introducing the virtual impedance as follows:
Figure FDA0003124628180000032
in the formula: g(s) is a system gain function, Zo(s) is the initial equivalent output impedance, Zeq(s) is the equivalent output impedance after adding the virtual impedance, urefIs a reference voltage, ioFor the load side output current, Zv(s) is the added virtual impedance.
8. The power-sharing method for the high-frequency chain matrix converter according to claim 7, wherein the step S32 includes:
on the basis of the step S31, obtaining an equivalent output impedance expression added with the virtual impedance as follows:
Figure FDA0003124628180000041
in the formula: Δ ═ LfCfs2+GPIkpikpwm+kpikpwmCfs+1；
Figure FDA0003124628180000042
kpiIs the current loop proportionality coefficient, kpwmIs the converter gain, CfIs a filter capacitor, LfIs filter inductance, s is complex frequency, kiuIs a voltage loop integral coefficient, kpuIs the voltage loop scale factor, Zv(s) is the added virtual impedance.
9. The power-sharing method for the high-frequency chain matrix converter according to claim 8, wherein the step S3 further includes:
s33, mixing Zv(s)＝Rv+sXvSubstituting the equivalent output impedance expression in step S32, we obtain:
Figure FDA0003124628180000043
in the formula: Δ ═ LfCfs2+GPIkpikpwm+kpikpwmCfs+1；
Figure FDA0003124628180000044
RvIs a virtual resistance, s is a complex frequency, XvIs a virtual reactance, LvIs a virtual inductor, CfIs a filter capacitor, LfIs a filter inductance, kpiIs the current loop proportionality coefficient, kpwmIs the converter gain, kiuIs a voltage loop integral coefficient, kpuIs the voltage loop scaling factor;
s34, and further based on the step S33, the load power is allocated in proportion to the capacity.
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