CN113391488A

CN113391488A - Array substrate, display panel and manufacturing method of array substrate

Info

Publication number: CN113391488A
Application number: CN202110554966.XA
Authority: CN
Inventors: 熊子尧; 康报虹
Original assignee: HKC Co Ltd
Current assignee: HKC Co Ltd
Priority date: 2021-05-20
Filing date: 2021-05-20
Publication date: 2021-09-14

Abstract

The application discloses array substrate, display panel and array substrate's manufacturing method, wherein, array substrate has first assembly surface, and the first assembly surface epirelief has the butt-lift platform, and the butt-lift platform has the holding surface, has seted up spacing hole on the holding surface, and spacing hole is the blind hole, and spacing hole is used for limiting the range of motion of the spacer of embedding in it. According to the array substrate, the display panel and the manufacturing method of the array substrate, the risks of regional blackness and/or regional whiteness caused by the deviation of the array substrate and the color film substrate are reduced, the manufacturing process and design risks are low, and the display panel is good.

Description

Array substrate, display panel and manufacturing method of array substrate

Technical Field

The present disclosure relates to the field of display technologies, and in particular, to an array substrate, a display panel, and a method for manufacturing the array substrate.

Background

The display panel usually includes an array substrate, a color filter substrate, and a liquid crystal layer between the array substrate and the color filter substrate, and an image is formed by controlling the light transmittance of liquid crystal molecules through each pixel electrode. In the existing display panel, many spacers are arranged on a supporting surface of an opposite table of an array substrate, and when the array substrate and a color film substrate are deviated due to vibration, impact or other conditions of the display panel, abnormal display phenomena such as regional blackness and/or regional whitish of the display panel are easily caused.

Disclosure of Invention

The present application mainly aims to provide an array substrate, a display panel, and a manufacturing method of the array substrate, and aims to solve the technical problem in the prior art that regional blackness and/or regional whiteness are severe due to the deviation between the array substrate and a color film substrate.

In order to achieve the above object, the array substrate provided in the present application has a first assembly surface, a butting table protrudes from the first assembly surface, the butting table has a supporting surface, a limiting hole is formed in the supporting surface, the limiting hole is a blind hole, and the limiting hole is used for limiting the moving range of a spacer embedded therein.

Optionally, the array substrate includes: a glass substrate, a gate line and a non-metal layer; the gate line is deposited on the surface of the glass substrate; the non-metal layer is deposited on the surfaces of the glass substrate and the gate line, the surface of the non-metal layer is a first assembly surface, and an opposite top platform is protruded on the surface of the non-metal layer at a position corresponding to the gate line; the projection of the hole bottom of the limiting hole towards the glass substrate direction is within the range of the corresponding gate line, and the hole bottom of the limiting hole extends to the surface of the corresponding gate line.

Optionally, the bottom of the limiting hole is covered with an anticorrosive layer.

Optionally, the hole peripheral wall of the limiting hole is covered with an anticorrosive layer.

Optionally, the corrosion protection layer is an indium tin oxide layer.

The application provides a display panel, this display panel includes: the array substrate, the color film substrate, the liquid crystal layer and the spacer are arranged; the color film substrate is provided with a second assembling surface, the second assembling surface is arranged opposite to the first assembling surface, and the array substrate and the color film substrate form a box in a pair mode; the liquid crystal layer is clamped between the array substrate and the color film substrate; the spacer is arranged in the limiting hole, one end of the spacer is abutted against the bottom of the limiting hole, the other end of the spacer is abutted against the second assembling surface, and the height of the spacer is equal to the sum of the thickness of the liquid crystal layer and the depth of the limiting hole.

Optionally, the spacer has a space between an outer wall thereof and a hole peripheral wall of the spacing hole.

The manufacturing method of the array substrate provided by the application comprises the following steps:

preparing a glass substrate;

depositing a gate line on a surface of a glass substrate;

depositing a non-metal layer on the surface of the glass substrate and the surface of the gate line on the glass substrate, wherein the non-metal layer protrudes at the position corresponding to the gate line to form a pair of top platforms;

and forming a limiting hole on the supporting surface of the opposite top platform by adopting a dry etching technology, wherein the limiting hole vertically faces to the corresponding gate line, and the bottom of the limiting hole extends to the surface of the corresponding gate line.

Optionally, the size of the radial cross section of any position on the limiting hole is equal to the sum of the size of the radial cross section of the spacer to be embedded in the limiting hole at the corresponding position and the absolute value of the spacer process fluctuation error.

Optionally, after the step of forming a limiting hole on the supporting surface of the top stage by using a dry etching technique, the limiting hole vertically faces the corresponding gate line, and a bottom of the limiting hole extends to a surface of the corresponding gate line, the method further includes the steps of:

and covering an anticorrosive layer at the bottom and the peripheral wall of the limiting hole.

In the technical scheme, the supporting surface of the opposite top table is provided with the limiting hole, when the array substrate and the color film substrate are boxed, the spacer is embedded into the limiting hole, the hole bottom of the limiting hole is abutted against the spacer, and the array substrate and the color film substrate can be supported. When the array substrate and the color film substrate are deviated due to vibration, impact or other conditions, the movement range of the spacer is limited in the limiting hole and cannot slide off the opposite table, the spacer returns after the relative positions of the array substrate and the color film substrate are recovered, the situation that the spacer cannot return after sliding off the opposite table due to deviation of the array substrate and the color film substrate is avoided, and the problem that the interval between the array substrate and the color film substrate is reduced and the regional blackness is formed due to the fact that the spacer cannot return after sliding off the opposite table is solved; in addition, the problem that large-area abrasion disorder grains are formed and the regional white color is formed due to the fact that the movement range of the spacer is too large and large-area friction is generated between the spacer and the alignment film can be avoided; in addition, when not setting up spacing hole, for avoiding the spacer from the landing stage landing, need guarantee to have sufficient width to the landing stage, for the width of increase landing stage, need increase the line width of gate line, the line width of gate line increases, can influence the aperture opening ratio of pixel, also can increase processing procedure and design risk, lead to unusually and bad risk height, through seting up spacing hole, the migration range of spacer has been restricted, guaranteed that the spacer can not follow the landing on the landing stage, therefore, can reduce the line width of gate line, increase the space between the gate line, can avoid the short circuit, and can reduce processing procedure and design risk.

Drawings

In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present application, and for those skilled in the art, other drawings can be obtained according to the structures shown in the drawings without creative efforts.

Fig. 1 is a schematic view of an embodiment of an array substrate with an anti-corrosion layer according to the present application;

fig. 2 is a schematic view of an embodiment of an array substrate without an anti-corrosion layer according to the present application; (ii) a

Fig. 3 is a schematic diagram of an embodiment of a display panel according to the present application;

fig. 4 is a flowchart of a method for manufacturing an array substrate according to the present application;

the reference numbers illustrate:

reference numerals	Name (R)	Reference numerals	Name (R)
				110	Glass substrate	120	Gate line
130	Non-metal layer	131	Opposite top platform
				1311	Support surface	132	First assembly surface
140	Anticorrosive coating	150	Limiting hole
				200	Color film substrate	210	Second assembly surface
300	Spacer	400	Liquid crystal layer

The implementation, functional features and advantages of the objectives of the present application will be further explained with reference to the accompanying drawings.

Detailed Description

The technical solutions in the embodiments of the present application will be described clearly and completely with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.

It should be noted that all the directional indications (such as up, down, left, right, front, and rear … …) in the embodiment of the present application are only used to explain the relative position relationship between the components, the movement situation, and the like in a specific posture (as shown in the drawing), and if the specific posture is changed, the directional indication is changed accordingly.

In this application, unless expressly stated or limited otherwise, the terms "connected," "secured," and the like are to be construed broadly, and for example, "secured" may be a fixed connection, a removable connection, or an integral part; can be mechanically or electrically connected; they may be directly connected or indirectly connected through intervening media, or they may be connected internally or in any other suitable relationship, unless expressly stated otherwise. The specific meaning of the above terms in the present application can be understood by those of ordinary skill in the art as appropriate.

In addition, if there is a description of "first", "second", etc. in the embodiments of the present application, the description of "first", "second", etc. is for descriptive purposes only and is not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature. In addition, the meaning of "and/or" appearing throughout includes three juxtapositions, exemplified by "A and/or B" including either A or B or both A and B. In addition, technical solutions between various embodiments may be combined with each other, but must be realized by a person skilled in the art, and when the technical solutions are contradictory or cannot be realized, such a combination should not be considered to exist, and is not within the protection scope of the present application.

In the conventional display panel, after the array substrate and the color filter substrate 200 are paired to form a box, the array substrate and the color filter substrate 200 are supported by the spacer 300, in order to prevent the spacer 300 from affecting the pixel aperture ratio, the spacer 300 is usually disposed in a light-shielding region corresponding to the gate line 120, due to the existence of the gate line 120, the deposited non-metal layer 130 forms a pair of opposite bases 131 at positions corresponding to the gate line 120, and the spacer 300 abuts against the opposite bases 131 to support the array substrate and the color filter substrate 200. When the display panel vibrates and impacts, the relative position of the array substrate and the color filter substrate 200 is easy to change, the spacer 300 is also easy to slide off the opposite stage 131, the spacer 300 sliding off the opposite stage 131 cannot be reset due to the existence of the step, and in addition, large-area abrasion is caused on the alignment film on the array substrate and/or the color filter substrate 200 due to the large-scale movement of the spacer 300, so that the display abnormal phenomena such as regional blackness and/or regional whitish and the like are easy to occur on the conventional display panel.

The array substrate, the display panel and the manufacturing method of the array substrate can reduce the risk of regional blackness and/or regional whiteness caused by the deviation of the array substrate and the color film substrate 200, the manufacturing process and design risk are low, and the display panel is good.

As shown in fig. 1 to 3, in an embodiment of the array substrate provided in the present application, the array substrate has a first assembly surface 132, the first assembly surface 132 protrudes with an opposite stage 131, the opposite stage 131 has a supporting surface 1311, the supporting surface 1311 is provided with a limiting hole 150, the limiting hole 150 is a blind hole, the limiting hole 150 is used for limiting a moving range of a spacer 300 embedded therein, the first assembly surface 132 is used for forming a box with the color filter substrate 200, when forming the box, the spacer 300 is disposed in the corresponding limiting hole 150, and the limiting hole 150 is used for accommodating the spacer 300 and limiting a moving range of the spacer 300 therein after forming the box with the color filter substrate 200.

In the above embodiment, the supporting surface 1311 of the counter top 131 is provided with the limiting hole 150, so that the spacer 300 is embedded into the limiting hole 150 when the array substrate and the color filter substrate are stacked, and the bottom of the limiting hole 150 abuts against the spacer 300, so that the array substrate and the color filter substrate 200 can be supported. When the array substrate and the color film substrate 200 are shifted due to vibration, impact or other conditions, the moving range of the spacer 300 is limited in the limiting hole 150 and cannot slide off the opposite top table 131, after the relative positions of the array substrate and the color film substrate 200 are restored, the spacer 300 returns, the situation that the spacer 300 cannot return after sliding off the opposite top table 131 due to the fact that the array substrate and the color film substrate 200 are shifted is avoided, and the problem that the interval between the array substrate and the color film substrate 200 is reduced and regional blackness is formed due to the fact that the spacer 300 cannot return after sliding off the opposite top table 131 can be avoided; in addition, the problem that large-area abrasion disorder grains are formed and the regional white is formed due to large-area friction between the spacer 300 and the alignment film caused by overlarge moving range can be avoided; in addition, when the limiting hole 150 is not provided, in order to prevent the spacer 300 from slipping off from the opposite-top table 131, it is necessary to ensure that the opposite-top table 131 has enough width, in order to increase the width of the opposite-top table 131, the line width of the gate line 120 needs to be increased, the line width of the gate line 120 is increased, the aperture ratio of the pixel is affected, the manufacturing process and design risk are also increased, resulting in high abnormal and adverse risks, the moving range of the spacer 300 is limited by providing the limiting hole 150, it is ensured that the spacer 300 cannot slip off from the opposite-top table 131, therefore, the line width of the gate line 120 can be reduced, the gap between the gate lines 120 is increased, short circuit can be avoided, and the manufacturing process and design risk can be reduced.

As shown in fig. 2, as a further aspect of the above embodiment, the array substrate includes: a glass substrate 110, a gate line 120, and a nonmetal layer 130; the gate line 120 is deposited on the surface of the glass substrate 110; the nonmetal layer 130 is deposited on the surfaces of the glass substrate 110 and the gate line 120, the surface of the nonmetal layer 130 is a first assembly surface 132, and a pair of tops 131 protrudes from the surface of the nonmetal layer 130 at a position corresponding to the gate line 120; the projection of the bottom of the position-limiting hole 150 toward the glass substrate 110 is within the range of the corresponding gate line 120, and the bottom of the position-limiting hole 150 extends to the surface of the corresponding gate line 120.

The non-metallic layer 130 may include one or more of an organic layer, an insulating layer, or a planarizing layer.

In the above embodiment, only the non-metal layer 130 is etched by the dry etching technique, and the etching is automatically stopped after reaching the surface of the gate line 120, so that the opening is convenient without particularly setting the depth of the limiting hole 150.

As a further alternative to the above embodiment, as shown in fig. 1, the bottom of the position limiting hole 150 is covered with an anti-corrosion layer 140.

In the above embodiment, the anti-corrosion layer 140 covers the surface of the gate line 120 exposed at the bottom of the hole of the position-limiting hole 150, so as to prevent the gate line 120 from being corroded, and prevent the spacer 300 embedded in the position-limiting hole 150 from being worn away from the gate line 120, thereby ensuring the performance of the gate line 120.

As a further aspect of the above embodiment, the hole peripheral wall of the stopper hole 150 is covered with the anticorrosive layer 140.

In the above embodiment, after the position-limiting hole 150 is formed through the photo-mask process for manufacturing the passivation layer, the photoresist used when the position-limiting hole 150 is formed may be used to deposit the anti-corrosion layer 140, and when the anti-corrosion layer 140 is deposited, the hole peripheral wall of the position-limiting hole 150 does not need to be shielded, so that the process is saved, and the exposure of the components on the hole peripheral wall of the position-limiting hole 150 can be avoided.

As a further aspect of the above embodiment, the anti-corrosion layer 140 is an indium tin oxide layer (ITO layer). The ITO layer can cover the non-metal layer 130 and the bottom and the peripheral wall of the hole 150, and the gate line 120 at the bottom of the hole 150 and the peripheral wall of the hole can be covered and protected by the ITO layer process.

The depth of the spacing hole 150 is equal to the thickness of the non-metal layer 130, the thickness of the non-metal layer 130 can be 0.5 um-0.7 um, such as 0.5um, 0.6um, 0.7um, correspondingly, the depth of the spacing hole 150 can be 0.5 um-0.7 um, such as 0.5um, 0.6um, 0.7um, the height of the spacer 300 is determined according to the thickness of the liquid crystal layer 400 and the depth of the spacing hole 150, the height of the spacer 300 can be 5-7 times of the depth of the spacing hole 150, such as when the depth of the spacing hole 150 is 0.6um, the height of the spacer 300 can be 3um, 3.5um, 4.2um, etc., and the spacer 300 can be limited in the range of the spacing hole 150 when moving.

The position limiting holes 150 may be disposed at various positions of the supporting surface 1311 of the opposite top board 131, and preferably, when the position limiting holes 150 are disposed at the center of the supporting surface 1311 of the opposite top board 131, the strength of each side of the hole wall of the position limiting holes 150 may be ensured.

As shown in fig. 3, in an embodiment of the display panel proposed by the present application, the display panel includes: the array substrate, the color film substrate 200, the liquid crystal layer 400 and the spacer 300 are described above; the color film substrate 200 is provided with a second assembling surface 210, the second assembling surface 210 is arranged opposite to the first assembling surface 132, and the array substrate and the color film substrate 200 form a box; the liquid crystal layer 400 is sandwiched between the array substrate and the color film substrate 200; the spacer 300 is disposed in the position-limiting hole 150, one end of the spacer 300 abuts against the bottom of the position-limiting hole 150, the other end of the spacer abuts against the second assembly surface 210, and the height of the spacer 300 is equal to the sum of the thickness of the liquid crystal layer 400 and the depth of the position-limiting hole 150. The spacer 300 is used to keep a preset interval between the color filter substrate 200 and the array substrate.

The spacer 300 is made of an elastic material, such as an acrylic photoresist, and has elasticity, so that the spacer 300 can be prevented from being broken, and the recovery after the array substrate and the color film substrate 200 are offset is facilitated.

Since the display panel provided by the present application adopts all the technical features of the above-mentioned embodiment of the array substrate, at least all the beneficial effects brought by the technical solution of the above-mentioned embodiment of the array substrate are provided, and will not be described herein again.

As a further aspect of the above embodiment, the spacer 300 has a space between the outer wall and the hole peripheral wall of the limiting hole 150. Specifically, the radial cross-section of any position in the hole 150 is equal to the sum of the radial cross-section of the spacer 300 embedded in the hole 150 at the corresponding position and the absolute value of the process variation error of the spacer 300. If the radial cross section of the spacer 300 is circular, the limiting hole 150 may be a circular hole, and the aperture of the limiting hole 150 is equal to the absolute value of the sum of the outer diameter of the corresponding position on the spacer 300 and the process shift error; if the radial cross-section of the spacer 300 is square, the hole 150 may be a square hole, and the width of the radial cross-section of the hole 150 is equal to the absolute value of the sum of the width of the corresponding position on the spacer 300 and the process variation error.

In the above embodiment, the size of the limiting hole 150 is larger than the size of the spacer 300 disposed therein, so that the opening is convenient, the assembly precision requirement for the array substrate and the color filter substrate 200 in assembling the cassette is low, and the process capability of the spacer 300 process is considered, so that the spacer 300 can be ensured to be embedded into the limiting hole 150 under the condition of process fluctuation; in addition, when the spacer 300 is disposed in the stopper hole 150, a buffer gap is also reserved between the spacer 300 and the stopper hole 150, thereby preventing the spacer 300 from being broken when it suddenly deviates.

By forming the limiting hole 150 on the opposite stage 131, in the process of manufacturing the spacer 300, the spacer 300 is embedded in the limiting hole 150, and the array substrate and the color filter substrate 200 are supported, so that the array substrate and the color filter substrate 200 maintain a preset interval, which is the thickness of the liquid crystal layer 400. When the array substrate and the color film substrate 200 are deviated, the spacer 300 is limited in the limiting hole 150 to move, so that the spacer 300 cannot slide out of the line of the gate line 120 to cause the situation that the spacer cannot return; after the deviation of the array substrate and the color film substrate 200 is finished, the array substrate and the color film substrate 200 are restored to be normally paired, the spacer 300 is reset, and the interval between the array substrate and the color film substrate 200 is not changed, so that the problem that the distance between the array substrate and the color film substrate 200 is reduced and regional blackness is formed due to the fact that the spacer 300 slides out of the gate line 120 can be solved; in addition, the moving range of the spacer 300 is small, and the spacer is slightly abraded with the alignment film, so that the problem that the alignment film is abraded in a large area due to the fact that the moving distance of the spacer 300 is too long, and further the regional white is serious can be solved, and the situation that the vibration region is white can be obviously improved.

As shown in fig. 4, in an embodiment of the method for manufacturing an array substrate, the method for manufacturing an array substrate includes: the method comprises the following steps:

preparing a glass substrate 110;

depositing a gate line 120 on a surface of the glass substrate 110;

depositing an nonmetal layer 130 on the surface of the glass substrate 110 and the surface of the gate line 120 thereon, wherein the nonmetal layer 130 protrudes at a position corresponding to the gate line 120 to form a pair of top mesas 131;

and forming a limiting hole 150 on the supporting surface 1311 of the opposite top stage 131 by using a dry etching technology, wherein the limiting hole 150 vertically faces the corresponding gate line 120, the bottom of the limiting hole 150 extends to the surface of the corresponding gate line 120, and the limiting hole 150 is used for accommodating the spacer 300 and limiting the moving range of the spacer 300 therein after the array substrate and the color filter substrate 200 are combined into a box.

As a further solution to the above embodiment, the radial cross-section of any position on the limiting hole 150 has a size equal to the sum of the radial cross-section of the spacer 300 to be embedded therein at the corresponding position and the absolute value of the spacer process fluctuation error. If the radial cross section of the spacer 300 is circular, the limiting hole 150 may be a circular hole, and the aperture of the limiting hole 150 is equal to the absolute value of the outer diameter of the corresponding position on the spacer 300 plus the process fluctuation error; if the radial cross-section of the spacer 300 is square, the hole 150 may be a square hole, and the width of the radial cross-section of the hole 150 is equal to the absolute value of the sum of the width of the corresponding position on the spacer 300 and the process variation error. The top stage 131 may be bored using a conventional photomask process for manufacturing a passivation layer, and the formed limiting hole 150 may have an inverted truncated cone shape or a square stage shape.

As a further solution of the above embodiment, after the step of forming the position-limiting hole 150 on the supporting surface 1311 of the top stage 131 by using a dry etching technique, the position-limiting hole 150 vertically faces the corresponding gate line 120, and the bottom of the position-limiting hole 150 extends to the surface of the corresponding gate line 120, the method further includes the steps of:

the bottom and the peripheral wall of the limiting hole 150 are covered with an anticorrosive layer 140.

In the above embodiment, the anti-corrosion layer 140 covers the surface of the gate line 120 exposed at the bottom of the hole of the limiting hole 150 and the hole peripheral wall of the limiting hole 150, so as to prevent the exposed corrosion of the parts on the gate line 120 and the hole peripheral wall of the limiting hole 150 and ensure the performance of the array substrate; in addition, after the limiting hole 150 is formed through the primary photomask, the photoresist used when the limiting hole 150 is formed can be used for depositing the anti-corrosion layer 140, and the peripheral wall of the limiting hole 150 does not need to be shielded when the anti-corrosion layer 140 is deposited, so that the working procedure is saved.

The anti-corrosion layer 140 may be an ito layer, and the ito layer may be formed on the bottom and peripheral walls of the limiting hole 150 and the surface of the non-metal layer 130 by ito layer process.

In the manufacturing process of the display panel, a mask process for manufacturing a passivation layer in the existing process is used to dig a limiting hole 150 in the supporting surface 1311 of the top stage 131, the depth of the limiting hole 150 is equal to the thickness of the non-metal layer 130, in the process of forming the ito layer, the bottom and the peripheral wall of the hole of the non-metal layer 130 and the limiting hole 150 are covered and protected, then in the process of forming the spacer 300, the spacer 300 is abutted into the limiting hole 150, and the depth of the limiting hole 150 is one fifth to one seventh of the height of the spacer 300.

The above description is only an alternative embodiment of the present application, and not intended to limit the scope of the present application, and all modifications and equivalents of the subject matter of the present application, which are made by the following claims and their equivalents, or which are directly or indirectly applicable to other related arts, are intended to be included within the scope of the present application.

Claims

1. The array substrate is provided with a first assembling surface, an opposite-top platform is protruded on the first assembling surface, and the opposite-top platform is provided with a supporting surface.

2. The array substrate of claim 1, wherein the array substrate comprises:

a glass substrate;

the gate line is deposited on the surface of the glass substrate;

the nonmetal layer is deposited on the surfaces of the glass substrate and the gate line, the surface of the nonmetal layer is the first assembling surface, and the opposite top platforms are protruded on the surface of the nonmetal layer at the positions corresponding to the gate line;

the projection of the hole bottom of the limiting hole towards the glass substrate direction is within the range of the corresponding gate line, and the hole bottom of the limiting hole extends to the surface of the corresponding gate line.

3. The array substrate of claim 2, wherein the bottom of the limiting hole is covered with an anti-corrosion layer.

4. The array substrate of claim 3, wherein the hole peripheral walls of the limiting holes are covered with the anti-corrosion layer.

5. The array substrate of claim 3 or 4, wherein the anti-corrosion layer is an indium tin oxide layer.

6. A display panel, comprising:

an array substrate according to any one of claims 1 to 5;

the color film substrate is provided with a second assembling surface, the second assembling surface is arranged opposite to the first assembling surface, and the array substrate and the color film substrate form a box;

the liquid crystal layer is clamped between the array substrate and the color film substrate;

and the spacer is arranged in the limiting hole, one end of the spacer is abutted against the hole bottom of the limiting hole, the other end of the spacer is abutted against the second assembling surface, and the height of the spacer is equal to the sum of the thickness of the liquid crystal layer and the depth of the limiting hole.

7. The display panel of claim 6, wherein a space is provided between a sidewall of the spacer and a hole peripheral wall of the stopper hole.

8. A manufacturing method of an array substrate is characterized by comprising the following steps:

preparing a glass substrate;

depositing a gate line on a surface of the glass substrate;

and arranging a limiting hole on the supporting surface of the opposite top platform by adopting a dry etching technology, wherein the limiting hole vertically faces to the corresponding gate line, and the bottom of the limiting hole extends to the surface of the corresponding gate line.

9. The method of claim 8, wherein the radial cross-section of any position on the via has a size equal to the sum of the radial cross-section of the spacer to be embedded at the corresponding position and the absolute value of the spacer process variation error.

10. The method for manufacturing the array substrate according to claim 8, wherein a limiting hole is formed in the supporting surface of the opposite-top stage by using a dry etching technique, the limiting hole vertically faces the corresponding gate line, and a bottom of the limiting hole extends to a surface of the corresponding gate line, and then the method further comprises: