CN113380756A - Semiconductor circuit and method for manufacturing the same - Google Patents
Semiconductor circuit and method for manufacturing the same Download PDFInfo
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- CN113380756A CN113380756A CN202110775097.3A CN202110775097A CN113380756A CN 113380756 A CN113380756 A CN 113380756A CN 202110775097 A CN202110775097 A CN 202110775097A CN 113380756 A CN113380756 A CN 113380756A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49838—Geometry or layout
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/16—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Geometry (AREA)
- Lead Frames For Integrated Circuits (AREA)
Abstract
The invention discloses a semiconductor circuit which comprises a circuit board, and an electronic element and a pin which are positioned on the circuit board, and is characterized in that the circuit board comprises an insulating substrate, a circuit wiring layer and a green oil layer which are arranged in a laminated manner, wherein a plurality of mounting notches are formed in the side edge of the insulating substrate, the pin is mounted in the corresponding mounting notch and is electrically connected with the circuit wiring layer through a conductive medium layer, and the electronic element is electrically connected with the circuit wiring layer through a lead. The invention is beneficial to improving the production efficiency.
Description
Technical Field
The invention relates to the technical field of semiconductors, in particular to a semiconductor circuit and a manufacturing method thereof.
Background
The semiconductor circuit is a power driving product combining power electronics and integrated circuit technology, integrates an intelligent control IC, high-power devices for power output such as an IGBT, a MOSFET and an FRD and some resistance-capacitance elements, and the devices are welded on an aluminum substrate through tin-based solder.
In the production process of the existing semiconductor circuit, the pins are generally integrated pins with uniform specifications, namely, specific positions of two adjacent pins are connected through reinforcing ribs, so that redundant pins and reinforcing ribs need to be cut off subsequently, and the production efficiency is reduced.
Disclosure of Invention
The present invention is directed to a semiconductor circuit, which solves the problem of low production efficiency of the conventional semiconductor circuit.
In order to achieve the above object, the present invention provides a semiconductor circuit, which includes a circuit board, and an electronic component and a pin located on the circuit board, wherein the circuit board includes an insulating substrate, a circuit wiring layer, and a green oil layer, the insulating substrate is stacked, the side of the insulating substrate has a plurality of mounting notches, the pin is mounted in the corresponding mounting notch and electrically connected to the circuit wiring layer through a conductive medium layer, and the electronic component is electrically connected to the circuit wiring layer through a wire.
Preferably, the pin includes horizontal segment and vertical section, vertical section joint is in the installation breach and through conductive medium layer with circuit wiring layer electricity is connected, be provided with on the insulating substrate with the chamber that holds of installation breach butt joint one by one, it is used for accomodating to hold the chamber the horizontal segment.
Preferably, the vertical section includes a conductive section and a welding section, the conductive section is connected with the horizontal section and clamped in the mounting notch, the conductive section is electrically connected with the circuit wiring layer through the conductive medium layer, and the width of the conductive section is greater than that of the welding section.
Preferably, the mounting notches are respectively arranged at two opposite sides of the insulating substrate.
Preferably, two adjacent mounting notches are spaced apart by a distance greater than 3.2 mm.
Preferably, the pin comprises a conductive base body, and a nickel layer and a tin layer which are sequentially arranged on the conductive base body, wherein the thickness of the nickel layer is 0.1-0.5 μm, and the thickness of the tin layer is 2-5 μm.
Preferably, the conductive medium layer is solder paste, liquid graphene, silver paste.
Preferably, the insulating substrate is ceramic or glass.
The present invention further provides a method of manufacturing a semiconductor circuit, the method comprising:
cutting a plurality of mounting notches on the raw material plate to form the insulating substrate;
plating a copper foil on one side surface of the insulating substrate and forming the circuit wiring layer by etching;
applying a green oil layer on a specific region of the circuit wiring layer to form the green oil layer;
mounting the electronic components on positions on the circuit wiring layers where the green oil layer is not coated, respectively;
welding two ends of the lead on the electronic element and the circuit wiring respectively;
coating the conductive medium layer on the pins and then installing the pins in the corresponding installation notches to form a semi-finished semiconductor circuit;
and baking the semi-finished product to obtain a finished semiconductor circuit.
Preferably, the step of baking the semi-finished product to obtain a finished semiconductor circuit further comprises:
and placing the finished semiconductor circuit in a mould for packaging.
According to the semiconductor circuit provided by the embodiment of the invention, the plurality of mounting notches are arranged on the insulating substrate, and the pins are set to be in a separated state, so that the preset pins can be conveniently arranged on the insulating substrate according to actual conditions, the condition that the pins are required to be cut after being mounted is avoided, the production efficiency is improved, special rib cutting forming equipment is not required to be adopted for rib cutting and shaping the pins, and the problem of insulating layer cracking caused by stress caused by pin welding tolerance in the plastic packaging process of a packaging mould can be avoided by adopting the separated pins. Meanwhile, the pins are not required to be electrically connected with the circuit wiring layer through welding, so that the risk of welding holes is avoided, the production process is simplified, and the production efficiency is improved; the welding position is not required to be coated with the welding coating in advance by adopting a step steel mesh, so that the process is simplified, and the cost is reduced; the pin does not need to be welded with the copper foil layer, and stress does not exist in the middle of the pin, so that the risk of layering of the insulating layer and empty welding of the pin is reduced.
Drawings
FIG. 1 is a schematic diagram of a semiconductor circuit according to an embodiment of the present invention;
FIG. 2 is a cross-sectional view of the semiconductor circuit shown in FIG. 1;
FIG. 3 is a schematic structural diagram of the insulating substrate shown in FIG. 2;
fig. 4 is a schematic structural diagram of the lead pin shown in fig. 1;
FIG. 5 is a flow chart illustrating a method of fabricating a semiconductor circuit according to an embodiment of the present invention.
Detailed Description
Reference will now be made in detail to embodiments of the present invention, examples of which are illustrated in the accompanying drawings, wherein like or similar reference numerals refer to the same or similar elements or elements having the same or similar function throughout. The embodiments described below with reference to the drawings are exemplary and intended to be illustrative of the present invention and should not be construed as limiting the present invention, and all other embodiments that can be obtained by one skilled in the art based on the embodiments of the present invention without inventive efforts shall fall within the scope of protection of the present invention.
The semiconductor circuit provided by the invention is a circuit module which integrates a power switch device, a high-voltage driving circuit and the like together and is sealed and packaged on the outer surface, and is widely applied to the field of power electronics, such as the fields of frequency converters of driving motors, various inversion voltages, variable frequency speed regulation, metallurgical machinery, electric traction, variable frequency household appliances and the like. The semiconductor circuit herein may be referred to by various other names, such as a Modular Intelligent Power System (MIPS), an Intelligent Power Module (IPM), or a hybrid integrated circuit, a Power semiconductor module, a Power module, and so on. In the following embodiments of the present invention, collectively referred to as a Modular Intelligent Power System (MIPS).
The manufacturing process of the existing modular intelligent power system is as follows:
forming an aluminum material into a proper size as a circuit substrate, forming the texture on the back surface of the circuit substrate by means of laser etching, polishing and the like, arranging the insulating layer on the surface of the circuit substrate, forming a copper foil on the insulating layer, and forming the circuit wiring layer by etching the copper foil;
coating solder paste on a specific position of the circuit wiring layer;
forming a copper material into a proper shape, and performing surface plating treatment to form the copper material as the pins, wherein specific positions of the pins are connected through reinforcing ribs in order to avoid electrostatic damage of the circuit element in a subsequent processing procedure;
placing the circuit element and the pin at the position of the circuit wiring layer coated with the solder paste;
solidifying solder paste by reflow soldering, the circuit element and the pin being fixed on the circuit wiring layer;
cleaning the residual soldering flux on the circuit substrate in a cleaning mode of spraying, ultrasonic and the like;
electrically connecting the circuit element and the circuit wiring via a bonding wire;
if the circuit substrate needs to be connected with a ground potential, a through hole is formed in the insulating layer, and electric connection is formed between the ground potential of the circuit wiring and the circuit substrate through a bonding line;
sealing the elements by injection molding using a thermoplastic resin or transfer molding using a thermosetting resin;
cutting off the reinforcing ribs of the pins and forming the pins into required shapes;
and performing necessary tests through the test equipment, and forming a qualified test person into the modular intelligent power system.
The existing manufacturing method has the phenomenon of welding holes in the pin area, so that the reliability of the product is reduced; and the copper leakage phenomenon is also generated due to the cutting of the pins, so that the reliability of the product is influenced. Meanwhile, because the existing pins are fixed in a welding mode, a stepped steel mesh with a complex process is required to be adopted for printing, so that the manufacturing cost is increased, the pins of the existing modular intelligent power system are connected into a whole through reinforcing ribs, positioning holes are formed in the upper part of the pins, the lower parts of the pins sink to a certain degree, and a certain number of false pins are arranged below the pins (the false pins cannot be electrically connected with a circuit wiring layer inside and can be cut off together with the reinforcing ribs at last), so that the pins are required to be cut off and shaped by rib cutting and forming equipment, and the manufacturing cost is increased.
The invention provides a modular intelligent power system, as shown in fig. 1 to fig. 3, the modular intelligent power system includes a circuit board 100, and an electronic component 200 and pins 300 located on the circuit board 100, the circuit board 100 includes an insulating substrate 110, a circuit wiring layer 120 and a green oil layer 130 which are arranged in a stacked manner, a side of the insulating substrate 110 has a plurality of mounting notches 111, the pins 300 are mounted in the mounting notches 111 in a one-to-one correspondence manner and are electrically connected with the circuit wiring layer 120 through a conductive medium layer 400, and the electronic component 200 is electrically connected with the circuit wiring layer 120 through a wire 500.
In this embodiment, the insulating substrate 110 may be made of ceramic, glass, or the like, so as to be beneficial to preventing the pins 300 from being conducted with the circuit wiring layer 120 through the insulating substrate 110, the number and positions of the installation notches 111 on the insulating substrate 110 may be set according to actual conditions, preferably, the installation notches 111 are respectively arranged on two opposite sides of the insulating substrate 110, and preferably, the interval distance between two adjacent installation notches 111 on the same side is greater than 3.2mm, so as to satisfy the creepage distance. The circuit wiring layer 120 is formed by plating copper foil on the insulating substrate 110 and etching the copper foil, and the specific arrangement rule and form of the circuit wiring layer 120 may be set according to actual requirements. The green oil layer 130 is formed by applying green oil on the circuit wiring layer 120 by a coater at a position where the electronic component 200 is not required to be mounted on the circuit wiring layer 120, to protect the circuit wiring layer 120 from oxidation. The electronic components 200 may be an intelligent control IC, a high-power device such as an IGBT, a MOSFET, and an FRD for power output, and some rc components, and the mounting may be performed by mounting the electronic components on the circuit wiring layer 120 by a chip mounter at positions where the green oil layer 130 is not coated, and simultaneously, the electronic components 200 may be electrically connected to the circuit wiring layer 120 by wires 500, that is, two ends of the wires 500 are respectively soldered or bonded to specific positions of the corresponding electronic components 200 and the circuit wiring layer 120. The pin 300 may be installed in the corresponding installation notch 111, that is, the pin 300 is installed at a place where the pin 300 needs to be arranged, the pin 300 is not installed at a place where the pin 300 does not need to be installed, and the pin 300 may be fixed in the installation notch 111 in a manner of clamping, that is, the pin 300 and the installation notch 111 are fixed in an interference fit manner, and meanwhile, the conductive medium layer 400 is coated on a specific position on the pin 300, so that the pin 300 is electrically connected with the circuit wiring layer 120. The conductive medium layer 400 may be solder paste, liquid graphene, or silver paste, and may be baked or cured to increase the stability of the conductive performance of the pin 300 and the circuit wiring layer 120. Finally, the package body 600 is used for packaging. In this embodiment, through set up a plurality of installation notches 111 and set up each pin 300 into the separation state on insulating substrate 110, thereby be convenient for set up predetermined pin 300 on insulating substrate 110 according to actual conditions, with this condition that still need tailor after having avoided current installation pin 300, production efficiency has been improved, also need not adopt special muscle cutting former to carry out the muscle integer to pin 300, and adopt discrete pin 300 can avoid arousing stress because of pin 300 welding tolerance in packaging mold plastic envelope process and lead to the insulating layer fracture problem. Meanwhile, the pins 300 are not required to be electrically connected with the circuit wiring layer 120 through welding, so that the risk of welding holes is avoided, the production process is simplified, and the production efficiency is improved; the welding position is not required to be coated with the welding coating in advance by adopting a step steel mesh, so that the process is simplified, and the cost is reduced; the pin 300 does not need to be welded with a copper foil layer, no stress exists in the middle, and the risk of layering of an insulating layer and empty welding of the pin 300 is reduced.
In a preferred embodiment, as shown in fig. 4, the pin 300 preferably includes a horizontal section 310 and a vertical section 320, the vertical section 320 is clamped in the mounting notch 111 and electrically connected to the circuit wiring layer 120 through the conductive medium layer 400, and the insulating substrate 110 is provided with accommodating cavities in one-to-one abutting joint with the mounting notches 111, and the accommodating cavities are used for accommodating the horizontal sections 310.
In this embodiment, it is preferable that the horizontal section 310 and the vertical section 320 are arranged in a vertical state, and the horizontal section 310 is shorter and the vertical section 320 is longer. Meanwhile, the size and shape of the accommodating cavity disposed on the side of the insulating substrate 110 away from the circuit wiring layer 120 are adapted to the horizontal section 310 so as to accommodate the horizontal section 310, and the end of the vertical section 320 clamped close to the horizontal section 310 can be electrically connected to the circuit wiring layer 120 through the conductive medium layer 400. Of course, it is also possible that the horizontal section 310 is directly clipped into the mounting notch 111, i.e. the length and width of the mounting notch 111 are adapted to the horizontal section 310.
In a preferred embodiment, as shown in fig. 4, it is preferable that the vertical section 320 includes a conductive section 321 and a soldering section 322, the conductive section 321 is connected to the horizontal section 310 and is snapped in the mounting notch 111, and the conductive section 321 is electrically connected to the circuit wiring layer 120 through a conductive medium layer 400, and the width of the conductive section 321 is greater than the width of the soldering section 322.
In this embodiment, it is preferable that the width of the conductive segment 321 is the same as that of the horizontal segment 310, and the conductive segment 321 is clamped in the installation notch 111 and electrically connected to the circuit wiring layer 120 through the conductive medium layer 400. Among other things, increasing the width of conductive segment 321 facilitates increasing the contact area between pin 300 and circuit wiring layer 120, thereby facilitating improving the stability of electrical connection.
In a preferred embodiment, the lead 300 preferably includes a conductive substrate, and a nickel layer and a tin layer sequentially disposed on the conductive substrate, wherein the thickness of the nickel layer is 0.1-0.5 μm, and the thickness of the tin layer is 2-5 μm.
In this embodiment, the conductive substrate may be made of C194 (about 1/2H) (chemical components: C μ (about 97.0), Fe: 2.4, P: 0.03, and Zn: 0.12) or KFC (about 1/2H) (chemical components: C μ (about 99.6), Fe: 0.1 (0.05-0.15), and P: 0.03 (0.025-0.04)), and then the C194 or KFC plate of 0.5mm is processed by a stamping or etching process, and then the surface thereof is plated with nickel and tin.
In a preferred embodiment, a side of the insulating substrate 110 facing away from the circuit wiring layer 120 is preferably provided with a wavy line. The wave-shaped lines can be formed by laser etching, polishing and the like, so that after packaging is facilitated, the heat dissipation area is increased when the side face of the insulating substrate 110 is exposed, and the contact area with the packaging body 600 can be increased when the side face of the insulating substrate 110 is integrally coated, so that the packaging stability is improved.
The present invention further provides a manufacturing method of a modular smart power system, as shown in fig. 5, the manufacturing method includes:
step S10, cutting a plurality of mounting notches on the raw material plate to form an insulating substrate;
step S20, plating a copper foil on one side of the insulating substrate and forming a circuit wiring layer by etching;
step S30, applying green oil on a specific region of the circuit wiring layer to form a green oil layer;
step S40 of mounting electronic components at positions on the circuit wiring layer where the green oil layer is not coated;
step S50, welding two ends of the lead on the electronic element and the circuit wiring respectively;
step S60, coating a conductive dielectric layer on the pins and then mounting the pins in the corresponding mounting notches to form a semi-finished semiconductor circuit;
and step S70, baking the semi-finished product to obtain the finished semiconductor circuit.
In this embodiment, the manner of forming the mounting notches on the insulating substrate may be in the form of wire cutting or machining, and as for the timing circuit wiring layer, the green oil coating layer, the mounting of each electronic component, and the connection of the wires, the present manner may be referred to, and will not be described in detail herein. The main improvement points are as follows: after the welding quality detection, cleaning and wire binding are completed, a conductive medium layer is coated at a specific position of the pin or a conductive medium layer is coated at a corresponding position of the circuit wiring layer, then the pin is placed in a corresponding mounting notch on the insulating substrate by using a manipulator or manually, and finally the conductive medium layer is cured by baking, so that the mounting stability and the electric connection stability of the pin are improved. Meanwhile, the baking process not only has a curing effect on the conductive medium layer, but also has a drying effect on the moisture in the electronic element which is just cleaned, so that a finished semiconductor circuit product can be obtained. Wherein, the manner of mounting the electronic component can be that the cut insulating substrate is put into a special carrier (the carrier can be made of materials with high temperature resistance of more than 200 ℃ such as aluminum, synthetic stone, ceramics, PPS and the like), the chip of the power device is mounted on the mounting position of the component by automatic die bonding equipment (DA machine) through brushing tin paste or dispensing silver paste on the mounting position of the electronic component reserved on the circuit wiring layer, the resistance and capacitance components are mounted on the mounting position of the electronic component through automatic SMT equipment, then the whole semi-finished product including the carrier is passed through a reflow oven together to solder all the electronic components to the corresponding mounting positions, the welding quality of the electronic element is detected by visual inspection of AOI equipment, foreign matters such as scaling powder and aluminum scraps remained on the insulating substrate are removed by cleaning modes such as spraying and ultrasonic, and the electronic element is electrically connected with the circuit wiring layer through a wire. The insulating substrate is used as an installation carrier of an internal circuit and pins of the modular intelligent power system, has a certain heat dissipation function (the substrate can be made of insulating materials with good heat dissipation such as ceramic and glass), and the number of the installation notches and the distance between every two adjacent installation notches depend on the scheme of the circuit design inside and the scheme of an external electric control board; the circuit wiring layer is formed on the copper foil layer of the insulating substrate through exposure, development and etching; the green oil layer is used for preventing short circuit between circuits of the circuit wiring layer and oxidation and pollution of the surface of the circuit layer, and a layer of green oil is coated on the surface of the circuit layer to play a role in protection; the electronic element is an internal device required by the modularized intelligent power system to realize functions; the wire is electrically connected by binding wires of a bonding machine (the wire can be made of metal wires with good welding and conductive properties such as aluminum, copper, gold and silver); the pins are made of C194 (-1/2H) (chemical components are C mu (-97.0), Fe (2.4), P (0.03) and Zn (0.12)) or KFC (-1/2H) (chemical components are C mu (-99.6), Fe (0.1 (0.05-0.15) and P (0.03 (0.025-0.04)), and the C194 or KFC plates with the thickness of 0.5mm are processed by a stamping or etching process, nickel plating with the thickness of 0.1-0.5 mu m is firstly carried out on the surface, and then tin plating with the thickness of 2-5 mu m is carried out; the conductive medium is used for electrically connecting the pins and the circuit wiring layer (the conductive medium is generally in a liquid state and is solidified after being baked at high temperature, and the conductive medium can be made of tin paste, liquid graphene or silver adhesive).
In a preferred embodiment, it is preferable that the step of baking the semi-finished product to obtain the finished semiconductor circuit further includes:
and placing the finished semiconductor circuit in a mould for packaging.
In this embodiment, the cured finished semiconductor circuit is placed in a plastic package mold or a potting mold for packaging, and then marking, PMC post-curing, electrical parameter testing are performed to form the qualified product modular intelligent power system. The packaging body is used for sealing the internal devices and circuits of the modular intelligent power system by using an injection molding mode of thermoplastic resin, and plays a role in protecting the interior of the modular intelligent power system.
The above is only a part or preferred embodiment of the present invention, and neither the text nor the drawings should limit the scope of the present invention, and all equivalent structural changes made by the present specification and the contents of the drawings or the related technical fields directly/indirectly using the present specification and the drawings are included in the scope of the present invention.
Claims (10)
1. A semiconductor circuit comprises a circuit board, and an electronic element and a pin which are arranged on the circuit board, and is characterized in that the circuit board comprises an insulating substrate, a circuit wiring layer and a green oil layer which are arranged in a laminated manner, a plurality of mounting notches are formed in the side edge of the insulating substrate, the pin is mounted in the corresponding mounting notch and is electrically connected with the circuit wiring layer through a conductive medium layer, and the electronic element is electrically connected with the circuit wiring layer through a wire.
2. The semiconductor circuit according to claim 1, wherein the pin includes a horizontal section and a vertical section, the vertical section is clamped in the mounting notch and electrically connected to the circuit wiring layer through the conductive medium layer, the insulating substrate is provided with accommodating cavities in one-to-one butt joint with the mounting notch, and the accommodating cavities are used for accommodating the horizontal section.
3. The semiconductor circuit of claim 2, wherein the vertical segment comprises a conductive segment and a solder segment, the conductive segment is connected to the horizontal segment and is clamped in the mounting notch, the conductive segment is electrically connected to the circuit wiring layer through the conductive dielectric layer, and the width of the conductive segment is greater than the width of the solder segment.
4. The semiconductor circuit of claim 1, wherein a plurality of said mounting notches are disposed on opposite sides of said insulating substrate, respectively.
5. The semiconductor circuit of claim 1, wherein adjacent two of the mounting notches are spaced apart by a distance greater than 3.2 mm.
6. The semiconductor circuit according to claim 1, wherein the lead comprises a conductive substrate, and a nickel layer and a tin layer sequentially disposed on the conductive substrate, wherein the nickel layer has a thickness of 0.1-0.5 μm, and the tin layer has a thickness of 2-5 μm.
7. The semiconductor circuit of claim 1, wherein the conductive dielectric layer is solder paste, liquid graphene, silver paste.
8. The semiconductor circuit according to claim 1, wherein the insulating substrate is ceramic or glass.
9. A method for manufacturing a semiconductor circuit according to any one of claims 1 to 8, comprising:
cutting a plurality of mounting notches on the raw material plate to form the insulating substrate;
plating a copper foil on one side surface of the insulating substrate and forming the circuit wiring layer by etching;
applying a green oil layer on a specific region of the circuit wiring layer to form the green oil layer;
mounting the electronic components on positions on the circuit wiring layers where the green oil layer is not coated, respectively;
welding two ends of the lead on the electronic element and the circuit wiring respectively;
coating the conductive medium layer on the pins and then installing the pins in the corresponding installation notches to form a semi-finished semiconductor circuit;
and baking the semi-finished product to obtain a finished semiconductor circuit.
10. The method of claim 9, further comprising, after the step of baking the semi-finished product to obtain a finished semiconductor circuit:
and placing the finished semiconductor circuit in a mould for packaging.
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| CN202110775097.3A CN113380756A (en) | 2021-07-07 | 2021-07-07 | Semiconductor circuit and method for manufacturing the same |
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| Application Number | Priority Date | Filing Date | Title |
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| CN202110775097.3A CN113380756A (en) | 2021-07-07 | 2021-07-07 | Semiconductor circuit and method for manufacturing the same |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114666975A (en) * | 2022-03-15 | 2022-06-24 | 广东汇芯半导体有限公司 | Semiconductor circuit structure and manufacturing method thereof |
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| CN111933623A (en) * | 2020-06-29 | 2020-11-13 | 中国航空工业集团公司北京长城航空测控技术研究所 | Packaging interconnection structure and method based on substrate side bonding pad |
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| JPH05211247A (en) * | 1992-01-30 | 1993-08-20 | Nec Corp | Semiconductor device |
| JPH06204385A (en) * | 1992-11-26 | 1994-07-22 | Ibiden Co Ltd | Semiconductor device mounted pin grid array package substrate |
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