CN113378508A - Intellectual property core of pipeline structure, customization method thereof and system on chip - Google Patents

Intellectual property core of pipeline structure, customization method thereof and system on chip Download PDF

Info

Publication number
CN113378508A
CN113378508A CN202110779160.0A CN202110779160A CN113378508A CN 113378508 A CN113378508 A CN 113378508A CN 202110779160 A CN202110779160 A CN 202110779160A CN 113378508 A CN113378508 A CN 113378508A
Authority
CN
China
Prior art keywords
module
interface
intellectual property
user
function
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN202110779160.0A
Other languages
Chinese (zh)
Other versions
CN113378508B (en
Inventor
刘宇轩
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
ARM Technology China Co Ltd
Original Assignee
ARM Technology China Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by ARM Technology China Co Ltd filed Critical ARM Technology China Co Ltd
Priority to CN202110779160.0A priority Critical patent/CN113378508B/en
Publication of CN113378508A publication Critical patent/CN113378508A/en
Application granted granted Critical
Publication of CN113378508B publication Critical patent/CN113378508B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00Computer-aided design [CAD]
    • G06F30/30Circuit design
    • G06F30/39Circuit design at the physical level
    • G06F30/392Floor-planning or layout, e.g. partitioning or placement
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00Computer-aided design [CAD]
    • G06F30/30Circuit design
    • G06F30/39Circuit design at the physical level
    • G06F30/394Routing
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00Computer-aided design [CAD]
    • G06F30/30Circuit design
    • G06F30/39Circuit design at the physical level
    • G06F30/398Design verification or optimisation, e.g. using design rule check [DRC], layout versus schematics [LVS] or finite element methods [FEM]
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2115/00Details relating to the type of the circuit
    • G06F2115/02System on chip [SoC] design

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Evolutionary Computation (AREA)
  • Geometry (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Architecture (AREA)
  • Image Processing (AREA)

Abstract

The application relates to the field of chip design and discloses an intellectual property core of a pipeline structure, a customization method of the intellectual property core and a system on a chip. The intellectual property core of the pipeline structure is used for a system on a chip and comprises at least one functional module and at least one user customizable module, wherein the at least one functional module is used for receiving preset data and realizing preset functions, the at least one user customizable module is connected with parts in the at least one functional module, and the user customizable module is configured with definition of a preset interface and corresponding interface constraint information. By the method, the functional modules in the intellectual property cores of the pipeline structure can be customized, the individual customization requirements of users on the intellectual property cores can be met, the intellectual property cores can provide differentiated performance, and the respective technical safety of designers of the intellectual property cores and the users can be guaranteed.

Description

Intellectual property core of pipeline structure, customization method thereof and system on chip
Technical Field
The application relates to the field of chip design, in particular to an intellectual property core of a pipeline structure, a customization method of the intellectual property core and a system on a chip.
Background
At present, the design of chip is more and more complicated, and design cycle is shorter and shorter more, uses the intellectual property core can avoid the repeated work in chip design, greatly alleviates chip design engineer's burden. An Intellectual Property core (IP) is a reusable chip module, which usually includes some functional blocks that are commonly used in digital circuits but are relatively complex, and these functional blocks may include functional blocks that implement detailed functions. Intellectual property cores are generally divided into three categories: soft core, hard core and firm core. The soft core generally refers to a functional block described by a hardware description language, and does not refer to any specific circuit element to realize the functions, and the code of the soft core directly participates in the compiling flow of the design. The hardmac is provided in the form of a fully placed and routed netlist, has very predictable performance, good confidentiality and poor portability. The fixed core is a compromise between the soft core and the hard core, and only places and routes some more critical paths in the description function in advance, while other parts can be subjected to related optimization processing by a compiler.
Along with the continuous accumulation of the technical capability of the user, the customization requirement of the user on the intellectual property core is deeper, and the overall reuse of the intellectual property core cannot meet the individual requirement of the user, so that how to meet the customization requirement of the user on the functional module in the intellectual property core becomes a current outstanding problem.
Disclosure of Invention
The embodiment of the application provides an intellectual property core of a pipeline structure, a customization method of the intellectual property core and a system on chip, and is used for solving the problem that the personalized customization requirement of a user on a functional module in the intellectual property core is difficult to meet in the prior art.
In a first aspect, an embodiment of the present application provides an intellectual property core of a pipeline structure, for a system on a chip, where the intellectual property core includes:
at least one functional module, and at least one user customizable module,
at least one function module for receiving preset data and implementing preset functions,
and the user customizable module is configured with the definition of the preset interface and the corresponding interface constraint information.
In a possible implementation of the above first aspect, the at least one user customizable module is connected to at least part of the at least one functional module to form a pipeline structure.
In a possible implementation of the above first aspect, at least one functional module is configured with an interface implementation and a functional implementation.
In a possible implementation of the first aspect, the preset interface of the at least one user customizable module includes a generic interface and a specific interface, the generic interface is used for describing a generic function of the functional module, and the specific interface is used for describing a specific function of the functional module.
In one possible implementation of the first aspect described above, the interface constraint information comprises a constraint condition for at least one of a data format and a communication protocol.
In a possible implementation of the first aspect, the user-customizable module is configured to be replaced by a private function module, the private function module includes an interface implementation and a function implementation, the interface implementation is configured to implement a preset interface in the private function module, and the function implementation is configured to implement a service function that the private function module can provide.
In a second aspect, an embodiment of the present application provides a method for customizing an intellectual property core of a pipeline structure, where the intellectual property core includes two or more functional modules, and the method includes:
determining at least two functional modules required for realizing the functions according to the functions to be provided by the intellectual property core;
determining a part of at least two functional modules as target modules according to the function customization requirements of users;
replacing the target module with a user customizable module;
and providing the definition of the interface and the corresponding interface constraint information for the user customizable module.
In a possible implementation of the second aspect, the method further includes:
replacing the user customizable module with a private function module;
and checking the replaced private function module.
In a possible implementation of the second aspect, the checking the replaced private function module includes:
acquiring interface information of a private function module, wherein the interface information comprises interface definition and corresponding interface realization;
checking whether the interface definition of the private function module is consistent with the definition of the interface of the user customizable module;
it is checked whether the interface implementation of the private functional module satisfies the interface constraint information of the user customizable module.
In a third aspect, embodiments of the present application provide a system on chip comprising an intellectual property core of a pipeline structure as provided in the first aspect.
The intellectual property core of pipeline structure in this application is through setting up user's customizable module, and the interface definition and the corresponding interface constraint information of presetting the interface are disposed in user's customizable module, the user realizes presetting the interface and following the interface constraint information that corresponds in own private function module, thereby realize user's private function module to user's customizable module's replacement, satisfy the customization demand of user to functional module in the intellectual property core, the user need not complete design and realizes whole intellectual property core, realized more nimble intellectual property core customization scheme, the functional module customization of more fine grit is provided for the user.
Drawings
FIG. 1 illustrates a scene schematic of image signal processing, according to some embodiments of the present application;
fig. 2 illustrates a block diagram of a system on chip (SoC) containing intellectual property cores, in accordance with some embodiments of the present application;
fig. 3 illustrates a schematic diagram of a manner of use of a user customizable module in an intellectual property core, according to some embodiments of the present application;
fig. 4 illustrates an interface schematic diagram of a user customizable module in an intellectual property core, according to some embodiments of the present application;
fig. 5 illustrates a flow diagram of a method for customization of an intellectual property core, in accordance with some embodiments of the present application;
fig. 6 illustrates a flow diagram of a method for checking user private function modules in an intellectual property core, according to some embodiments of the present application.
Detailed Description
Illustrative embodiments of the present application include, but are not limited to, intellectual property cores and methods of customization thereof, systems on a chip.
It is to be appreciated that as used herein, the term module may refer to or include an Application Specific Integrated Circuit (ASIC), an electronic circuit, a processor (shared, dedicated, or group) and/or memory that executes one or more software or firmware programs, a combinational logic circuit, and/or other suitable hardware components that provide the described functionality, or may be part of such hardware components.
It is to be appreciated that in various embodiments of the present application, the processor may be a microprocessor, a digital signal processor, a microcontroller, or the like, and/or any combination thereof. According to another aspect, the processor may be a single-core processor, a multi-core processor, the like, and/or any combination thereof.
It can be understood that the intellectual property right core customizing method is suitable for various intellectual property right cores and the like which need to be customized by functional modules.
According to the technical scheme, the replaceable functional module is added in the intellectual property core, so that a user can replace the corresponding existing functional module by using the private functional module developed by the user, the functional module in the intellectual property core is customized, the individual customization requirements of the user on the intellectual property core are met, the intellectual property core can provide differentiated performance, and the respective technical safety of an intellectual property core supplier and the user can be ensured.
Embodiments of the present application will be described in further detail below with reference to the accompanying drawings.
A scene in which an image signal is checked for processing using Intellectual Property (IP) is disclosed according to some embodiments of the present application, and a schematic view of the scene is illustrated in fig. 1. As shown in fig. 1, the scene includes an intellectual property core 100 and an image sensor 108, and the image sensor 108 collects an external image and transmits a collected image signal to the intellectual property core 100 for image signal processing. The intellectual property core 100 is configured to receive an image signal sent by the image sensor, process the image signal, and output an image. The intellectual property core 100 processes the image signal in a pipeline (Pipe-line) structure, and the functional blocks for processing the image signal include: the image signal processing system comprises a black level correction module 101, a lens shading correction module 102, a digital gain module 103, a demosaicing module 104, a gamma correction module 105, a user-defined color restoration module 106, a color gamut conversion module 107 and a color restoration module 109, wherein only one of the user-defined color restoration module 106 and the color restoration module 109 plays a role in the image signal processing process, and can be the user-defined color restoration module 106 or the color restoration module 109. The image signals are processed in the modules in sequence according to the data flow in the figure, and the output image signal of the former module is used as the input image signal of the latter module.
Among the plurality of functional modules that process the image signal, the user-defined color restoration module 106 is a private functional module provided by the user, which is a module developed by the user according to the needs of the user, and the position of which in the pipeline structure is the same as the position of the corresponding color restoration module 109 in the pipeline structure, for example, between the gamma correction module 105 and the color gamut conversion module 107, and the like. The user can use the functional module to replace the corresponding color reduction module 109 in the intellectual property core, thereby satisfying the individual requirements of the user on the color reduction function, and simultaneously, the user can also directly use the pipeline structure and most of the existing functions of the intellectual property core without developing the complete intellectual property core by self.
The image sensor 108 generally acquires an image through a Bayer Pattern (BP), which is a 2 × 2 array and is composed of 2 green, 1 blue and 1 red pixel units, and when converting a gray Pattern into a color image, the 2 × 2 array is interpolated to generate a color original image.
The Black Level Correction (BLC) module 101 is used to perform Black Level Correction on data in the original image from the image sensor 108, where the Black Level is a signal Level corresponding to the lowest point of Black. Since the dark current exists in the circuit of the image sensor 108, the pixel unit has a certain output voltage even if no light irradiates the pixel unit, so the black level of the data in the original image is not 0 level, but 0 in the digital signal represents the darkest pixel, and therefore the black level of the data in the original image needs to be adjusted to be 0 at the minimum value.
A Lens Shading Correction (LSC) module 102, configured to perform optical shift Correction, where a Lens of the image sensor 108 is a convex Lens, and the light intensity received at an imaging center of the sensor is greater than that received at an edge area, so that brightness of the imaging center is inconsistent with that of the edge area; in addition, the refractive indexes of the lens for light of different colors are different, so that light of three colors of red, green and blue cannot be imaged completely and uniformly, the center and the edge of the image can be color-shifted, and therefore, compensation correction needs to be performed on data in an original image.
A Digital Gain (DG) module 103, configured to perform signal Gain adjustment on the raw image acquired by the image sensor 108 under different illumination conditions.
A Demosaic (Demosaic) module 104, configured to perform color interpolation on the original image, that is, to recover real-world colors conforming to the color display device from the original image, may use a variety of Demosaic algorithms, such as a bilinear interpolation method, a gradient-based method, a nearest neighbor method, an adaptive method, and the like.
A Gamma Correction (GC) module 105, configured to perform nonlinear Correction on data of the original image, so as to improve image contrast of the original image. Because the photosensitive value of the human eye to the external light source and the input light intensity are not in a linear relationship but in an exponential relationship, the human eye can more easily distinguish the change of the brightness under low illumination, and the change of the brightness can not be easily distinguished by the human eye along with the increase of the illumination. The sensitivity of the image sensor 108 is in a linear relationship with the input light intensity, and the gamma correction is performed on the acquired original image, so that the image can be conveniently recognized by personnel.
And an Auto White Balance (AWB) module 109, which is used to eliminate the influence of the light source on the imaging of the image sensor 108, simulate the color constancy of human eyes, and ensure that the White color seen in any scene is a true White color. The images of objects captured by the image sensor 108 under different light sources appear in different colors, for example, images captured under sunny weather may be bluish and images captured under candlelight may be reddish. Human eyes have the characteristic of color constancy, and the human eyes do not influence the light source when observing objects. There are many existing automatic white balance algorithms, such as a gray world method, a maximum bright point method, an area division method, a color gamut boundary method, a perfect reflection method, and the like.
A Color Space Convert (CSC) module 107 for converting an RGB Color gamut, where the Color gamut represents a range of colors that the display device is capable of displaying, into a YUV Color gamut, where the RGB Color gamut represents colors using a combination of red, green, and blue signal components, and the YUV Color gamut represents colors using a combination of two signal components of a luminance signal and a Color difference.
It is to be understood that fig. 1 only shows seven kinds of functional blocks for performing image signal processing on the original image input by the image sensor 108, the number of functional blocks in the image does not constitute a limitation on the number of image signal processing functions used in the intellectual property core 100, and seven or more kinds of processing functions may be used in the intellectual property core, for example, Bad Pixel Correction (BPC), Color Correction (CC), or the like may also be used.
The embodiment of the application provides an intellectual property core, concretely, through setting up user's customizable module in the intellectual property core, and the interface constraint information that the definition of interface and correspondence are predetermine in user's customizable module configuration, the user realizes predetermineeing the interface and following the interface constraint information that corresponds in own private function module, thereby realize the replacement of user's private function module to user's customizable module, satisfy the customization demand of user to functional module in the intellectual property core, the user need not complete design and realizes whole intellectual property core, more nimble intellectual property core customization has been realized, can provide the customization scheme for the user on the more granule degree of intellectual property core.
Fig. 2 shows a block diagram of a System on Chip (SoC) 200 containing intellectual property cores, according to an embodiment of the invention. In fig. 2, similar components have the same reference numerals. In fig. 2, SoC 200 includes: an AHB bus unit 202 for configuration of different units (such as processor 201, DMA, etc.) by the CPU in SoC 200, coupled to the application processor 201, for controlling access to hardware devices connected to SoC 200; a read only memory unit 203 for storing fixed and unchangeable contents; an IP core unit 204 representing one or more intellectual property cores used in SoC 200; a random memory unit 205 for storing contents that can be randomly accessed; a general I/O port unit 206 for implementing connection and data exchange between the processor 201 and hardware devices and memories; and an AHB2APB bus unit 207 connected to the AHB bus unit 202 for connection between hardware devices of low bandwidth. AHB2APB bus unit 207 is coupled with single timing unit 208 and dual timing unit 209, which are used for timing SoC 200; an alarm timing unit 210 for resetting the SoC 200 when a software failure occurs in the SoC 200, and a UART unit 211(Universal Asynchronous Receiver/Transmitter) for converting data transmitted between units in the SoC 200 and between the units and hardware devices between serial communication and parallel communication.
In some embodiments of the present application, the intellectual property core is preconfigured with user customizable modules for implementing the same or similar functions of functional modules at the same location on the pipeline structure. The user can design the self-defined function module according to the established pipeline interface description and the pipeline data flow mode under certain constraint conditions. The constraints may be viewed as defining functions for the interface portion of the user customizable module, while the functional portion of the actual customized functional module is delivered to the user customized design. The user replaces the user customizable module with the private function module to customize the function module in the intellectual property core. Here, the intellectual property core also provides a function module corresponding in function to the private function module of the user. The private function module provided by the user can replace the user customizable module only by meeting the preset interface constraint information of the IP check user customizable module.
It is to be understood that the number of the user customizable modules preset in the intellectual property core is not particularly limited, and may be one, or two or more, and may be specifically determined according to the customization needs of the user.
Fig. 3 shows a schematic structural diagram of an intellectual property core containing user customizable modules in some embodiments of the present application. In fig. 3, the IP core includes a functional module a, a functional module B, a user-customizable module, and a functional module C, the functional module B and the user-customizable module are disposed on a pipeline between the functional module a and the functional module C, and only one of the functional module B and the user-customizable module actually functions. The image signal output after the processing of the functional module a can be used as an input signal of a user customizable module or an input signal of the functional module B. The user can customize the output signal after the module processes the input signal, or the output signal after the functional module B processes the input signal, as the input signal of the functional module C. The user-customisable module is a virtual module, i.e. only the relevant interfaces are defined and no corresponding interface or functional implementation is possible. Unlike the user-customizable modules, the functional modules in the intellectual property core, such as functional module a, functional module B, and functional module C, have an interface implementation and a functional implementation, i.e., include a specific implementation defined for the interface and a specific implementation for providing the function.
Under the condition that a user replaces a user customizable module with the private function module and shields the function module B, a processing pipeline consisting of the function module A, the private function module and the function module C in the IP core can normally run; under the condition that a user does not replace the IP core, a processing pipeline consisting of the functional module A, the functional module B and the functional module C in the IP core can also normally operate.
In some embodiments of the present application, the user-customizable module in the intellectual property core is a virtual module that provides only interface definitions and does not provide a specific functional implementation. It will be appreciated that the respective virtual functions provided by the user customizable modules may be different functions, such as a virtual black level correction function, a virtual lens shading correction function, a virtual gamma correction function, etc. in image signal processing, or other similar functions, and that the virtual modules at different locations of the pipeline need to satisfy different specific interface and function restriction constraints.
In addition, it will be appreciated that the virtual function provided in the user customisable module may be one, for example a virtual black level correction function, and that the user may only replace the user customisable module with a proprietary module that implements the black level correction function; the virtual function provided in the user customizable module may also be multiple, for example, a virtual lens shading correction function and a virtual gamma correction function, and then the user may replace the user customizable module with a private module that implements the lens shading correction function, or may replace the user customizable module with a private module that implements the gamma correction function.
In some embodiments of the application, the user customizable module determines the virtual functions provided by defining a functional interface. Fig. 4 shows a schematic diagram of a functional interface of a user customizable module. As shown in fig. 4, the user customizable module defines two functional interfaces: a generic interface and a dedicated interface. The universal interface defines a universal functional interface required by a functional module in the intellectual property core, such as a data stream interface, a synchronous timing signal interface, a register configuration interface, a memory data interaction interface and the like; the special interface defines a functional interface required by the functional module in the intellectual property core to realize a specific function, for example, a RAW domain data processing interface required by the functional module for realizing the black level correction function to perform data processing, an RGB domain data processing interface required by the functional module for realizing the gamma correction function to perform data processing, a YUV domain data processing interface required by the functional module for realizing the noise reduction function to perform data processing, and the like. The number of the functional interfaces in the general interface and the special interface is not particularly limited, and may be 1, or 2 or more than 2.
The data stream interface is used for receiving data which conforms to a specified data format under a certain timing constraint condition, and the synchronous timing signal interface is used for receiving the data in a synchronous transmission mode. The register configuration interface is used for realizing high-performance and high-clock-frequency bus connection among the functional modules in the intellectual property core. The memory data interaction interface is used for realizing data exchange among the functional modules in the intellectual property core through the memory, and has the effects of high bandwidth and low delay.
Fig. 5 shows a flow chart of a method of customization of intellectual property cores of a pipeline structure. The following describes the design scheme of an intellectual property core in some embodiments of the present application, taking the design of an intellectual property core for image signal processing as an example.
In step S501, the intellectual property core designer determines at least two functional modules required for implementing the functions according to the functions to be provided by the intellectual property core. Here, the function to be provided by the IP core refers to a function mainly realized by the IP core, and the function of the IP core may be, for example, image signal processing, digital-to-analog conversion, audio signal processing, or the like.
It can be understood that the intellectual property core needs at least two functional modules to realize the provided functions, and at least one functional module as a target module can be replaced by a private functional module of a user, so that the customization requirement of the functional module expected by the user is met.
For example, if the function of the intellectual property core is to implement image signal processing, it may be determined according to the process of image signal processing that a plurality of functional modules included in the intellectual property core are the black level correction module 101, the lens shading correction module 102, the digital gain module 103, the demosaicing module 104, the gamma correction module 105, the user-defined color restoration module 106, the color gamut conversion module 107, and the like.
Step S502, the intellectual property core designer determines a part of at least two functional modules as target modules according to the function customization requirements of the user. The intellectual property core designer can determine the function customization requirements of the user through communication with the user, determine which functional modules are provided with corresponding user customizable modules according to the obtained user function customization requirements, and the functional modules without the user function customization requirements can not provide the corresponding user customizable modules. The corresponding user customizable module is determined according to the function customization requirements of the user, the design process of the intellectual property core can be simplified, and the problems of complex design and increased design cost caused by providing the corresponding user customizable module for each function module in the intellectual property core are solved.
For example, an intellectual property core includes a plurality of functional modules: the image signal processing system comprises a black level correction module 101, a lens shading correction module 102, a digital gain module 103, a demosaicing module 104 and a gamma correction module 105, wherein an intellectual property core designer determines that corresponding user function customization requirements exist in the black level correction module 101 and the gamma correction module 105 in an intellectual property core for image signal processing through communication with a user, and therefore the intellectual property core designer takes the black level correction module 101 and the gamma correction module 105 as target modules.
In step S503, the intellectual property core designer replaces the target module with the user customizable module.
Step S504, the intellectual property core designer provides the definition of the interface and the corresponding interface constraint information for the user customizable module. Here, the user-customizable module in the intellectual property core needs to define a relevant interface, and the interface can be used for being called by a previous module or a next module of the user-customizable module in the pipeline structure to complete relevant interaction of data.
For example, if the function provided by the user-customizable module is a black level correction function, the general interface of the user-customizable module may include a data stream interface, a synchronous timing signal interface, a register configuration interface and a memory data interaction interface, and the special interface may include a RAW domain data processing interface.
In addition, the interface of the user customizable module has corresponding interface constraint information, and the interface constraint information is used for limiting the relevant content of the interface, such as interface parameters, interface implementation modes and the like. The user private functional module which replaces the user customizable module needs to meet the corresponding interface constraint information, and the pipeline structure consisting of a plurality of functional modules in the intellectual property core can realize the normal function. Specifically, the interface constraint information corresponding to each interface is different, and the intellectual property designer can determine the corresponding interface constraint information according to the needs of each interface.
In some embodiments of the present application, the interface constraint information may include a constraint for at least one of a data format and a communication protocol. For example, one of the interface constraints corresponding to the data stream interface may include that an image video signal as the input data of the interface needs to satisfy a certain timing condition and comply with a corresponding video standard, and another interface constraint may specifically include a line blanking constraint and a field blanking constraint, where the line blanking constraint refers to a delay that requires a plurality of pixels to be separated between two lines of valid data, and the field blanking constraint refers to a delay that requires a plurality of lines to be separated between two frames of valid data.
In addition, the Interface constraint information may further include a limitation on a communication protocol used by the Interface, for example, a synchronous timing signal Interface needs to comply with a Digital Video Interface (DVP) protocol, a register configuration Interface needs to comply with an Advanced High-performance Bus (AHB) protocol, a memory data interaction Interface needs to comply with an Advanced eXtensible Bus (AXI) protocol, and the like.
Fig. 6 shows a flow chart of a method of checking user private function modules in an intellectual property core of a pipeline structure. The following describes an inspection scheme of a user private function module in some embodiments of the present application, taking an intellectual property core for image signal processing as an example.
In step S601, the intellectual property core determines the user private function module. Here, the user has replaced the user-customizable module in the intellectual property core with its own private function module, and therefore, the intellectual property core needs to check the replaced user private function module to ensure that the user private function module can be normally used in the pipeline structure composed of a plurality of function modules, and the entire intellectual property core can normally provide functions to the outside.
Similarly, the user private function module includes an interface implementation and a function implementation, the interface implementation is used for implementing a preset interface in the user private function module, and the function implementation is used for implementing a service function that the user private function module can provide.
The intellectual property core may determine which user customizable modules are replaced by user private functional modules by traversing the functional modules throughout the pipeline structure, which are the user private functional modules to which the replaceable functional modules correspond.
For example, the intellectual property core for image signal processing may determine that the user-customizable modules corresponding to the black level correction function and the gamma correction function are the black level correction module and the gamma correction module by traversing the functional modules in the entire pipeline structure and discovering that the user-customizable modules corresponding to the black level correction function and the gamma correction function have been replaced with the user-private functional modules.
Step S602, the intellectual property core obtains interface information of the private function module, where the interface information includes interface definitions and corresponding interface implementations.
For example, after determining that the black level correction module and the gamma correction module are private function modules of a user, the intellectual property core for image signal processing acquires interface information of the black level correction module and the gamma correction module, where the acquired interface information may include, but is not limited to, the number of interfaces, the name of the interfaces, interface definitions, interface implementations, and the like, the interface definitions refer to definitions of function interfaces, and the interface implementations refer to ways of implementing specific functions of the interfaces. Taking the black level correction module as an example, the interface information of the module may include: the number of the interfaces, for example, 5, interface names, for example, a data stream interface, a synchronous timing signal interface, a Register configuration interface, a memory data interaction interface, and a RAW data field data processing interface, and the interface implementation may include Register Transfer Level (RTL) implementation code that implements a black Level correction function, and the like.
Step S603, the intellectual property core checks whether the interface definition of the private function module is consistent with the interface definition of the user customizable module. Here, the interface of the user customizable module corresponding to the user private functional module is predefined, and the interface provided by the user private functional module needs to be consistent with the predefined interface of the user customizable module, so that the interface can be normally used by other functional modules in the pipeline structure. The intellectual property core judges whether the interface definition provided by the user private function module is consistent with the interface definition of the user customizable module by comparing the interface definition provided by the user private function module with the interface definition of the user customizable module, if the interface definition provided by the user private function module is consistent with the interface definition provided by the user customizable module, the interface provided by the user private function module is considered to be normally used by other function modules, and if the interface provided by the user private function module is inconsistent with the interface definition provided by the user customizable module, the interface provided by the user private function module is considered to have a problem, so that the function modules in the pipeline structure cannot normally run.
For example, the interface definition of the private black level correction module of the user is checked by the intellectual property right for image signal processing and compared with the interface definition of the corresponding user customizable module, and if the comparison result is inconsistent, the intellectual property right checks that the interface of the private black level correction module provided by the user has a problem, and the user can be reminded to correct the interface of the private black level module.
Step S604, the intellectual property core checks whether the interface implementation of the private function module meets the interface constraint information of the user customizable module. Here, the intellectual property core further checks an interface implementation of the user private function module, and under a condition that the interface implementation satisfies an interface constraint of the corresponding user customizable module, considers that the user private function module can implement a normal function of the corresponding function module.
For example, an intellectual property core for image signal processing acquires a signal timing of an image video signal processed in a data stream interface in a user private black level correction module, and when the acquired signal timing satisfies a preset timing constraint, the data stream interface is considered to satisfy an interface constraint of a user customizable module for providing a black level correction function. Similarly, when the intellectual property core for image signal processing checks that the synchronous timing signal interface uses the DVP standard interface protocol, the register configuration interface uses the AHB protocol, and the memory data interaction interface uses the AXI protocol, these interfaces are considered to satisfy the interface constraints of the user-customizable module for providing the black level correction function.
In addition, the intellectual property core for image signal processing can also check whether the corresponding black level algorithm processing function exists in the private black level correction module of the user, and if not, the user is reminded that the implementation function of black level correction is lacked in the private black level correction module. Here, the function check of the user private black level correction module may be performed by checking whether an RTL code implementing the black level correction function exists in the user private black level correction module.
According to the embodiment of the application, the intellectual property core can ensure that the private function module provided by the user can meet the relevant requirements on the customizable function module in the intellectual property core through checking the private function module provided by the user, and the problem that the interface compatibility exists in the private function module to cause the function module in the intellectual property core to be incapable of normally operating is avoided.
Embodiments of the mechanisms disclosed herein may be implemented in hardware pipeline pipelined IPs in a typical system on a chip. Embodiments of the application may be implemented as computer programs or program code executing on programmable systems comprising at least one processor, a storage system (including volatile and non-volatile memory and/or storage elements), at least one input device, and at least one output device.
In the drawings, some features of the structures or methods may be shown in a particular arrangement and/or order. However, it is to be understood that such specific arrangement and/or ordering may not be required. Rather, in some embodiments, the features may be arranged in a manner and/or order different from that shown in the illustrative figures. In addition, the inclusion of a structural or methodical feature in a particular figure is not meant to imply that such feature is required in all embodiments, and in some embodiments, may not be included or may be combined with other features.
It should be noted that, in the embodiments of the apparatuses in the present application, each unit/module is a logical unit/module, and physically, one logical unit/module may be one physical unit/module, or may be a part of one physical unit/module, and may also be implemented by a combination of multiple physical units/modules, where the physical implementation manner of the logical unit/module itself is not the most important, and the combination of the functions implemented by the logical unit/module is the key to solve the technical problem provided by the present application. Furthermore, in order to highlight the innovative part of the present application, the above-mentioned device embodiments of the present application do not introduce units/modules which are not so closely related to solve the technical problems presented in the present application, which does not indicate that no other units/modules exist in the above-mentioned device embodiments.
It is noted that, in the examples and descriptions of this patent, relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, the use of the verb "comprise a" to define an element does not exclude the presence of another, same element in a process, method, article, or apparatus that comprises the element.
While the present application has been shown and described with reference to certain preferred embodiments thereof, it will be understood by those of ordinary skill in the art that various changes in form and details may be made therein without departing from the spirit and scope of the present application.

Claims (10)

1. An intellectual property core of a pipeline structure for a system on a chip, comprising:
at least one functional module, and at least one user customizable module,
the at least one function module is used for receiving preset data and realizing preset functions,
the at least one user customizable module is connected with a part of the at least one functional module, and is configured with a definition of a preset interface and corresponding interface constraint information.
2. The intellectual property core recited in claim 1, wherein the at least one user customizable module is connected to at least some of the at least one functional module to form a pipeline structure.
3. The intellectual property core of claim 1 wherein the at least one functional module is configured with an interface implementation and a functional implementation.
4. The intellectual property core as claimed in claim 1 wherein the preset interfaces of the at least one user customizable module include a generic interface for describing the generic function of the functional module and a specific interface for describing the specific function of the functional module.
5. The intellectual property core recited in claim 1, wherein the interface constraint information includes a constraint on at least one of a data format and a communication protocol.
6. The intellectual property core according to claim 1, wherein the user customizable module is adapted to be replaced by a private function module, the private function module comprising an interface implementation and a function implementation, the interface implementation being adapted to implement a predetermined interface in the private function module, the function implementation being adapted to implement a service function that the private function module is capable of providing.
7. A method for customizing an intellectual property core of a pipeline structure, wherein the intellectual property core comprises two or more functional modules, the method comprising the following steps:
determining at least two function modules required for realizing specific functions according to the functions to be provided by the intellectual property core;
determining a part of the at least two functional modules as target modules according to the function customization requirements of the user;
replacing the target module with a user customizable module;
and providing the definition of the interface and the corresponding interface constraint information for the user customizable module.
8. The customization method according to claim 7, further comprising:
replacing the user customizable module with a private function module;
and checking the replaced private function module.
9. The method of claim 8, wherein checking the replaced private-function module comprises:
acquiring interface information of the private function module, wherein the interface information comprises interface definition and corresponding interface realization;
checking whether the interface definition of the private function module is consistent with the definition of the interface of the user customizable module;
checking whether the interface implementation of the private function module satisfies the interface constraint information of the user customizable module.
10. A system-on-chip comprising an intellectual property core of a pipeline structure as claimed in any one of claims 1 to 6.
CN202110779160.0A 2021-07-09 2021-07-09 Intellectual property core of pipeline structure, customization method thereof and system on chip Active CN113378508B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202110779160.0A CN113378508B (en) 2021-07-09 2021-07-09 Intellectual property core of pipeline structure, customization method thereof and system on chip

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202110779160.0A CN113378508B (en) 2021-07-09 2021-07-09 Intellectual property core of pipeline structure, customization method thereof and system on chip

Publications (2)

Publication Number Publication Date
CN113378508A true CN113378508A (en) 2021-09-10
CN113378508B CN113378508B (en) 2022-11-22

Family

ID=77581555

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202110779160.0A Active CN113378508B (en) 2021-07-09 2021-07-09 Intellectual property core of pipeline structure, customization method thereof and system on chip

Country Status (1)

Country Link
CN (1) CN113378508B (en)

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20090070728A1 (en) * 2007-09-12 2009-03-12 Solomon Research Llc IP cores in reconfigurable three dimensional integrated circuits
CN101419485A (en) * 2008-11-24 2009-04-29 电子科技大学 Function-variable portable computer mainboard
CN107562967A (en) * 2016-06-30 2018-01-09 哈尔滨卓晋科技有限公司 A kind of development approach of SoC Hardware/Software Collaborative Designs
CN108509373A (en) * 2018-03-19 2018-09-07 复旦大学 A kind of total system analog platform towards SoC research and development of software
CN111832237A (en) * 2020-07-17 2020-10-27 北京昂瑞微电子技术有限公司 Intellectual property right verification method and system
CN112395228A (en) * 2021-01-20 2021-02-23 北京燧原智能科技有限公司 Protocol conversion bridge circuit, intellectual property core and system-on-chip
CN112968948A (en) * 2021-02-01 2021-06-15 中国第一汽车股份有限公司 Gateway controller design method, gateway controller and automobile
CN114239482A (en) * 2021-12-17 2022-03-25 西安紫光展锐科技有限公司 Chip integration method and device

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20090070728A1 (en) * 2007-09-12 2009-03-12 Solomon Research Llc IP cores in reconfigurable three dimensional integrated circuits
CN101419485A (en) * 2008-11-24 2009-04-29 电子科技大学 Function-variable portable computer mainboard
CN107562967A (en) * 2016-06-30 2018-01-09 哈尔滨卓晋科技有限公司 A kind of development approach of SoC Hardware/Software Collaborative Designs
CN108509373A (en) * 2018-03-19 2018-09-07 复旦大学 A kind of total system analog platform towards SoC research and development of software
CN111832237A (en) * 2020-07-17 2020-10-27 北京昂瑞微电子技术有限公司 Intellectual property right verification method and system
CN112395228A (en) * 2021-01-20 2021-02-23 北京燧原智能科技有限公司 Protocol conversion bridge circuit, intellectual property core and system-on-chip
CN112968948A (en) * 2021-02-01 2021-06-15 中国第一汽车股份有限公司 Gateway controller design method, gateway controller and automobile
CN114239482A (en) * 2021-12-17 2022-03-25 西安紫光展锐科技有限公司 Chip integration method and device

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
王首浩 等: "基于ZYNQ7000的伺服控制平台设计", 《新器件新技术》 *
石梅林: "自定制IP核的开发及应用", 《科技资讯》 *

Also Published As

Publication number Publication date
CN113378508B (en) 2022-11-22

Similar Documents

Publication Publication Date Title
US10742889B2 (en) Image photographing method, image photographing apparatus, and terminal
TWI504276B (en) Image sensor for capturing a color image
CN102365860B (en) Producing full-color image using CFA image
RU2397542C2 (en) Method and device for creating images with high dynamic range from multiple exposures
KR102480600B1 (en) Method for low-light image quality enhancement of image processing devices and method of operating an image processing system for performing the method
US20060204124A1 (en) Image processing apparatus for correcting contrast of image
WO2017101451A1 (en) Imaging method, imaging device, and electronic device
CN105430359A (en) Imaging method, image sensor, imaging device and electronic device
CN108419022A (en) Control method, control device, computer readable storage medium and computer equipment
US8379977B2 (en) Method for removing color fringe in digital image
CN105578080B (en) Imaging method, imaging device and electronic device
CN107370917B (en) Control method, electronic device, and computer-readable storage medium
CN105578081B (en) Imaging method, imaging sensor, imaging device and electronic installation
CN110113519A (en) Camera module
CN114422766A (en) Image acquisition equipment
CN108833803A (en) Imaging method, device and electronic equipment
CN111861964B (en) Image processing method, device and storage medium
EP1530377A1 (en) Information terminal
JP2007184888A (en) Imaging apparatus, image processor, image processing method, and image processing program
CN113378508B (en) Intellectual property core of pipeline structure, customization method thereof and system on chip
US8289413B2 (en) Image processing apparatus, image processing method and program
KR20190051371A (en) Camera module including filter array of complementary colors and electronic device including the camera module
CN108600721A (en) A kind of method of color gamut mapping of color and equipment
CN115529448B (en) Image processing method and related device
CN100397907C (en) Bell pattern format based image processing method and apparatus

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant