CN113363135A - Coating processing method for chip - Google Patents

Coating processing method for chip Download PDF

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Publication number
CN113363135A
CN113363135A CN202110527923.2A CN202110527923A CN113363135A CN 113363135 A CN113363135 A CN 113363135A CN 202110527923 A CN202110527923 A CN 202110527923A CN 113363135 A CN113363135 A CN 113363135A
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chip
finished
semi
finished chip
gas
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胡超
遆好伟
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Shenzhen Jiaye Technology Co ltd
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Shenzhen Jiaye Technology Co ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02524Group 14 semiconducting materials
    • H01L21/02532Silicon, silicon germanium, germanium
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/02Pretreatment of the material to be coated
    • C23C16/0227Pretreatment of the material to be coated by cleaning or etching
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/22Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
    • C23C16/24Deposition of silicon only
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/4412Details relating to the exhausts, e.g. pumps, filters, scrubbers, particle traps
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/50Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating using electric discharges
    • C23C16/511Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating using electric discharges using microwave discharges
    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B25/00Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
    • C30B25/02Epitaxial-layer growth
    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/02Elements
    • C30B29/06Silicon
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02612Formation types
    • H01L21/02617Deposition types
    • H01L21/0262Reduction or decomposition of gaseous compounds, e.g. CVD
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02656Special treatments
    • H01L21/02664Aftertreatments

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  • Chemical & Material Sciences (AREA)
  • Engineering & Computer Science (AREA)
  • Organic Chemistry (AREA)
  • Materials Engineering (AREA)
  • Metallurgy (AREA)
  • General Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Physics & Mathematics (AREA)
  • Mechanical Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Plasma & Fusion (AREA)
  • Inorganic Chemistry (AREA)
  • Chemical Vapour Deposition (AREA)

Abstract

The invention provides a coating processing method for a chip, which comprises the following steps: s1, cleaning and degreasing the semi-finished chips; s2, placing the degreased semi-finished chip in a PECVD growth system for vacuumizing, forming a silicon atom deposition layer on the surface of the semi-finished chip, S3, processing the semi-finished chip with the silicon atom deposition layer plated on the surface into a finished chip, and performing the degreasing treatment in the S1 step on the finished chip; s4, placing the degreased finished chip in an ECR-PECVD growth system, and depositing and preparing a crystalline silicon film on the surface of the finished chip; according to the invention, the chip is subjected to film coating twice, so that the sealing performance of the packaging shell on the packaging of the integrated circuit board can be improved, the chip is prevented from being oxidized after being used for a long time, the antibacterial property of the chip can be improved after the chip which is placed in an external environment and can be contacted with a human body is subjected to film coating, the service life of the chip is ensured, and the use safety of the chip can be improved.

Description

Coating processing method for chip
Technical Field
The invention belongs to the technical field of chip processing, and particularly relates to a film coating processing method for a chip.
Background
Integrated Circuits (ICs), or microcircuits, microchips, and chips (chips) are one way to miniaturize circuits (including primarily semiconductor devices, also passive components, etc.) in electronics, and are typically fabricated on the surface of a semiconductor wafer. The integrated circuit manufactured on the surface of the semiconductor chip is also called a thin-film (thin-film) integrated circuit. Another type of thick-film (thick-film) hybrid integrated circuit (ic) is a miniaturized circuit formed by a separate semiconductor device and passive components integrated onto a substrate or circuit board.
In the manufacturing process or the using process of the existing chip, because the original chip packaging shell is easy to oxidize or scratch and damage, especially some chips placed in the external environment are easy to damage in the long-time using process, the service life of the equipment is invisibly reduced, and the traditional chip packaging shell is easy to bend or lead pins to fall off in the factory transportation process due to the lack of a necessary protection structure, so that the service life of the chip is further reduced.
Disclosure of Invention
The invention aims to provide a coating processing method for a chip, and aims to solve the problems that a traditional chip packaging shell is easy to oxidize or scratch and damage, particularly, chips placed in an external environment are easy to damage in a long-time use process, the service life of equipment is invisibly reduced, and the traditional chip packaging shell is easy to bend or pins fall off in a factory transportation process due to lack of a necessary protection structure.
In order to achieve the purpose, the invention provides the following technical scheme: a coating processing method for a chip comprises the following steps:
s1, cleaning and degreasing the semi-finished chips;
s2, placing the degreased semi-finished chip in a PECVD growth system for vacuumizing, exchanging nitrogen for multiple times, introducing silicon tetrafluoride gas, forming a silicon atom deposition layer on the surface of the semi-finished chip, and collecting the residual gas;
s3, processing the semi-finished chip with the silicon atom deposition layer plated on the surface into a finished chip, and carrying out degreasing treatment in the step S1 on the finished chip;
s4, placing the degreased finished chip in an ECR-PECVD growth system, vacuumizing, introducing silane highly diluted by high-purity argon as precursor gas, and depositing and preparing a crystalline silicon thin film on the surface of the finished chip in a low-temperature environment;
and S5, repeating the step S4, finally enabling the crystalline silicon thin film to reach the proper thickness, and collecting the residual gas in the same way.
In order to enable the semi-finished chip and the finished chip to be stably coated, the invention adopts a preferable scheme that: in the degreasing treatment process in the steps S1 and S3, the chip is heated and soaked at 40-50 ℃ for 10-15min by using a degreasing agent with the mass fraction of 4-5%, then the chip is cleaned by deionized water, and then the chip is dried by controlling the temperature of a drying oven at 50-60 ℃.
In order to plate the surface of the semi-finished chip with a silicon film, the invention adopts a preferable scheme that: in the step S2, after nitrogen gas replacement is used, the temperature in the PECVD growth system is raised to 120 ℃ for 110-.
In order to plate a crystalline silicon film on the surface of a finished chip, the invention is a preferable scheme that: after the step S4, generating high-energy electrons and low-energy ions by using electron cyclotron resonance plasma source, using a mixed gas of silane and argon as a reaction gas, and diluting silane with argon, wherein the volume ratio of silane to argon is 1:20, and the background vacuum degree of the deposition reaction chamber is 6 × 10-3Pa, using a finished chip with a silicon film protective layer as a deposition substrate, wherein the substrate temperature is 300 ℃, the flow ratio of reaction gas silane to argon is 5:35, and the microwave power is 550W respectively.
In order to make the finished chip have higher structural strength, the invention is a preferable scheme that: the thickness of the crystalline silicon film and the thickness of the silicon film are both larger than 15nm, and the film thickness on the surface of the chip is consistent.
Compared with the prior art, the invention has the beneficial effects that:
1) by performing film coating treatment on the semi-finished chip, a compact silicon film protective layer is formed on the integrated circuit board in the chip, so that better protection performance can be achieved for subsequent chip processing, and the yield of subsequent chip finished products is increased;
2) the secondary film coating treatment is carried out on the finished chip, so that a crystalline silicon film is formed on the surface of the finished chip, the chip packaging shell structure is further increased, and meanwhile, the pins of the chip are prevented from being broken or damaged in the transportation or installation process, meanwhile, the crystalline silicon film coated on the surface of the chip can also increase the sealing performance of the packaging shell on the packaging of the integrated circuit board, prevent the chip from being oxidized after being used for a long time, and can also increase the antibacterial property of the chip after the film coating treatment is carried out on the chips which are placed in an external environment and can be in contact with a human body, and the use safety of the chip can be increased while the service life of the chip is ensured;
3) the residual gas in the chip coating process is collected for the second time, so that the emission of waste gas can be reduced, and the collected residual gas can be recycled for the second time, so that the production cost of the chip coating by enterprises is reduced, and the environment is protected;
4) the secondary coating treatment is realized through accurate temperature control and accurate control of microwave power in the secondary coating process, so that the secondary coating is realized while the uniformity of the surface of the chip is ensured, the thickness of the coating can reach 15nm, and the protection requirement on the chip is met.
Drawings
The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description serve to explain the principles of the invention and not to limit the invention. In the drawings:
FIG. 1 is a flow chart of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Referring to fig. 1, the present invention provides the following technical solutions: a coating processing method for a chip comprises the following steps:
s1, cleaning and degreasing the semi-finished chips;
s2, placing the degreased semi-finished chip in a PECVD growth system for vacuumizing, exchanging nitrogen for multiple times, introducing silicon tetrafluoride gas, forming a silicon atom deposition layer on the surface of the semi-finished chip, and collecting the residual gas;
s3, processing the semi-finished chip with the silicon atom deposition layer plated on the surface into a finished chip, and carrying out degreasing treatment in the step S1 on the finished chip;
s4, placing the degreased finished chip in an ECR-PECVD growth system, vacuumizing, introducing silane highly diluted by high-purity argon as precursor gas, and depositing and preparing a crystalline silicon thin film on the surface of the finished chip in a low-temperature environment;
and S5, repeating the step S4, finally enabling the crystalline silicon thin film to reach the proper thickness, and collecting the residual gas in the same way.
In this embodiment: in the degreasing treatment process in the steps S1 and S3, the chip is heated and soaked at 40-50 ℃ for 10-15min by using a degreasing agent with the mass fraction of 4-5%, then the chip is cleaned by deionized water, and then the chip is dried by controlling the temperature of a drying oven at 50-60 ℃.
Specifically, the degreasing agent comprises the following components: 5% of potassium pyrophosphate, 13% of sodium carbonate, 6% of sodium hydroxide, 2% of sodium chloride, 5% of sodium gluconate, 11% of triethanolamine, 2% of nonylphenol polyoxyethylene ether and 1.5% of benzotriazole, diluting the degreasing agent when degreasing and cleaning the semi-finished chips and the finished chips, wherein the volume ratio of the degreasing agent to water is 1:10, then placing the semi-finished chips and the finished chips in the diluted degreasing agent, heating the semi-finished chips and the finished chips in a water bath heating box at a heating temperature of 45 ℃ for soaking for 13min, turning the chips properly during the soaking process to ensure the cleanness of the surfaces of the chips, then taking out the chips, cleaning the chips for at least 5 times by using deionized water to ensure that no degreasing agent remains on the surfaces of the chips, finally placing the cleaned chips in a drying box at a temperature of 55 ℃, drying the chips, and then, the chips are packed dustless to prepare for coating.
In this embodiment: in the step S2, after nitrogen gas replacement is used, the temperature in the PECVD growth system is raised to 120 ℃ for 110-.
Specifically, high-purity nitrogen is used as a transport carrier of silicon tetrafluoride, heating control is performed on a PECVD growth system, wherein the temperature is controlled at 115 ℃, the silicon tetrafluoride is continuously preheated for 1.5h, high-purity silicon tetrafluoride gas is introduced, the temperature is controlled at 315 ℃, the pressure is 1.0 x 104Pa, a silicon film is formed on a semi-finished chip by decomposed silicon tetrafluoride, the silicon film is maintained for 6h at 320 ℃, and finally a continuous silicon film protective layer is formed on the surface of the semi-finished chip, so that protection of the semi-finished chip is realized.
In this embodiment: after the step S4, generating high-energy electrons and low-energy ions by electron cyclotron resonance plasma source, using a mixed gas of silane and argon as a reaction gasDiluting silane with argon gas, wherein the volume ratio of silane to argon gas is 1:20, and the background vacuum degree of a deposition reaction chamber is 6 x 10-3Pa, using a finished chip with a silicon film protective layer as a deposition substrate, wherein the substrate temperature is 300 ℃, the flow ratio of reaction gas silane to argon is 5:35, and the microwave power is 550W respectively.
Specifically, when the ECR-PECVD is used for plating the microcrystalline silicon film on the surface of a finished chip, the volume ratio of silane to argon is 1:20, the silane to argon is used as reaction gas, the reaction can be prevented from being too violent by introducing the argon, and meanwhile, the flow ratio of the silane to the argon is 5:35, so that the flatness and the adhesiveness of a finally formed coating film can be effectively improved; in addition, in the process of a coating test, the applicant finds that the deposition rate of the film is gradually increased along with the increase of the microwave power, the deposition rate reaches the maximum when the power is 550w, and the rate is reduced on the contrary when the power is continuously increased; the grain size is larger when the microwave power is 500W; with the increase of the microwave power, the concentration of argon which has an etching effect on the film is gradually increased, and the Si-Si bonds which are weaker in combination in the film are etched, so that the crystallinity is improved.
In this embodiment: the thickness of the crystalline silicon film and the thickness of the silicon film are both larger than 15nm, and the film thickness on the surface of the chip is consistent.
Specifically, a scanning electron microscope with easily available raw materials and low manufacturing cost is adopted, and the scanning electron microscope is used for observing the microscopic forms of the distribution condition, the compactness and the like of the coating film formed on the surface of the chip by using a chemical vapor deposition process. The JSM-6460LV type scanning electron microscope manufactured by JEOL company of Japan is adopted to characterize the surface of the film, and finally, the thickness of the crystalline silicon film and the thickness of the silicon film are both observed to be more than 15 nm.
It should be added that: after the chip is coated with the film, the residual gas in the film coating treatment process is collected, so that the emission of waste gas can be reduced, the environment pollution is avoided, and the collected residual gas can be recycled for the second time.
Finally, it should be noted that: although the present invention has been described in detail with reference to the foregoing embodiments, it will be apparent to those skilled in the art that changes may be made in the embodiments and/or equivalents thereof without departing from the spirit and scope of the invention. Any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims (5)

1. A coating processing method for a chip is characterized by comprising the following steps: the method comprises the following steps:
s1, cleaning and degreasing the semi-finished chips;
s2, placing the degreased semi-finished chip in a PECVD growth system for vacuumizing, exchanging nitrogen for multiple times, introducing silicon tetrafluoride gas, forming a silicon atom deposition layer on the surface of the semi-finished chip, and collecting the residual gas;
s3, processing the semi-finished chip with the silicon atom deposition layer plated on the surface into a finished chip, and carrying out degreasing treatment in the step S1 on the finished chip;
s4, placing the degreased finished chip in an ECR-PECVD growth system, vacuumizing, introducing silane highly diluted by high-purity argon as precursor gas, and depositing and preparing a crystalline silicon thin film on the surface of the finished chip in a low-temperature environment;
and S5, repeating the step S4, finally enabling the crystalline silicon thin film to reach the proper thickness, and collecting the residual gas in the same way.
2. The plating processing method for chips according to claim 1, wherein: in the degreasing treatment process in the steps S1 and S3, the chip is heated and soaked at 40-50 ℃ for 10-15min by using a degreasing agent with the mass fraction of 4-5%, then the chip is cleaned by deionized water, and then the chip is dried by controlling the temperature of a drying oven at 50-60 ℃.
3. The plating processing method for chips according to claim 1, wherein: in the step S2, after nitrogen gas replacement is used, the temperature in the PECVD growth system is raised to 120 ℃ for 110-.
4. The plating processing method for chips according to claim 1, wherein: after the step S4, generating high-energy electrons and low-energy ions by using electron cyclotron resonance plasma source, using a mixed gas of silane and argon as a reaction gas, and diluting silane with argon, wherein the volume ratio of silane to argon is 1:20, and the background vacuum degree of the deposition reaction chamber is 6 × 10-3Pa, using a finished chip with a silicon film protective layer as a deposition substrate, wherein the substrate temperature is 300 ℃, the flow ratio of reaction gas silane to argon is 5:35, and the microwave power is 550W respectively.
5. The plating processing method for chips according to claim 1, wherein: the thickness of the crystalline silicon film and the thickness of the silicon film are both larger than 15nm, and the film thickness on the surface of the chip is consistent.
CN202110527923.2A 2021-05-14 2021-05-14 Coating processing method for chip Pending CN113363135A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114908336A (en) * 2022-01-26 2022-08-16 贵州理工学院 Preparation method of tubular PECVD enhanced vapor deposition microcrystalline silicon

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US20070042521A1 (en) * 2005-08-16 2007-02-22 Robert Bosch Gmbh Microelectromechanical devices and fabrication methods
US20080064137A1 (en) * 2006-09-07 2008-03-13 Analog Devices, Inc. Method of protecting integrated circuits
CN208141433U (en) * 2018-05-22 2018-11-23 临沂优优木业股份有限公司 A kind of radio frequency chip
CN109755209A (en) * 2019-01-11 2019-05-14 常州星海电子股份有限公司 A kind of highly reliable photoresist glassivation chip and its processing method
CN110620139A (en) * 2019-09-03 2019-12-27 常山弘远电子有限公司 AC-DC high-voltage freewheeling diode chip structure
WO2020024277A1 (en) * 2018-08-03 2020-02-06 深圳市为通博科技有限责任公司 Chip packaging method

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070042521A1 (en) * 2005-08-16 2007-02-22 Robert Bosch Gmbh Microelectromechanical devices and fabrication methods
US20080064137A1 (en) * 2006-09-07 2008-03-13 Analog Devices, Inc. Method of protecting integrated circuits
CN208141433U (en) * 2018-05-22 2018-11-23 临沂优优木业股份有限公司 A kind of radio frequency chip
WO2020024277A1 (en) * 2018-08-03 2020-02-06 深圳市为通博科技有限责任公司 Chip packaging method
CN109755209A (en) * 2019-01-11 2019-05-14 常州星海电子股份有限公司 A kind of highly reliable photoresist glassivation chip and its processing method
CN110620139A (en) * 2019-09-03 2019-12-27 常山弘远电子有限公司 AC-DC high-voltage freewheeling diode chip structure

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114908336A (en) * 2022-01-26 2022-08-16 贵州理工学院 Preparation method of tubular PECVD enhanced vapor deposition microcrystalline silicon

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Application publication date: 20210907