CN113343245A - Chip secure starting method, secure chip and receiver thereof - Google Patents
Chip secure starting method, secure chip and receiver thereof Download PDFInfo
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- CN113343245A CN113343245A CN202110584436.XA CN202110584436A CN113343245A CN 113343245 A CN113343245 A CN 113343245A CN 202110584436 A CN202110584436 A CN 202110584436A CN 113343245 A CN113343245 A CN 113343245A
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F21/50—Monitoring users, programs or devices to maintain the integrity of platforms, e.g. of processors, firmware or operating systems
- G06F21/57—Certifying or maintaining trusted computer platforms, e.g. secure boots or power-downs, version controls, system software checks, secure updates or assessing vulnerabilities
- G06F21/575—Secure boot
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F21/60—Protecting data
- G06F21/602—Providing cryptographic facilities or services
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F8/00—Arrangements for software engineering
- G06F8/60—Software deployment
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Abstract
The invention discloses a chip safe starting method, which comprises the steps of executing a bottom layer initialization code; acquiring a chip starting mode and initializing; reading eFuse data, judging and recording ID; obtaining an authorization code ciphertext, decryption and verification from a storage medium; comparing the obtained chip ID; loading a firmware file header from a storage medium and verifying; loading firmware encrypted data, checking and extracting a chip ID; comparing the chip ID; setting a chip Rom; and executing the firmware of the chip to finish the starting. The invention also discloses a chip started by adopting the chip safe starting method, and a receiver comprising the chip safe starting method and the safe chip. The invention ensures the reliability and safety of the chip starting process by innovating the starting process of the chip, and is suitable for any chip and occasion with strict safety requirements on starting.
Description
Technical Field
The invention belongs to the field of chip design, and particularly relates to a chip safe starting method, a safe chip and a receiver thereof.
Background
With the development of economic technology and the improvement of living standard of people, the chip is widely applied to the production and the life of people, and brings endless convenience to the production and the life of people.
The execution process of any chip is summarized, and the starting is the premise for guaranteeing the subsequent work of the chip. If the boot loader software of the chip is modified, a series of security problems can result. For this reason, a secure way needs to be taken to start the chip.
At present, a commonly used chip secure boot scheme generally stores a plurality of secure keys in an eFuse of a chip; while a secure RSA public key requires 2048 bits, multiple eFuses are combined in the chip (usually, the eFuses occupy bits in the range of 256 to 2048), which significantly increases the cost of the chip. In addition, the chip ROM stores the code for loading the secondary boot, and the code is visible in JTAG mode, which undoubtedly exposes the security key in the eFuse, so that the chip has a security risk.
Disclosure of Invention
One of the objectives of the present invention is to provide a secure chip starting method with high reliability, good security and wide application range.
The invention also aims to provide a security chip comprising the chip security starting method.
The invention also aims to provide a receiver comprising the chip security starting method and the security chip.
The invention provides a safe chip starting method, which comprises the following steps:
s1, executing a bottom layer initialization code of a chip;
s2, acquiring a starting mode of the chip and initializing each peripheral driver;
s3, reading eFuse data of the chip, judging and recording the ID of the chip;
s4, obtaining an authorization code ciphertext from a storage medium of the chip, and decrypting and checking the authorization code ciphertext;
s5, comparing the chip ID obtained from the authorization code with the chip ID obtained in the step S3;
s6, loading a firmware file header from a storage medium of the chip and checking;
s7, loading firmware encrypted data from the chip according to the file header information, carrying out data correctness verification after decryption, and extracting a chip ID corresponding to the firmware;
s8, comparing the chip ID obtained in the step S7 with the chip ID obtained from the authorization code;
s9, configuring a chip Rom according to a safety model of the chip eFuse;
and S10, executing firmware of the chip, and finishing starting.
The chip safe starting method also comprises the following steps: after the firmware is started, the function list is enabled according to the authorization code.
The chip safe starting method also comprises the following steps: and after the firmware is started, judging the time in the authorization code according to the time service function and executing corresponding action.
The step S1 of executing the bottom initialization code of the chip specifically includes executing Cache/TLB initialization, setting the running mode and memory allocation of the CPU, and the like.
Initializing each peripheral driver in step S2 specifically includes initializing a serial port, a Timer, a decryption controller, and a start medium.
Reading chip eFuse data, judging and recording chip ID in step S3 includes the following steps:
A. reading chip eFuse data;
B. determining whether the eFuse data is valid:
if valid, enable secure configuration in the eFuse data;
if the chip is invalid, the safe start fails, and the chip enters an upgrading mode.
The obtaining of the authorization code ciphertext from the storage medium of the chip, the decrypting and the verifying in step S4 specifically includes the following steps:
a. obtaining an authorization code ciphertext from a storage medium and loading the authorization code ciphertext into an internal Ram;
b. decrypting the authorization code using a default RSA publish:
if the decryption is successful, performing subsequent starting steps;
if decryption fails, the secure boot fails, and an upgrade mode of the chip is entered;
c. and (3) carrying out plaintext verification on the decrypted authorization code:
if the verification is successful, performing a subsequent starting step;
and if the verification fails, the safe start fails, and the upgrading mode of the chip is entered.
The upgrading model specifically comprises that the PC terminal downloads an upgrading program to the internal memory of the chip through a USB/SPI/I2C/UART and other transmission interfaces, and skips to execute the upgrading program; the upgrading program writes the file transmitted from the PC terminal to the storage medium of the chip; the storage medium comprises NorFlash/NandFlash/SD/MMC/eMMC and the like.
Comparing the chip ID obtained in the authorization code in step S5 with the chip ID obtained in step S3, specifically includes the following steps:
comparing the chip ID obtained in the authorization code with the chip ID obtained in step S3:
if the comparison is consistent, performing the subsequent starting step;
if the comparison is inconsistent, the safe start fails, and the upgrading mode of the chip is entered.
The loading and verifying of the firmware file header from the storage medium of the chip in step S6 specifically includes the following steps:
(1) loading a firmware file header from a storage medium to an internal Ram;
(2) and for the loaded firmware file header, whether CRC check is effective is adopted:
if the verification is passed, carrying out the subsequent starting step;
and if the verification fails, the safe start fails, and the chip enters an upgrading mode.
Step S7, where the firmware encrypted data is loaded from the chip according to the header information, the data correctness is verified after decryption, and the chip ID corresponding to the firmware is extracted, the method specifically includes the following steps:
1) according to the authorization code obtained after the verification in step S4, it is determined whether the firmware data is a plaintext:
if the firmware data is plaintext, performing CRC check directly:
if the CRC passes, performing subsequent starting steps;
if the CRC fails, the safe start fails, and the upgrading mode of the chip is entered;
if the firmware data is a ciphertext, performing the subsequent decryption process of the steps 2) to 6);
2) obtaining a ciphertext of the AESKEY from the firmware file header;
3) obtaining RSA keyindex according to the authorization code;
4) carrying out RSA decryption on the obtained AES KEY;
5) and performing AES decryption on the firmware data area by using the decrypted AES key:
if the decryption is successful, performing CRC check:
if the CRC passes, performing subsequent starting steps;
if the CRC fails, the safe start fails, and the upgrading mode of the chip is entered;
if the decryption fails, the safe start fails, and the upgrading mode of the chip is entered.
6) The chip ID is extracted from the firmware data.
Comparing the chip ID obtained in step S7 with the chip ID obtained in the authorization code in step S8, specifically including the following steps:
comparing the chip ID obtained in the step S7 with the chip ID obtained from the authorization code:
if the comparison is consistent, performing the subsequent starting step;
if the comparison is inconsistent, the safe start fails, and the upgrading mode of the chip is entered.
The invention also discloses a safety chip which is started by adopting the chip safety starting method.
The invention also discloses a receiver which comprises the safety chip, and the safety chip is started by adopting the chip safety starting method.
The chip safe starting method, the safe chip and the receiver thereof ensure the reliability and the safety of the chip starting process by innovating the starting process of the chip, and are suitable for any chip and occasion with strict safety requirements on starting.
Drawings
FIG. 1 is a schematic process flow diagram of the process of the present invention.
Detailed Description
The method is suitable for chips with the following specifications:
CPU is not limited to ARM/MIPS/etc series;
2. the bus is not limited to Axi/Ahb/Apb and the like, bus interconnection related IP and the like;
3. the decryption controllers such as RSA/AES/DES are supported, and the decryption controllers can be selected;
4. if the chip has the starting performance requirement, recommending to support hard decryption, otherwise, realizing a software decryption algorithm by Rom;
the eFuse controller can read and write eFuse peripherals of the chip;
6. the storage medium controller is not limited to QSPI NorFlash/NandFlash/SD/eMMC and the like;
7, a UART controller, which mainly has the function of information printing;
timer controller, the main function is timing function;
the IROM memory chip is used for solidifying codes, and the size of the IROM memory chip is customized according to application requirements;
the IRAM stores execution codes or data and the like, and the size is customized according to application requirements;
the system control modules such as PLL/CLK/Reset/IOMUX and the like are mainly used for clock control/module Reset/pin multiplexing and the like;
12. a burn-in controller module, not limited to USB otg/USB Device/UART/SD/SPI/I2C, etc.;
13. other application specific modules, the function being application dependent; for example, a navigation baseband chip needs to implement logic function units such as RDSS/RNSS;
14. having a security module enabling function;
it can be seen that most of the chips on the market today meet the above requirements, and therefore the method of the present invention has proved to be very useful.
Secondly, the method of the invention is defined as follows:
1. exporting a plurality of pairs of publickeys and privatekeys of RSA by using a hardware encryption tool, wherein the publickeys are stored in a chip ROM, and the privatekeys are stored in a secure server;
such as: RSA 2048 is used, 8 public keys are stored in a chip Rom, and public key7 is set as a default public key;
2. the storage medium has at least two files, an authorization code file and a firmware file: wherein the authorization code file must be ciphertext, and the firmware file may be plaintext or ciphertext (determined by the authorization code);
such as: the format of the authorization code file is shown in table 1, the format of the firmware file is shown in table 2, and the format of the firmware file header is shown in table 3;
TABLE 1 authorization code File Format schematic Table
| Item | Occupying byte size | Definition of | Description of the invention |
| Magic | 4 | 0xacfd0def | Type (B) |
| Version | 4 | Version(s) | |
| ChipID | 4 | Chip ID | |
| SerialNum | 4 | Card serial number | |
| Feature0～5 | 24 | Firmware function definition | |
| Start_Date | 4 | Product registration start date | |
| End_Date | 4 | End date of use of product | |
| Flags | 4 | And (4) safety setting: whether the firmware is encrypted, rsakeyindex, etc | |
| CRC32 | 4 | Data verification |
TABLE 2 firmware File Format schematic Table
Table 3 firmware header format schematic table
The authorization code is encrypted and decrypted by RSA 2048, the encryption is performed by Privatekey7, and the encryption is performed by Publickey 7;
the Data area in the firmware file can be plaintext or ciphertext, and whether encryption or decryption is determined by Flags in the authorization code;
encrypting and decrypting a Data area of the firmware by using AES 128; AESkey is encrypted by RSA 2048, and the encrypted and decrypted indexes (the range is 0-7) are specified by Flags in the authorization code;
the Aesk ciphertext is stored in a Header of the firmware file;
the data definition in the eFuse has at least two fields of chip ID and safety configuration Flags, and the occupied bit is less than 256;
4. before reading the data of the storage medium, whether the JTAG function needs to be invalidated or not is determined according to the eFuse safety configuration;
5. before the jump firmware is executed, determining whether Bootrom is set to be invisible according to the setting of the eFuse;
such as: setting a register, informing a chip that the data read of the logical enable Rom address are all 0, and making the real instruction invisible;
6. before loading the authorization code, whether the Jtag function is enabled or not is required according to eFuse setting;
7. failure of decryption of the authorization code or failure of decryption of the firmware can cause failure of startup;
8. the authorization code is decrypted successfully, and if the authorization code is inconsistent with the chip ID in the eFuse, the starting is failed;
9. the firmware file is decrypted successfully, the data is verified successfully, and if the firmware file is inconsistent with the chip ID in the eFuse, the starting is failed;
10. after the firmware is successfully started, the time in the authorization code is verified to be invalid, and the start is failed (optional);
12. after the firmware boot is successful, the function (optional) is enabled according to the authorization code.
The above definitions indicate that:
firstly: the firmware file taken by the user is a cipher text, and the firmware is to be decrypted by firstly taking the public key of RSA; but the keys store Bootrom read-only codes, and the settings cannot be seen, so that the firmware files are ensured to be safe;
then, the chip can write different chip IDs according to the categories; thus, the chip ID in the firmware and the information stored by the eFuse are matched, and the firmware can be executed; the firmware cannot be copied for other purposes maliciously;
finally, even if the firmware fails to be started, the Jtag is in an invalid state; the user cannot read Rom information including Public key and the like in the debug state.
FIG. 1 is a schematic flow chart of the method of the present invention: the invention provides a safe chip starting method, which comprises the following steps:
s1, executing a bottom layer initialization code of a chip; the method specifically comprises the steps of initializing a Cache/TLB, setting a running mode of a CPU, allocating memory and the like; then jumping to a Main function;
s2, acquiring a starting mode of the chip and initializing each peripheral driver; the method specifically comprises the steps of initializing a serial port, a Timer, a decryption controller, a starting medium (QSPI/Nand/SD/eMMC and the like) and the like;
s3, reading eFuse data of the chip, judging and recording the ID of the chip; the method specifically comprises the following steps:
A. reading chip eFuse data;
B. determining whether the eFuse data is valid:
if valid, enable secure configuration in the eFuse data; for example, disabling Jtag functionality, etc.;
if the chip is invalid, the safe start fails, and the chip enters an upgrading mode;
s4, obtaining an authorization code ciphertext from a storage medium of the chip, and decrypting and checking the authorization code ciphertext; the method specifically comprises the following steps:
a. obtaining an authorization code ciphertext from a storage medium (generally from a storage medium fixed address 0), and loading the authorization code ciphertext into an internal Ram;
b. decrypting the authorization code using a default RSA publish:
if the decryption is successful, performing subsequent starting steps;
if decryption fails, the secure boot fails, and an upgrade mode of the chip is entered;
c. and (3) carrying out plaintext verification on the decrypted authorization code:
if the verification is successful, performing a subsequent starting step;
if the verification fails, the safe start fails, and the chip enters an upgrading mode;
the upgrading model specifically comprises that the PC terminal downloads an upgrading program to the internal memory of the chip through a USB/SPI/I2C/UART and other transmission interfaces, and skips to execute the upgrading program; the upgrading program writes the file transmitted from the PC terminal to the storage medium of the chip; the storage medium comprises NorFlash/NandFlash/SD/MMC/eMMC and the like;
s5, comparing the chip ID obtained from the authorization code with the chip ID obtained in the step S3; the method specifically comprises the following steps:
comparing the chip ID obtained in the authorization code with the chip ID obtained in step S3:
if the comparison is consistent, performing the subsequent starting step;
if the comparison is inconsistent, the safe start fails, and the upgrading mode of the chip is entered;
s6, loading a firmware file header from a storage medium of the chip and checking; the method specifically comprises the following steps:
(1) loading a firmware file header from a storage medium (generally from a storage medium fixed address 1) to an internal Ram;
(2) and for the loaded firmware file header, whether CRC check is effective is adopted:
if the verification is passed, carrying out the subsequent starting step;
if the verification fails, the safe start fails, and the upgrading mode of the chip is entered
S7, loading firmware encrypted data from the chip according to the file header information, carrying out data correctness verification after decryption, and extracting a chip ID corresponding to the firmware; the method specifically comprises the following steps:
1) according to the authorization code obtained after the verification in step S4, it is determined whether the firmware file header is a plaintext:
if the firmware file header is plaintext, directly performing CRC check:
if the CRC passes, performing subsequent starting steps;
if the CRC fails, the safe start fails, and the upgrading mode of the chip is entered;
if the firmware file header is a cipher text, carrying out the subsequent decryption process of the steps 2) to 6);
2) obtaining a ciphertext of the AESKEY from the firmware file header;
3) obtaining RSA keyindex according to the authorization code;
4) carrying out RSA decryption on the obtained AES KEY;
5) and performing AES decryption on the firmware data area by using the decrypted AES key:
if the decryption is successful, performing CRC check:
if the CRC passes, performing subsequent starting steps;
if the CRC fails, the safe start fails, and the upgrading mode of the chip is entered;
if decryption fails, the secure boot fails, and an upgrade mode of the chip is entered;
6) extracting chip ID from firmware data
S8, comparing the chip ID obtained in the step S7 with the chip ID obtained from the authorization code; the method specifically comprises the following steps:
comparing the chip ID obtained in the step S7 with the chip ID obtained from the authorization code:
if the comparison is consistent, performing the subsequent starting step;
if the comparison is inconsistent, the safe start fails, and the upgrading mode of the chip is entered;
s9, configuring a chip Rom according to a safety model of the chip eFuse;
s10, executing firmware of the chip, and finishing starting;
s11, enabling the function list according to the authorization code after the firmware is started;
and S12, after the firmware is started, judging the time in the authorization code according to the time service function and executing a corresponding action.
Claims (10)
1. A chip safe starting method comprises the following steps:
s1, executing a bottom layer initialization code of a chip;
s2, acquiring a starting mode of the chip and initializing each peripheral driver;
s3, reading eFuse data of the chip, judging and recording the ID of the chip;
s4, obtaining an authorization code ciphertext from a storage medium of the chip, and decrypting and checking the authorization code ciphertext;
s5, comparing the chip ID obtained from the authorization code with the chip ID obtained in the step S3;
s6, loading a firmware file header from a storage medium of the chip and checking;
s7, loading firmware encrypted data from the chip according to the file header information, carrying out data correctness verification after decryption, and extracting a chip ID corresponding to the firmware;
s8, comparing the chip ID obtained in the step S7 with the chip ID obtained from the authorization code;
s9, configuring a chip Rom according to a safety model of the chip eFuse;
and S10, executing firmware of the chip, and finishing starting.
2. The secure chip starting method according to claim 1, wherein the step S3 of reading chip eFuse data, determining and recording chip ID specifically includes the following steps:
A. reading chip eFuse data;
B. determining whether the eFuse data is valid:
if valid, enable secure configuration in the eFuse data;
if the chip is invalid, the safe start fails, and the chip enters an upgrading mode.
3. The chip secure boot method according to claim 1 or 2, wherein the step S4 of obtaining the authorization code ciphertext from the storage medium of the chip, decrypting and verifying specifically includes the following steps:
a. obtaining an authorization code ciphertext from a storage medium and loading the authorization code ciphertext into an internal Ram;
b. decrypting the authorization code using a default RSA publish:
if the decryption is successful, performing subsequent starting steps;
if decryption fails, the secure boot fails, and an upgrade mode of the chip is entered;
c. and (3) carrying out plaintext verification on the decrypted authorization code:
if the verification is successful, performing a subsequent starting step;
and if the verification fails, the safe start fails, and the upgrading mode of the chip is entered.
4. The chip secure boot method according to claim 3, wherein the upgrade model specifically includes that the PC downloads an upgrade program to a memory inside the chip through a transmission interface, and skips to execute the upgrade program; the upgrading program writes the subsequent file transmitted from the PC end to the storage medium of the chip; the transmission interface comprises USB, SPI, I2C and UART; the storage medium comprises NorFlash, NandFlash, SD, MMC and eMMC.
5. The chip secure boot method according to claim 4, wherein the comparing the chip ID obtained in the authorization code in step S5 with the chip ID obtained in step S3 specifically includes the following steps:
comparing the chip ID obtained in the authorization code with the chip ID obtained in step S3:
if the comparison is consistent, performing the subsequent starting step;
if the comparison is inconsistent, the safe start fails, and the upgrading mode of the chip is entered.
6. The secure chip starting method according to claim 5, wherein the step S6 of loading and verifying the firmware file header from the storage medium of the chip specifically comprises the following steps:
(1) loading a firmware file header from a storage medium to an internal Ram;
(2) and for the loaded firmware file header, whether CRC check is effective is adopted:
if the verification is passed, carrying out the subsequent starting step;
and if the verification fails, the safe start fails, and the chip enters an upgrading mode.
7. The secure chip starting method according to claim 6, wherein the step S7 is to load the firmware encrypted data from the chip according to the header information, perform data correctness verification after decryption, and extract the chip ID corresponding to the firmware, and specifically includes the following steps:
1) according to the authorization code obtained after the verification in step S4, it is determined whether the firmware data is a plaintext:
if the firmware data is plaintext, performing CRC check directly:
if the CRC passes, performing subsequent starting steps;
if the CRC fails, the safe start fails, and the upgrading mode of the chip is entered;
if the firmware data is a ciphertext, performing the subsequent decryption process of the steps 2) to 6);
2) obtaining a ciphertext of the AESKEY from the firmware file header;
3) obtaining RSA keyindex according to the authorization code;
4) carrying out RSA decryption on the obtained AES KEY;
5) and performing AES decryption on the firmware data area by using the decrypted AES key:
if the decryption is successful, performing CRC check:
if the CRC passes, performing subsequent starting steps;
if the CRC fails, the safe start fails, and the upgrading mode of the chip is entered;
if decryption fails, the safe start fails, and an upgrading mode of the chip is entered;
6) the chip ID is extracted from the firmware data.
8. The method for securely starting a chip according to claim 7, wherein the step S8 of comparing the chip ID obtained in the step S7 with the chip ID obtained in the authorization code includes the following steps:
comparing the chip ID obtained in the step S7 with the chip ID obtained from the authorization code:
if the comparison is consistent, performing the subsequent starting step;
if the comparison is inconsistent, the safe start fails, and the upgrading mode of the chip is entered.
9. A security chip, characterized in that the chip security starting method of any one of claims 1 to 8 is used for starting.
10. A receiver, characterized by comprising the secure chip of claim 9, wherein the secure chip is activated by the secure chip activation method of any one of claims 1 to 8.
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| CN109150834A (en) * | 2018-07-20 | 2019-01-04 | 武汉虹信通信技术有限责任公司 | A kind of embedded device license authorization management method |
| US10997297B1 (en) * | 2019-12-06 | 2021-05-04 | Western Digital Technologies, Inc. | Validating firmware for data storage devices |
| CN111611602A (en) * | 2020-05-07 | 2020-09-01 | 山东华芯半导体有限公司 | Safe and controllable mass production method based on state secret chip |
| CN112231709A (en) * | 2020-10-15 | 2021-01-15 | 中国电子科技集团公司第三十八研究所 | System safety design method with remote upgrading function |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN115017517A (en) * | 2022-06-07 | 2022-09-06 | Oppo广东移动通信有限公司 | Chip and checking method |
| CN116028992A (en) * | 2023-02-23 | 2023-04-28 | 广东高云半导体科技股份有限公司 | SoC chip and method for realizing data security detection thereof |
| CN116028992B (en) * | 2023-02-23 | 2024-06-07 | 广东高云半导体科技股份有限公司 | SoC chip and method for realizing data security detection thereof |
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