CN113325919B - Clock compensation method and device - Google Patents
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Abstract
The application provides a clock compensation method and device, comprising the following steps: acquiring a clock signal output by the electronic equipment at the current sampling moment; inputting the moment identification of the current sampling moment into a trained frequency deviation prediction model so as to output a frequency deviation prediction value corresponding to the current sampling moment by the frequency deviation prediction model; the frequency offset prediction model is obtained by training frequency offset samples; the frequency offset sample is constructed by at least one clock difference actual value corresponding to historical sampling time before the standard clock is lost; determining a clock difference predicted value corresponding to the current sampling time based on the frequency deviation predicted value corresponding to the current sampling time, the recorded frequency deviation predicted value corresponding to each sampling time from the time when the standard clock is lost to the current sampling time and a target clock difference accumulated value obtained when the prediction model training is completed; and compensating the clock signal output by the electronic equipment at the current sampling time by adopting the clock difference predicted value corresponding to the current sampling time, thereby realizing clock compensation.
Description
Technical Field
The present disclosure relates to the field of communications, and in particular, to a clock compensation method and apparatus.
Background
The clock signal sent by the electronic device may change with time, resulting in inaccurate clock of the electronic device. In the prior art, an electronic device typically receives a standard clock and then uses the standard clock to correct the clock of the electronic device.
However, when the standard time Zhong Diu is lost, in order to keep the clock difference between the clock signal output by the electronic device and the standard clock signal within a preset interval, the clock signal output by the electronic device needs to be compensated. Therefore, how to compensate the clock signal output by the electronic device is a problem to be solved.
Disclosure of Invention
In view of this, the present application provides a clock compensation method and apparatus for compensating a clock signal output by an electronic device after a standard clock of the electronic device is lost, so that a clock difference between the clock signal output by the electronic device and the standard clock signal is within a preset error range.
Specifically, the application is realized by the following technical scheme:
according to a first aspect of the present application, there is provided a clock compensation method applied to an electronic device, the electronic device after losing a standard clock and before retrieving the standard clock, the method comprising:
acquiring a clock signal output by the electronic equipment at the current sampling moment;
inputting a time mark of the current sampling time into a trained frequency deviation prediction model so as to output a frequency deviation prediction value corresponding to the current sampling time by the frequency deviation prediction model; the frequency offset prediction model is obtained by training frequency offset samples; the frequency offset sample is constructed by a clock difference actual value corresponding to at least one historical sampling moment before the standard clock is lost, and the clock difference actual value is the phase difference between a clock signal output by the electronic equipment and the standard clock signal;
determining a clock difference predicted value corresponding to the current sampling time based on the frequency difference predicted value corresponding to the current sampling time, the recorded frequency difference predicted value corresponding to each sampling time from the time when the standard clock is lost to the current sampling time and a target clock difference accumulated value obtained when training of the frequency difference predicted model is completed;
and compensating the clock signal output by the electronic equipment at the current sampling time by adopting the clock difference predicted value corresponding to the current sampling time.
Optionally, training the frequency offset prediction model and the target clock difference cumulative value through a preset recursive algorithm:
the following iteration steps are circularly executed until preset iteration conditions are met;
determining a gain vector of the iteration based on the covariance matrix obtained by the previous iteration and the moment identification of the sampling moment corresponding to the iteration;
determining the model parameters of the iteration based on the model parameters of the last iteration, the actual clock difference value corresponding to the iteration and the gain vector obtained by the iteration;
and determining the clock difference accumulated value corresponding to the current iteration based on the model parameters of the current iteration and the clock difference accumulated value obtained by the last iteration.
Optionally, after the determining the gain vector of the current iteration, the method further includes:
and determining and recording the covariance matrix of the current iteration based on the gain vector obtained by the current iteration and the covariance matrix obtained by the last iteration, so as to determine the gain vector of the next iteration through the covariance matrix of the current iteration when the next iteration is performed.
Optionally, the initial value of the model parameter of the frequency offset prediction model and the initial value of the covariance matrix are calculated by a frequency offset sample formed by the time marks of two historical sampling times and the actual clock difference value of the two historical sampling times.
Optionally, the determining the clock difference accumulated value corresponding to the current iteration based on the model parameter of the current iteration and the clock difference accumulated value obtained by the last iteration includes:
determining the accumulated clock difference correction quantity of the current iteration based on the model parameters of the current iteration, the model parameters of the last iteration and the time mark of the historical sampling time corresponding to the current iteration;
and determining the clock difference accumulated value of the current iteration based on the clock difference accumulated value obtained by the last iteration, the model parameter obtained by the current iteration and the accumulated clock difference correction quantity obtained by the current iteration.
Optionally, the preset recursive algorithm is an RLS algorithm.
According to a second aspect of the present application, there is provided a clock compensation device, the device being applied to an electronic apparatus, the electronic apparatus after loss of a standard clock until the standard clock is recovered, the device comprising:
the acquisition unit is used for acquiring a clock signal output by the electronic equipment at the current sampling moment;
the prediction unit is used for inputting the time mark of the current sampling time into the trained frequency deviation prediction model so as to output a frequency deviation prediction value corresponding to the current sampling time by the frequency deviation prediction model; the frequency offset prediction model is obtained by training frequency offset samples; the frequency offset sample is constructed by a clock difference actual value corresponding to at least one historical sampling moment before the standard clock is lost, and the clock difference actual value is the phase difference between a clock signal output by the electronic equipment and the standard clock signal;
the determining unit is used for determining a clock difference predicted value corresponding to the current sampling time based on the frequency difference predicted value corresponding to the current sampling time, the recorded frequency difference predicted value corresponding to each sampling time from the time when the standard clock is lost to the time when the frequency difference predicted model is trained, and a target clock difference accumulated value obtained when the frequency difference predicted model is trained;
and the compensation unit is used for compensating the clock signal output by the electronic equipment at the current sampling time by adopting the clock difference predicted value corresponding to the current sampling time.
Optionally, the device further comprises a training unit;
the training unit is used for circularly executing the following iteration steps until a preset iteration condition is met when training the frequency deviation prediction model and the target clock difference accumulated value through a preset recursion algorithm; determining a gain vector of the iteration based on the covariance matrix obtained by the previous iteration and the moment identification of the sampling moment corresponding to the iteration; determining the model parameters of the iteration based on the model parameters of the last iteration, the actual clock difference value corresponding to the iteration and the gain vector obtained by the iteration; and determining the clock difference accumulated value corresponding to the current iteration based on the model parameters of the current iteration and the clock difference accumulated value obtained by the last iteration.
Optionally, the training unit is further configured to determine, after the gain vector of the current iteration is determined, the covariance matrix of the current iteration based on the gain vector obtained by the current iteration and the covariance matrix obtained by the last iteration, and record the covariance matrix of the current iteration, so as to determine the gain vector of the next iteration through the covariance matrix of the current iteration when the next iteration is performed.
Optionally, the initial value of the model parameter of the frequency offset prediction model and the initial value of the covariance matrix are calculated by a frequency offset sample formed by the time marks of two historical sampling times and the actual clock difference value of the two historical sampling times.
Optionally, the training unit is configured to determine, when determining the clock difference accumulated value corresponding to the current iteration based on the model parameter of the current iteration and the clock difference accumulated value obtained by the last iteration, an accumulated clock difference correction amount of the current iteration based on the model parameter of the current iteration, the model parameter of the last iteration and a time identifier of a historical sampling time corresponding to the current iteration; and determining the clock difference accumulated value of the current iteration based on the clock difference accumulated value obtained by the last iteration, the model parameter obtained by the current iteration and the accumulated clock difference correction quantity obtained by the current iteration.
Optionally, the preset recursive algorithm is an RLS algorithm.
As can be seen from the above description, the present application converts the clock error into the frequency offset, and finds the change rule of the frequency offset along with time by training the frequency offset prediction model, so that after the standard clock is lost, the present application can predict the frequency offset by using the frequency offset prediction model, convert the predicted frequency offset into the predicted clock error, and compensate the clock signal output by the present electronic device after the standard clock is lost by the predicted clock error, thereby realizing clock compensation.
In addition, compared with other clock compensation modes (such as modes of compensating clocks through a Kalman filtering algorithm, etc.), the clock compensation mode for performing clock deviation prediction based on frequency deviation is lower in complexity, less in calculation amount and less in system resource consumption during clock compensation.
Drawings
FIG. 1 is a flow chart of a method of clock compensation shown in an exemplary embodiment of the present application;
FIG. 2 is a hardware block diagram of an electronic device according to an exemplary embodiment of the present application;
fig. 3 is a block diagram of a clock compensation device according to an exemplary embodiment of the present application.
Detailed Description
Reference will now be made in detail to exemplary embodiments, examples of which are illustrated in the accompanying drawings. When the following description refers to the accompanying drawings, the same numbers in different drawings refer to the same or similar elements, unless otherwise indicated. The implementations described in the following exemplary examples are not representative of all implementations consistent with the present application. Rather, they are merely examples of apparatus and methods consistent with some aspects of the present application as detailed in the accompanying claims.
The terminology used in the present application is for the purpose of describing particular embodiments only and is not intended to be limiting of the present application. As used in this application and the appended claims, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It should also be understood that the term "and/or" as used herein refers to and encompasses any or all possible combinations of one or more of the associated listed items.
It should be understood that although the terms first, second, third, etc. may be used herein to describe various information, these information should not be limited by these terms. These terms are only used to distinguish one type of information from another. For example, a first message may also be referred to as a second message, and similarly, a second message may also be referred to as a first message, without departing from the scope of the present application. The word "if" as used herein may be interpreted as "at … …" or "at … …" or "responsive to a determination", depending on the context.
The application aims at providing a clock compensation method, in the application, because the frequency deviation constructed by the clock signal output by the electronic equipment and the clock difference of the standard clock signal accords with mathematical distribution with a certain rule, in the application, a frequency deviation prediction model of the frequency deviation and sampling time is firstly constructed. And then training the constructed frequency offset prediction model.
During training, the actual clock difference value corresponding to each historical sampling moment (namely the actual clock difference value corresponding to each historical sampling moment acquired before the standard clock is lost) serving as sample data can be converted into the frequency offset corresponding to each historical sampling moment, and then a frequency offset prediction model is trained by using a recursion algorithm and based on the frequency offset corresponding to each historical sampling moment, so that a trained frequency offset prediction model is obtained. Because the clock difference comprises the phase difference between the clock signal of the electronic equipment and the standard clock signal, the clock difference is accumulated along with time, so that the clock difference generated by each iteration is accumulated during each iteration, and the accumulated target clock difference value during training is obtained after the frequency deviation prediction model is trained.
After the standard clock is lost, the electronic equipment can input the time mark of the current sampling time to the frequency deviation prediction model to obtain a frequency deviation prediction value. The electronic equipment can determine the clock difference corresponding to the current sampling time based on the frequency deviation predicted value corresponding to the current sampling time, the frequency deviation predicted value corresponding to each sampling time from the standard clock lost to the current sampling time and the target clock difference accumulated value, and compensate the clock signal output by the electronic equipment at the current sampling time based on the clock difference at the current sampling time, so that the clock difference between the compensated clock signal and the standard clock signal is within a preset threshold value, and the clock signal compensation is realized.
The clock error is converted into the frequency error, and the change rule of the frequency error along with time is found, so that after the standard clock is lost, the frequency error can be predicted by utilizing the change rule, the predicted frequency error is converted into the predicted clock error, and the clock signal output by the electronic equipment after the standard clock is lost is compensated through the predicted clock error. Compared with the Kalman filtering algorithm for compensating the clock, the clock compensation method is lower in complexity, less in calculated amount and less in system resource consumption when clock compensation is carried out.
The embodiment of the application mainly comprises training of a frequency offset prediction model and compensation of clock signals output by electronic equipment by applying the frequency offset prediction model after standard clock loss, and the clock compensation method provided by the application is introduced from the two parts.
For convenience in distinguishing model training from model application, the sampling time used in model training is referred to as historical sampling time (i.e. sampling time before standard clock loss), the clock difference is referred to as actual value of clock difference, and the frequency offset is referred to as frequency offset sample. The sampling time used when the model is applied is directly called sampling time, the used clock error is called a clock error predicted value, and the used frequency offset is called a frequency offset predicted value.
1. Training of frequency offset prediction model
Before introducing the training of the frequency offset prediction model, several concepts related to the present application will be described.
1) Clock error
The clock difference refers to a phase difference between a clock signal output by the present electronic device and a standard clock signal. Further, the clock difference corresponding to a certain sampling time refers to a phase difference between a clock signal output by the electronic device at the certain sampling time and a standard clock signal.
2) Frequency offset
In this application, frequency offset represents the amount of clock difference increase between adjacent two sampling instants. Therefore, in the present application, the clock skew can be converted into a frequency offset.
For example, assume that the clock difference at the kth sampling time is τ k The clock difference at the k-1 sampling time is tau k-1 Wherein k is an integer of 1 or more.
Let the time interval between the kth sample time and the kth-1 sample time be d.
Assume that the frequency offset at time k is assumed to be g k]ThenWhere d is the time interval between the kth sampling instant and the sampling instant of the kth-1 (i.e., d is the sampling step size).
3) Time identification of sampling time
The time stamp of the sampling time refers to a flag indicating one sampling time. For example, the time instant identification may be a number of sampling time instants. For example, the 1 st sampling time is identified as 1, the 2 nd sampling time is identified as 2, and the k th sampling time is identified as k. The time identifier of the sampling time is only described here by way of example, and is not particularly limited.
Since the frequency offset varies with the sampling time, and the variation conforms to a regular mathematical distribution. Therefore, in the application, an initial frequency offset prediction model can be constructed first, and then the frequency offset prediction model is trained by utilizing the frequency offset constructed by the clock difference actual values corresponding to each historical sampling moment acquired before the standard clock is lost.
It should be noted that, since the clock difference includes the phase difference between the clock signal of the electronic device and the standard clock signal, the clock difference is accumulated over time, so in this application, the clock difference is accumulated during each iteration training, and after the frequency offset prediction model is trained, the accumulated target clock difference value during training is obtained.
Therefore, the frequency offset prediction model is trained to obtain model parameters of the frequency offset prediction model and a target clock difference cumulative value.
In the embodiment of the application, a preset recursive algorithm can be adopted to train the frequency deviation prediction model and obtain the target clock difference cumulative value. The preset recursive algorithm may be RLS (Recursive Least Square, recursive least squares) algorithm, or may be other recursive algorithm, which is only illustrated here by way of example and is not specifically limited.
The following describes in detail "training the frequency offset prediction model by a preset recursive algorithm" through steps A1 to A3.
Before describing steps A1 to A3, it is described how to determine the initial values of the model parameters, the covariance matrix, and the initial clock difference integration value for the following iterations.
Assume that the training samples are: actual value of clock difference tau at 0 th historical sampling time 0 Actual value τ of clock difference at 1 st historical sampling time 1 Actual value τ of clock difference at kth historical sampling time of … k 。
Assume that the conversion formula of the frequency offset and the clock difference is:wherein g [ k ]]And d is the time interval between the kth historical sampling time and the kth-1 historical sampling time (i.e. d is the sampling step length).
Therefore, the electronic equipment can form the frequency deviation from the 1 st historical sampling time to the kth historical sampling time based on the actual clock difference value from the 0 th historical sampling time to the kth historical sampling time.
For example, the 1 st frequency offset sample at the historical sampling time is g [1], the 2 nd frequency offset sample at the historical sampling time is g [2], …, and the k th frequency offset sample at the historical sampling time is g [ k ].
Assuming that the frequency offset and the sampling moment follow a linear function, a frequency offset model as shown below may be pre-constructed:
f est [k]＝θ 1 [k]+kθ 2 [k]the method comprises the steps of carrying out a first treatment on the surface of the (equation 1-1)
Wherein k is an independent variable and represents a time mark of the sampling time; f (f) est [k]As a dependent variable, frequency offset is represented.
Wherein θ 1 [k]And theta 2 [k]Model parameters representing the frequency offset model.
In calculating the initial value, in the existing RLS recursive algorithm, it is conventional practice to substitute a frequency offset sample at a historic sampling instant into the formula, which results in the resulting θ 1 [k]And theta 2 [k]Is not unique, and causes inaccuracy in the trained model.
In the present application, the frequency offset samples of the two historical sampling moments before the standard clock is lost are substituted into the formula, so that the unique theta can be obtained 1 [k]And theta 2 [k]The trained model is made more accurate.
For example, the present application may sample g [1] at the 1 st historical sample time]G 2 of the 2 nd historical sampling time]Is substituted into the frequency offset model, i.e., (1, g 1)]) And (2, g 2)]) Substituting into the frequency offset model to obtain theta 1 [k]And theta 2 [k]Is set to be a constant value.
Specifically, in the RLS recursive algorithm:
order the
Wherein Y is k Representing the 1 st historical sampling time toMatrix of frequency offsets at kth historic sampling instants, i.e.
Φ k Coefficients representing model parameters in a frequency offset model form a coefficient matrix, i.e
P k Is a covariance matrix.
In calculating theta 1 [k]And theta 2 [k]When the initial value of (c) and the initial value of the covariance matrix are equal, k=2,substituting into the formula 1-2 to obtain θ 1 [k]And theta 2 [k]I.e.: θ 1 [1]＝θ 1 [2]＝2·g[1]-g[2]；θ 2 [1]＝θ 2 [2]＝g[2]-g[1]。
The number of times k=2 will be,substituted into the formulas 1-3 to obtain a covariance matrix P k I.e.I.e. p 11 [2]＝5,p 12 [2]＝-3,p 21 [2]＝-3,p 22 [2]＝2。
In addition, assume that the accumulated value of the clock difference at the kth historical time of training is represented by t est [k]Initial value t of the clock difference cumulative value est [2]＝τ 2 -τ 0 。
After obtaining the initial values of the model parameters (i.e., θ 1 [1]、θ 2 [1]、θ 1 [2]、θ 2 [2]) Initial covariance matrix value (i.e. P 1 And P 2 ) Initial value t of clock difference cumulative value est [2]Then, loop iteration such as steps A1 to A3 may be performed based on the initial value until a preset iteration condition is satisfied.
Wherein the iteration stop condition may be: the frequency deviation prediction model converges, or the iteration number reaches the preset number, etc., and the iteration stop condition is only exemplarily described herein, and is not specifically limited.
The following steps A1 to A3 are described in detail below.
Step A1: and determining a gain vector of the iteration based on the covariance matrix obtained by the previous iteration and the moment identification of the sampling moment corresponding to the iteration.
Assuming that the iteration is the mth iteration, the covariance matrix obtained by the last iteration is:the historical sampling moment corresponding to the iteration is marked as m; the gain vector of this iteration is (G 1 [m]，G 2 [m]) Wherein G is 1 [m]Representing model parameters θ 1 [k]Gain of G 2 [m]Representing model parameters θ 2 [k]Is provided.
The electronic device may obtain the gain vector of the current iteration through equations 1-4 and equations 1-5.
Where u is the median value of the calculated gain vector.
In addition, it is also necessary to explain that: after the gain vector of the current iteration is calculated, although the covariance matrix of the current iteration is not needed to be used in the current iteration, the covariance matrix of the current iteration can be obtained and recorded based on the covariance matrix of the last iteration and the gain vector obtained in the current iteration. The recorded covariance matrix of the iteration is mainly used for calculating the gain vector of the next iteration when the next iteration is performed.
The following describes "the covariance matrix based on the last iteration and the gain vector obtained by the current iteration" to obtain the covariance matrix of the current iteration.
Specifically, when the preset recursive algorithm is an RLS algorithm, the electronic device may implement the calculation of the covariance matrix of the current iteration based on formulas 1-6.
Wherein, (G) 1 [m]，G 2 [m]) The gain vector is the gain vector of the iteration;
the covariance matrix obtained in the last iteration is obtained;
m is the time mark of the historical sampling time corresponding to the iteration.
And step A2, determining the model parameters of the current iteration based on the model parameters of the last iteration, the actual clock difference value corresponding to the current iteration and the gain vector obtained by the current iteration.
Specifically, when the preset recursive algorithm is an RLS algorithm, the electronic device may implement calculation of the model parameters of the current iteration based on formulas 1-7 and formulas 1-8.
v＝g[m]-(θ 1 [m-1]+m·θ 2 [m-1]) The method comprises the steps of carrying out a first treatment on the surface of the (equations 1-7)
Wherein θ 1 [m-1]、θ 2 [m-1]Model parameters obtained for the last iteration;
g [ m ] is the frequency offset sample of the corresponding m historical sampling moment of the iteration;
(G 1 [m]，G 2 [m]) The gain vector is the gain vector of the iteration;
v is the median value of the model parameters for the calculation of this iteration.
Step A3: and determining the clock difference accumulated value corresponding to the current iteration based on the model parameters of the current iteration and the clock difference accumulated value obtained by the last iteration.
Because the clock error is accumulated in each iteration, after the model parameter of the current iteration is calculated, the electronic equipment can also determine the clock error accumulated value corresponding to the current iteration based on the model parameter of the current iteration and the clock error accumulated value obtained in the last iteration.
In an alternative method for calculating the clock difference cumulative value, the electronic device directly determines the clock difference cumulative value corresponding to the current iteration based on the model parameter of the current iteration and the clock difference cumulative value obtained in the last iteration, and the method can be specifically realized through formulas 1-9.
t est [m]＝t est [m-1]-d·(θ 1 [m]+(m-1)·θ 2 [m]) The method comprises the steps of carrying out a first treatment on the surface of the (formulas 1-9)
Wherein t is est [m]The clock difference accumulated value of the iteration is obtained;
t est [m-1]the clock difference accumulated value obtained for the last iteration;
d is the time interval (or sampling step length) between the mth historical sampling time and the mth-1 sampling time;
θ 1 [m]、θ 2 [m]and obtaining model parameters for the iteration.
Of course, in another alternative implementation, the accumulated value of the clock skew is obtained for more accuracy. The electronic device may determine the accumulated clock correction of the current iteration based on the model parameter of the current iteration, the model parameter of the last iteration, and the time identifier of the historical sampling time corresponding to the current iteration. Then, the electronic device determines the clock difference accumulated value of the current iteration based on the clock difference accumulated value obtained by the previous iteration, the model parameter obtained by the current iteration and the accumulated clock difference correction amount obtained by the current iteration.
Specifically, the electronic device can be realized by formulas 1 to 10 and formulas 1 to 11 when calculating the accumulated clock difference correction amount.
Wherein θ 1 [m]、θ 2 [m]Model parameters obtained for the iteration are obtained;
θ 1 [m-1]、θ 2 [m-1]model parameters obtained for the last iteration;
m is a time mark of the historical sampling time corresponding to the iteration;
C a 、C b an intermediate value calculated for the accumulated clock difference correction;
and the accumulated clock difference correction amount obtained for the iteration is obtained.
In the present application, when determining the clock difference cumulative value of the current iteration based on the clock difference cumulative value obtained in the previous iteration, the model parameter obtained in the current iteration and the cumulative clock difference correction amount obtained in the current iteration, the electronic device may implement the calculation of the clock difference cumulative value of the current iteration through formulas 1-12.
Wherein t is est [m]The clock difference accumulated value of the iteration is obtained;
t est [m-1]the clock difference accumulated value obtained for the last iteration;
d is the time interval (or sampling step length) between the mth historical sampling time and the (m-1) th historical sampling time;
θ 1 [m]、θ 2 [m]model parameters obtained for the iteration are obtained;
and the accumulated clock difference correction amount obtained for the iteration is obtained.
Furthermore, the electronic device may detect whether the iteration stop condition is satisfied when each iteration has completed step A3. If the iteration stopping condition is met, taking the model parameter of the current iteration as the final model parameter of the frequency deviation prediction model, and determining the clock difference accumulated value corresponding to the current iteration as the target clock difference accumulated value; if the iteration stop condition is not satisfied, the next iteration from step A1 to step A3 is performed.
The above is the training process of the frequency offset prediction model.
2. Compensating clock signal output by electronic equipment by applying frequency offset prediction model
Referring to fig. 1, fig. 1 is a flowchart illustrating a clock compensation method according to an exemplary embodiment of the present application, which is applicable to an electronic device.
The electronic device is a device having a clock and requiring clock adjustment. For example, the electronic device may be a base station, a hardware device on the base station, or the like, and the electronic device is only described here by way of example and is not particularly limited.
In addition, the clock compensation method may be applied to a 5G (5 th Generation Mobile Communication Technology, fifth generation mobile communication technology) communication scenario, or may be applied to a 4G (4 th Generation Mobile Communication Technology, fourth generation mobile communication technology) communication scenario, or a 3G (3 th Generation Mobile Communication Technology, third generation mobile communication technology) communication scenario, which is not specifically limited herein.
The method may include the steps as follows.
Step 101: the electronic equipment acquires a clock signal output by the electronic equipment at the current sampling moment;
step 102: the electronic equipment inputs the moment identification of the current moment into a trained frequency deviation prediction model so as to output a frequency deviation prediction value corresponding to the current moment by the frequency deviation prediction model; the frequency offset prediction model is obtained by training frequency offset samples; the frequency offset sample is formed by clock differences corresponding to at least one historical sampling moment before the standard clock is lost, and the clock differences are phase differences between clock signals output by the electronic equipment and the standard clock signals;
the prediction method of the frequency offset prediction model may be as shown above, and will not be described herein.
The frequency offset samples are also constructed in a manner as shown above and not described in detail herein.
As can be seen from the above description, the frequency offset prediction model is a model describing the sampling time and the frequency offset change rule, so that the electronic device can obtain the frequency offset prediction value corresponding to the current sampling time after inputting the time identifier of the current time into the trained frequency offset prediction model.
For example, taking the above example as an example, assuming that when training of the frequency offset prediction model is completed, the historical sampling time corresponding to the last iteration is the nth historical sampling time, the model parameter of the frequency offset prediction model is θ 1 [N]、θ 2 [N]。
The trained frequency offset prediction model is: f (f) est [k]＝θ 1 [N]+kθ 2 [N]；
The target clock difference accumulated value obtained when training is completed is as follows: t is t est [N]。
Assuming the current sampling instant is the T-th sampling instant from the time of standard clock loss, the electronic device may input T to f est [k]＝θ 1 [N]+kθ 2 [N]Obtaining a frequency deviation predicted value f of the T sampling moment est [T]。
Step 103: and the electronic equipment determines the clock difference corresponding to the current sampling time based on the frequency deviation predicted value corresponding to the current sampling time, the recorded frequency deviation predicted value corresponding to each sampling time from the time when the standard clock is lost to the time when the frequency deviation predicted model is trained, and the target clock difference accumulated value obtained when the frequency deviation predicted model is trained.
Assuming that the current sampling time is T, when implementing, the electronic device may implement the clock difference corresponding to the current sampling time according to the following formulas 1-13:
wherein,the clock difference is the clock difference of the current T sampling time;
t est [N]the target clock difference accumulated value obtained when the frequency deviation prediction model training is completed is obtained;
d is the sampling step length;
is the sum of the predicted values of the frequency offset of the sampling moments from the 1 st sampling moment to the T sampling moment (namely the current sampling moment) when the standard clock is lost.
Step 104: the electronic equipment adopts the clock difference corresponding to the current sampling time to compensate the clock signal output by the electronic equipment at the current sampling time.
The electronic device can adjust the clock signal output by the electronic device at the current sampling time by the clock difference determined at the current sampling time, so that the adjusted clock signal is closer to the standard clock signal, i.e. the difference value between the adjusted clock signal and the standard clock signal is in a preset range.
As can be seen from the above description, since the clock difference is converted into the frequency offset and the change rule of the frequency offset along with time is found, after the standard clock is lost, the present application can predict the frequency offset by using the change rule, convert the predicted frequency offset into the predicted clock difference, and compensate the clock signal output by the present electronic device after the standard clock is lost by the predicted clock difference. Compared with the Kalman filtering algorithm for compensating the clock, the clock compensation method is lower in complexity, less in calculated amount and less in system resource consumption when clock compensation is carried out.
In addition, the RLS algorithm is applied to the training process of the frequency deviation prediction model, and the clock difference accumulated value of the training process is accumulated, so that the accuracy of predicting the clock difference of the current sampling moment when the subsequent standard clock is lost is higher, and clock calibration with higher accuracy can be realized (for example, clock calibration in a 5G scene can be realized).
Referring to fig. 2, fig. 2 is a hardware configuration diagram of an electronic device according to an exemplary embodiment of the present application.
The electronic device includes: a communication interface 201, a processor 202, a machine-readable storage medium 203, and a bus 204; wherein the communication interface 201, the processor 202, and the machine-readable storage medium 203 communicate with each other via a bus 204. The processor 202 may perform the clock compensation method described above by reading and executing machine-executable instructions corresponding to clock compensation control logic in the machine-readable storage medium 203.
The machine-readable storage medium 203 referred to herein may be any electronic, magnetic, optical, or other physical storage device that may contain or store information, such as executable instructions, data, or the like. For example, a machine-readable storage medium may be: volatile memory, nonvolatile memory, or similar storage medium. In particular, the machine-readable storage medium 203 may be RAM (Radom Access Memory, random access memory), flash memory, a storage drive (e.g., hard drive), a solid state drive, any type of storage disk (e.g., optical disk, DVD, etc.), or a similar storage medium, or a combination thereof.
Referring to fig. 3, fig. 3 is a block diagram of a clock compensation apparatus according to an exemplary embodiment of the present application. The device can be applied to electronic equipment and comprises the following steps:
an obtaining unit 301, configured to obtain a clock signal output by the present electronic device at a current sampling time;
the prediction unit 302 is configured to input a time identifier of the current sampling time to a trained frequency offset prediction model, so that a frequency offset prediction value corresponding to the current sampling time is output by the frequency offset prediction model; the frequency offset prediction model is obtained by training frequency offset samples; the frequency offset sample is constructed by a clock difference actual value corresponding to at least one historical sampling moment before the standard clock is lost, and the clock difference actual value is the phase difference between a clock signal output by the electronic equipment and the standard clock signal;
a determining unit 303, configured to determine a clock difference predicted value corresponding to the current sampling time based on the frequency offset predicted value corresponding to the current sampling time, the recorded frequency offset predicted values corresponding to sampling times from when the standard clock is lost to when the current sampling time is lost, and a target clock difference accumulated value obtained when training of the frequency offset prediction model is completed;
and the compensation unit 304 is configured to compensate the clock signal output by the electronic device at the current sampling time by using the clock difference predicted value corresponding to the current sampling time.
Optionally, the device further comprises a training unit;
the training unit 305 is configured to perform the following iteration steps in a loop when training the frequency offset prediction model and the target clock difference integrated value by using a preset recursion algorithm until a preset iteration condition is satisfied; determining a gain vector of the iteration based on the covariance matrix obtained by the previous iteration and the moment identification of the sampling moment corresponding to the iteration; determining the model parameters of the iteration based on the model parameters of the last iteration, the actual clock difference value corresponding to the iteration and the gain vector obtained by the iteration; and determining the clock difference accumulated value corresponding to the current iteration based on the model parameters of the current iteration and the clock difference accumulated value obtained by the last iteration.
Optionally, the training unit 305 is further configured to determine, after the gain vector of the current iteration is determined, the covariance matrix of the current iteration based on the gain vector obtained by the current iteration and the covariance matrix obtained by the last iteration, and record the covariance matrix of the current iteration, so as to determine the gain vector of the next iteration through the covariance matrix of the current iteration when the next iteration is performed.
Optionally, the initial value of the model parameter of the frequency offset prediction model and the initial value of the covariance matrix are calculated by a frequency offset sample formed by the time marks of two historical sampling times and the actual clock difference value of the two historical sampling times.
Optionally, the training unit 305 is configured to determine, when determining the clock difference accumulated value corresponding to the current iteration based on the model parameter of the current iteration and the clock difference accumulated value obtained by the last iteration, an accumulated clock difference correction amount of the current iteration based on the model parameter of the current iteration, the model parameter of the last iteration and a time identifier of a historical sampling time corresponding to the current iteration; and determining the clock difference accumulated value of the current iteration based on the clock difference accumulated value obtained by the last iteration, the model parameter obtained by the current iteration and the accumulated clock difference correction quantity obtained by the current iteration.
Optionally, the preset recursive algorithm is an RLS algorithm.
The implementation process of the functions and roles of each unit in the above device is specifically shown in the implementation process of the corresponding steps in the above method, and will not be described herein again.
For the device embodiments, reference is made to the description of the method embodiments for the relevant points, since they essentially correspond to the method embodiments. The apparatus embodiments described above are merely illustrative, wherein the elements illustrated as separate elements may or may not be physically separate, and the elements shown as elements may or may not be physical elements, may be located in one place, or may be distributed over a plurality of network elements. Some or all of the modules may be selected according to actual needs to achieve the purposes of the present application. Those of ordinary skill in the art will understand and implement the present invention without undue burden.
The foregoing description of the preferred embodiments of the present invention is not intended to limit the invention to the precise form disclosed, and any modifications, equivalents, improvements and alternatives falling within the spirit and principles of the present invention are intended to be included within the scope of the present invention.
Claims (12)
1. A clock compensation method, wherein the method is applied to an electronic device, and the electronic device loses a standard clock and before the standard clock is recovered, the method comprises:
acquiring a clock signal output by the electronic equipment at the current sampling moment;
inputting a time mark of the current sampling time into a trained frequency deviation prediction model so as to output a frequency deviation prediction value corresponding to the current sampling time by the frequency deviation prediction model; the frequency offset prediction model is obtained by carrying out loop iteration on a model parameter initial value and a covariance matrix initial value which are determined according to a frequency offset sample through a preset recursion algorithm; the frequency offset sample is constructed by a clock difference actual value corresponding to at least one historical sampling moment before the standard clock is lost, and the clock difference actual value is the phase difference between a clock signal output by the electronic equipment and the standard clock signal;
determining a clock difference predicted value corresponding to the current sampling time based on the frequency difference predicted value corresponding to the current sampling time, the recorded frequency difference predicted value corresponding to each sampling time from the time when the standard clock is lost to the current sampling time and a target clock difference accumulated value obtained when training of the frequency difference predicted model is completed;
and compensating the clock signal output by the electronic equipment at the current sampling time by adopting the clock difference predicted value corresponding to the current sampling time.
2. The method of claim 1, wherein the frequency offset prediction model, the target clock difference running total are trained by the preset recursive algorithm:
the following iteration steps are circularly executed until preset iteration conditions are met;
determining a gain vector of the iteration based on the covariance matrix obtained by the previous iteration and the moment identification of the sampling moment corresponding to the iteration;
determining the model parameters of the iteration based on the model parameters of the last iteration, the actual clock difference value corresponding to the iteration and the gain vector obtained by the iteration;
and determining the clock difference accumulated value corresponding to the current iteration based on the model parameters of the current iteration and the clock difference accumulated value obtained by the last iteration.
3. The method of claim 2, wherein after the determining the gain vector for the current iteration, the method further comprises:
and determining and recording the covariance matrix of the current iteration based on the gain vector obtained by the current iteration and the covariance matrix obtained by the last iteration, so as to determine the gain vector of the next iteration through the covariance matrix of the current iteration when the next iteration is performed.
4. The method of claim 2 wherein the initial values of the model parameters of the frequency offset prediction model, the initial values of the covariance matrix are calculated from frequency offset samples constructed from time identifications of two historical sample times and actual clock differences of the two historical sample times.
5. The method according to claim 2, wherein the determining the clock difference cumulative value corresponding to the current iteration based on the model parameter of the current iteration and the clock difference cumulative value obtained in the previous iteration includes:
determining the accumulated clock difference correction quantity of the current iteration based on the model parameters of the current iteration, the model parameters of the last iteration and the time mark of the historical sampling time corresponding to the current iteration;
and determining the clock difference accumulated value of the current iteration based on the clock difference accumulated value obtained by the last iteration, the model parameter obtained by the current iteration and the accumulated clock difference correction quantity obtained by the current iteration.
6. The method of claim 2, wherein the predetermined recursive algorithm is an RLS algorithm.
7. A clock compensation device, wherein the device is applied to an electronic apparatus, and the electronic apparatus is used for recovering a standard clock after losing the standard clock, and the device comprises:
the acquisition unit is used for acquiring a clock signal output by the electronic equipment at the current sampling moment;
the prediction unit is used for inputting the time mark of the current sampling time into the trained frequency deviation prediction model so as to output a frequency deviation prediction value corresponding to the current sampling time by the frequency deviation prediction model; the frequency offset prediction model is obtained by carrying out loop iteration on a model parameter initial value and a covariance matrix initial value which are determined according to a frequency offset sample through a preset recursion algorithm; the frequency offset sample is constructed by a clock difference actual value corresponding to at least one historical sampling moment before the standard clock is lost, and the clock difference actual value is the phase difference between a clock signal output by the electronic equipment and the standard clock signal;
the determining unit is used for determining a clock difference predicted value corresponding to the current sampling time based on the frequency difference predicted value corresponding to the current sampling time, the recorded frequency difference predicted value corresponding to each sampling time from the time when the standard clock is lost to the time when the frequency difference predicted model is trained, and a target clock difference accumulated value obtained when the frequency difference predicted model is trained;
and the compensation unit is used for compensating the clock signal output by the electronic equipment at the current sampling time by adopting the clock difference predicted value corresponding to the current sampling time.
8. The apparatus of claim 7, further comprising a training unit;
the training unit is used for circularly executing the following iteration steps until a preset iteration condition is met when training the frequency deviation prediction model and the target clock difference accumulated value through the preset recursion algorithm; determining a gain vector of the iteration based on the covariance matrix obtained by the previous iteration and the moment identification of the sampling moment corresponding to the iteration; determining the model parameters of the iteration based on the model parameters of the last iteration, the actual clock difference value corresponding to the iteration and the gain vector obtained by the iteration; and determining the clock difference accumulated value corresponding to the current iteration based on the model parameters of the current iteration and the clock difference accumulated value obtained by the last iteration.
9. The apparatus of claim 8, wherein the training unit is further configured to determine the covariance matrix of the current iteration based on the gain vector obtained in the current iteration and the covariance matrix obtained in the last iteration after the gain vector of the current iteration is determined, and record the covariance matrix of the current iteration to determine the gain vector of the next iteration through the covariance matrix of the current iteration at the time of the next iteration.
10. The apparatus of claim 8 wherein the initial values of the model parameters of the frequency offset prediction model, the initial values of the covariance matrix are calculated from frequency offset samples constructed from time identifications of two historical sample times and actual clock differences of the two historical sample times.
11. The apparatus according to claim 8, wherein the training unit is configured to determine, when determining the clock difference cumulative value corresponding to the current iteration based on the model parameter of the current iteration and the clock difference cumulative value obtained by the last iteration, a cumulative clock difference correction amount of the current iteration based on the model parameter of the current iteration, the model parameter of the last iteration, and a time identifier of a historical sampling time corresponding to the current iteration; and determining the clock difference accumulated value of the current iteration based on the clock difference accumulated value obtained by the last iteration, the model parameter obtained by the current iteration and the accumulated clock difference correction quantity obtained by the current iteration.
12. The apparatus of claim 8, wherein the predetermined recursive algorithm is an RLS algorithm.
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