CN113299494A

CN113299494A - Ground Fault Circuit Interrupter (GFCI) systems and methods

Info

Publication number: CN113299494A
Application number: CN202110388782.0A
Authority: CN
Inventors: S·P·西莫宁
Original assignee: Hubbell Inc
Current assignee: Hubbell Inc
Priority date: 2015-12-18
Filing date: 2015-12-18
Publication date: 2021-08-24
Also published as: WO2017105485A1; CA3009045A1; CN108496235A; MX2018007475A; CN108496235B

Abstract

The present application relates to Ground Fault Circuit Interrupter (GFCI) systems and methods. The application provides a wiring device, it includes: a face contact; one or more line contact arms; one or more load contact arms; and a fault detection circuit. The one or more line contact arms have an upper line contact positioned on a curved portion of the line contact arm and a lower line contact positioned on a substantially straight portion of the line contact arm. The one or more load contact arms have a load contact positioned on a curved portion of the load contact arm. The fault detection circuit detects a fault condition in the wiring device and generates a fault detection signal upon detection of the fault condition, wherein the fault detection signal electrically disconnects the face contact from the upper line contact and the lower line contact from the load contact.

Description

Ground Fault Circuit Interrupter (GFCI) systems and methods

Divisional application information

This application is a divisional application of the invention patent application filed on 2015, 12/18, application No. 201580085752.5 entitled "Ground Fault Circuit Interrupter (GFCI) system and method".

Technical Field

The described embodiments relate to Ground Fault Circuit Interrupter (GFCI) systems and methods.

Background

The present invention relates generally to switching electrical devices. More particularly, the present invention relates to circuit interrupting devices, such as Ground Fault Circuit Interrupter (GFCI) devices, that switch from a "reset" or latched state to a "tripped" or unlatched state when one or more conditions are detected. Such devices consistent with embodiments of the invention disclosed herein are more reliable and have a longer life expectancy than previously known GFCI devices.

GFCI devices having contacts biased toward the open position require a latching mechanism for setting and maintaining the contacts in the closed position. Likewise, a switching electrical device having contacts biased toward a closed position requires a latching mechanism for setting and maintaining the contacts in an open position. Examples of conventional types of devices include circuit interrupting type devices such as circuit breakers, arc fault interrupters, and GFCIs, to name a few.

When the GFCI device is in the open position, the contacts may still be relatively close to each other due to the relatively small size of the GFCI device. This can result in slow plasma extinction, arc breakdown, and relatively slow disconnection (e.g., disconnection) of the contacts. These conditions lead to a high failure rate of the device due to the build up of residues on the contacts that can lead to long open times and possible permanent failures.

Disclosure of Invention

In one embodiment, the present invention addresses such a problem by providing a wiring device comprising: a face terminal for electrical connection to an external load; a line terminal for electrical connection to an external power supply; a load terminal for electrical connection to a second external load; a face contact electrically connected to the face terminal; one or more line contact arms electrically connected to the line terminals; and one or more load contact arms electrically connected to the load terminals. Each line contact arm has an upper line contact positioned on a curved portion of the line contact arm and a lower line contact positioned on a substantially straight portion of the line contact arm. Each load contact arm has a load contact positioned on a curved portion of the load contact arm. Wherein when the wiring device is in a closed position, the face contact and the upper line contact are electrically connected and the lower line contact and the load contact are electrically connected, and when the wiring device is in an open position, the face contact and the upper line contact are electrically disconnected and the lower line contact and the load contact are electrically disconnected.

In another embodiment, the present invention provides a wiring device comprising: a face contact; one or more line contact arms; one or more load contact arms; and a fault detection circuit. The one or more line contact arms have an upper line contact positioned on a curved portion of the line contact arm and a lower line contact positioned on a substantially straight portion of the line contact arm. The one or more load contact arms have a load contact positioned on a curved portion of the load contact arm. The fault detection circuit detects a fault condition in the wiring device and generates a fault detection signal upon detection of the fault condition, wherein the fault detection signal electrically disconnects the face contact from the upper line contact and the lower line contact from the load contact.

In yet another embodiment, the present invention provides a method of operating a wiring device. The method comprises the following steps: providing a face contact; providing one or more line contact arms; and providing one or more load contact arms. Each line contact arm has an upper line contact positioned on a curved portion of the line contact arm and a lower line contact positioned on a substantially straight portion of the line contact arm. Each load contact arm has a load contact positioned on a curved portion of the load contact arm. The method further comprises: electrically connecting the face contact with the upper line contact; and electrically connecting the lower line contact and the load contact.

Other aspects of the invention will become apparent by consideration of the detailed description and accompanying drawings.

Drawings

Fig. 1 is a side elevational view of a self-testing GFCI receptacle unit in accordance with an exemplary embodiment of the invention.

Fig. 2 is a side elevational view of the self-testing GFCI receptacle shown in fig. 1 with the front cover of the housing removed.

Fig. 3 is a side elevational view of the core assembly of the self-testing GFCI receptacle apparatus shown in fig. 1.

Fig. 4 is a side view of the line and load contact arms of the GFCI receptacle shown in fig. 1 in the open position.

Fig. 5 is a side view of the line and load contact arms of the GFCI receptacle shown in fig. 1 in the closed position.

Fig. 6A-6D are schematic diagrams of exemplary circuits consistent with exemplary embodiments of the present invention.

Detailed Description

Before the embodiments of the invention are explained in detail, it is to be understood that the invention is not limited in its application to the details of construction and the arrangement of components set forth in the following description or illustrated in the following drawings. The invention is capable of other embodiments and of being practiced or of being carried out in various ways.

Fig. 1 illustrates a perspective view of a GFCI receptacle 10 according to one embodiment of the invention. The GFCI receptacle 10 includes a front cover 12 having a dual wire seating surface 14 with phase openings 16, a neutral opening 18, and a ground opening 20. Face 14 further has an opening 22 to receive reset button 24, an adjacent opening 24 to receive test button 28, and six corresponding circular openings 30-35. In some embodiments,

openings

30 and 33 receive two respective indicators, such as, but not limited to, various colored Light Emitting Diodes (LEDs). In some embodiments, openings 32 and 34 receive respective bright LEDs that function as, for example, night lights. In some embodiments, the opening 31 houses a light-guiding photocell for controlling, for example, a night light LED. In some embodiments, the openings 35 enable access to set screws used to adjust the photovoltaic cell apparatus according to this and other embodiments.

The GFCI receptacle 10 further includes a back cover 36 that is fastened to the front cover 12 by eight fasteners 38 (four fasteners 38 are shown in fig. 1, while the other four fasteners 38 are hidden). In some embodiments, fastener 38 includes a barbed post 50 on front cover 12 and a corresponding elastic cuff 52 on back cover 36, similar to the detailed description in U.S. Pat. No. 6,398,594, which is incorporated herein by reference in its entirety. The ground yoke/bridge assembly 40 includes standard mounting ears 42 that project from the ends of the GFCI receptacle 10.

Fig. 2 illustrates a perspective view of the GFCI receptacle 10 with the front cover 12 removed to expose the manifold 126. The manifold 126 provides support for the printed circuit board 390 and the yoke/bridge assembly 40. According to one embodiment, the manifold 126 includes four dovetail interconnects 130 that mate with corresponding recesses 132 along an upper edge of the aft cover 36. One dovetail-recess pair is provided on each of the four sides of the manifold 126 and back cover 36, respectively.

FIG. 3 is a side elevational view of the core assembly 80 according to one embodiment. The core assembly 80 includes a circuit board 82 that supports most of the working components of the receptacle, including the circuitry shown in fig. 6A-6D, as well as a sense transformer 84 and a grounded neutral transformer 85 (not shown). The line contact

arms

94, 96 pass through the transformers 84, 85 with an insulating separator 98 between the arms. The line contact

arms

94, 96 are cantilevered with respective distal ends carrying phase and

neutral line contacts

102, 104. The

load contact arms

98, 100 are also cantilevered with their respective distal ends carrying phase and neutral load contacts 101, 103. The resiliency of the cantilevered contact arms biases the

line contacts

102, 104 and the load contacts 101, 103 away from each other. The load contact arms 98, 103 rest on a movable contact carrier 106 made of an insulating (preferably thermoplastic) material.

Fig. 4 is a side view of the line and load

contact arms

94, 98 in the open position according to one embodiment. Fig. 4 further illustrates a load contact 101 (e.g., a phase load contact or a neutral load contact), a line contact 102 (e.g., a phase line contact or a neutral line contact), a movable contact carrier or latch housing 106, a face 108, and a face contact 109 (e.g., a phase face contact or a neutral face contact). In some embodiments, the face 108 is a bottom portion of the manifold 126. Although not illustrated in fig. 4, line contact arm 96, load contact arm 100, load contact 103 (e.g., a phase load contact or a neutral load contact), and line contact 104 (e.g., a phase line contact or a neutral line contact) are constructed in a manner similar to that illustrated in fig. 4 and 5 and explained below. Also, it should be noted that the contacts and contact arm configurations shown and described with respect to fig. 4 and 5 are also provided in the devices shown and described with respect to fig. 1-3, in accordance with various embodiments.

The line contact arm 94 includes a first straight or substantially straight portion 110 and a first curved portion 115. First straight portion 110 includes a lower line contact 102a and first curved portion 115 includes an upper line contact 102 b. In some embodiments, the line contact arm 94 is bent at an angle of about three degrees, but the line contact arm may be bent at an angle ranging from about three degrees to about six degrees. The lower line contact 102a may be coupled to the line contact arm 94 through the insertion aperture before the upper line contact 102 b. In some embodiments, the lower line contact 102a and the upper line contact 102b are coupled to the line contact arm 94 via staking.

The load contact arm 98 includes a second straight or substantially straight portion 120 and a second curved portion 125. The second curved portion 125 has a load contact 101. In some embodiments, the load contact arm 98 is bent at an angle of about three degrees to about six degrees. In some embodiments, the load contact 101 is coupled to the load contact arm 98 via a rivet.

Fig. 5 is a side view of the line and

load contact arms

94, 98 in the closed position according to the embodiment of fig. 4. The line contact arm 94 is bent downward such that the upper line contact 102b is in substantially flat contact with the face contact 109 when in the closed position. Additionally, the load contact arm 98 is bent downward such that the load contact 101 is in substantially flat contact with the lower line contact 102a when in the closed position.

In operation, an erasing action is performed when the

line contact arms

94, 96 and the

load contact arms

98, 100 change from a closed position to an open position or vice versa. Additionally, the curved portions of the contact arms add a moment when the

line contact arms

94, 96 and the

load contact arms

98, 100 are in the reset condition. This wiping action and the added torque even allows the contacts to float and maintain connection if the GFCI receptacle 10 moves. The wiping action, the added moment and the curvature result in a relatively large opening between the contacts and a relatively quick opening between the contacts when the device trips. A relatively large opening and a relatively fast turn-off can lead to a relatively fast plasma extinction, which can reduce the likelihood of arc breakdown, among other things.

The relatively large openings or spaces between the contacts additionally enable cooler operation of the GFCI receptacle 10 by allowing more air and surface cooling. The relatively large opening also prevents arcing between the contacts, which can occur during high voltage operation or when the wiper arm loses its spring force. In some embodiments, the contacts are about 0.060 "away from each other when in the open position. The curved portions of the line and

load contact arms

94, 96, 98, 100 move the contacts further away from the movable contact carriage 106, thereby preventing any potential melting from occurring.

Fig. 6A to 6D are schematic diagrams of a circuit according to an embodiment of the present invention. The circuit shown in fig. 6A-6D, or various sub-circuits thereof, may be implemented in a variety of electrical wiring devices, however for purposes of description the circuit of fig. 6A-6D is discussed herein in connection with its use in the GFCI receptacle device shown in fig. 1-5.

The circuits of fig. 6A-6D include a phase line terminal 326 and a neutral line terminal 328 for electrical connection to an AC power source (not shown), such as a 60hz, 120 volt rms power source used in the united states for household power. The circuits of fig. 6A-6D and the software resident on and implemented with the circuits may also be modified to accommodate other power transfer systems. Such modifications, and the resulting circuits and wiring devices that ultimately will use the circuits and software, are contemplated by the inventors and are considered to be within the spirit and scope of the invention described herein. For example, power transfer systems using different voltages and frequencies are within the scope of the present disclosure.

Referring to fig. 6A-6D, phase conductor 330 and neutral conductor 332 are connected to line terminals, respectively, and each pass through a sense transformer 334 and a grounded neutral transformer 336, which are part of the detection circuit described below. By way of example, the line terminals correspond to the input terminal screws 326, 328 in fig. 1 above, and the

line conductors

330, 332 represent the

line contact arms

94, 96, respectively, as described above with respect to fig. 3. Each of the

line conductors

330, 332 has a respective fixed end connected to a line terminal and each includes a respective movable contact, such as

contacts

102, 104 from the embodiments described above. Face phase conductor 338 and face neutral conductor 340 each include electrical contacts fixed thereto, such as contacts 109 from the embodiments described above. The face conductors 338, 340 are electrically connected to, and in the illustrated embodiment are integral with,

respective face terminals

342, 344 to which blades from a load device (not shown), such as an appliance, will be connected when the electrical outlet device is in use.

The circuits shown in fig. 6A-6D according to this embodiment also include optional load phase and

neutral terminals

346 and 348, respectively, which are electrically connected to downstream loads (not shown), such as one or more additional outlet devices. The

load terminals

346, 348 are connected to cantilevered load conductors 277, 278, respectively, each of which includes a movable load contact 101, 103 (fig. 4 and 5) at a distal end thereof. The load contacts 101, 103 are disposed below and coaxial with the respective line contacts 102, 104 (fig. 4 and 5) and face contact 109 (fig. 4 and 5) such that the three sets of contacts mate and are electrically connected together as the line conductors move toward the load and face conductors. When a device is in this condition, it is said to be "reset" or in a reset state.

Detector circuit

With continued reference to fig. 6A-6D, detector circuit 352 includes

transformers

334, 336 and a GFCI integrated circuit device (GFCI IC) 350. In accordance with an embodiment of the present invention, the GFCI IC 350 is a well known 4141 device, such as the RV4141 device manufactured by Firmild Semiconductor Corporation. Other GFCI IC devices may also be used in the circuits of fig. 6A-6D in place of 4141 and such modifications are within the spirit and scope of the present invention.

The GFCI IC apparatus 350 receives electrical signals from various other circuit components, including the

transformers

334, 336, and detects one or more faults, such as a true fault, a simulated fault, or a self-test ground fault, as well as a true or simulated grounded neutral fault. For example, when sufficient current imbalance occurs in the

line conductors

330, 332, a net current flows through the

transformers

334, 336, causing magnetic flux to be generated at least around the transformer 334. This magnetic flux causes a current to be induced on conductor 333, which is wrapped around sensing transformer 334. Respective ends of conductor 333 are connected to the positive and negative inputs of the sense amplifier of GFCI IC apparatus 350 at input ports V-REF and VFB, respectively. The induced current on conductor 333 brings up a voltage difference at the input to the sense amplifier of GFCI IC 350. When the voltage difference exceeds a predetermined threshold, a detection signal is generated at one or more of the outputs of the GFCI IC 350, such as the SCR trigger signal output port (SCR _ OUT). The threshold used by the GFCI IC 350 is determined by the effective resistance connected between the operational amplifier output (OP _ OUT) and the positive input (VFB) to the sense amplifier.

The current imbalance on the

line conductors

330, 332 is caused by a real ground fault, a simulated ground fault, or a self-test ground fault. When the test switch 354 in fig. 6A-6D is closed, which occurs when the test button 28 (fig. 1) is pressed, a simulated ground fault is generated. As described in further detail below, a self-test fault may occur when the automatic monitoring circuit 370 initiates an automatic monitoring test sequence that includes the current generated on the isolated conductor 356.

According to an embodiment of the present invention, when test switch 354 is closed, some of the current flowing in

line conductors

330, 332 and load conductors 338, 340 is shunted from phase plane conductor 338 (and from phase load conductor 277 when the device is in a reset state) around sensing transformer 334 and through resistor 358 to neutral line conductor 332. By shunting some of the current through resistor 358 in this manner, an imbalance is created in the current flowing through conductor 330 and the current flowing in the opposite direction through conductor 332. When the current is unbalanced, i.e., the net current flowing through the conductors through the sensing transformer exceeds a threshold value (e.g., 4 to 5 milliamps), the detector circuit 352 detects this analog ground fault and activates the SCR output (SCR _ OUT) of the GFCI IC 350.

When the SCR output of the GFCI IC 350 is activated, the gate of the SCR360 is turned on, allowing current to flow from the phase line conductor 330 through the diode 359 and the SCR 360. Current flowing through SCR360 turns on the gates of SCR361 and SCR 369. When SCR361 is turned on, current flows from phase line conductor 330 through secondary coil 363 of dual coil solenoid 362, fuse 365, diode 367, and SCR 361. Additionally, when SCR369 is turned on, current flows from phase line conductor 330 through primary coil 364 of dual coil solenoid 362, fuse 372, diode 374, and SCR 369. The current flowing through the two

coils

363, 364 generates a magnetic field that moves the armature within the solenoid 362. As the solenoid armature moves, it unlatches a contact carrier (e.g., 106 in fig. 3) that is part of the interrupting device 315, and the carrier descends under the natural bias of the

line conductors

330, 332, that is, away from the face conductors 338, 340 and load conductors 277, 278. Due to the successful manual simulated fault test sequence, the device is now referred to as "tripped," and the device will not deliver power to the load until it is reset. The time taken from the momentary switch 354 closing until the device trips and current no longer flows from the phase line conductor 330 to either of the face and load conductors and through the solenoid coils 363, 364 is so short that the

fuses

365, 372 remain unbroken.

Manual testing via reset operation

With continued reference to fig. 6A-6D, closing reset switch 300, for example by pressing reset button 24 (fig. 1), also initiates a test operation. Specifically, when the reset switch 300 is closed, the voltage supply output VS of the GFCI IC 350 is electrically connected to the gate of the SCR360 through conductor 308, thereby turning on the SCR 360. When the SCR360 turns on, current is drawn from the line conductor 330 through the diode 359 and the SCR360, and finally to ground. Similar to the situation when SCR360 is turned on by pressing the test button (as discussed previously), turning on SCR360 by pressing the reset button also causes SCR361 and SCR369 to turn on and current flows through

solenoid coils

363, 364. The current flowing through the

coils

363, 364 of the solenoid 362 generates a magnetic field at the solenoid and actuates and moves the armature within the solenoid. In typical (e.g., non-test) conditions, the armature is actuated in this manner to trip the device, such as when an actual fault occurs.

However, when the reset switch 300 is closed, the device is likely to already be in a tripped condition, i.e., the contacts of the line, face and load conductors are electrically isolated. That is, after the device has tripped, the reset button is typically pressed to re-latch the contact carrier and return the line, face and load contacts to electrical contact (illustrated in fig. 5). If the armature of the solenoid 362 fails to activate when the reset button is pressed, and after the reset button is released, the reset mechanism including the contact carrier fails to engage the reset plunger when it returns, the device will not reset. Thus, if, for example, the device has not been wired to AC power line, or it has been miswired, that is, the device has been wired with AC power that is not connected to the

line terminals

326, 328, then no power is applied to the GFCI IC 350. If no power is applied to the GFCI IC 350, the gate of the SCR360 cannot be driven through the SCR output of the GFCI IC 350 or when the stationary button is pressed. In this situation, the device will not be able to reset. By ensuring that the device is shipped to a user in a tripped condition, a mis-wiring condition can be prevented according to a wiring device consistent with embodiments of the present invention. Since the device cannot be reset until AC power is properly applied to the line terminals, a wrong wiring condition can be prevented.

Automatic monitoring circuit

With continued reference to the exemplary circuit schematic shown in fig. 6A-6D, the auto-monitoring circuit 370 includes a programmable device 301. Programmable device 301 may be any suitable programmable device, such as a microprocessor or microcontroller, that may be programmed to implement an auto-monitoring routine, as explained in detail below. For example, according to the embodiment shown in fig. 6A-6D, programmable device 301 is implemented by an atmel. tm. microcontroller from the attiy 10 family. May also be implemented by a microchip microcontroller such as PIC10F 204/206.

According to one exemplary auto-monitoring or auto-test routine according to the embodiment shown in fig. 6A-6D, the microcontroller 301 initiates the auto-monitoring routine approximately every three (3) seconds by setting a software auto-monitoring test flag. The auto-monitoring test flag initiates an auto-monitoring routine within the circuit interrupting device and confirms that the device is operating properly or, in some cases, that the circuit interrupting device has reached its end of life (EOL). When the result of the execution of the auto-monitoring routine is positive (i.e., successful), the auto-monitoring circuit enters a sleep state until the microcontroller 301 sets the test flag again and initiates another auto-monitoring routine.

If the result of the operation of the auto-monitoring routine is negative, such as failing to determine that the circuit interrupting device is functioning properly, or determining that the device is not actually operating properly, the fault counter is incremented and the microcontroller 301 initiates another auto-monitoring routine when instructed by a software program stored in memory within the device. In addition to incrementing the failure count, a temporary indication of the failure is also provided. For example, according to an embodiment of the present invention, when such a fault occurs, the I/O port GP0 of the microcontroller 301 is controlled as an output, and the Light Emitting Diode (LED)376 is controlled to blink, for example, one or more times, to indicate the fault to a user. If the fault counter reaches a predetermined value, i.e., the result of a negative run of the auto-monitoring routine reaches a certain number of times, which is stored and implemented in software, the auto-monitoring routine calls an end of life (EOL) sequence. The EOL sequence includes one or more of the following functions: (a) indicating that EOL has been reached, such as by constantly flashing or illuminating an indicator light and/or generating an audible sound, (b) attempting to trip the device, (c) preventing a device reset attempt, (d) storing an EOL event on a non-volatile memory, such as in the presence of a power failure, and (e) clearing the EOL condition when the device is powered down.

According to this embodiment, when the auto-monitoring software determines that the auto-monitoring routine is running, i.e., based on the auto-monitor timer, the stimulation signal 302 is turned on at the I/O port GP1 of the microcontroller 301. When the stimulus signal is turned on, current flows through resistor 303 and a voltage is generated at the base of transistor 304, turning on the transistor. When transistor 304 is turned on, current flows from dc voltage supply 378 through resistor 305 (which is, for example, a 3k-ohm resistor), and on through electrical conductor 356 and transistor 304 to ground. With respect to dc voltage source 378, the value of this voltage source is designed to be between 4.1 volts dc and 4.5 volts dc, according to embodiments of the invention, but the value of this voltage supply can be any other suitable value as long as the value used is sufficient to take into account the other circuit functionality described below.

According to this exemplary embodiment, electrical conductors 356 are wires, but may also be conductive traces on a printed circuit board. Conductor 356 is connected at one end to resistor 305, passes through sensing transformer 334, and wraps around the core of the transformer approximately ten (10) times and is connected at its other end to the collector of transistor 304. Thus, when the software auto-monitor test flag is set in microcontroller 301 and transistor 304 is turned on, current flows through conductor 356, which comprises a separate conductor from phase line conductor 330 and neutral line conductor 332, also passing through the center of sense transformer 334.

If the circuit interrupting device according to an embodiment of the present invention is functioning properly, a magnetic flux is generated at the sensing transformer 334 as current flows through the conductor 356 and through the sensing transformer. The flux generates a signal on conductor 333 that is detected by detection circuit 352 (including GFCI IC apparatus 350). According to this embodiment, when device 350 detects the flux generated at sensing transformer 334, the voltage level at one of the I/O ports of device 350 increases, e.g., the voltage level at the output port labeled CAP in fig. 6A-6D increases, increasing the voltage on conductor 306.

According to this embodiment, capacitor 307 is connected between the CAPI/O port of microcontroller 301 and ground. As is known in the art, directly attaching a capacitor between the CAP output of the 4141GFCI IC device and ground causes the SCR trigger signal (SCR _ OUT) output from the GFCI IC device 350 to be delayed for a predetermined period of time. The amount of time to delay the trigger signal is typically determined by the value of the capacitor. However, according to embodiments of the present invention, the capacitor 307 is not directly connected between the CAP output and ground. Instead, the capacitor 307 is also connected to the ADC I/O port GP0 of the microcontroller 301 via a circuit path that includes a diode 310 in series with a resistor 311 (e.g., 3M-Ohm), which completes a voltage divider circuit with a resistor 312 (e.g., 1.5M-Ohm). This additional circuit connected to the capacitor at the CAP output of the GFCI IC device 350 draws current from the delay capacitor.

By measuring the value of the signal at the ADC I/O port (GP0) and confirming that it is above a certain level, it can be determined whether the detection circuit 352 properly detected the self-test fault signal generated on conductor 356, and can further confirm whether the GFCI IC apparatus 350 is capable of generating the proper SCR trigger signal. Also, to avoid tripping the device during self-test auto-monitoring faults, the voltage at capacitor 307 is measured and proper self-test fault detection is confirmed before the drive signal is output at SCR _ OUT of the GFCI IC device 350.

If the current drawn on capacitor 307 is too high, the GFCI IC apparatus 350 may not operate properly. For example, if as little as 3-4 milliamps of current is drawn from the capacitor 307, it may not be possible to accurately detect a grounded neutral condition that is also intended to be detected by the GFCI IC device 350, such as per UL requirements, because the SCR trigger signal (SCR _ OUT) will not activate for as much time as necessary. According to an embodiment of the invention, less than about 1.3 milliamps, or about 5% of the specified delay current of the GFCI IC apparatus 350, is drawn for the ADC I/O port GP0 of the microcontroller 301. This smaller current drawn from capacitor 307 does not affect the device's ability to properly detect a true ground fault and/or a true grounded neutral fault.

According to this embodiment, a current of about 50 nanoamps is drawn from the capacitor 307. The parallel resistors 311 and 312 connected to the ADC I/O port GP0 of the microcontroller 301 create a drain of 4.5 megaohms that limits the current drawn from the capacitor 307 to a maximum of 1.0 microamperes. The GFCI IC apparatus 350 uses about 40 milliamps of current to generate the SCR trigger, but the microcontroller 301 only needs about 50 nanoamps to read the SCR trigger signal from the capacitor 307 before outputting the SCR trigger signal from SCR _ OUT. Thus, by selecting the proper value for capacitor 307, in combination with the proper value selection for resistors 311 and 312 and diode 310, it is possible to maintain the correct delay for the SCR trigger signal (SCR _ OUT) from the GFCI IC device 350 and measure the signal at the ADC input (GP0) using the ADC in the microcontroller 301 to determine if the test signal on conductor 356 has been properly detected by the detection circuit 352.

It should also be noted that in the embodiment shown in fig. 6A to 6D, LED376 is also connected to the ADC I/O port (GP0) of microcontroller 301. Thus, the drain on capacitor 307 is unaffected by whether LED376 is conducting or not, as well as the delay of the SCR trigger signal and the ability of microcontroller 301 to properly measure the signal output from the CAP I/O port of GFCI IC device 350. Thus, with respect to the circuits shown in fig. 6A through 6D, the LED376 is selected so that it does not turn on and begins conducting during the time that the microcontroller 301 is measuring the signal from the CAP output of the GFCI IC apparatus 350. For example, the LED376 is selected such that its turn-on voltage is about 1.64 volts or higher, which may be measured at the I/O port GP0 in accordance with the circuits shown in FIGS. 6A-6D. In addition, to prevent any signal from being added to the capacitor 307 while the LED376 is being driven, a diode 310 is provided.

According to this embodiment, the circuit path including the diode 310 and the voltage divider 311, 312 is connected to an I/O port GP0 of the microcontroller 301, which port serves as an input to an analog-to-digital converter (ADC) within the microcontroller 301. The ADC of the microcontroller 301 measures the increased voltage established by the charging action of the capacitor 307. When a predetermined voltage level is reached, microcontroller 301 turns off auto-monitoring stimulus signal 302, which in turn turns off transistor 304, thereby stopping the current on conductor 356 and thus stopping the flux generated at sensing transformer 334. When this occurs, the microcontroller 301 determines that the qualified auto-monitoring event has passed successfully, and decrements the auto-monitoring failure counter if the current count is greater than zero.

In other words, according to this embodiment, the microcontroller 301 repeats the automatic monitoring routine according to a predetermined schedule. The automatic monitoring routine is run at any interval from every few seconds to every month, etc., as needed based on a software program stored in a memory within the microcontroller 301. When the routine is initiated, flux is generated at the sensing transformer 334 in a manner similar to the manner in which flux would be generated if an actual ground fault had occurred or if a simulated ground fault had been generated manually, for example by pressing a test button (as described above).

However, there is a difference between the automatic monitoring (self-test) fault generated by the automatic monitoring routine and the actual ground fault or simulated fault generated by pressing the test button. When an actual or simulated ground fault occurs, a difference in the currents flowing in phase conductor 330 and neutral conductor 332, respectively, should be generated. That is, the current on conductor 330 should be different than the current on conductor 332. This differential current flow through the sense transformer 334 is detected by the GFCI IC device 350, which drives a signal on its SCR _ OUT I/O port to activate and turn on the gate of the SCR 360. When the SCR360 turns on, current is drawn through the

coils

363, 364, which causes the interrupting device 315 to trip, causing the contact carrier to drop, which in turn causes the line, face and load contacts to separate from each other (as illustrated in fig. 4). Accordingly, currents can be prevented from flowing through phase conductor 330 and neutral conductor 332 to phase plane terminal 342 and neutral plane terminal 344, and phase load terminal 346 and neutral load terminal 348, respectively.

In contrast, when the automatic monitoring routine is executed in accordance with the present invention, no differential current is generated on the phase conductor 330 and the neutral conductor 332, and the interrupting device 315 is not tripped. Instead, during the automatic monitoring routine, the flux generated at the sensing transformer 334 is a result of current flowing through the conductor 356, which is electrically isolated from the phase and

neutral conductors

330 and 332. The current generated on conductor 356 exists for only a short period of time, such as less than the delay time established by capacitor 307 previously discussed.

If the voltage established at the input to the ADC input (GP0) of the microcontroller 301 reaches the programmed threshold within this predetermined time period during the auto-monitoring routine, then it is determined that the detection circuit 352 successfully detected the current flowing through the core of the sensing transformer 334 and the auto-monitoring event is deemed to have elapsed. Thus, the microcontroller 301 determines that the detection circuit 352 containing the GFCI IC apparatus 350 is operating properly. Because the current flowing through the sensing transformer 334 during the auto-monitoring routine is designed to be substantially similar in magnitude to the differential current (e.g., 4-6 milliamps) flowing through the transformer during the analog ground fault, the determination detection circuit 352 will be able to detect the actual ground fault and provide the appropriate drive signal to the SCR360 to trip the interrupter 315.

Alternatively, the auto-monitoring circuit 370 may determine that the auto-monitoring routine failed. For example, if the time it takes for the voltage at the ADC input at the GP0 of the microcontroller 301 to reach a given voltage during the auto-monitoring routine is longer than a predetermined period of time, then the auto-monitoring event is determined to have failed. If this occurs, the automatic monitoring failure score is incremented and the failure is indicated visually or audibly. According to one embodiment, when an auto-monitoring event failure occurs, the ADC port (GP0) of the microcontroller 301 is converted to an output port and a voltage is placed on conductor 309 via I/O port GP0, which the microcontroller first converts to an output port GP 0. This voltage at GP0 generates a current on conductor 309 that flows through indicator LED376 and resistor 380 to ground. The ADC I/O port (GP0) of the microcontroller 301 is then switched back to the input port and is ready for the next scheduled auto-monitoring event.

According to this embodiment, when an auto-monitoring event failure occurs, indicator LED376 is illuminated only for the period of time when the I/O port is transitioning to an output and an output voltage is generated at the port, otherwise LED376 remains dark or not illuminated. Thus, if an automatic monitoring routine is run, for example, every three (3) seconds, and event failures occur only once or sporadically, the event is likely to go unnoticed by the user. On the other hand, if the failure occurs periodically, as would occur if one or more of the components for the automatic monitoring routine were permanently disabled, the microcontroller 301 repeatedly turns on the indicator LED376 for 10 milliseconds and turns off for 100 milliseconds, thereby drawing attention to the device and informing the user that the critical functionality of the device has been compromised. Conditions that cause the automated monitoring routine to fail include one or more of: open differential transformer, closed differential transformer, no power to the GFCI IC, open solenoid, SCR trigger output of the GFCI IC is continuously higher, and SCR output of the GFCI IC is continuously lower.

According to yet another embodiment, if the automated monitoring failure score reaches a predetermined limit, such as seven (7) failures within one (1) minute, the microcontroller 301 determines that the device is no longer safe and has reached its end of life (EOL). If this occurs, a visual indicator is activated to alert the user that the circuit interrupting device has reached the end of its useful life. For example, when this EOL state is determined, the ADC I/O port (GP0) of microcontroller 301 is converted to an output port, similar to the case when a single fault is recorded as described above, and a signal is periodically placed on conductor 309 via GP0, even though LED376 flashes at a rate of, for example, 10 milliseconds on and 100 milliseconds off, or is continuously placed on conductor 309 to permanently illuminate LED 376. At this time, the automatic monitoring routine is also stopped.

In addition to flashing or continuously illuminating the LED376, according to yet another embodiment, an optional audible alarm circuit 382 on a Printed Circuit Board (PCB)390 is activated when EOL is determined. In this case, the current through the LED376 establishes a voltage on the gate of the SCR 384, enabling the SCR 384 to be turned on continuously or intermittently, depending on the output signal from the GP0 of the microcontroller 301. When SCR 384 turns on, current is drawn from phase line conductor 330 to activate an audible alarm 386 (e.g., a buzzer) that provides an additional notification to the user of the device that the device has reached the end of its useful life (i.e., EOL). For example, with respect to an embodiment of the present invention, audible alarm circuit 382 includes a parallel RC circuit including resistor 387 and capacitor 388. As current is drawn from phase line conductor 330, capacitor 388 charges and discharges at a rate controlled by the value of resistor 387, causing buzzer 386 to sound the desired intermittent alarm.

Yet another aspect of this embodiment includes a dimmable LED circuit 396. The circuit 396 includes a transistor 398; LEDs 400, 402; a light sensor 404 (e.g., a photocell) and resistors 406-408. When ambient light (e.g., the amount of light near the circuit interrupting device according to embodiments of the present invention) is rising, the light sensor 404 reacts to the ambient light level to apply an increasing impedance to the base of the transistor 398 to cause the LED to dim as the ambient light increases. Alternatively, when the ambient light decreases, for example, as night falls, the current flowing through sensor 404 increases accordingly. As the ambient light level decreases, LEDs 400 and 402 light up increasingly brighter, thus providing a controlled light level in the vicinity of the device.

Yet another embodiment of the present invention shown in fig. 6A-6D includes a mechanism for providing data to the microcontroller 301 regarding whether the device is tripped or in a reset condition. As shown in fig. 6A-6D, opto-coupler 392 is connected between phase and neutral load conductors 277, 278 and the I/O port (GP3) of microcontroller 301. The microcontroller 301 uses the value of the signal (voltage) at port GP3 to determine whether the GFCI IC device 350 is supplied with power and whether the device is tripped or in a reset condition. When the GFCI IC apparatus 350 is powered, for example, via its voltage input port (LINE), which occurs when AC power is connected to the

LINE terminals

326, 328, a voltage is generated at the output port (VS). This voltage drops across zener diode 394, which is provided to maintain the voltage supplied to the microcontroller within acceptable levels. Diodes 366, 368 connected between the phase LINE conductors and the power supply input port (LINE) of the GFCI IC 350 ensure that the voltage level supplied to the GFCI IC and VS outputs remains below about 30 volts. The voltage signal dropped across zener diode 394 is connected to input port GP3 of microcontroller 301. If the microcontroller 301 does not measure a voltage at the GP3, it is determined that the GFCI IC device 350 is not supplying power and EOL is declared.

Alternatively, if the microcontroller 301 measures a voltage at the GP3, then based on the value of the voltage, it is determined whether the device is tripped or in a reset state. For example, according to the circuits in fig. 6A-6D, if the voltage at the GP3 measured is between 3.2 and 4.0 volts, such as between 76% of VCC and 100% of VCC, then it is determined that there is no power at the face (342, 344) and load (346, 348) contacts, and thus the device is in a tripped state. If the voltage at the GP3 is between 2.4 and 2.9 volts, such as between 51% of VCC and 74% of VCC, then it is determined that power is present at the face and load contacts and the device is in a reset state.

According to yet another embodiment, when determining EOL, the microcontroller 301 attempts to trip the interrupting device 315 in one or both of the following ways: (a) by maintaining the stimulation signal on the third conductor 356 into the initiation half-cycle of the AC wave, and/or (b) by generating a voltage at the EOL port (GP2) of the microcontroller 301. When EOL has been declared, the microcontroller 301 generates a voltage at the EOL port (GP2), for example because the automatic monitoring routine failed the necessary number of times and/or no power is being supplied from the supply voltage output (VS) of the GFCI IC device 350. Optionally, the microcontroller 301 may also use the value of the input signal at GP3 (as described above) to further determine whether the device has been in a tripped state. For example, if the microcontroller 301 determines that the device has tripped, e.g., the load and face contacts are not electrically connected to the line contacts (as illustrated in fig. 4), the microcontroller 301 may determine that it is not necessary to drive the SCR369 and/or the SCR361 to attempt to open the contacts and trip the device, and thus not drive the SCR369 and the SCR361 via the GP 2.

The voltage at GP2 directly drives the gates of SCR369 and/or SCR361 to turn SCR369 and/or SCR361 on, thus enabling it to conduct current and activate solenoid 362. More specifically, when SCR369 and/or SCR361 are turned on, current is drawn through coil 364 of dual coil solenoid 362. For example, the dual coil solenoid 362 includes: an inner primary coil 364 comprising an 800 turn, 18 ohm, 35AWG coil; and an outer secondary coil 363 comprising a 950 turn, 16.9 ohm, 33AWG coil. Further details of the construction and functionality of the dual coils 362 may be found in U.S. patent application serial No. 13/422,797, which is assigned to the same assignee as the present application and is incorporated herein by reference in its entirety.

As described above, when it is determined via the auto-monitoring routine that the detection circuit 352 has not successfully detected a ground fault, e.g., it has not detected flux due to current flowing in the conductor 356, or has otherwise generated a drive signal at the SCR _ OUT output port of the GFCI IC apparatus 350 to drive the gate of the SCR360 after such detection, the microcontroller 301 determines the EOL and attempts to trip the interrupting device 315 by the methods mentioned above. Specifically, the microcontroller 301 attempts to directly trip the direct drive primary coil 364 through the standby path GP2 to the

SCRs

369 and 361. However, there is at least one difference between the signal on conductor 356 when the auto-monitoring routine is operating normally and the signal on conductor 356 that is generated when EOL is determined. That is, under EOL conditions, the GP2 supplies the SCR361 and SCR369 to be triggered and the coil 362 and coil 363 to be energized, thereby activating the

solenoids

362 and 369 to trip the interrupting device 315.

The power on indicator circuit 321 will turn off if the interrupting device 315 turns off, or if the interrupting device 315 has been turned off otherwise. For example, in the embodiment shown in fig. 6A-6D, power on indicator circuit 321 includes an LED 322 in series with a resistor 323 and a diode 324. The cathode of LED 322 is connected to neutral load conductor 278 and the anode of diode 324 is connected to phase load conductor 277. Thus, when power is available at the load conductor, that is, the device is powered and in a reset state, current is drawn through the power-on circuit on each alternating half-cycle of AC power, thus illuminating the LEDs 322. On the other hand, if power is not available at the load conductors 277, 278, for example because the interrupting device 315 is open or tripped, or the device is reset but no power is applied, the LED 322 will be dark or not lit.

Additional embodiments and aspects thereof relating to automated monitoring functionality consistent with the present invention are provided below, as well as further discussion of some of the aspects that have been described.

The sinusoidal AC waveform discussed herein is connected to phase line terminal 326 and neutral line terminal 328 when the self-testing GFCI device is properly installed. According to one embodiment, the AC waveform is a 60Hz signal that contains two half cycles: a positive 8.333 ms half cycle and a negative 8.333 ms half cycle. The so-called "activation" half cycle refers to a particular half cycle, positive or negative, during which a gate trigger signal to SCR360 causes the respective gates of SCR361 and SCR369 to be driven, and the corresponding respective solenoid coils 363, 364 conduct current, thereby "activating" solenoid 362 and causing the armature of the solenoid to shift. The "non-start-up" half cycle refers to an alternate half cycle of the AC waveform, i.e., a negative or positive half cycle, during which current does not flow through the SCR or its corresponding solenoid coil, regardless of whether the SCR gate is triggered. According to an embodiment of the invention, whether a positive or negative half cycle is an activation half cycle is determined by a diode or some other switching device placed in series with the respective solenoid coil. For example, in fig. 6A-6D,

diodes

359, 374, and 367 are configured so that the positive half-cycle is the "start-up" half-cycle with respect to

SCRs

360, 369, and 361, respectively.

According to yet another embodiment of a circuit interrupting device consistent with the present invention, the microcontroller 301 optionally monitors the AC power input to the device. For example, the 60Hz AC input electrically connected to the phase line terminal 326 and the neutral line terminal 328 is monitored.

More specifically, a full 60Hz AC cycle takes approximately 16.333 milliseconds to complete. Thus, to monitor and confirm the receipt and stabilization of the AC waveform, a timer/counter within microcontroller 301 is implemented. For example, within a three (3) second automatic monitoring window, a 60Hz input signal is sampled every millisecond to identify the leading edge, i.e., the location where the signal changes from a negative value to a positive value. When a leading edge is detected, a flag is set in the software and the count is incremented. When the three (3) second test period ends, the count result is divided by 180 to determine if the frequency is within the specified range. For example, if the frequency settles at 60Hz, the result of the division by 180 will be 1.0, since there are 180 positive edges and 180 cycles within three (3) seconds worth of the 60Hz signal. If it is determined that the frequency is not within a given range, e.g., 50Hz to 70Hz, the automatic monitoring self-test fault test stops, but continues monitoring of the GP 3. Thus, when a circuit interrupting device according to the present invention is connected to a variable power source (e.g., a portable generator) and the power source exhibits a lower frequency at start-up and requires a settling period before an optimum frequency (e.g., 60Hz) is achieved, premature or false power failure determinations can be avoided.

If the frequency is not stable at the optimum frequency, or at least not within an acceptable range, then the start of the automatic monitoring routine is delayed until the frequency stabilizes. If the frequency does not achieve the optimal frequency, or a frequency within an acceptable range, within a predetermined time, the failure score is incremented. Similar to the failure score discussed previously with respect to the automatic monitoring routine, if the score reaches a given threshold, the microcontroller 301 declares EOL.

As described above, according to at least one exemplary embodiment, the programmable device 301 is implemented in a microcontroller. Because some microcontrollers include non-volatile memory, such as for storing various data in the event of a power interruption, etc., according to yet another embodiment, all events, timers, scores and/or states within the non-volatile memory are cleared upon power-up of the device. Thus, if a failure score or other condition arises due to improper device installation, insufficient or improper power, or some other non-severe condition with respect to the circuit interrupting device itself, the failure score resets upon power-up when the score increment event may no longer exist. Another way to avoid this potential problem according to the present invention is to utilize programmable devices that do not include non-volatile memory.

Accordingly, the present invention provides, among other things, GFCI receptacles having one or more line contact arms and one or more load contact arms. The line contact arms each have upper phase and neutral line contacts positioned on the curved portion of the line contact arm and lower phase and neutral line contacts positioned on the substantially straight portion of the line contact arm. The load contact arms each have phase and neutral load contacts positioned on curved portions of the load contact arms. Various features and advantages of the invention are set forth in the following claims.

Claims

1. A wiring device, comprising:

one or more line contact arms electrically connected to the line terminals, each line contact arm having

An upper line contact positioned on the curved portion of the line contact arm, an

A lower line contact positioned on a substantially straight portion of the line contact arm; and

one or more load contact arms electrically connected to a load terminal, each load contact arm having a load contact positioned on a curved portion of the load contact arm.

2. The wiring device recited in claim 1 wherein when said wiring device is in a closed position, a face contact and said upper line contact are electrically connected and said lower line contact and said load contact are electrically connected; and when the wiring device is in the open position, the face contact and the upper line contact are electrically disconnected, and the lower line contact and the load contact are electrically disconnected.

3. The wiring device recited in claim 1 wherein said face contact is in substantially flat connection with said upper line contact when said wiring device is in said closed position.

4. The wiring device recited in claim 1 wherein said lower line contact is in substantially flat connection with said load contact when said wiring device is in said closed position.

5. The wiring device recited in claim 1 wherein said bent portion of said line contact arm is bent at an angle of about three degrees to about six degrees with respect to said generally straight portion of said line contact arm.

6. The wiring device recited in claim 1 wherein said bent portion of said load contact arm is bent at an angle of about three degrees to about six degrees.

7. The wiring device recited in claim 1, further comprising a fault detection circuit that detects a fault condition in said wiring device and generates a fault detection signal upon detection of said fault condition, wherein said fault detection signal electrically disconnects said face contact from said upper line contact and electrically disconnects said lower line contact from said load contact.

8. A wiring device, comprising:

one or more line contact arms having

one or more load contact arms having a load contact positioned on a curved portion of the load contact arm.

9. The wiring device recited in claim 8 further comprising a fault detection circuit that detects a fault condition in said wiring device and generates a fault detection signal upon detection of said fault condition, wherein said fault detection signal electrically disconnects said face contact from said upper line contact and electrically disconnects said lower line contact from said load contact.

10. The wiring device recited in claim 8 further comprising

A face terminal for electrical connection to an external load, the face terminal being electrically connected to the upper line contact;

a line terminal for electrical connection to an external power supply, the line terminal being electrically connected to the one or more line contact arms; and

a load terminal for electrical connection to a second external load, the load terminal electrically connected to the one or more load contact arms.

11. The wiring device recited in claim 8 wherein said face contact is in substantially flat connection with said upper line contact when said wiring device is in a closed position.

12. The wiring device recited in claim 8 wherein said lower line contact is in substantially flat connection with said load contact when said wiring device is in said closed position.

13. The wiring device recited in claim 8 wherein said bent portion of said line contact arm is bent at an angle of about three degrees to about six degrees with respect to said generally straight portion of said line contact arm.

14. The wiring device recited in claim 8 wherein said bent portion of said load contact arm is bent at an angle of about three degrees to about six degrees.

15. A method of operating a wiring device, the method comprising:

providing one or more line contact arms, each line contact arm having

providing one or more load contact arms, each load contact arm having

A load contact positioned on the curved portion of the load contact arm.

16. The method of claim 15, further comprising:

electrically connecting the face contact with the upper line contact; and

electrically connecting the lower line contact with the load contact.

17. The method of claim 15, wherein the face contact is electrically connected with the upper line contact in a substantially flat connection.

18. The method of claim 15, wherein the lower line contact is electrically connected with the load contact in a substantially flat connection.

19. The method of claim 15, wherein the curved portion of the line contact arm is curved at an angle of about three degrees to about six degrees relative to the generally straight portion of the line contact arm.

20. The method of claim 15, wherein the curved portion of the load contact arm is curved at an angle of about three degrees to about six degrees.