CN113297083A - Cross-platform IC test method, device, equipment and medium - Google Patents

Cross-platform IC test method, device, equipment and medium Download PDF

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CN113297083A
CN113297083A CN202110583845.8A CN202110583845A CN113297083A CN 113297083 A CN113297083 A CN 113297083A CN 202110583845 A CN202110583845 A CN 202110583845A CN 113297083 A CN113297083 A CN 113297083A
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test
instruction
platform
area
case
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CN113297083B (en
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冯鹏
沈欣舞
吴睿振
王芳
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Shandong Yunhai Guochuang Cloud Computing Equipment Industry Innovation Center Co Ltd
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Shandong Yunhai Guochuang Cloud Computing Equipment Industry Innovation Center Co Ltd
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/36Preventing errors by testing or debugging software
    • G06F11/3668Software testing
    • G06F11/3672Test management
    • G06F11/3684Test management for test design, e.g. generating new test cases
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/36Preventing errors by testing or debugging software
    • G06F11/3668Software testing
    • G06F11/3672Test management
    • G06F11/3688Test management for test execution, e.g. scheduling of test suites

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  • Computer Hardware Design (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
  • Tests Of Electronic Circuits (AREA)

Abstract

The application discloses a cross-platform IC test method, a device, equipment and a medium, comprising the following steps: loading a test case to obtain a test program; the test case is packaged with a pre-created test operation definition, and the test operation definition is converted into a corresponding test instruction in the loading process; appointing an IC test platform for the test instruction; and executing the test program, analyzing the test instruction into identifiable data of the corresponding IC test platform, and sending the identifiable data to the corresponding IC test platform so that the IC test platform can execute the operation corresponding to the identifiable data to obtain an execution result corresponding to the test instruction. Therefore, the multiplexing of the test cases on a plurality of test platforms can be realized, and the test instructions are debugged without debugging the test program, thereby improving the IC test efficiency.

Description

Cross-platform IC test method, device, equipment and medium
Technical Field
The present application relates to the field of IC testing, and in particular, to a cross-platform IC testing method, apparatus, device, and medium.
Background
As the functions of IC chips (i.e., Integrated Circuit chips) become more and more complex, the number of test methods and test platforms increases, and even when a plurality of platforms are jointly tested, the complexity of test cases increases. Common test platforms include VCS (compiled Verilog simulator) simulation testing, FPGA (Field Programmable Gate Array) simulation testing, hybrid simulation testing, and Sample testing. At present, for repeated test cases, cross-platform conversion needs to be carried out, the test cases are converted into test programs needed by each test platform, the test programs are debugged, and due to the complex characteristics of the test programs, a great deal of workload exists in the test program conversion and test program debugging processes.
Disclosure of Invention
In view of this, an object of the present application is to provide a cross-platform IC testing method, apparatus, device and medium, which can implement multiplexing of test cases on multiple test platforms, and debug test instructions without debugging test programs, thereby improving IC testing efficiency. The specific scheme is as follows:
in a first aspect, the present application discloses a cross-platform IC testing method, comprising:
loading a test case to obtain a test program; the test case is packaged with a pre-created test operation definition, and the test operation definition is converted into a corresponding test instruction in the loading process;
appointing an IC test platform for the test instruction;
and executing the test program, analyzing the test instruction into identifiable data of the corresponding IC test platform, and sending the identifiable data to the corresponding IC test platform so that the IC test platform can execute the operation corresponding to the identifiable data to obtain an execution result corresponding to the test instruction.
Optionally, the specifying an IC test platform for the test instruction includes:
an IC test platform is appointed for the test case through a UI interface so as to obtain the IC test platform corresponding to each test instruction in the test case;
or, directly appointing an IC test platform for the test instruction in the test case through a UI interface.
Optionally, the parsing the test instruction into the corresponding identifiable data of the IC test platform includes:
analyzing the test instruction with the first state bit and the second state bit both in an open state into corresponding identifiable data of the IC test platform;
the first state bit is a state bit of a test case to which the test instruction belongs, and the second state bit is a state bit corresponding to the test instruction.
Optionally, the loading the test case includes:
loading a preset test set, wherein the preset test set comprises a plurality of modules, each module is a module formed by packaging a plurality of functions, and each function is a function formed by packaging a plurality of test cases.
Optionally, after the loading the preset test set, the method further includes:
displaying each test case in a case management area of a UI (user interface);
when a mouse click event occurs, loading a test instruction corresponding to a corresponding test case to an instruction list area of the UI from an automatic program conversion area and an auxiliary instruction area in the preset test set, and loading input data information in an input data information area and output data information in an output information area which are pre-created in the preset test set and correspond to the corresponding test case to a data list area of the UI; the automatic program conversion area comprises a test operation definition corresponding to a target key instruction, and the auxiliary instruction area comprises a test operation definition corresponding to a non-target key instruction;
and the UI interface also comprises an information output area which is used for displaying the sending record corresponding to the test instruction and the execution result.
Optionally, the method further includes:
and adding the execution result to a result judgment area of the preset test set so as to compare the execution result with an expected value field corresponding to the execution result in the result judgment area to obtain a test result.
Optionally, the method further includes:
and if the test result is that the test is not passed, taking the module corresponding to the test result as a target module, selecting the target module through a register module selection area of the UI interface, reading the values of all registers corresponding to the target module, and displaying the values of the registers in a register display area of the UI interface.
In a second aspect, the present application discloses a cross-platform IC testing apparatus, comprising:
the test program generating module is used for loading a test case to obtain a test program; the test case is packaged with a pre-created test operation definition, and the test operation definition is converted into a corresponding test instruction in the loading process;
the IC test platform appointing module is used for appointing an IC test platform for the test instruction;
and the test program execution module is used for executing the test program, resolving the test instruction into identifiable data of the corresponding IC test platform, and sending the identifiable data to the corresponding IC test platform so that the IC test platform executes the operation corresponding to the identifiable data to obtain an execution result corresponding to the test instruction.
In a third aspect, the present application discloses an electronic device, comprising:
a memory for storing a computer program;
and the processor is used for executing the computer program to realize the cross-platform IC testing method.
In a fourth aspect, the present application discloses a computer readable storage medium for storing a computer program which, when executed by a processor, implements the cross-platform IC testing method described above.
Therefore, the test case is loaded to obtain the test program; the test case is packaged with a pre-created test operation definition, the test operation definition is converted into a corresponding test instruction in the loading process, then an IC test platform is assigned to the test instruction, the test program is executed, the test instruction is analyzed into identifiable data of the corresponding IC test platform, and the identifiable data is sent to the corresponding IC test platform, so that the IC test platform executes the operation corresponding to the identifiable data to obtain an execution result corresponding to the test instruction. Therefore, the operation definition of the pre-test is packaged in the test case, one test operation is replaced by the corresponding test instruction when the test case is loaded, the IC test platform is appointed for the test instruction, the test program is executed, the test instruction is analyzed into the identifiable data of the corresponding IC test platform and then sent to the corresponding IC test platform, the test case can be reused on a plurality of test platforms, the test program does not need to be debugged, the test instruction is debugged, and therefore the IC test efficiency is improved.
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In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings needed to be used in the description of the embodiments or the prior art will be briefly introduced below, it is obvious that the drawings in the following description are only embodiments of the present application, and for those skilled in the art, other drawings can be obtained according to the provided drawings without creative efforts.
FIG. 1 is a flow chart of a cross-platform IC testing method disclosed in the present application;
FIG. 2 is a schematic diagram of a specific example case management UI interface disclosed herein;
FIG. 3 is a schematic illustration of a UI interface of a test tool disclosed herein;
FIG. 4 is a flowchart of a specific cross-platform IC testing method disclosed herein;
FIG. 5 is a schematic diagram of a specific default test set interface disclosed herein;
FIG. 6 is a UI interface diagram of a particular register display area disclosed herein;
FIG. 7 is a schematic structural diagram of a cross-platform IC testing apparatus disclosed in the present application;
fig. 8 is a block diagram of an electronic device disclosed in the present application.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
At present, for repeated test cases, cross-platform conversion needs to be carried out, the test cases are converted into test programs needed by each test platform, the test programs are debugged, and due to the complex characteristics of the test programs, a great deal of workload exists in the test program conversion and test program debugging processes. Therefore, the application provides a cross-platform IC test scheme, multiplexing of test cases on a plurality of test platforms can be realized, a test program does not need to be debugged, test instructions are debugged, and therefore IC test efficiency is improved.
Referring to fig. 1, an embodiment of the present application discloses a cross-platform IC testing method, including:
step S11: loading a test case to obtain a test program; the test case is packaged with a pre-created test operation definition, and the test operation definition is converted into a corresponding test instruction in the loading process.
In a specific embodiment, a preset test set may be loaded, where the preset test set includes a plurality of modules, each module is a module that encapsulates a plurality of functions, and each function is a function that encapsulates a plurality of test cases.
The pre-created test operation definition of the package in the test case is the test operation definition created according to the verification requirement of the IC chip.
It can be understood that, in the embodiment of the present application, through multi-level management of test cases, functions, and modules, search of test operation definitions is facilitated, and after the test operation definitions are converted into test instructions, search and test of the test instructions are also facilitated.
Step S12: an IC test platform is specified for the test instruction.
In a specific implementation manner, an IC test platform may be specified for the test case through a UI interface to obtain an IC test platform corresponding to each test instruction in the test case; or, directly appointing an IC test platform for the test instruction in the test case through a UI interface.
That is, corresponding IC test platform fields exist in both the UI interface test case and the test instruction.
Step S13: and executing the test program, analyzing the test instruction into identifiable data of the corresponding IC test platform, and sending the identifiable data to the corresponding IC test platform so that the IC test platform can execute the operation corresponding to the identifiable data to obtain an execution result corresponding to the test instruction.
In a specific embodiment, the test instruction in which the first status bit and the second status bit are both in the on state may be parsed into the identifiable data of the corresponding IC test platform; the first state bit is a state bit of a test case to which the test instruction belongs, and the second state bit is a state bit corresponding to the test instruction.
In a specific embodiment, the state of the test case or the test instruction may be set to be on or off through the UI interface, and the corresponding test case or test instruction is not executed when the test case or the test instruction is off. That is, the UI interface has a status bit field of the test case and the test instruction, and the corresponding test case or test instruction can be virtually deleted through the status bit field.
In a specific implementation manner, each test case may be displayed in a case management area of the UI interface in this embodiment.
For example, as shown in fig. 2, fig. 2 is a specific UI interface diagram of the use case management area disclosed in the embodiment of the present application. The management of the test Case (use Case) is also a very important part of the test work due to the complexity of the test requirements; in order to realize flexible test Case management, the visual tree structure is used for displaying the test cases, modules (modules) to which the test cases belong and the test cases to which the test instructions belong can be clearly seen through the tree structure, the cases can be copied, moved or deleted through single-selection or multi-selection and then dragging, the instructions can be copied, moved or deleted through the single-selection or multi-selection instructions and then dragging, and the cases can be reused in a nested mode to further avoid repeated Case modification. Each Case and the instruction have corresponding platforms, and the multi-platform instruction mixed transmission of a single Case can be realized; each Case and each instruction have corresponding status bits, so that the instructions can be virtually deleted without changing the cases, and great convenience is provided for verifying Debug.
When a mouse click event occurs, loading a test instruction corresponding to a corresponding test case to an instruction list area of the UI from an automatic program conversion area and an auxiliary instruction area in the preset test set, and loading input data information in an input data information area and output data information in an output information area which are pre-created in the preset test set and correspond to the corresponding test case to a data list area of the UI; the automatic program conversion area comprises a test operation definition corresponding to a target key instruction, and the auxiliary instruction area comprises a test operation definition corresponding to a non-target key instruction.
Specifically, after the test set is loaded, the information in the instruction set management information area of the test set can be automatically loaded into the use Case management area of the UI interface, the test instructions corresponding to the automation instruction area and the auxiliary instruction area can be automatically loaded into the instruction list area of the UI by operating the names of the cases, for example, double-clicking or single-clicking the names of the cases, and the data in the input data information area and the output data information area are loaded into the data list area.
It should be noted that the instruction set adopted in the embodiment of the present application mainly includes an initialization instruction, a functional instruction, a management instruction, a comprehensive instruction, and a custom instruction; the initialization instruction mainly completes initialization of management software and a hardware system, the functional instruction mainly realizes related functions of verification purposes, such as operation of a register, generation and processing of data and the like, and the administrative instruction is responsible for adding and deleting an instruction queue, adjusting priority and starting and stopping a task executor; the comprehensive instruction is any set of an initialization instruction, a functional instruction and a management instruction to realize multiplexing of higher-level instructions; and completing verification work through the cases of the instruction combinations, and completing the expansion of the instruction set in a self-defined instruction mode when the instruction set does not meet the verification requirement, so as to finally meet the verification requirement.
In a specific embodiment, the instruction in the instruction list area may be a test set loading instruction, and the test case is clicked and loaded into the instruction list area, or a preset file is loaded into the instruction list area, and the instruction set is displayed in the instruction list area.
Further, the user may drag the instruction set list to the tree display of the test set to implement the addition of the instruction, that is, to display the test instruction in the tree display of the test set.
And the UI interface also comprises an information output area which is used for displaying the sending record corresponding to the test instruction and the execution result. That is, the information output area is used for sending records of instructions and displaying return values corresponding to the instructions, so that the instructions and instruction return results corresponding to each test case can be conveniently checked, the information output area can adopt tree-shaped display arranged according to the test cases, each test case can be set to different colors, a user can conveniently classify and distinguish the instructions, and the information in the information output area supports screening according to the instructions so as to facilitate comparison of output results of the same instructions by testers.
Referring to fig. 3, fig. 3 is a schematic view of a UI interface of a testing tool disclosed in an embodiment of the present application. The system comprises an instruction list area, a data list area, a case management area (use case management area), a register module selection area and a register display area. The following embodiments may be referred to with respect to the specific contents of the register module selection area and the register display area. The test tool is realized based on the cross-platform IC test scheme disclosed by the application.
Therefore, the test case is loaded first to obtain the test program; the test case is packaged with a pre-created test operation definition, the test operation definition is converted into a corresponding test instruction in the loading process, then an IC test platform is assigned to the test instruction, the test program is executed, the test instruction is analyzed into identifiable data of the corresponding IC test platform, and the identifiable data is sent to the corresponding IC test platform, so that the IC test platform executes the operation corresponding to the identifiable data to obtain an execution result corresponding to the test instruction. Therefore, the operation definition of the pre-test is packaged in the test case, one test operation is replaced by the corresponding test instruction when the test case is loaded, the IC test platform is appointed for the test instruction, the test program is executed, the test instruction is analyzed into the identifiable data of the corresponding IC test platform and then sent to the corresponding IC test platform, the test case can be reused on a plurality of test platforms, the test program does not need to be debugged, the test instruction is debugged, and therefore the IC test efficiency is improved.
Referring to fig. 4, an embodiment of the present application discloses a specific cross-platform IC testing method, including:
step S21: loading a test case to obtain a test program; the test case is packaged with a pre-created test operation definition, and the test operation definition is converted into a corresponding test instruction in the loading process.
Step S22: an IC test platform is specified for the test instruction.
Step S23: and executing the test program, analyzing the test instruction into identifiable data of the corresponding IC test platform, and sending the identifiable data to the corresponding IC test platform so that the IC test platform can execute the operation corresponding to the identifiable data to obtain an execution result corresponding to the test instruction.
For the specific implementation of the above steps S21 to S23, reference may be made to the disclosure of the foregoing embodiments, which are not repeated herein.
Step S24: and adding the execution result to a result judgment area of a preset test set, and comparing the execution result with an expected value field corresponding to the execution result in the result judgment area to obtain a test result.
It should be noted that, in the embodiment of the present application, the UI and the test set are used in combination, the instructions of the test set may be automatically loaded to the UI interface, and the execution result of each instruction may be selectively and automatically filled in the result determination area of the test set, so as to further reduce the workload of testing and implement one-key generation of the test report.
Referring to fig. 5, fig. 5 is a schematic diagram of a specific preset test set interface disclosed in the embodiment of the present application.
The design of Checklist (test set) with functional partitions, which include, according to the common form of IC testing: an instruction set management information area, an instruction description area, an automatic program conversion area, an auxiliary instruction area, an input data information area, an output data information area, a result determination area, and a comment description area, wherein,
command set management information area: the test operation definition of the instruction is packaged into Case (test Case), the Case is packaged into function, the collection of the function is module, the collection of the module is Checklist, the region completes the level management of the test operation definition of the instruction, and the search and the test are convenient.
An instruction description area: the functions of the test operation definition corresponding to the key instruction and the functions of the Case verification are described, so that the test personnel can conveniently check the functions and the test Checklist can be conveniently handed over and further optimized.
Input data information area: the information containing test input data may include data input to an entire test case or input data for a single test instruction in the form of data information plus an operation definition ID.
Automatic program switching area: the test operation definition corresponding to the target key instruction can be directly converted into a test instruction, so that the work of preparing a test program is reduced;
an auxiliary instruction area: the method comprises the test operation definition corresponding to the non-target key instruction, such as the test operation definition of the reset instruction. The format is the form of the operation definition plus the Case ID to represent the scope to which the test operation definition belongs.
Output data information area: the information containing the test output data may contain data output to the entire case or input data for a single instruction, in the form of data information plus an instruction ID.
A result determination area: the method comprises fields such as theoretical values, namely expected values, actual values and test results, and can realize automatic judgment of the test results by integrating the fields, so that the test results are prevented from being manually input after testing, and the test effect and the accuracy of the test results are further improved.
Comment description area: including the description of the entire Case, facilitates understanding of the test Case and increases the accuracy of the test Case.
It should be noted that in the embodiment of the present application, the test set adopts a multi-functional partition design, and the above-mentioned several functional partitions are taken as examples, but the functional partitions of the actual test set may adopt more or a variation of the example partitions. By adopting the program conversion area, the test operation definition in the test set can be automatically converted into the test instruction, and the repeated development of the test set and the test instruction is reduced. And the test Checklist and the test instruction are separately realized, so that the parallel development of the test program is realized, and the development efficiency of the test program and the management difficulty of the test program development are improved.
Step S25: and if the test result is that the test is not passed, taking the module corresponding to the test result as a target module, selecting the target module through a register module selection area of the UI interface, reading the values of all registers corresponding to the target module, and displaying the values of the registers in a register display area of the UI interface.
It should be noted that, in the IC design, the registers are numerous, so that the fast and accurate positioning of the registers can increase the writing speed of the test program, the register module selection area can realize module-by-module classification, search, selection and screening of the registers, the reading and writing of the registers are realized by the modules, and the Default value verification of the registers is realized by the modules; and the screened registers can be added into the case management area instruction in a reading or writing mode by dragging or adding a right key, so that the writing speed and accuracy of the test program are further accelerated. And selecting a register in the module list of the register, and then adding an instruction for reading and writing the register to the tree-shaped display of the test set by using a right key, wherein a user can select the instruction of the tree-shaped display of the test set to move another area of the added tree-shaped display of the test set to realize the copy of the instruction.
Referring to fig. 6, fig. 6 is a schematic view of a UI interface of a specific register display area disclosed in the embodiment of the present application. Generally, an IC register can be divided into different bit domains, the bit domains can be combined into fields, each field of the register can be displayed in the embodiment of the application, the function can enable program writing to avoid repeated viewing of specifications, a register display area can display a list of a single module register and detailed information of the single register, reading and writing of the single register can be achieved, a written value of the single register can be edited, rapid editing can be achieved according to a corresponding field in detail, and a read value of the register can be interpreted into the meaning of the corresponding field.
The specific implementation process of the application is as follows: the method comprises the steps of firstly collecting test requirements, fully collecting the test requirements and having a vital role in the division of operation definition and the realization of a test set, wherein the test requirements not only relate to the functional requirements of specific modules, but also relate to the mutual relations and the sequence relations among the modules. The division of the operation definition set comprises the steps of providing corresponding operation definitions according to the functional requirements of the modules, analyzing the dependency relationship of the operation definitions according to the relationship among the modules, further adding and deleting the operation definition set and combining the operation definitions with the mutual dependency relationship, and avoiding the problem of introduction of improper use of the test set. The implementation of the operation definition, which mainly completes the implementation of the divided operation definition set function on different test platforms; each operation defines a function of the corresponding platform to achieve the reusability and clear logical properties of the operation definition. If the operation definition in the operation definition set has a corresponding implementation in the constructed library, directly using the implementation in the library in a reuse mode, otherwise, re-implementing the operation definition; and (3) developing test cases and test management UIs in the test Checklist and the test program according to the operation definition, wherein the process and the operation definition can be realized in parallel. In the testing process, the test management UI is used for loading the Checklist to obtain the testing program and carry out configuration of the testing instruction, the test management UI is used for sending the corresponding testing instruction to the corresponding testing platform, and the corresponding testing platform calls the implementation of the corresponding operation definition to execute the corresponding operation. That is, in the present application, the operation definition in the test set is loaded to the UI interface, and then converted into a corresponding test instruction (i.e., an instruction that can be sent to the platform), and the test instruction is configured, for example, configured as an FPGA test platform, and then the test instruction is converted into FPGA test platform recognizable data of the FPGA and sent to the FPGA test platform, and the FPGA test platform invokes implementation of the corresponding operation definition to execute the corresponding operation.
Referring to fig. 7, an embodiment of the present application discloses a cross-platform IC testing apparatus, including:
the test program generating module 11 is used for loading a test case to obtain a test program; the test case is packaged with a pre-created test operation definition, and the test operation definition is converted into a corresponding test instruction in the loading process;
an IC test platform designation module 12, configured to designate an IC test platform for the test instruction;
the test program executing module 13 is configured to execute the test program, resolve the test instruction into identifiable data of the corresponding IC test platform, and send the identifiable data to the corresponding IC test platform, so that the IC test platform executes an operation corresponding to the identifiable data to obtain an execution result corresponding to the test instruction.
Therefore, the test case is loaded first to obtain the test program; the test case is packaged with a pre-created test operation definition, the test operation definition is converted into a corresponding test instruction in the loading process, then an IC test platform is assigned to the test instruction, the test program is executed, the test instruction is analyzed into identifiable data of the corresponding IC test platform, and the identifiable data is sent to the corresponding IC test platform, so that the IC test platform executes the operation corresponding to the identifiable data to obtain an execution result corresponding to the test instruction. Therefore, the operation definition of the pre-test is packaged in the test case, one test operation is replaced by the corresponding test instruction when the test case is loaded, the IC test platform is appointed for the test instruction, the test program is executed, the test instruction is analyzed into the identifiable data of the corresponding IC test platform and then sent to the corresponding IC test platform, the test case can be reused on a plurality of test platforms, the test program does not need to be debugged, the test instruction is debugged, and therefore the IC test efficiency is improved.
The IC test platform specifying module 12 is specifically configured to specify an IC test platform for the test case through a UI interface to obtain an IC test platform corresponding to each test instruction in the test case; or, directly appointing an IC test platform for the test instruction in the test case through a UI interface.
The test program execution module 13 is specifically configured to parse the test instruction in which the first status bit and the second status bit are both in the on state into the identifiable data of the corresponding IC test platform; the first state bit is a state bit of a test case to which the test instruction belongs, and the second state bit is a state bit corresponding to the test instruction.
The test program generating module 11 is specifically configured to load a preset test set, where the preset test set includes a plurality of modules, each module is a module that encapsulates a plurality of functions, and each function is a function that encapsulates a plurality of test cases.
The device is also used for displaying each test case in a case management area of the UI interface; when a mouse click event occurs, loading a test instruction corresponding to a corresponding test case to an instruction list area of the UI from an automatic program conversion area and an auxiliary instruction area in the preset test set, and loading input data information in an input data information area and output data information in an output information area which are pre-created in the preset test set and correspond to the corresponding test case to a data list area of the UI; the automatic program conversion area comprises a test operation definition corresponding to a target key instruction, and the auxiliary instruction area comprises a test operation definition corresponding to a non-target key instruction;
and the UI interface also comprises an information output area which is used for displaying the sending record corresponding to the test instruction and the execution result.
The device further comprises an execution result adding module, which is used for adding the execution result to a result judgment area of the preset test set so as to compare the execution result with an expected value field corresponding to the execution result in the result judgment area to obtain a test result.
The device also comprises a register reading module used for taking the module corresponding to the test result as a target module if the test result is that the test is not passed, selecting the target module through the register module selection area of the UI interface, reading the values of all registers corresponding to the target module,
the device also comprises a register value display module used for displaying the value of the register in the register display area of the UI interface.
Referring to fig. 8, an embodiment of the present application discloses an electronic device 20, which includes a processor 21 and a memory 22; wherein, the memory 22 is used for saving computer programs; the processor 21 is configured to execute the computer program, and the cross-platform IC testing method disclosed in the foregoing embodiments.
For the specific process of the cross-platform IC testing method, reference may be made to the corresponding contents disclosed in the foregoing embodiments, and details are not repeated here.
The memory 22 is used as a carrier for resource storage, and may be a read-only memory, a random access memory, a magnetic disk or an optical disk, and the storage mode may be a transient storage mode or a permanent storage mode.
In addition, the electronic device 20 further includes a power supply 23, a communication interface 24, an input-output interface 25, and a communication bus 26; the power supply 23 is configured to provide an operating voltage for each hardware device on the electronic device 20; the communication interface 24 can create a data transmission channel between the electronic device 20 and an external device, and a communication protocol followed by the communication interface is any communication protocol applicable to the technical solution of the present application, and is not specifically limited herein; the input/output interface 25 is configured to obtain external input data or output data to the outside, and a specific interface type thereof may be selected according to a specific application requirement, which is not specifically limited herein.
Further, an embodiment of the present application also discloses a computer-readable storage medium for storing a computer program, wherein the computer program, when executed by a processor, implements the cross-platform IC testing method disclosed in the foregoing embodiment.
For the specific process of the cross-platform IC testing method, reference may be made to the corresponding contents disclosed in the foregoing embodiments, and details are not repeated here.
The embodiments are described in a progressive manner, each embodiment focuses on differences from other embodiments, and the same or similar parts among the embodiments are referred to each other. The device disclosed by the embodiment corresponds to the method disclosed by the embodiment, so that the description is simple, and the relevant points can be referred to the method part for description.
The steps of a method or algorithm described in connection with the embodiments disclosed herein may be embodied directly in hardware, in a software module executed by a processor, or in a combination of the two. A software module may reside in Random Access Memory (RAM), memory, Read Only Memory (ROM), electrically programmable ROM, electrically erasable programmable ROM, registers, hard disk, a removable disk, a CD-ROM, or any other form of storage medium known in the art.
The cross-platform IC testing method, device, equipment and medium provided by the present application are introduced in detail, and a specific example is applied in the present application to explain the principle and the implementation of the present application, and the description of the above embodiment is only used to help understand the method and the core idea of the present application; meanwhile, for a person skilled in the art, according to the idea of the present application, there may be variations in the specific embodiments and the application scope, and in summary, the content of the present specification should not be construed as a limitation to the present application.

Claims (10)

1. A cross-platform IC testing method, comprising:
loading a test case to obtain a test program; the test case is packaged with a pre-created test operation definition, and the test operation definition is converted into a corresponding test instruction in the loading process;
appointing an IC test platform for the test instruction;
and executing the test program, analyzing the test instruction into identifiable data of the corresponding IC test platform, and sending the identifiable data to the corresponding IC test platform so that the IC test platform can execute the operation corresponding to the identifiable data to obtain an execution result corresponding to the test instruction.
2. The cross-platform IC testing method of claim 1, wherein said specifying an IC test platform for the test instruction comprises:
an IC test platform is appointed for the test case through a UI interface so as to obtain the IC test platform corresponding to each test instruction in the test case;
or, directly appointing an IC test platform for the test instruction in the test case through a UI interface.
3. The cross-platform IC testing method of claim 1, wherein the parsing the test instructions into identifiable data of the corresponding IC testing platform comprises:
analyzing the test instruction with the first state bit and the second state bit both in an open state into corresponding identifiable data of the IC test platform;
the first state bit is a state bit of a test case to which the test instruction belongs, and the second state bit is a state bit corresponding to the test instruction.
4. The cross-platform IC test method of claim 1, wherein the loading of test cases comprises:
loading a preset test set, wherein the preset test set comprises a plurality of modules, each module is a module formed by packaging a plurality of functions, and each function is a function formed by packaging a plurality of test cases.
5. The cross-platform IC testing method according to claim 4, further comprising, after loading the predetermined test set:
displaying each test case in a case management area of a UI (user interface);
when a mouse click event occurs, loading a test instruction corresponding to a corresponding test case to an instruction list area of the UI from an automatic program conversion area and an auxiliary instruction area in the preset test set, and loading input data information in an input data information area and output data information in an output information area which are pre-created in the preset test set and correspond to the corresponding test case to a data list area of the UI; the automatic program conversion area comprises a test operation definition corresponding to a target key instruction, and the auxiliary instruction area comprises a test operation definition corresponding to a non-target key instruction;
and the UI interface also comprises an information output area which is used for displaying the sending record corresponding to the test instruction and the execution result.
6. The cross-platform IC testing method of claim 4, further comprising:
and adding the execution result to a result judgment area of the preset test set so as to compare the execution result with an expected value field corresponding to the execution result in the result judgment area to obtain a test result.
7. The cross-platform IC testing method of claim 5, further comprising:
and if the test result is that the test is not passed, taking the module corresponding to the test result as a target module, selecting the target module through a register module selection area of the UI interface, reading the values of all registers corresponding to the target module, and displaying the values of the registers in a register display area of the UI interface.
8. A cross-platform IC test apparatus, comprising:
the test program generating module is used for loading a test case to obtain a test program; the test case is packaged with a pre-created test operation definition, and the test operation definition is converted into a corresponding test instruction in the loading process;
the IC test platform appointing module is used for appointing an IC test platform for the test instruction;
and the test program execution module is used for executing the test program, resolving the test instruction into identifiable data of the corresponding IC test platform, and sending the identifiable data to the corresponding IC test platform so that the IC test platform executes the operation corresponding to the identifiable data to obtain an execution result corresponding to the test instruction.
9. An electronic device, comprising:
a memory for storing a computer program;
a processor for executing the computer program to implement the cross-platform IC testing method of any one of claims 1 to 7.
10. A computer-readable storage medium for storing a computer program which, when executed by a processor, implements the cross-platform IC testing method of any one of claims 1 to 7.
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