CN113296567A

CN113296567A - Voltage self-following anti-reverse-filling circuit

Info

Publication number: CN113296567A
Application number: CN202110434523.7A
Authority: CN
Inventors: 黎毅辉; 范律; 肖林松; 李俊; 汤可; 王�锋; 陈岗
Original assignee: Willfar Information Technology Co Ltd
Current assignee: Willfar Information Technology Co Ltd
Priority date: 2021-04-22
Filing date: 2021-04-22
Publication date: 2021-08-24
Anticipated expiration: 2041-04-22
Also published as: CN113296567B

Abstract

The invention relates to a voltage self-following anti-reverse-filling circuit which comprises N diodes, a PMOS (P-channel metal oxide semiconductor) tube and a resistor, wherein the N diodes are connected with the PMOS tube through the resistor; the voltage input end of the voltage self-following reverse-filling prevention circuit is connected with anodes of the N diodes and a drain electrode of the PMOS tube, the voltage output end of the voltage self-following reverse-filling prevention circuit is connected with cathodes of the N diodes and a source electrode of the PMOS tube, a grid electrode of the PMOS tube is connected with an external control signal input end, and the external control signal input end can output high and low levels to control the on and off of the PMOS tube; one end of the resistor is connected with the source electrode of the PMOS tube, and the other end of the resistor is connected with the grid electrode of the PMOS tube; the number N of the N diodes is an integer larger than 0. The circuit is applied to a constant-current charging and boosting discharging circuit of a battery or a super capacitor module, and can prevent reverse filling caused by excessive leakage current and realize accurate and controllable constant-current charging cut-off voltage and boosting discharging voltage.

Description

Voltage self-following anti-reverse-filling circuit

Technical Field

The invention relates to the technical field of instruments and intelligent distribution networks, in particular to a voltage self-following anti-reverse-irrigation circuit.

Background

In the process of charging the battery or the super capacitor module at a constant current, if the input end of the constant current DC/DC chip is powered down, and the output end has higher voltage, the output end of the constant current DC/DC chip can output higher leakage current to the input end, and the leakage current is light, so that the constant current DC/DC chip cannot work normally, such as hiccup type repeated starting, direct input and output and the like, the constant current DC/DC chip can be seriously caused to be abnormally high temperature and burnt, and even the battery or the super capacitor module is instantaneously short-circuited to explode. Therefore, an anti-reverse-filling circuit must be arranged between the constant-current charging DC/DC chip and the battery or the super capacitor module to solve the problem. The scheme that is widely adopted at present adopts a diode with small leakage current as an anti-reverse-flow circuit. In the scheme, the diode voltage drop changes along with the change of the current magnitude, so that the final charging cut-off voltage of the battery or the super capacitor module is uncertain, and the actual achieved charging voltage cannot be completely consistent with the designed charging voltage.

In the process of boosting and discharging the battery or the super capacitor module, if the input end of the boosting DC/DC chip is free of electricity and the output end of the boosting DC/DC chip has higher voltage, the output of the boosting DC/DC chip has higher leakage current to the input, the boosting DC/DC chip also has abnormal work due to the leakage current, the chip is slightly hiccup-type repeatedly started or the input and output are directly communicated, and the chip is abnormally heated, burnt or even the battery or the super capacitor module is instantaneously short-circuited and exploded due to the heavy phenomenon. Therefore, an anti-reverse-flow circuit must be added between the boost discharge DC/DC and the system power supply. At present, the widely adopted scheme is to adopt a diode with smaller leakage current as an anti-reverse-flow circuit. In this scheme, the diode voltage drop changes with the change of the current magnitude, so that the boosted voltage is uncertain, and the fact that the actually achieved boosted voltage is completely consistent with the designed voltage cannot be realized.

The application publication number of the invention is CN108565961A, which discloses a reverse-filling prevention power supply automatic switching no-voltage-loss output circuit, comprising a first power supply end, a second power supply end, a power supply device and a power supply automatic switching no-voltage-loss output circuit; the power supply automatic switching no-voltage-loss output circuit comprises a voltage reducer U2, field effect transistors Q1, Q2 and Q3; the positive electrode of the first power supply end is connected with the input end of the U2, the voltage output end of the U2 is respectively connected with power supply equipment and the drain electrode of the Q1, the grounding end of the U2 is connected with the drain electrode of the Q3, and the source electrode of the Q3 is grounded; the gate of Q3 is respectively connected with the gate of Q1 and the gate of Q2, the source of Q1 is connected with the source of Q2, and the drain of Q2 is connected with the positive electrode of the second power supply end; the negative poles of the first power supply end and the second power supply end are grounded. The circuit ensures that the output voltage has continuity when power supply is switched, ensures stable operation of equipment, can prevent loss and device damage caused by backward flow between currents, and ensures more stable output voltage. The circuit uses two MOS tubes to realize the equalization of the voltages at two ends of the anti-reverse-flow circuit, but the grid level bound together is required to be in a certain level state by the combination of the two MOS tubes, and the continuous change is not allowed. If the voltage at the two ends of the reverse-filling prevention circuit continuously changes, the circuit cannot work. In the constant-current charging process, the output voltage of the constant-current DC/DC chip is increased along with the continuous increase of the voltage of the battery or the super capacitor module, so that the circuit cannot realize the functions of reverse filling prevention and no voltage loss in the constant-current charging process.

Disclosure of Invention

The invention aims to solve the technical problem of providing a voltage self-following anti-reverse-charging circuit which can prevent reverse charging caused by excessive leakage current and can realize accurate and controllable constant current charging cut-off voltage and boosting discharge voltage in the constant current charging and boosting discharge processes of a battery or a super capacitor module.

In order to solve the technical problem, the invention provides a voltage self-following anti-reverse-charging circuit which can be used in a constant-current charging circuit and a boosting discharging circuit of a battery or a super capacitor module, and is characterized in that:

the device comprises N diodes, a PMOS tube and a resistor; the voltage input end of the voltage self-following reverse-filling prevention circuit is connected with anodes of the N diodes and a drain electrode of the PMOS tube, the voltage output end of the voltage self-following reverse-filling prevention circuit is connected with cathodes of the N diodes and a source electrode of the PMOS tube, a grid electrode of the PMOS tube is connected with an external control signal input end, and the external control signal input end can output high and low levels to control the on and off of the PMOS tube; one end of the resistor is connected with the source electrode of the PMOS tube, and the other end of the resistor is connected with the grid electrode of the PMOS tube; the number N of the N diodes is an integer larger than 0.

Furthermore, the voltage self-following anti-reverse-filling circuit further comprises a control circuit, wherein the control circuit comprises a controllable switch element and a resistor; the control end of the controllable switch element is connected with an external control signal through the resistor, one switch end of the controllable switch element is connected with the grid electrode of the PMOS tube, and the other switch end of the controllable switch element is grounded.

Furthermore, the diode in the voltage self-following anti-reverse-flow circuit is a diode with microampere leakage current.

Furthermore, the diode in the voltage self-following anti-reverse-flow circuit is an ES1D diode.

Furthermore, the number N of the N diodes in the voltage self-following anti-reverse-flow circuit is an integer larger than f, wherein

I_1maxTaking the maximum output current, I, of the constant current DC/DC chip connected with the voltage input end of the voltage self-following reverse-filling prevention circuit_3maxTaking the theoretical maximum bearing current I of the PMOS tube at the moment of charging_2maxAnd taking the forward conduction current of the diode.

Furthermore, the number N of the N diodes in the voltage self-following anti-reverse-filling circuit is an integer larger than f ', and the value of f' is 2 times of the value of f.

Furthermore, the controllable switch element in the voltage self-following anti-reverse-flow circuit is a transistor, the base electrode of the transistor is connected with an external control signal through a resistor in the control circuit, the collector electrode of the transistor is connected with the grid electrode of the PMOS tube, and the emitter electrode of the transistor is grounded.

Furthermore, the controllable switch element in the voltage self-following anti-reverse-flow circuit is an MOS tube, the grid electrode of the MOS tube is connected with an external control signal through a resistor in the control circuit, the drain electrode of the MOS tube is connected with the grid electrode of the PMOS tube, and the source electrode of the MOS tube is grounded.

Furthermore, the voltage output end of the voltage self-following anti-reverse-flow circuit in the voltage self-following anti-reverse-flow circuit is grounded through a filter capacitor.

Furthermore, the PMOS tube in the voltage self-following anti-reverse-flow circuit is a P-channel power MOS tube.

The invention has the beneficial effects that:

after the voltage self-following anti-reverse-filling circuit is added between the constant-current DC/DC chip and the battery or the super capacitor module, even if the input end of the constant-current DC/DC chip is powered off and the voltage of the battery or the super capacitor module is higher at the moment, because the leakage currents of the diode and the PMOS tube in the voltage self-following anti-reverse-filling circuit are very small, the two circuits are overlapped and can not reach the current level of the misoperation of the constant-current charging DC/DC chip, and therefore the anti-reverse-filling function is achieved. At the moment of starting charging, due to the shunting effect of N diodes connected in parallel with the body diode in the PMOS tube of the voltage self-following anti-reverse-filling circuit, the current passing through the body diode in the PMOS tube is smaller than the theoretical maximum bearing current at the moment of charging of the PMOS tube, and the PMOS tube is effectively prevented from being burnt due to overlarge output current of the constant current DC/DC chip at the moment of starting charging. In the process after the charging is started, the grid electrode of the PMOS tube is connected with the external control signal input end, the external control signal input end can output low level to control the conduction of the PMOS tube, the PMOS tube enables the N diodes to bypass, the voltage output end of the reverse-filling prevention circuit is always consistent with the voltage of the voltage input end, the voltage self-following is realized, and the accurate control of the constant-current charging cut-off voltage is realized.

After the voltage self-following anti-reverse-filling circuit is added between the boosting discharging DC/DC and the system power supply, in the boosting discharging process of the battery or the super capacitor module, even if the input end of the boosting DC/DC chip is not electrified and the system power supply is electrified, the anti-reverse-filling effect is achieved because the N diodes and the body diodes in the PMOS tube are in a reverse cut-off state. And at the moment of external power failure, because the grid electrode of the PMOS tube is connected with the external control signal input end, the external control signal input end outputs low level to control the conduction of the PMOS tube, the voltage output end of the reverse-filling prevention circuit is always consistent with the voltage of the voltage input end, and the accurate control of the boosting discharge voltage is realized.

Drawings

Fig. 1 is a circuit diagram of a first embodiment of the present invention.

Fig. 2 is a circuit diagram of a second embodiment of the present invention.

Fig. 3 is a circuit diagram of a super capacitor module charging circuit and a boost discharging circuit according to a second embodiment of the present invention.

Fig. 4 is a circuit diagram of a third embodiment of the present invention.

Detailed Description

The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, not all, embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

It will be understood that the terms "comprises" and/or "comprising," when used in this specification and the appended claims, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof.

It should be further understood that the term "and/or" as used in this specification and the appended claims refers to and includes any and all possible combinations of one or more of the associated listed items.

The first implementation mode comprises the following steps:

fig. 1 is a circuit diagram of the first embodiment. As shown in fig. 1, the voltage self-following anti-reverse-flow circuit comprises a diode V11, a diode V12, a PMOS transistor V13 and a resistor R14; the voltage input end U _ IN of the voltage self-following anti-reverse-flow circuit is connected with anodes of the diode V11 and the diode V12 and a drain of the PMOS tube V13, the voltage output end U _ OUT of the voltage self-following anti-reverse-flow circuit is connected with cathodes of the diode V11 and the diode V12 and a source of the PMOS tube V13, a grid of the PMOS tube V13 is connected with an external control signal input end CTRL, and the external control signal input end CTRL can output high and low levels to control the opening and closing of the PMOS tube V13; one end of the resistor R14 is connected with the source electrode of the PMOS transistor V13, and the other end is connected with the grid electrode of the PMOS transistor V13. As a more preferable solution, the diode in this embodiment is a diode with a leakage current of microampere level. A more preferable solution is to select the ES1D diode as the diode in this embodiment to further reduce the circuit size. As another optimization scheme, in this embodiment, the PMOS transistor is a P-channel power MOS transistor IRLML 6402.

The operation of the circuit is described below in the case that the circuit is applied between a constant current charging DC/DC and a super capacitor module, and the circuit is applied between a boost discharging DC/DC and a system power supply. As shown IN fig. 1, the voltage input terminal U _ IN is connected to the constant current DC/DC output, the external control signal input terminal CTRL is connected to the negative logic enable level signal, and the voltage output terminal U _ OUT is connected to the super capacitor module. When electricity is available from the outside, the constant current DC/DC starts to work, current starts to charge the super capacitor module through the diode V11, the diode V12 and the body diode IN the PMOS transistor V3, the voltage of the voltage output end U _ OUT is the voltage of the super capacitor module, when the external control signal input end CTRL receives an effective external enable signal with a low level, the source and the drain of the PMOS transistor V3 start to be conducted, the voltage drop between the source and the drain of the PMOS transistor V3 is zero, the diode V11 and the diode V12 are bypassed, and the voltage of the voltage output end U _ OUT is completely equal to the voltage of the voltage input end U _ IN. IN the constant-current charging process, the super capacitor module can continuously rise, so that the voltage of the voltage input end U _ IN can always rise along with the rise of the voltage output end U _ OUT until the voltage of the voltage input end U _ IN reaches the preset charging cut-off voltage, namely the final charging cut-off voltage of the super capacitor module is equal to the constant-current DC/DC output voltage, and the accurate control of the charging voltage is realized.

When the external power fails, the super capacitor module is assumed to be powered, that is, the voltage output end U _ OUT is powered, and since the voltage of the voltage input end U _ IN is equal to 0 at the time of the external power failure, the external control signal input end CTRL cannot receive an effective external enable signal with a low level, so that the source and the drain of the PMOS transistor V3 are turned off. At the moment, the diode V11, the diode V12 and the PMOS tube V3 are all in a reverse cut-off state, when the diode V11 and the diode V12 are in a type ES1D, the leakage current is in the uA level, the maximum is 100uA (at 125 ℃), the leakage current of the IRLML6402 type PMOS tube V13 is also in the uA level, the maximum is 25uA (at 70 ℃), and the three parts are superposed and can not reach the current level for causing the malfunction of the constant-current charging DC/DC chip, so that the reverse flow prevention effect is achieved.

Because the source and the drain of the PMOS transistor V13 are still IN an off state at the moment of starting charging, if N diodes are not connected IN parallel between the voltage input terminal U _ IN and the voltage output terminal U _ OUT, the output current of the constant current DC/DC chip can only flow to the body diode of the PMOS transistor, and because the output current of the constant current DC/DC chip is much larger than the maximum withstand current of the PMOS body diode (for example, the maximum withstand current of the IRLML6402 type PMOS transistor at 70 ℃ is about 0.667A, and the maximum output of the constant current DC/DC chip JW5026 is 2A), the PMOS transistor V13 can be burned at the moment of starting charging. Therefore, N diodes must be connected IN parallel between the voltage input terminal U _ IN and the voltage output terminal U _ OUT to shunt the PMOS transistor V13 during the charging transient, where N is an integer greater than 0. As a further optimization scheme, N is an integer larger than f, wherein

I_1maxTaking the maximum output current, I, of a constant current DC/DC chip_3maxTaking the theoretical maximum bearing current I of the PMOS tube at the moment of charging_2maxAnd taking the forward conduction current of the diode. As a further optimization scheme, N is an integer larger than f ', and the value of f' is 2 times of the value of f, so that sufficient safety redundancy of currents borne by each device is guaranteed.

The second embodiment:

fig. 2 is a circuit diagram of a second embodiment of the present invention. As shown in fig. 2, the voltage self-following anti-reverse-flow circuit includes a diode V21, a diode V22, a PMOS transistor V23, a transistor V24, a resistor R25, a resistor R26, a capacitor C27, and a capacitor C28; a voltage input end V _ CAP of the voltage self-following anti-backflow circuit is connected with anodes of the diode V21 and the diode V22 and a drain of the PMOS transistor V23, a voltage output end VOUT of the voltage self-following anti-backflow circuit is connected with cathodes of the diode V21 and the diode V22 and a source of the PMOS transistor V23, a gate of the PMOS transistor V23 is connected with a collector of the transistor V24, one end of the resistor R26 is connected with a source of the PMOS transistor V23, the other end of the resistor R26 is connected with a gate of the PMOS transistor V23, an emitter of the transistor V24 is grounded, a base of the transistor V24 is connected with an external control signal input end CTRL through the resistor R25, and a voltage output end VOUT is grounded through the capacitor C27 and the capacitor C28, respectively. The transistor V24 and the resistor R25 form a control circuit, and an external high-level effective enable control signal is converted into a low-level signal, so that the PMOS transistor V23 is controlled to be conducted. The voltage output end VOUT is respectively connected with the ground through the capacitor C27 and the capacitor C28, so that alternating current components can be filtered, and the direct current output voltage of the voltage output end VOUT is more pure.

Fig. 3 is a circuit diagram of a super capacitor module charging circuit and a boost discharging circuit according to a second embodiment of the present invention. As shown in fig. 3, D1 is a constant current charging chip, VIN passes through D1 and is output as a constant current (JW5018 is about 1A, and JW5026 is about 2A), V _ CAPIN is a level state of the super capacitor module after being charged, and the final charge cut-off level of D1 is set through R7 and R12, and is set according to the cut-off charge level requirement of the super capacitor module at the next stage, for example, 2 super capacitors of 2.7V specification are connected in series, and can be set as a 4.6V cut-off charge level. The V _ CAPIN passes through the special anti-reverse-filling circuit and then is supplied to the super-capacitor module, so that the accurate control of the charging of the assembly is realized, meanwhile, the reverse filling of the super-capacitor module to the constant-current charging chip D1 can be reliably prevented under the power-down state of the system and the power-on state of the super-capacitor module, and the potential safety hazards (such as direct input and output connection, abnormal chip heating and the like) caused by the reverse filling of the D1 are avoided. D2 is a boost output chip, a power failure detection signal CTRL is introduced into a boost enable pin of the boost output chip, the signal is low level when the system is powered on, D2 is not enabled, and at the moment, the super capacitor module is only charged and does not boost output. When the external power is down to the detected threshold voltage, CTRL is pulled high, enabling D2 and starting to boost the output. V _ CAP is the boosted output level of D2, and VOUT is the level given to the host system, typically 12V. An output reverse-irrigation prevention circuit is introduced between the V _ CAP and the VOUT again, and a power failure detection signal CTRL is introduced, so that when the external power is on, the CTRL is at a low level, the reverse-irrigation prevention circuit prohibits output, meanwhile, the purpose of reverse irrigation prevention can be effectively achieved, and potential safety hazards (such as direct input and output connection, abnormal chip heating and the like) caused by reverse irrigation of the system level VOUT to the D2 are prevented when the system is on. When the external power is down, CTRL is pulled up, the reverse-filling prevention circuit starts to output, and finally the equal potential of V _ CAP and VOUT is ensured, so that the output level of the super capacitor module after passing through the boost chip D2 is fully ensured to meet the design requirement, and the level uncertainty caused by only using a diode as a reverse-filling prevention mechanism does not exist.

The third embodiment is as follows:

fig. 4 is a circuit diagram of a third embodiment of the present invention. As shown in fig. 4, the voltage self-following anti-reverse-flow circuit includes a diode V31, a diode V32, a PMOS transistor V33, a MOS transistor V34, a resistor R35, a resistor R36, a capacitor C37, and a capacitor C38; the voltage input end V _ CAP of the voltage self-following anti-backflow circuit is connected with anodes of the diode V31 and the diode V32 and a drain of the PMOS tube V33, the voltage output end VOUT of the voltage self-following anti-backflow circuit is connected with cathodes of the diode V31 and the diode V32 and a source of the PMOS tube V33, a gate of the PMOS tube V33 is connected with a drain of the MOS tube V34, one end of the resistor R36 is connected with the source of the PMOS tube V33, the other end of the resistor R36 is connected with the gate of the PMOS tube V33, a source of the MOS tube V34 is grounded, a gate of the MOS tube V34 is connected with an external control signal input end through the resistor R35, and a voltage output end VOUT is grounded through the capacitor C27 and the capacitor C28 respectively. The MOS transistor V34 and the resistor R35 form a control circuit, an effective enable control signal of external high level is converted into a low level signal, and then the PMOS transistor V33 is controlled to be conducted. The voltage output end VOUT is respectively connected with the ground through the capacitor C37 and the capacitor C38, so that alternating current components can be filtered, and the direct current output voltage of the voltage output end VOUT is more pure.

The embodiment of the invention can carry out sequence adjustment, combination and deletion according to actual needs.

The embodiments describe the present invention in detail, and the specific embodiments are applied to illustrate the principle and the implementation of the present invention, and the above embodiments are only used to help understand the method and the core idea of the present invention; meanwhile, for a person skilled in the art, according to the idea of the present invention, there may be variations in the specific embodiments and the application scope, and in summary, the content of the present specification should not be construed as a limitation to the present invention.

Claims

1. A voltage self-following anti-reverse-flow circuit is characterized by comprising N diodes, a PMOS (P-channel metal oxide semiconductor) tube and a resistor; the voltage input end of the voltage self-following reverse-filling prevention circuit is connected with anodes of the N diodes and a drain electrode of the PMOS tube, the voltage output end of the voltage self-following reverse-filling prevention circuit is connected with cathodes of the N diodes and a source electrode of the PMOS tube, a grid electrode of the PMOS tube is connected with an external control signal input end, and the external control signal input end can output high and low levels to control the on and off of the PMOS tube; one end of the resistor is connected with the source electrode of the PMOS tube, and the other end of the resistor is connected with the grid electrode of the PMOS tube; the number N of the N diodes is an integer larger than 0.

2. The voltage self-following anti-backflow circuit according to claim 1, further comprising a control circuit, wherein the control circuit comprises a controllable switching element and a resistor; the control end of the controllable switch element is connected with an external control signal through the resistor, one switch end of the controllable switch element is connected with the grid electrode of the PMOS tube, and the other switch end of the controllable switch element is grounded.

3. The voltage self-following anti-reverse-flow circuit according to claim 2, wherein the diode is a diode with microampere leakage current.

4. The voltage self-following anti-reverse-flow circuit according to claim 3, wherein the diode with microampere leakage current is an ES1D diode.

5. The voltage self-following anti-reverse-flow circuit according to any one of claims 1 to 4, wherein the number N of the N diodes is an integer larger than f, wherein

6. The voltage self-following anti-reverse-filling circuit according to claim 5, wherein the number N of the N diodes is an integer larger than f ', and the value of f' is 2 times that of f.

7. The voltage self-following anti-backflow circuit according to claim 2, wherein the controllable switching element is a transistor, a base of the transistor is connected with an external control signal through a resistor in the control circuit, a collector of the transistor is connected with a gate of the PMOS tube, and an emitter of the transistor is grounded.

8. The voltage self-following anti-backflow circuit according to claim 2, wherein the controllable switching element is an MOS transistor, a gate of the MOS transistor is connected to an external control signal through a resistor in the control circuit, a drain of the MOS transistor is connected to a gate of the PMOS transistor, and a source of the MOS transistor is grounded.

9. The voltage self-following anti-reverse-flow circuit according to any one of claims 1-4 or 6-8, wherein a voltage output end of the voltage self-following anti-reverse-flow circuit is grounded through a filter capacitor.

10. The voltage self-following anti-reverse-flow circuit according to any one of claims 1-4 or 6-8, wherein the PMOS tube is a P-channel power MOS tube.