CN113272813A - 定制数据流硬件模拟仿真方法、装置、设备及存储介质 - Google Patents

定制数据流硬件模拟仿真方法、装置、设备及存储介质 Download PDF

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CN113272813A
CN113272813A CN201980066982.5A CN201980066982A CN113272813A CN 113272813 A CN113272813 A CN 113272813A CN 201980066982 A CN201980066982 A CN 201980066982A CN 113272813 A CN113272813 A CN 113272813A
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CN113272813B (zh
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郭理源
黄炯凯
蔡权雄
牛昕宇
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Shenzhen Corerain Technologies Co Ltd
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Shenzhen Corerain Technologies Co Ltd
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

一种人工智能领域的定制数据流硬件模拟仿真方法、装置、计算机设备及存储介质，其中，所述方法包括：获取定制数据流硬件参数以及待仿真数据(S101)；根据寄存配置参数在C语言环境中配置对应的寄存地址，并将待仿真数据、神经网络结构图与神经网络参数寄存到对应的寄存地址(S102)；根据对应寄存地址中的神经网络结构图模拟构建对应的模拟神经网络(S103)；将对应寄存地址中的待仿真数据以及神经网络参数输入到模拟神经网络进行仿真计算，得到验证数据，并返回对应的寄存地址(S104)。由于在C语言环境中模拟定制数据流硬件的工作流，便于开发过程中软件部分与硬件部分的协调验证，提高开发效率。

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PCT国内申请，说明书已公开。

Claims (10)

  1. PCT国内申请，权利要求书已公开。
CN201980066982.5A 2019-10-12 2019-10-12 定制数据流硬件模拟仿真方法、装置、设备及存储介质 Active CN113272813B (zh)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114676830A (zh) * 2021-12-31 2022-06-28 杭州雄迈集成电路技术股份有限公司 一种基于神经网络编译器的仿真实现方法

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20170074932A1 (en) * 2014-05-29 2017-03-16 Universiteit Gent Integrated circuit verification using parameterized configuration
CN107016175A (zh) * 2017-03-23 2017-08-04 中国科学院计算技术研究所 适用神经网络处理器的自动化设计方法、装置及优化方法
CN109496319A (zh) * 2018-01-15 2019-03-19 深圳鲲云信息科技有限公司 人工智能处理装置硬件优化方法、系统、存储介质、终端
CN110245750A (zh) * 2019-06-14 2019-09-17 西南科技大学 一种基于fpga的神经网络数值模拟方法

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20170074932A1 (en) * 2014-05-29 2017-03-16 Universiteit Gent Integrated circuit verification using parameterized configuration
CN107016175A (zh) * 2017-03-23 2017-08-04 中国科学院计算技术研究所 适用神经网络处理器的自动化设计方法、装置及优化方法
CN109496319A (zh) * 2018-01-15 2019-03-19 深圳鲲云信息科技有限公司 人工智能处理装置硬件优化方法、系统、存储介质、终端
CN110245750A (zh) * 2019-06-14 2019-09-17 西南科技大学 一种基于fpga的神经网络数值模拟方法

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114676830A (zh) * 2021-12-31 2022-06-28 杭州雄迈集成电路技术股份有限公司 一种基于神经网络编译器的仿真实现方法

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