CN113271271A - Step length adjusting method and device of adaptive equalizer, signal receiver and system - Google Patents

Step length adjusting method and device of adaptive equalizer, signal receiver and system Download PDF

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Publication number
CN113271271A
CN113271271A CN202010097621.1A CN202010097621A CN113271271A CN 113271271 A CN113271271 A CN 113271271A CN 202010097621 A CN202010097621 A CN 202010097621A CN 113271271 A CN113271271 A CN 113271271A
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adaptive equalizer
tap
coefficient
determining
detection period
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CN113271271B (en
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梁小锋
刘先华
陈俊
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Huawei Technologies Co Ltd
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Huawei Technologies Co Ltd
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00Baseband systems
    • H04L25/02Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/03Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
    • H04L25/03006Arrangements for removing intersymbol interference
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00Baseband systems
    • H04L25/02Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/03Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00Baseband systems
    • H04L25/02Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/03Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
    • H04L25/03006Arrangements for removing intersymbol interference
    • H04L25/03159Arrangements for removing intersymbol interference operating in the frequency domain

Abstract

The application provides a step length adjusting method and device of a self-adaptive equalizer, a signal receiver and a system, and belongs to the technical field of communication. The scheme can detect the polarization state change rate and the signal-to-noise ratio of a channel in a data communication system, and can adjust the step size of the adaptive equalizer according to the polarization state change rate and the signal-to-noise ratio, so that the adaptive equalizer can update the coefficient according to the adjusted step size. Compared with the fixed step length in the related technology, the scheme provided by the application can enable the coefficient of the self-adaptive equalizer to adapt to the change of the polarization state and the signal-to-noise ratio of the channel in time, improve the coefficient convergence performance of the self-adaptive equalizer and further improve the signal transmission performance of the data communication system.

Description

Step length adjusting method and device of adaptive equalizer, signal receiver and system
Technical Field
The present application relates to the field of data processing, and in particular, to a method, an apparatus, a signal receiver, and a system for adjusting a step size of an adaptive equalizer.
Background
Signal receivers in data communication systems are typically provided with equalizers that can process the received signal to compensate for channel distortion and to remove Inter Symbol Interference (ISI).
In the related art, an equalizer used in a signal receiver is generally an adaptive equalizer, and the adaptive equalizer is capable of adaptively adjusting its own coefficient according to a preset fixed step size based on a measurement result of a channel characteristic to adapt to a change of the channel characteristic.
However, since the step size of the adaptive equalizer when adjusting its coefficients is a fixed value, the adaptive equalizer has poor flexibility when adjusting its coefficients, and the coefficient convergence performance of the adaptive equalizer is poor.
Disclosure of Invention
The application provides a step length adjusting method, a device, a signal receiver and a system of a self-adaptive equalizer, which can solve the problem of poor coefficient convergence performance of the self-adaptive equalizer in the related technology, and the technical scheme is as follows:
in one aspect, a step size adjustment method for an adaptive equalizer is provided, and the method may include: determining a rate of change of polarization (RSOP) of a channel of a data communication system, and a signal to noise ratio (SNR) of the channel; and adjusting the step size of the adaptive equalizer according to the RSOP and the SNR, wherein the adjusted step size of the adaptive equalizer is positively correlated with the RSOP and negatively correlated with the SNR. The step size of the adaptive equalizer refers to a step size referred to when the adaptive equalizer adjusts its coefficient.
The scheme provided by the application can adjust the step length of the self-adaptive equalizer based on the RSOP of the detected channel and the SNR of the channel, so that the coefficient of the self-adaptive equalizer can adapt to the polarization state of the data signal and the change of the SNR of the channel in time, the coefficient convergence performance of the self-adaptive equalizer is effectively improved, and the signal transmission performance of a data communication system is further improved.
Optionally, the method may further include: respectively carrying out low-pass filtering processing on the RSOP and the SNR; accordingly, when the step size is adjusted, the step size of the adaptive equalizer can be adjusted according to the RSOP after the low-pass filtering process and the SNR after the low-pass filtering process. Wherein the low-pass filtering process may achieve the purpose of noise reduction.
Optionally, the step size adjusting the adaptive equalizer according to the RSOP and the SNR may include: determining a first product of the weighting factor and the SNR and determining a first difference obtained by subtracting the first product from the absolute value of the RSOP; and then, adding the second product of the first difference and the proportional coefficient to the initial step length of the adaptive equalizer to obtain the adjusted step length of the adaptive equalizer.
The weight coefficient, the proportionality coefficient and the initial step length are all preset fixed values, and the value ranges are all 0 to 1. And, the weight coefficient may be of the order of 10-1Of the order of 10-3Of order, the initial step size may be of order 10-4Or 10-5Magnitude.
Optionally, the determining the RSOP of the channel in the data communication system may include:
determining RSOP of the channel according to a compensation signal output by the adaptive equalizer in a first detection period every other first detection period, wherein the compensation signal is a signal output by the adaptive equalizer after processing a data signal transmitted in a data communication system; or, determining the RSOP of the channel according to the coefficient of the adaptive equalizer every second detection period; wherein the second detection period is shorter than the first detection period. That is, in the scheme provided in the present application, RSOP of the channel may be determined according to the compensation signal output by the adaptive equalizer or the coefficient of the adaptive equalizer.
The first detection period may be equal to the duration of a data frame transmitted by the data communication coefficients, and the second detection period may be equal to the period in which the adaptive equalizer updates its coefficients. Since the period for the adaptive equalizer to update its coefficients is relatively short, the second detection period for updating RSOP based on the coefficients may also be relatively short.
Optionally, the compensation signal may include: a first polarization state signal and a second polarization state signal; the process of determining the RSOP of the channel from the compensation signal may include:
constructing an input matrix by taking the first polarization state signal as a first row element and taking the second polarization state signal as a second row element; multiplying the input matrix by a pseudo-inverse matrix of the input matrix to obtain a phase discrimination matrix, wherein the number of rows and the number of columns of the phase discrimination matrix are both 2; determining a second difference value between elements in a first column of a second row and elements in a second column of the first row in the phase discrimination matrix; and determining the RSOP of the channel according to the second difference value. For example, the real part of the second difference may be determined as RSOP.
Because the second difference between the elements in the first column and the elements in the second row in the phase detection matrix can reflect the residual RSOP of the channel after the adaptive equalizer compensates the channel, when the RSOP of the channel has no residue, the real part of the second difference is 0; when RSOP of the channel is residual, the real part of the second difference is not 0. Therefore, in the solution of the present application, the real part of the second difference can be determined as RSOP for adjusting the step size.
Optionally, the determining the SNR of the channel may include:
determining the SNR of the channel according to the coefficient of the self-adaptive equalizer every second detection period; or, every first detection period, according to the hard decision error of the compensation signal outputted by the adaptive equalizer in the first detection period, determining the SNR of the channel; wherein the second detection period is shorter than the first detection period. That is, in the scheme provided in the present application, the SNR of the channel may be determined according to the coefficient of the adaptive equalizer or the hard decision error of the compensation signal output by the adaptive equalizer.
Optionally, the adaptive equalizer may include: four filters, each filter having a plurality of taps, and accordingly, the coefficients of the adaptive equalizer comprise: tap coefficients for a plurality of taps for each filter; the determining the SNR according to the coefficient of the adaptive equalizer every second detection period may include:
respectively acquiring a tap coefficient sequence of a target tap of each filter every other second detection period, wherein the tap coefficient sequence comprises a plurality of tap coefficients obtained by sampling the tap coefficient of the target tap in a plurality of coefficient updating periods; respectively calculating the oscillation power of each oscillation frequency point of a tap coefficient sequence of each filter in a frequency domain, wherein the tap coefficient sequence comprises a plurality of frequency points in the frequency domain, and at least two oscillation frequency points exist in the plurality of frequency points; adding the oscillation powers of the tap coefficient sequences of the four filters at the at least two oscillation frequency points to obtain the total oscillation power; respectively calculating the total power of the tap coefficient sequence of each filter in the frequency domain; adding the total power of the tap coefficient sequences of the four filters in the frequency domain to obtain the total power of the frequency domain; and determining the SNR of the channel to be 0 according to the power ratio of the oscillation total power and the frequency domain total power, wherein the coefficient updating period is the period of updating the coefficient of the adaptive equalizer, and the coefficient updating period is less than or equal to the second detection period.
Because the oscillation power of the coefficient of the adaptive equalizer at each oscillation frequency point in the frequency domain is larger when the noise in the channel is larger, in the embodiment of the present application, the SNR of the channel can be determined according to the ratio of the total oscillation power to the total frequency of the frequency domain.
Optionally, the second detection period may be equal to a coefficient update period, the frequency domain includes N frequency points, and the tap coefficient sequence of the target tap of each filter includes: sampling in N +1 coefficient updating periods to obtain N +1 tap coefficients, wherein the N +1 tap coefficients are arranged according to the sequence from far to near of the sampling time, and N is an integer greater than 1; the process of calculating the oscillation power of each oscillation frequency point of the tap coefficient sequence of each filter in the frequency domain may include:
for the tap coefficient sequence of each filter, subtracting the (N +1) th tap coefficient from the 1 st tap coefficient to obtain the coefficient difference value delta omega of each tap coefficient sequence; and determining a reference value of each oscillation frequency point of the tap coefficient sequence in the frequency domain according to the coefficient difference value delta omega, wherein the reference value d of the k-th frequency point of the tap coefficient sequence in the N frequency points satisfies the following conditions: d ═ Δ ω + d') ej2πk/N(ii) a Wherein d' is a reference value determined in a previous second detection period, and k is a positive integer not greater than N; and determining the power of the reference value as the oscillation power of the tap coefficient sequence at the oscillation frequency point.
In the scheme provided by the application, the oscillation power of each oscillation frequency point of the tap coefficient sequence in the frequency domain can be determined through multiplication operation based on the coefficient difference value and the oscillation coefficient, and Fourier transformation is not required to be carried out on the tap coefficient sequence, so that the power consumption of data processing is effectively reduced, and the efficiency of data processing is improved.
Optionally, there are 4 oscillation frequency points in the N frequency points, and the 4 oscillation frequency points may be: first, the
Figure BDA0002385712860000031
Individual frequency point, the first
Figure BDA0002385712860000036
Individual frequency point, the first
Figure BDA0002385712860000035
Individual frequency point, and
Figure BDA0002385712860000034
frequency points; wherein t is the loop delay of the adaptive equalizer,
Figure BDA0002385712860000033
meaning that the rounding is done down,
Figure BDA0002385712860000032
indicating rounding up.
Optionally, the frequency domain includes N frequency points, and the tap coefficient sequence of each filter includes: sampling in N +1 coefficient updating periods to obtain N +1 tap coefficients, wherein the N +1 tap coefficients are arranged according to the sequence from far to near of the sampling time, and N is an integer greater than 1; the process of calculating the total power of the tap coefficient sequence of each filter in the frequency domain may include: for the tap coefficient sequence of each filter, subtracting the power of the (N +1) th tap coefficient from the power of the 1 st tap coefficient to obtain the power difference value of each tap coefficient sequence; determining a third product of the power difference and the N; and adding the third product with the total power determined in the previous second detection period to obtain the total power of the tap coefficient sequence of the filter in the frequency domain in the current second detection period.
In the scheme provided by the application, the total power of the tap coefficient sequence in the frequency domain can be determined through multiplication and addition operations based on the power difference value of the tap coefficient sequence, and Fourier transform does not need to be carried out on the tap coefficient sequence, so that the power consumption of data processing is effectively reduced, and the efficiency of data processing is improved.
In another aspect, an apparatus for adjusting a step size of an adaptive equalizer is provided, which may include at least one module, and the at least one module may be configured to implement the method for adjusting a step size of an adaptive equalizer provided in the foregoing aspect.
In still another aspect, an apparatus for adjusting a step size of an adaptive equalizer is provided, and the apparatus may include: a memory, a processor and a computer program stored on the memory and executable on the processor, the processor implementing the step size adjustment method of the adaptive equalizer as provided in the above aspect when executing the computer program.
In yet another aspect, a computer-readable storage medium having instructions stored therein, which when run on a computer, causes the computer to perform the step size adjustment method of an adaptive equalizer provided as the above aspect.
In yet another aspect, a computer program product containing instructions is provided, which when run on a computer causes the computer to perform the adaptive equalizer step size adjustment method provided in the above aspect.
In yet another aspect, a signal receiver is provided, the signal receiver comprising: an adaptive equalizer, and a step size adjusting means as provided in the above aspect; the step size adjusting device is used for adjusting the coefficient of the adaptive equalizer.
In yet another aspect, a data communication system is provided, the system comprising: a signal transmitter and a signal receiver as provided in the above aspects; the signal transmitter is used for transmitting a data signal to the signal receiver through a channel; the signal receiver is used for receiving data signals and processing the received data signals to recover original signals.
In summary, the embodiments of the present application provide a method, an apparatus, a signal receiver, and a system for adjusting a step size of an adaptive equalizer, where the method can detect an RSOP and an SNR of a channel, and can adjust the step size of the adaptive equalizer according to the RSOP and the SNR, so that the adaptive equalizer can update its coefficient according to the adjusted step size. Compared with the fixed step length in the related technology, the method provided by the embodiment of the application can enable the coefficient of the self-adaptive equalizer to adapt to the change of the RSOP and the SNR of the channel in time, improve the coefficient convergence performance of the self-adaptive equalizer and further improve the signal transmission performance of the data communication system.
Drawings
Fig. 1 is a schematic structural diagram of an adaptive equalizer provided in an embodiment of the present application;
fig. 2 is a flowchart of a step size adjustment method for an adaptive equalizer according to an embodiment of the present disclosure;
fig. 3 is a schematic structural diagram of a step size adjusting device provided in an embodiment of the present application;
fig. 4 is a schematic structural diagram of a first low-pass filter provided in an embodiment of the present application;
FIG. 5 is a schematic structural diagram of a step size adjustment module according to an embodiment of the present disclosure;
fig. 6 is a schematic data structure diagram of a data signal transmitted in a data communication system according to an embodiment of the present application;
fig. 7 is a flowchart of a method for determining RSOP according to a compensation signal according to an embodiment of the present application;
FIG. 8 is a schematic structural diagram of a first determining module provided in an embodiment of the present application;
fig. 9 is a schematic structural diagram of a filter in an adaptive equalizer according to an embodiment of the present application;
fig. 10 is a flowchart of a method for determining RSOP according to coefficients of an adaptive equalizer according to an embodiment of the present application;
fig. 11 is a flowchart of a method for determining an SNR based on coefficients of an adaptive equalizer according to an embodiment of the present application;
FIG. 12 is a schematic structural diagram of a second determining module provided in an embodiment of the present application;
FIG. 13 is a flowchart of a method for determining SNR based on hard decision error according to an embodiment of the present application;
fig. 14 is a schematic structural diagram of an adaptive equalizer and a step size adjusting apparatus according to an embodiment of the present application;
fig. 15 is a schematic structural diagram of another adaptive equalizer and step size adjusting apparatus provided in the embodiments of the present application;
fig. 16 is a schematic structural diagram of another adaptive equalizer and step size adjusting apparatus provided in the embodiment of the present application;
fig. 17 is a schematic structural diagram of an adaptive equalizer and a step size adjusting apparatus according to an embodiment of the present application;
fig. 18 is a schematic diagram illustrating a step size of an adaptive equalizer varying with RSOP and SNR according to an embodiment of the present application;
fig. 19 is a diagram illustrating BER as a function of SNR according to an embodiment of the present application;
FIG. 20 is a schematic structural diagram of a step size adjustment module according to an embodiment of the present disclosure;
fig. 21 is a schematic structural diagram of a first determining module provided in an embodiment of the present application;
FIG. 22 is a block diagram of a second determining module according to an embodiment of the present disclosure;
FIG. 23 is a schematic structural diagram of another step size adjusting device provided in the embodiments of the present application;
fig. 24 is a schematic structural diagram of a signal receiver according to an embodiment of the present application;
fig. 25 is a schematic structural diagram of a data communication system according to an embodiment of the present application.
Detailed Description
The following describes a step size adjustment method, apparatus, signal receiver, and system for an adaptive equalizer according to embodiments of the present application in detail with reference to the accompanying drawings.
Fig. 1 is a schematic structural diagram of an adaptive equalizer provided in an embodiment of the present application, and as shown in fig. 1, the adaptive equalizer may include: the device comprises a filter 01, a hard decision error determination module 02, a conjugate calculation module 03, a multiplier 04 and a coefficient updating module 05. The filter 01 may be a multiple-input multiple-output (MIMO) finite impulse response (fine impulse response) filter, and the filter 01 may be configured to process the received data signal Din and output a processed compensation signal S. A hard decision error determining module 02, configured to perform hard decision on the compensation signal S through a determiner (slicer) to obtain a hard decision result slicer (S), and subtract the hard decision result slicer (S) from the compensation signal S to obtain a hard decision error E of the compensation signal: e ═ slicer (S) -S. The conjugate calculating module 03 is configured to calculate the conjugate conj (Din) of the data signal Din. The multiplier 04 is used for calculating the product of the conjugate conj (din) of the data signal and the hard decision error E. The coefficient updating module 05 may update the coefficient of the filter 01 by using a Least Mean Square (LMS) algorithm according to the product output by the multiplier 04, where the coefficient of the filter 01 is the coefficient of the adaptive equalizer. The LMS algorithm may be a Normalized Least Mean Square (NLMS) algorithm or a second order least mean square (SLMS) algorithm.
For example, the coefficient updating module 05 may periodically update the coefficients of the filter 01 according to a preset coefficient updating period. The coefficient ω (n) determined by the coefficient update module 05 in the nth coefficient update period may satisfy: ω (n) ═ ω (n-1) + mu × E × conj (din). Where ω (n-1) is the coefficient of the filter 01 in the (n-1) th coefficient update period, and mu is the step size of the coefficient update, i.e. the step size of the adaptive equalizer.
In special channel environments, such as areas with high lightning occurrence, when an aerial optical cable or a buried optical cable in a data communication system is subjected to lightning shock, the polarization State (SOP) of the channel changes, and the SOP and Polarization Mode Dispersion (PMD) of a data signal transmitted in the channel change rapidly, which results in the loss of lock of a signal receiver. For example, a lightning shock can cause the SOP of a channel to vary by hundreds of thousands, or even millions of radians (rads) per second in a matter of milliseconds, i.e., the RSOP of a channel can reach hundreds of thousands to millions of rads/s.
Therefore, data communication systems with special channel environments put higher demands on the coefficient convergence performance of the adaptive equalizer. In the related art, an adaptive equalizer that updates coefficients based on a fixed step size mu cannot adapt to a rapid change in the characteristics of a channel (such as SOP). For example, if the fixed step size is too small, the coefficient convergence rate of the adaptive equalizer becomes slow, and the adaptive equalizer cannot adapt to changes in channel characteristics in time. If the fixed step size is too large, the convergence error of the coefficient of the adaptive equalizer becomes large, and channel distortion cannot be compensated effectively. Therefore, the coefficient convergence performance of the adaptive equalizer based on the fixed step mu updated coefficient is poor, which may affect the signal transmission performance of the data communication system.
The related art also provides an adaptive equalizer using a kalman filter, and the adaptive equalizer can update coefficients of the kalman filter based on a constructed channel model, so that the updated coefficients can adapt to changes in the SOP of the channel. However, the adaptive equalizer needs to establish an accurate channel model in the process of updating the coefficients, and the application flexibility is poor.
The method can be used for adjusting the step length referenced by the adaptive equalizer when the adaptive equalizer updates the coefficient of the adaptive equalizer so as to ensure that the coefficient of the adaptive equalizer can adapt to the change of RSOP and SNR of a channel in time and improve the coefficient convergence performance of the adaptive equalizer. The step size adjusting method can be applied to a step size adjusting device, and both the adaptive equalizer and the step size adjusting device can be arranged in a signal receiver of the data communication system. Referring to fig. 2, the method may include:
step 101, determining RSOP of a channel in a data communication system.
In this embodiment, the step size adjusting device may determine RSOP of the channel according to the compensation signal output by the adaptive equalizer in the first detection period every first detection period. The compensation signal is a signal output by the adaptive equalizer after processing a data signal transmitted in a data communication system.
Alternatively, the step size adjusting means may determine RSOP of the channel according to the coefficient of the adaptive equalizer every second detection period.
Wherein, the duration of the first detection period may be equal to the length of the data frame transmitted in the data communication system. The second detection period may be greater than or equal to a coefficient update period for updating the coefficients of the adaptive equalizer, and the second detection period is less than the first detection period. For example, the first detection period may be equal to 10 to 20 second detection periods.
That is, the step size adjusting means may periodically detect and update the RSOP of the channel based on a compensation signal output by the adaptive equalizer or a coefficient of the adaptive equalizer.
Step 102, the SNR of the channel is determined.
In this embodiment, the step-size adjusting device may determine the SNR of the channel of the data communication system according to the coefficient of the adaptive equalizer every second detection period.
Alternatively, the step-size adjusting means may determine the SNR of the channel of the data communication system every first detection period based on a hard decision error of the compensation signal output by the adaptive equalizer in the first detection period.
That is, the step size adjusting means may periodically detect and update the SNR of the channel of the data communication system based on the coefficients of the adaptive equalizer or the hard decision error of the compensation signal output by the adaptive equalizer.
Fig. 3 is a schematic structural diagram of a step size adjusting device provided in an embodiment of the present application, and as shown in fig. 3, the device may include: a first determining module 11 and a second determining module 12, the first determining module 11 can be used for detecting RSOP of the channel, and the second determining module 12 can be used for detecting SNR of the channel.
And 103, respectively carrying out low-pass filtering processing on the RSOP and the SNR.
The step size adjusting device can respectively perform low-pass filtering processing on the RSOP and the SNR based on a preset low-pass filtering algorithm so as to achieve the purpose of noise reduction.
For example, as shown in fig. 3, the step size adjusting device may further include a first Low Pass Filter (LPF) 13 and a second LPF 14. The first LPF 13 may be configured to low pass filter RSOP and the second LPF 14 may be configured to low pass filter SNR. Therein, the first LPF 13 and the second LPF 14 may both be alpha (alpha) filters.
Fig. 4 is a schematic structural diagram of a first LPF according to an embodiment of the present application, taking an alpha filter as an example, as shown in fig. 4, the first LPF 13 may include: a first multiplier 131, a first register 132, a second multiplier 133 and a first adder 134. The first multiplier 131 can be used to calculate the product of RSOP output by the first determining module 11 and the coefficient α, where α is greater than or equal to 0 and less than or equal to 1. The first register 132 is used for delaying the result (i.e., L _ RSOP) output by the adder 134 by one detection period and providing the result to the second multiplier 133. The second multiplier 133 is used to calculate the product of the delayed L _ RSOP and the coefficient (1- α). The first adder 134 adds the product output by the first multiplier 131 and the product output by the second multiplier 133 to obtain RSOP after low-pass filtering, i.e., L _ RSOP. The structure and filtering principle of the second LPF 14 can refer to the first LPF 13, and are not described herein again.
Based on the above description, the alpha filter can perform weighted summation (the weights are α and 1- α, respectively) on the RSOP determined in the current detection period and the L _ RSOP determined in the previous detection period, thereby determining the L _ RSOP of the current detection period.
And step 104, adjusting the step size of the adaptive equalizer according to the RSOP after the low-pass filtering processing and the SNR after the low-pass filtering processing.
As shown in fig. 3, the step size adjusting apparatus may further include a step size adjusting module 15, and the step size adjusting module 15 may adjust the step size of the adaptive equalizer according to the low-pass filtered RSOP (i.e., L _ RSOP) and the low-pass filtered SNR (i.e., L _ SNR). The step size of the adjusted adaptive equalizer is positively correlated with the RSOP and negatively correlated with the SNR, i.e. the larger the RSOP, the larger the step size after adjustment; the larger the SNR, the smaller the adjusted step size.
In this embodiment of the present application, the step size adjusting module 15 may first determine a first product of the weight coefficient w and the SNR during the step size adjusting process; then determining a first difference obtained by subtracting the first product from the absolute value of the RSOP; and then adding the second product of the first difference and the scaling coefficient c to the initial step size mu0 of the adaptive equalizer to obtain the adjusted step size mu of the adaptive equalizer. That is, the adjusted step size mu can satisfy:
mu=mu0+(|RSOP|-w×SNR)×c。
optionally, if RSOP and SNR are also low-pass filtered, the adjusted step size mu can satisfy:
mu=mu0+(|L_RSOP|-w×L_SNR)×c。
fig. 5 is a schematic structural diagram of a step size adjusting module 15 according to an embodiment of the present application, and as shown in fig. 5, the step size adjusting module 15 may include: an absolute value (ABS) calculation module 151, a third multiplier 152, a second adder 153, a fourth multiplier 154, and a third adder 155. The ABS calculation module 151 may be configured to calculate an absolute value of L _ RSOP output by the first LPF 13. The third multiplier 152 is used to calculate the product of the L _ SNR output by the second LPF 14 and the negative weight coefficient w (i.e., -w). The second adder 152 is used for adding the absolute value | L _ RSOP | of L _ RSOP and the product output by the third multiplier 152, so as to obtain a first difference value obtained by subtracting the first product from | L _ RSOP |: l _ RSOP | -w × L _ SNR. The fourth multiplier 154 is used to calculate a second product of the first difference and the scaling factor c. The third adder 155 is used to add the second product to the initial step size mu0 of the adaptive equalizer, so as to obtain the adjusted step size mu of the adaptive equalizer.
It is noted thatIn this embodiment of the application, the initial step size mu0, the weight coefficient w, and the proportionality coefficient c may all be fixed values pre-stored in the step size adjusting module 15, and values of each parameter may be set by developers according to requirements and experience of an application scenario. Wherein the initial step size mu0 may be a value greater than 0 and less than 1, and may be 10-4Or 10-5Magnitude of magnitude. The weight coefficient w may be a value greater than 0 and less than 1, and may be 10-1Magnitude of magnitude. The proportionality coefficient c may be a value greater than 0 and less than 1, and may be 10-3Magnitude of magnitude.
In summary, the embodiments of the present application provide a step size adjustment method for an adaptive equalizer, which can detect RSOP and SNR of a channel, and adjust a step size of the adaptive equalizer according to the RSOP and SNR, so that the adaptive equalizer can update its coefficient according to the adjusted step size. Compared with the fixed step length in the related technology, the method provided by the embodiment of the application can enable the coefficient of the self-adaptive equalizer to adapt to the change of the RSOP and the SNR of the channel in time, improve the coefficient convergence performance of the self-adaptive equalizer and further improve the signal transmission performance of the data communication system.
In step 101, as an alternative implementation manner, the step size adjusting device may determine RSOP of the channel every first detection period according to the compensation signal output by the adaptive equalizer in the first detection period.
Fig. 6 is a schematic diagram of a data structure of a data signal transmitted in a data communication system according to an embodiment of the present application, and as shown in fig. 6, a signal transmitter in the data communication system is capable of sending a data signal to a signal receiver in units of data frames, where the data signal of each data frame may include training data (also referred to as a training sequence) and user data, and the training data may be data that is randomly generated by the signal transmitter and is used for an adaptive equalizer to perform preliminary update on its coefficient. In the embodiment of the present application, the first detection period of the step-size adjustment device updating the RSOP may be equal to the length of a data frame, and the compensation signal referred to by the step-size adjustment device updating the RSOP may be a signal output by the adaptive equalizer after processing the training data in a data frame. That is, after the adaptive equalizer completes compensation of the training data in one data frame, the step size adjusting device can determine the RSOP of the channel within the duration of the data frame based on the compensation signal of the training data output by the adaptive equalizer
Optionally, the compensation signal output by the adaptive equalizer may include: a first polarization state signal and a second polarization state signal. Referring to fig. 7, in step 101, the step-size adjusting device determining RSOP according to the compensation signal may include the following steps:
in step 1011a, an input matrix is constructed with the first polarization state signal as the first row element and the second polarization state signal as the second row element.
The step size adjusting means may obtain a compensation signal output by the adaptive equalizer in a first detection period, where the compensation signal includes a first polarization state signal x and a second polarization state signal y, and the two polarization state signals x and y have equal lengths, that is, length (x) length (y). The step size adjusting means may arrange the two polarization state signals x and y in columns to construct an input matrix
Figure BDA0002385712860000081
The input matrix I has a number of rows equal to 2 and a number of columns equal to length (x).
And 1012a, multiplying the input matrix by the pseudo-inverse matrix of the input matrix to obtain a phase discrimination matrix.
In this embodiment, the step length adjusting device may first calculate a pseudo-inverse matrix pinv (I) of the input matrix I, where the number of rows of the pseudo-inverse matrix pinv (I) is length (x) and the number of columns is 2. Then, the step size adjusting device may multiply the input matrix I with the pseudo-inverse matrix pinv (I) to obtain the phase discrimination matrix a. The number of rows and columns of the phase discrimination matrix a is 2, and the phase discrimination matrix a can be expressed as:
Figure BDA0002385712860000082
wherein u and v respectively represent the elements of the first row and the second column and the elements of the first row and the second column in the phase detection matrix a.
Step 1013a, a second difference value between an element in the first column of the second row and an element in the second column of the first row in the phase detection matrix is determined.
The second difference Δ a may be expressed as: Δ a ═ a (2,1) -a (1,2) ═ -conj (v) -v.
Step 1014a, determining RSOP of the channel according to the second difference.
In the embodiment of the present application, RSOP of the channel determined by the step size adjustment means within the duration of one data frame may be real (Δ a), where real () represents the real part.
Since the second difference Δ a ═ -conj (v) — v may represent the RSOP remaining after the adaptive equalizer compensates the RSOP of the channel. When RSOP of the channel is not residual, real (Δ a) is 0; when RSOP of the channel remains, real (Δ a) is not 0. Therefore, in the embodiment of the present application, the real (Δ a) may be used to reflect the RSOP size of the channel, i.e., the real (Δ a) is determined as the RSOP for adjusting the step size.
Fig. 8 is a schematic structural diagram of a first determining module 11 provided in an embodiment of the present application, and as shown in fig. 8, the first determining module 11 may include: a pseudo-inverse matrix determination sub-module 111, a fifth multiplier 112, a fourth adder 113, and a real part calculation sub-module 114. The pseudo-inverse determination submodule 111 may be configured to determine a pseudo-inverse pinv (I) of the input matrix I. The fifth multiplier 112 can be used for calculating the product of the input matrix I and the pseudo-inverse matrix pinv (I) to obtain a phase detection matrix a. The fourth adder 113 may be configured to calculate a second difference Δ a between an element a (2,1) in the first column of the second row and an element a (1,2) in the second column of the first row in the phase detection matrix a. The real part calculation submodule 114 can be used to calculate the real part of the second difference Δ a, i.e. to calculate real (Δ a).
Fig. 9 is a schematic structural diagram of a filter in an adaptive equalizer according to an embodiment of the present application, where as shown in fig. 9, the adaptive equalizer may include: four butterfly connected filters 011 to 014, each having a plurality of taps. Accordingly, the coefficients of the adaptive equalizer may include: tap coefficients for a plurality of taps of each of the four filters. Wherein each filter may be an FIR filter.
Of the four filters, the first filter 011 can be used for extracting a signal of a first polarization state transmitted by a signal transmitter from a received signal of the first polarization state (i.e., X polarization state), and the coefficient of the first filter 011 can be represented as ωxx. The second filter 012 may be configured to extract a signal with a second polarization state (i.e., Y polarization state) from the received signal with the first polarization state, and the coefficient of the second filter 012 may be represented as ωxy. The third filter 013 can be used to extract the signal of the first polarization state sent by the signal transmitter from the received signal of the second polarization state, and the coefficient of the third filter 013 can be represented as ωyx. A fourth filter 014 may be used for extracting the second polarization state transmitted by the signal transmitter from the received signal of the second polarization state, and a coefficient of the fourth filter 014 may be represented as ωyy. In the embodiment of the present application, the number of taps of the four filters may be equal, for example, the number of taps may be M (M is an integer greater than 1), and then the coefficients ω of the four filters are all Mxx、ωxy、ωyxAnd ωyyIt may be an array with length M, and each element in the array is a tap coefficient of one tap.
In step 101, as another optional implementation manner, the step size adjusting apparatus may further determine RSOP of the channel according to the coefficient of the adaptive equalizer every second detection period. Referring to fig. 10, in step 101, the step size adjusting means may determine the RSOP according to the coefficient of the adaptive equalizer, and the step size adjusting means may include the following steps:
and 1011b, respectively acquiring the tap coefficient of the center tap of each filter in two adjacent coefficient updating periods every other second detection period.
The coefficient update period is a period for updating the coefficients of the adaptive equalizer, and each coefficient update period may also be referred to as a beat. In this embodiment of the present application, the step size adjusting device may obtain the tap coefficient of the center tap of each filter in the latest two coefficient update periods every second detection period, so as to obtain two tap coefficients of the center tap of each filter. Wherein the second detection period may be greater than or equal to the coefficient update period.
It should be noted that, if the number M of taps of the filter is an even number, the center tap may refer to the M/2 th tap; if the number of taps M of the filter is odd, the center tap may be the (M +1)/2 th tap.
For example, it is assumed that the second detection period is equal to the coefficient update period, that is, the second detection period is equal to one beat, and the center tap of each filter is the mth tap (M is a positive integer not greater than M). The step-size adjustment means may acquire tap coefficients of the m-th tap of each filter at the last two beats every other beat. If the last two beats are the nth beat and the (n-1) th beat, the tap coefficient of the m-th tap of the first filter 011 acquired by the step length adjusting device in the last two beats may be: omegaxx(m, n) and ωxx(m,n-1)。
Step 1012b, respectively calculating a third difference value of the tap coefficient of the center tap of each filter in two adjacent coefficient update periods.
In this embodiment, the third difference may be a value obtained by subtracting the tap coefficient of the previous coefficient update period from the tap coefficient of the latest coefficient update period. For example, the third difference value of the m-th tap of the first filter 011 in two adjacent coefficient update periods is: omegaxx(m,n)-ωxx(m,n-1)。
And step 1013b, determining the RSOP of the channel according to the average value of the third difference values of the four filters.
After the step size adjusting device calculates the third difference values of the four filters, the step size adjusting device may calculate an average value of the third difference values of the four filters, and then may determine an absolute value of the average value as the RSOP of the channel.
In step 101, as another optional implementation manner, the step size adjusting apparatus determining the RSOP of the channel according to the coefficient of the adaptive equalizer may further include:
firstly, every second detection period, respectively obtaining the tap coefficient of the center tap of each filter in the latest N coefficient update periods to obtain a tap coefficient sequence of each filter, wherein the tap coefficient sequence comprises N tap coefficients, N is the power of the z of 2, and z is an integer greater than 1. Then, the step-size adjusting means may perform Fast Fourier Transform (FFT) of N points on the tap coefficient sequence of each filter, thereby converting the tap coefficient sequence of each filter to the frequency domain. Then, the step length adjusting device may obtain a frequency point value of a certain frequency point (for example, a first frequency point or a second frequency point) in the frequency domain of the tap coefficient sequence of each filter, and calculate an average value of the obtained frequency point values of the four filters, where the average value is RSOP of the channel.
In step 102, as an alternative implementation manner, the step size adjusting means may determine the SNR of the channel of the data communication system according to the coefficient of the adaptive equalizer every second detection period. Referring to fig. 11, the process of the stepsize adjustment apparatus determining the SNR according to the coefficient of the adaptive equalizer may include the steps of:
and 1021a, acquiring a tap coefficient sequence of a target tap of each filter respectively every second detection period.
In the embodiment of the present application, the tap coefficient sequence of the target tap of each filter may include: and a plurality of tap coefficients obtained by sampling tap coefficients of a target tap of the filter in a plurality of coefficient update periods, wherein each tap coefficient is obtained by sampling in one coefficient update period. For example, the tap coefficient sequence may include N tap coefficients sampled at N coefficient update periods. Where N is an integer greater than 1, and N may be the power of 2 to the z-th power, and z is an integer greater than 1. The target tap of each filter may be any one of a plurality of taps of the filter, and the number of the target taps of each filter among the plurality of taps is equal. For example, the target tap of each filter may be the first tap, or may be the center tap.
Step 1022a, respectively calculating the oscillation power of each oscillation frequency point of the tap coefficient sequence of each filter in the frequency domain.
In the embodiment of the present application, the second determining module 12 in the step size adjusting apparatus may perform N-point FFT on the tap coefficient sequence of each filter, so as to convert the tap coefficient sequence of each filter to the frequency domain. The tap coefficient sequence of each filter comprises N frequency points in a frequency domain, and at least two oscillation frequency points exist in the N frequency points. The step length adjusting device may calculate the oscillation power of each oscillation frequency point of the tap coefficient sequence of each filter in the at least two oscillation frequency points, respectively.
In this embodiment of the present application, each tap coefficient sequence may have 4 oscillation frequency points (i.e., J is 4) in N frequency points of a frequency domain, and the 4 oscillation frequency points may be: first, the
Figure BDA0002385712860000101
Individual frequency point, the first
Figure BDA0002385712860000102
Individual frequency point, N +2-
Figure BDA0002385712860000103
Individual frequency point, and
Figure BDA0002385712860000104
and (4) frequency points. Wherein t is the loop delay of the adaptive equalizer,
Figure BDA0002385712860000105
meaning that the rounding is done down,
Figure BDA0002385712860000106
indicating rounding up. The loop delay refers to the sum of the delays of the various modules in the adaptive equalizer.
For example, assuming that N is 512 and t is 30 beats, the frequency of each tap coefficient sequence in the 4 oscillating frequency bins in the frequency domain may be: the 4 th frequency point, the 5 th frequency point, the 510 th frequency point and the 509 th frequency point.
Alternatively, the second detection period may be equal to the coefficient update period. In order to improve the calculation efficiency of the oscillation power, the tap coefficient sequence acquired by the step size adjusting apparatus in each second detection period may include N +1 tap coefficients.
Fig. 12 is a schematic structural diagram of a second determining module for determining an SNR according to an embodiment of the present application, where as shown in fig. 12, the second determining module 12 may include: four buffers (buffers) 121, only one buffer 121 being schematically shown in fig. 12. Each buffer 121 may be configured to perform time-domain sampling on a tap coefficient of a target tap of a filter to obtain a tap coefficient sequence of the target tap of the filter. Also, as can be seen with reference to fig. 12, the length of each buffer 121 may be N +1, i.e., the buffer 121 can store N +1 tap coefficients. Alternatively, the buffer 121 may be a First Input First Output (FIFO) buffer, and the buffer 121 may sequentially store N +1 tap coefficients included in the tap coefficient sequence from far to near according to the sampling time.
For example, assuming that the target tap of each filter is the first tap, the first buffer 121 of the four buffers 121 may obtain and store the tap coefficient of the first tap of the first filter 011 in the current coefficient update period every coefficient update period. If N +1 tap coefficients have been stored in the buffer 121, the buffer 121 may delete the oldest stored tap coefficient of the N +1 stored tap coefficients, and store the latest obtained tap coefficient. The tap coefficient sequence of the first tap of the first filter 011 stored in the first buffer 121 may include ωxx(1,1) to ωxxAnd (1, N +1) N +1 tap coefficients. The working principle of the other three registers 121 of the four registers 121 can refer to the first register 121, and is not described herein again.
The process of determining the oscillation power of each oscillation frequency point of the tap coefficient sequence in the frequency domain in step 1022a may include the following steps:
step a11, for the tap coefficient sequence of each filter, subtracting the 1 st tap coefficient from the N +1 th tap coefficient to obtain the coefficient difference Δ ω of each tap coefficient sequence.
The coefficient difference Δ ω is a value obtained by subtracting the 1 st tap coefficient from the N +1 th tap coefficient. Since the N +1 tap coefficients in the tap coefficient sequence of each filter are arranged in the order from far to near according to the sampling time, the N +1 tap coefficient is also the most recently sampled coefficient, and the 1 tap coefficient is also the least recently sampled coefficient of the N +1 tap coefficients.
Optionally, referring to fig. 12, the second determining module 12 may further include: fig. 12 only schematically shows one oscillating power calculating submodule 122, where J is the number of oscillating frequency points included in the N frequency points, and J is an integer greater than 1 and smaller than N. Each oscillation power calculating submodule 122 may be configured to calculate an oscillation power of an oscillation frequency point in a frequency domain of a tap coefficient sequence of a filter. As shown in fig. 12, each oscillating power calculating submodule 122 may include: a coefficient difference calculation unit 1221, where the coefficient difference calculation unit 1221 may be configured to calculate a coefficient difference Δ ω between the N +1 th tap coefficient and the 1 st tap coefficient stored in the buffer.
For example, assuming that the target tap of each filter is the first tap, the coefficient difference Δ ω calculated by the coefficient difference calculation unit 1221 in the first oscillation power calculation sub-module 122 for the tap coefficient sequence of the first filter 011 satisfies: Δ ω ═ ωxx(1,N+1)-ωxx(1,1)。
Step a12, determining the reference value of each oscillation frequency point of the tap coefficient sequence in the frequency domain according to the coefficient difference value delta omega. Wherein, the reference value d of the k-th frequency point in the N frequency points of the tap coefficient sequence can satisfy:
d=(Δω+d')ej2πk/N
wherein d' is a reference value determined in a previous second detection period, and k is a positive integer not greater than N.
Optionally, referring to fig. 12, each oscillation power calculating submodule 122 may further include: a second register 1222, a fifth adder 1223 and a sixth multiplier 1224. The second register 1222 is configured to delay the reference value output by the sixth multiplier 1224 by a second detection period and output to the fifth adder 1223, that is, the second register 1222 may provide the reference value d' determined by a previous second detection period to the fifth adder 1223 every second detection period. The fifth adder 1223 is configured to calculate a sum of the coefficient difference Δ ω and the reference value d' determined in the previous second detection period. The sixth multiplier 1224 is configured to multiply the sum Δ ω + d 'of the coefficient difference Δ ω and the reference value d' by an oscillation coefficient of an oscillation frequency point, so as to obtain the reference value d of the oscillation frequency point in the frequency domain of the tap coefficient sequence in the current second detection period.
The oscillation coefficient of the J (J is a positive integer not greater than J) th oscillation frequency point in the J oscillation frequency points can be represented as:
Figure BDA0002385712860000111
wherein k isjThe serial number of the jth oscillating frequency point in the N frequency points. For example, assume that J is 4, N is 512, and the 4 oscillation frequency points are: the 4 th frequency point, the 5 th frequency point, the 510 th frequency point and the 509 th frequency point, that is, the sequence numbers of the 4 oscillating frequency points in the 512 frequency points are respectively: k is a radical of1=4、k2=5、k3510 and k4The oscillation coefficients of the 4 oscillation frequency points may be: e.g. of the typej2π×4/512、ej2π×5/512、ej2π×510/512And ej2π×509/512
If the target tap of each filter is the first tap, the second determining module 12 includes 4 × J oscillating power calculating sub-modules 122, and the first oscillating power calculating sub-module 122 may be configured to calculate the first tap of the first filter 011Tap coefficient sequence omega of headxx(1) The oscillation power of the first oscillation frequency point in the frequency domain. As shown in fig. 12, the sixth multiplier 1224 in the first oscillating-power calculating sub-module 122 may sum Δ ω + d 'the difference Δ ω between the reference value d' and the oscillating coefficient e of the first oscillating frequency pointj2πk1/NAnd multiplying to obtain the reference value of the first oscillating frequency point.
Step a13, determining the power of the reference value as the oscillation power of the tap coefficient sequence at the oscillation frequency point.
In this embodiment, each oscillation power calculation sub-module 122 may calculate the power of the reference value, and determine the power of the reference value as the oscillation power of the tap coefficient sequence at the oscillation frequency point.
Optionally, as shown in fig. 12, each oscillation power calculating submodule 122 may further include: the power calculating unit 1225, where the power calculating unit 1225 may calculate the power of the reference value output by the sixth multiplier 1224, so as to obtain the oscillation power of the tap coefficient sequence of the target tap of one filter at one oscillation frequency point.
The principle of calculating the oscillation power based on the method shown in the above steps a11 to a13 is as follows:
taking the target tap of each filter as the first tap as an example, the N +1 tap coefficients in the tap coefficient sequence of the first filter 011 acquired in the nth second detection period may be represented as:
ωxx,n(1,1:N+1)=[ωxx,n-1(1,2:N+1);ωxx,n(1,N+1)];
wherein, ω isxx,n-1(1,2: N +1) represents 2 nd to N +1 th tap coefficients among the N +1 th tap coefficients acquired in the (N-1) th second detection period (i.e., the previous second detection period); omegaxx,n(1, N +1) denotes the (N +1) th tap coefficient acquired in the nth second detection period, that is, the coefficient obtained by the latest sampling.
Performing N-point FFT on the 1 st to N-th tap coefficients in the tap coefficient sequence acquired in the nth second detection period, where the obtained FFT result may be represented as:
ωxx,n_fft(1,1:N)=fft(ωxx,n(1,1:N))。
the N +1 tap coefficients in the tap coefficient sequence of the first filter 011 acquired at the (N +1) th second detection period can be expressed as:
ωxx,n+1(1,1:N+1)=[ωxx,n(1,2:N+1);ωxx,n+1(1,N+1)];
performing N-point FFT on the 1 st to N th tap coefficients in the tap coefficient sequence acquired in the (N +1) th second detection period, where the obtained FFT result may be represented as:
Figure BDA0002385712860000121
the FFT result includes frequency point values of N frequency points, which are 1 to N, and the power of the kth frequency point in the N frequency points may be represented as: i omegaxx,n+1_fft(1,k)|2(ii) a The total power of the N frequency points may be represented as: i omegaxx,n+1_fft(1,1:N)|2
According to the derivation, in the process of calculating the frequency point value of each oscillation frequency point in the N-point FFT results of the 1 st to N tap coefficients in the tap coefficient sequence obtained in the N +1 th second detection period, the coefficient difference value between the N +1 th tap coefficient and the 1 st tap coefficient in the tap coefficient sequence obtained in the N second detection period can be obtained by adding the N-point FFT results of the N second detection period and then multiplying the added value by the oscillation coefficient of the oscillation frequency point.
And 1023a, adding the oscillation powers of the tap coefficient sequences of the four filters at least two oscillation frequency points to obtain the total oscillation power.
In this embodiment of the application, after determining the oscillation power of the tap coefficient sequence of each of the four filters at each of the J oscillation frequency points, the step size adjusting device may determine that the determined total of 4 × J oscillationsAnd adding the powers to obtain the total oscillation power. The total oscillating power P1 can be expressed as:
Figure BDA0002385712860000122
wherein P1ijAnd the oscillation power of the J oscillation frequency point in the J oscillation frequency points of the frequency domain of the tap coefficient sequence of the ith filter is represented, wherein i is a positive integer not greater than 4.
Optionally, as shown in fig. 12, the second determining module 12 may further include a first summing submodule 123, where the first summing submodule 123 may sum the oscillation powers output by the 4 × J oscillation power calculating submodules 122 to obtain the total oscillation power P1.
And step 1024a, respectively calculating the total power of the tap coefficient sequence of each filter in the frequency domain.
In this embodiment of the present application, for the tap coefficient sequence of each filter, the step size adjusting device may add the powers of the frequency points of the tap coefficient sequence in the frequency domain, so as to obtain the total power of the tap coefficient sequence in the frequency domain. For example, if the tap coefficient sequence includes N coefficients, the step size adjustment device performs N-point FFT on the N coefficients, and the obtained FFT result includes frequency point values of N frequency points. The sum of the powers (i.e. the sum of squares) of the frequency point values of the N frequency points is the total power of the tap coefficient sequence in the frequency domain.
For example, as shown in fig. 12, the second determining module 12 in the step-size adjusting apparatus may further include: four total power calculation sub-modules 124, only one total power calculation sub-module 124 being schematically shown in fig. 12. Wherein each total power calculating submodule 124 can be used for calculating the total power of the tap coefficient sequence of one filter in the frequency domain.
Optionally, in order to improve the efficiency of determining the total power of the tap coefficient sequence in the frequency domain, the step 1024a may include the following steps:
step a21, for the tap coefficient sequence of each filter, subtracting the power of the (N +1) th tap coefficient from the power of the 1 st tap coefficient to obtain the power difference value of each tap coefficient sequence.
In the present applicationIn an embodiment, the power of each tap coefficient may be equal to the square of the tap coefficient. Taking the target tap of each filter as the first tap as an example, the power difference of the tap coefficient sequence of the first filter 011 in the 4 filters can be expressed as: Δ p1=|ωxx(1,N+1)|2-|ωxx(1,1)|2Wherein, | ωxx(1,N+1)|2I.e., the power of the (N +1) th tap coefficient in the tap coefficient sequence of the first filter 011, | ωxx(1,1)|2I.e. the power of the first tap coefficient in the tap coefficient sequence of the first filter 011.
Referring to fig. 12, each total power calculation submodule 124 may include a power difference calculation unit 1241, and the power difference calculation unit 1241 may be configured to calculate a power difference value of a tap coefficient sequence of one filter.
Step a22, determining a third product of the power difference and N.
Referring to fig. 12, each total power calculation sub-module 124 may further include a seventh multiplier 1242, and the seventh multiplier 1242 may multiply the power difference value output by the power difference value calculation unit 1241 by N to obtain a third product.
Step a23, adding the third product to the total power determined in the previous second detection period to obtain the total power of the tap coefficient sequence of the filter in the frequency domain in the current second detection period.
In this embodiment, after each second detection period determines a third product, each total power calculation sub-module 124 may add the third product to the total power determined in the previous second detection period, so as to obtain the total power of the tap coefficient sequence of the filter in the frequency domain in the current second detection period.
For example, as shown in fig. 12, each total power calculating submodule 124 may further include: a third register 1243 and a sixth adder 1244. The third register 1243 may be configured to delay the total power output by the sixth adder 1244 by a second detection period and output the delayed total power to the sixth adder 1244, i.e. the third register 1243 may provide the total power determined by the previous second detection period to the sixth adder 1244 every second detection period. The sixth adder 1244 may be configured to add the third product output by the seventh multiplier 1242 to the total power determined in the previous second detection period output by the third register 1243, so as to obtain the total power of the tap coefficient sequence of the filter in the frequency domain in the current second detection period.
And 1025a, adding the total power of the tap coefficient sequences of the four filters in the frequency domain to obtain the total power of the frequency domain.
The frequency domain total power P2 may satisfy:
Figure BDA0002385712860000131
wherein p2iThe tap coefficient sequence for the ith filter is the total power in the frequency domain.
For example, as shown in fig. 12, the second determining module 12 may further include a second summing submodule 125, and the second summing submodule 125 may sum the total power output by the 4 total power calculating submodules 124 to obtain the frequency domain total power.
Step 1026a, detecting whether the power ratio of the total oscillation power to the total frequency domain power is greater than a ratio threshold.
If the power ratio P1/P2 is greater than the ratio threshold value Pth, execute step 1027 a; if the power ratio P1/P2 is not greater than the ratio threshold Pth, go to step 1028 a. Wherein the ratio threshold Pth is pre-stored in the step-size adjusting device, and the ratio threshold Pth can be 10-1Of order of magnitude.
Step 1027a, determining the SNR of the channel of the data communication system as the difference between the power ratio and the ratio threshold.
If the power ratio P1/P2 is greater than the ratio threshold Pth, the step size adjustment device may determine the difference between the power ratio and the ratio threshold Pth as the SNR of the channel of the data communication system, i.e., determine the SNR as P1/P2-Pth.
Step 1028a determines that the SNR of the channel of the data communication system is 0.
If the power ratio P1/P2 is not greater than the ratio threshold Pth, the step size adjustment means may determine that the SNR of the channel of the data communication system is 0.
Optionally, as shown in fig. 12, the second determining module 12 in the stepsize adjusting apparatus may further include an SNR determining sub-module 126, and the SNR determining sub-module 126 may be configured to determine the SNR according to the total oscillating power output by the first summing sub-module 123 and the total frequency domain power output by the second summing sub-module 125.
Referring to fig. 12, the SNR determination sub-module 126 may include: a first selector 1261, a fourth register 1262, a derivation sub-module 1263, an eighth multiplier 1264, a seventh adder 1265, and a second selector 1266. Therein, the first selector 1261 may output the total power to the inverting sub-module 1263. The fourth register 1262 may be used to delay the total power in the frequency domain output by the first selector 1261 by a second detection period and output to the first selector 1261.
The first selector 1261 may count the number cnt of the executed second detection cycles, and if it is detected that the number cnt is an integer multiple of L, i.e., mod (cnt, L) ═ 0, may output the total power of the frequency domain provided by the second summing submodule 125; if it is detected that the number cnt is not an integer multiple of L, the total frequency domain power provided by the fourth register 1262 may be output. That is, the first selector 1261 outputs the total power of the frequency domain calculated by the second summing submodule 125 every L second detection periods. Where L is an integer greater than 1, for example L may be 20. Since the fluctuation of the total power in the frequency domain is generally small, the first selector 1261 may update the total power in the frequency domain P2 every several second detection periods to reduce the power consumption of the inverting sub-module 1263 to calculate the inverse of the total power in the frequency domain P2.
The inverting submodule 1263 may be configured to calculate an inverse 1/P2 of the total power P2 provided by the first selector 1261, for example, the inverting submodule 1263 may calculate an inverse 1/P2 of the total power P2 in the frequency domain by using a coordinate rotation digital computer (CORDIC) algorithm, which is relatively efficient and relatively low in power consumption. The eighth multiplier 1264 can multiply the total oscillating power P1 output by the second summing submodule 123 with the reciprocal 1/P2 output by the inverting submodule 1263, so as to obtain the power ratio P1/P2 of the total oscillating power P1 and the frequency domain power P2.
The seventh adder 1265 may add the power ratio P1/P2 to a prestored negative ratio threshold-Pth to calculate a fourth difference between the power ratio P1/P2 and the ratio threshold Pth: P1/P2-Pth. The second selector 1266 may be configured to determine whether the fourth difference is greater than 0, and if so, may output the fourth difference: P1/P2-Pth, the fourth difference: P1/P2-Pth is output as SNR. If the fourth difference is not greater than 0, 0 may be output, that is, 0 may be output as the SNR.
Because the oscillation power of the coefficient of the adaptive equalizer at each oscillation frequency point in the frequency domain is larger when the noise in the channel is larger, in the embodiment of the present application, the SNR of the channel can be determined according to the ratio of the total oscillation power to the total frequency of the frequency domain.
In step 102, as another optional implementation manner, the step size adjusting apparatus may also determine, every first detection period, the SNR of the channel of the data communication system according to the hard decision error of the compensation signal output by the adaptive equalizer in the first detection period. Referring to fig. 13, the process of the step size adjustment means determining the SNR according to the hard decision error may include the steps of:
step 1021b, every first detection period, obtaining the hard decision error of the compensation signal output by the adaptive equalizer in the first detection period.
In the embodiment of the present application, as shown in fig. 1, the adaptive equalizer includes a hard decision error determining module 02, where the hard decision error determining module 02 may perform hard decision on the compensation signal output by the filter 01 to obtain a hard decision result, and further may calculate a difference obtained by subtracting the compensation signal from the hard decision result, where the difference is a hard decision error. Accordingly, the step size adjusting device may obtain the hard decision error output by the hard decision error determining module 02 in the first detection period every first detection period.
Step 1022b, determine the power of the hard decision error as the SNR of the channel of the data communication system.
The step size adjusting means may calculate a square of the hard decision error, obtain a power of the hard decision error, and determine the power of the hard decision error as an SNR of a channel of the data communication system.
It should be noted that, in the embodiment of the present application, the two manners of determining RSOP provided in step 101 and the two manners of SNR provided in step 102 may be combined. For example, referring to fig. 14, the step-size adjustment apparatus 10 may determine RSOP according to the compensation signal and determine SNR according to the coefficients of the adaptive equalizer (i.e., the coefficients of filter 01). Alternatively, referring to fig. 15, the step size adjustment means 10 may determine RSOP based on the compensation signal and SNR based on the hard decision error. Still alternatively, referring to fig. 16, the step-size adjustment apparatus 10 may determine RSOP according to a coefficient of the adaptive equalizer and determine SNR according to the coefficient. Still alternatively, referring to fig. 17, the step size adjustment means 10 may determine RSOP according to the coefficients of the adaptive equalizer and SNR according to the hard decision error.
The embodiment of the application also simulates the situation that the step length of the adaptive equalizer changes along with RSOP and SNR, and the simulation environment is as follows: PMD of 9.25 picoseconds per kilometer (ps/km), Differential Group Delay (DGD) of 27.76ps, Polarization Dependent Loss (PDL) of 2 decibels (dB), and bandwidths of filters in the signal transmitter and the signal receiver of 45 gigahertz (GHz).
The simulation result is shown in fig. 18, where the abscissa in fig. 18 is time t in units of beats and the ordinate is the step size mu of the adaptive equalizer. The present example simulates mu at SNR of 19dB and 100dB for RSOP of 0 kilohertz (kHz), and simulates mu at SNR of 19dB and 100dB for RSOP of 200 kHz. Wherein 1 Hz-2 pi rad/s. And the time unit adopted during simulation is a second detection period which is equal to one beat, namely mu is updated once per beat during simulation. Referring to fig. 18, it can be seen that when RSOP is fixed, mu is smaller as SNR is larger. With a fixed SNR, the larger RSOP, the larger mu.
Fig. 19 is a schematic diagram of a bit error probability (BER) varying with an SNR according to an embodiment of the present application, and fig. 19 shows a curve of the BER varying with the SNR when a step size mu of an adaptive equalizer is a fixed value, and a curve of the BER varying with the SNR when the step size mu of the adaptive equalizer is adjustable, that is, when the step size mu is adjusted by using a method according to the embodiment of the present application. Comparing the two curves in fig. 19, it can be seen that when the SNR of the channel in the data communication system is constant, the BER after adjusting the step size mu by using the method provided by the embodiment of the present application is smaller than the BER when mu is fixed. And, as the SNR is improved, for example, when the SNR is 40dB, the BER is optimized more obviously after the step size mu is adjusted by the method provided by the embodiment of the present application. Therefore, after the step size of the adaptive equalizer is adjusted based on the method provided by the embodiment of the application, the signal transmission performance of the data communication system can be effectively improved.
It should be noted that the order of the steps of the step size adjusting method provided in the embodiment of the present application may be appropriately adjusted, and the steps may also be correspondingly increased or decreased according to the situation. For example, step 102 and step 101 may be performed simultaneously, or step 102 may be performed before step 101; alternatively, step 103 may be deleted as appropriate. Any method that can be easily conceived by a person skilled in the art within the technical scope disclosed in the present application is covered by the protection scope of the present application, and thus the detailed description thereof is omitted.
In summary, the embodiments of the present application provide a step size adjustment method for an adaptive equalizer, which can detect RSOP and SNR of a channel, and adjust a step size of the adaptive equalizer according to the RSOP and SNR, so that the adaptive equalizer can update its coefficient according to the adjusted step size. Compared with the fixed step length in the related technology, the method provided by the embodiment of the application can enable the coefficient of the self-adaptive equalizer to adapt to the change of the RSOP and the SNR of the channel in time, improve the coefficient convergence performance of the self-adaptive equalizer and further improve the signal transmission performance of the data communication system.
The present application further provides a step size adjusting apparatus of an adaptive equalizer, which may be used to adjust the step size of the adaptive equalizer shown in fig. 1, and the apparatus may also be referred to as an Equalization Micro Controller (EMC). As shown in fig. 3, the apparatus may include:
a first determining module 11 is configured to determine RSOP of a channel in the data communication system.
A second determining module 12 for determining the SNR of the channel.
A step size adjusting module 15, configured to adjust a step size of the adaptive equalizer according to the RSOP and the SNR, where the adjusted step size of the adaptive equalizer is positively correlated with the RSOP and negatively correlated with the SNR.
The functional implementation of the first determining module 11 may refer to the related description of step 101, the functional implementation of the second determining module 12 may refer to the related description of step 102, and the functional implementation of the step size adjusting module 15 may refer to the related description of step 104.
Alternatively, as shown in fig. 20, the step size adjusting module 15 may include:
a first multiplication sub-module 1501 determines a first product of the weight coefficient and the SNR. The first multiplication submodule 1501 may be a multiplier, and the functional implementation of the first multiplication submodule 1501 may refer to the description above regarding the third multiplier 152.
A first difference determination submodule 1502 is configured to determine a first difference obtained by subtracting the first product from the absolute value of RSOP. The first difference determination sub-module 1502 may be an adder, and the functional implementation of the first difference determination sub-module 1502 may be as described above with respect to the second adder 153.
The step size calculating sub-module 1503 is configured to add the second product of the first difference and the scaling factor to the initial step size of the adaptive equalizer to obtain an adjusted step size of the adaptive equalizer.
The step size calculation sub-module 1503 may include a multiplier and an adder, and may include, for example, a fourth multiplier 154 and a third adder 155 as shown in fig. 5. The functional implementation of the step size calculation sub-module 1503 may refer to the description above regarding the fourth multiplier 154 and the third adder 155.
Optionally, the first determining module 11 may be configured to:
determining RSOP of the channel according to a compensation signal output by the adaptive equalizer in a first detection period every other first detection period, wherein the compensation signal is a signal output by the adaptive equalizer after processing a data signal transmitted in a data communication system;
or, determining the RSOP of the channel according to the coefficient of the adaptive equalizer every second detection period; wherein the second detection period is shorter than the first detection period.
Optionally, the compensation signal includes: a first polarization state signal and a second polarization state signal; referring to fig. 21, the first determining module 11 may include:
the input sub-module 1101 is configured to construct an input matrix with the first polarization state signal as a first row element and the second polarization state signal as a second row element. The functional implementation of the input sub-module 1101 can refer to the description of step 1011a in the above method embodiment.
The second multiplication submodule 1102 is configured to multiply the input matrix with the pseudo-inverse matrix of the input matrix to obtain a phase discrimination matrix, where the number of rows and the number of columns of the phase discrimination matrix are both 2.
The second multiplication submodule 1102 may comprise a multiplier, and the functional implementation of the second multiplication submodule 1102 may refer to the description of step 1012a in the above method embodiment, and the related description of the pseudo-inverse matrix determination submodule 111 and the fifth multiplier 112.
A second difference determination sub-module 1103 is configured to determine a second difference between an element in the first column of the second row and an element in the second column of the first row in the phase detection matrix. The second difference determining sub-module 1103 may comprise an adder, and the functional implementation of the second difference determining sub-module 1103 may refer to the description of step 1013a in the above method embodiment, and the related description about the fourth adder 113.
An RSOP determination sub-module 1104 for determining a real part of the second difference as RSOP for the channel. The functional implementation of the RSOP determination submodule 1104 can refer to the description of step 1014a in the above method embodiment, and the related description about the real part calculation submodule 114.
Optionally, the second determining module 12 may be configured to:
determining the SNR of the channel of the data communication system according to the coefficient of the self-adaptive equalizer every second detection period;
or, every first detection period, according to the hard decision error of the compensation signal outputted by the adaptive equalizer in the first detection period, determining the SNR of the channel of the data communication system; wherein the second detection period is shorter than the first detection period.
Optionally, as shown in fig. 9, the adaptive equalizer includes: four filters, each filter having a plurality of taps, the coefficients of the adaptive equalizer comprising: tap coefficients for a plurality of taps for each filter. As shown in fig. 22, the second determining module 12 may include:
the obtaining sub-module 1201 is configured to obtain, every second detection period, a tap coefficient sequence of a target tap of each filter, where the tap coefficient sequence includes a plurality of tap coefficients obtained by sampling the tap coefficient of the target tap in a plurality of coefficient update periods, where the coefficient update period is a period in which the adaptive equalizer updates the coefficient, and the coefficient update period is less than or equal to the second detection period.
The functional implementation of the obtaining sub-module 1201 may refer to the description of step 1021a in the above method embodiment, and the related description about the buffer 121.
The first calculating submodule 1202 is configured to calculate an oscillation power of each oscillation frequency point in a frequency domain of a tap coefficient sequence of each filter, where the tap coefficient sequence includes multiple frequency points in the frequency domain, and at least two of the multiple frequency points exist.
The functional implementation of the first calculating sub-module 1202 can refer to the description of step 1022a in the above method embodiment and the related description of the oscillating power calculating sub-module 122. For example, the first calculation submodule 1202 may include 4 × J oscillation power calculation submodules 122.
The first adding submodule 1203 is configured to add the oscillation powers of the tap coefficient sequences of the four filters at least two oscillation frequency points to obtain total oscillation power.
The functional implementation of the first summing sub-module 1203 may refer to the description of step 1023a in the above method embodiment, and the related description of the first summing sub-module 123.
A second calculating submodule 1204, configured to calculate a total power of the tap coefficient sequence of each filter in the frequency domain, respectively.
The functional implementation of the second computing submodule 1204 can refer to the description of step 1024a in the above method embodiment, and the related description of the total power computing submodule 124. For example, the second calculation submodule 1204 may include 4 total power calculation submodules 124.
The second addition submodule 1205 adds the total power of the tap coefficient sequences of the four filters in the frequency domain to obtain the total power of the frequency domain.
The functional implementation of the second summing submodule 1205 can refer to the description of step 1025a in the above method embodiment, and the related description of the second summing submodule 125.
An SNR determining submodule 1206 is configured to determine an SNR of a channel of the data communication system according to a power ratio of the total power of the oscillation to the total power of the frequency domain.
The functional implementation of the SNR determination submodule 1206 can refer to the descriptions of steps 1026a to 1028a in the above method embodiments, and the related description about the SNR determination submodule 126.
Optionally, the frequency domain includes N frequency points, and the tap coefficient sequence of the target tap of each filter includes: and N +1 tap coefficients obtained by sampling in N +1 coefficient updating periods, wherein the N +1 tap coefficients are arranged according to the sequence from far to near of the sampling time, and N is an integer greater than 1. The first calculation submodule 1202 may be configured to:
for the tap coefficient sequence of each filter, subtracting the (N +1) th tap coefficient from the 1 st tap coefficient to obtain the coefficient difference value delta omega of each tap coefficient sequence;
and determining a reference value of each oscillation frequency point of the tap coefficient sequence in the frequency domain according to the coefficient difference value delta omega, wherein the reference value d of the k-th frequency point of the tap coefficient sequence in the N frequency points satisfies the following conditions:
d=(Δω+d')ej2πk/N(ii) a Wherein d' is a reference value determined in a previous second detection period, and k is a positive integer not greater than N;
and determining the power of the reference value as the oscillation power of the tap coefficient sequence at the oscillation frequency point.
Optionally, there are 4 oscillation frequency points in the N frequency points, and the 4 oscillation frequency points are respectively: first, the
Figure BDA0002385712860000181
Individual frequency point, the first
Figure BDA0002385712860000182
Individual frequency point, the first
Figure BDA0002385712860000183
Individual frequency point, and
Figure BDA0002385712860000184
frequency points;
wherein t is the loop delay of the adaptive equalizer,
Figure BDA0002385712860000185
meaning that the rounding is done down,
Figure BDA0002385712860000186
indicating rounding up.
Optionally, the second computing submodule 1204 may be configured to:
for the tap coefficient sequence of each filter, subtracting the power of the (N +1) th tap coefficient from the power of the 1 st tap coefficient to obtain the power difference value of each tap coefficient sequence;
determining a third product of the power difference and the N;
and adding the third product with the total power determined in the previous second detection period to obtain the total power of the tap coefficient sequence of the filter in the frequency domain in the current second detection period.
In summary, the embodiments of the present application provide a step size adjusting apparatus for an adaptive equalizer, which can detect RSOP and SNR of a channel, and adjust a step size of the adaptive equalizer according to the RSOP and SNR, so that the adaptive equalizer can update its coefficient according to the adjusted step size. Compared with the fixed step length in the related technology, the device provided by the embodiment of the application can enable the coefficient of the self-adaptive equalizer to adapt to the changes of the RSOP and the SNR of the channel in time, improve the coefficient convergence performance of the self-adaptive equalizer and further improve the signal transmission performance of the data communication system.
It should be understood that the step size adjusting apparatus according to the embodiments of the present application may also be implemented by an application-specific integrated circuit (ASIC), or a Programmable Logic Device (PLD), which may be a Complex Programmable Logic Device (CPLD), a field-programmable gate array (FPGA), a General Array Logic (GAL), or any combination thereof. The step size adjusting method provided by the above method embodiment may also be implemented by software, and when the step size adjusting method provided by the above method embodiment is implemented by software, each module in the step size adjusting apparatus may also be a software module.
Fig. 23 is a schematic structural diagram of another step size adjusting device provided in an embodiment of the present application, and referring to fig. 23, the device may include: a processor 2401, a memory 2402, a network interface 2403, and a bus 2404. The bus 2404 is used to connect the processor 2401, the memory 2402, and the network interface 2403. Communication connections with other devices may be made through a network interface 2403, which may be wired or wireless. Stored in the memory 2402 is a computer program 24021, and the computer program 24021 is used to implement various application functions.
It should be understood that in the embodiments of the present application, the processor 2401 may be a CPU, and the processor 2401 may also be other general purpose processors, Digital Signal Processors (DSPs), Application Specific Integrated Circuits (ASICs), Field Programmable Gate Arrays (FPGAs), GPUs or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, and the like. A general purpose processor may be a microprocessor or any conventional processor or the like.
The memory 2402 may be either volatile memory or nonvolatile memory, or may include both volatile and nonvolatile memory. The non-volatile memory may be a read-only memory (ROM), a Programmable ROM (PROM), an Erasable PROM (EPROM), an electrically Erasable EPROM (EEPROM), or a flash memory. Volatile memory can be Random Access Memory (RAM), which acts as external cache memory. By way of example, but not limitation, many forms of RAM are available, such as static random access memory (static RAM, SRAM), Dynamic Random Access Memory (DRAM), Synchronous Dynamic Random Access Memory (SDRAM), double data rate synchronous dynamic random access memory (DDR SDRAM), enhanced synchronous SDRAM (ESDRAM), Synchronous Link DRAM (SLDRAM), and direct bus RAM (DR RAM).
The bus 2404 may include a power bus, a control bus, a status signal bus, and the like, in addition to the data bus. But for clarity of illustration the various buses are labeled as bus 2404 in the figures.
The processor 2401 is configured to execute a computer program stored in the memory 2402, and the processor 2401 realizes the steps in the above-described method embodiments by executing the computer program 24021.
The embodiments of the present application also provide a computer-readable storage medium, which stores instructions that, when executed on a computer, cause the computer to perform the steps in the above method embodiments.
Embodiments of the present application also provide a computer program product containing instructions, which when run on a computer, cause the computer to perform the steps in the above-mentioned method embodiments.
Fig. 24 is a schematic structural diagram of a signal receiver according to an embodiment of the present application, and as shown in fig. 24, the signal receiver may include: an adaptive equalizer 00, and a step size adjusting apparatus 10 connected to the adaptive equalizer 00 and provided in the above embodiment. For example, the stride length adjustment apparatus 10 may be an apparatus as shown in fig. 3 or 23.
Wherein, the adaptive equalizer 00 is used for compensating the received data signal, and the step size adjusting device 10 is used for adjusting the coefficient of the adaptive equalizer 00.
Optionally, the signal receiver may further comprise a module for performing analog-to-digital conversion, chromatic dispersion compensation and clock synchronization on the received data signal.
Fig. 25 is a schematic structural diagram of a data communication system according to an embodiment of the present application, and as shown in fig. 25, the system may include: a signal receiver 100, and a signal transmitter 200. Wherein the signal receiver 100 may be a receiver comprising the step size adjustment apparatus 10 as shown in fig. 24. The signal transmitter 200 and the signal receiver 100 may be connected by an optical fiber, that is, the solution provided by the embodiment of the present application may be applied in the field of Optical Digital Signal Processor (ODSP).
The signal transmitter 200 is used for transmitting a data signal to the signal receiver 100 through a channel; the signal receiver 200 is used for receiving a data signal and processing the received data signal (for example, compensating the data signal by using the adaptive equalizer 00) to recover the original signal.
The above embodiments may be implemented in whole or in part by software, hardware, firmware, or any combination thereof. When implemented in software, the above-described embodiments may be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions. When loaded or executed on a computer, cause the processes or functions described in accordance with the embodiments of the application to occur, in whole or in part. The computer may be a general purpose computer, a special purpose computer, a network of computers, or other programmable device. The computer instructions may be stored in a computer readable storage medium or transmitted from one computer readable storage medium to another, for example, from one website site, computer, server, or data center to another website site, computer, server, or data center via wired (e.g., coaxial cable, fiber optic, Digital Subscriber Line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.). The computer-readable storage medium can be any available medium that can be accessed by a computer or a data storage device such as a server, data center, etc. that contains one or more collections of available media. The usable medium may be a magnetic medium (e.g., floppy disk, hard disk, magnetic tape), an optical medium (e.g., DVD), or a semiconductor medium. The semiconductor medium may be a Solid State Drive (SSD).
The above description is only exemplary of the present application and should not be taken as limiting, as any modification, equivalent replacement, or improvement made within the spirit and principle of the present application should be included in the protection scope of the present application.

Claims (22)

1. A method for step size adjustment of an adaptive equalizer, the method comprising:
determining a polarization state change rate RSOP of a channel in a data communication system;
determining a signal-to-noise ratio, SNR, of the channel;
and adjusting the step size of the adaptive equalizer according to the RSOP and the SNR, wherein the adjusted step size of the adaptive equalizer is positively correlated with the RSOP and negatively correlated with the SNR.
2. The method of claim 1, wherein the adjusting the step size of the adaptive equalizer based on the RSOP and the SNR comprises:
determining a first product of a weight coefficient and the SNR;
determining a first difference value obtained by subtracting the first product from the absolute value of the RSOP;
and adding the second product of the first difference and the proportional coefficient to the initial step size of the adaptive equalizer to obtain the adjusted step size of the adaptive equalizer.
3. The method of claim 1 or 2, wherein determining the RSOP for a channel in the data communication system comprises:
determining RSOP of the channel according to a compensation signal output by the adaptive equalizer in a first detection period every other first detection period, wherein the compensation signal is a signal output by the adaptive equalizer after processing a data signal transmitted in a data communication system;
or, determining the RSOP of the channel according to the coefficient of the adaptive equalizer every second detection period;
wherein the second detection period is less than the first detection period.
4. The method of claim 3, wherein the compensation signal comprises: a first polarization state signal and a second polarization state signal; the determining the RSOP of the channel according to the compensation signal output after the adaptive equalizer processes the data signal transmitted in the data communication system includes:
constructing an input matrix by taking the first polarization state signal as a first row element and taking the second polarization state signal as a second row element;
multiplying the input matrix by a pseudo-inverse matrix of the input matrix to obtain a phase discrimination matrix, wherein the number of rows and the number of columns of the phase discrimination matrix are both 2;
determining a second difference value between elements in a first column of a second row and elements in a second column of the first row in the phase detection matrix;
and determining the RSOP of the channel according to the second difference value.
5. The method of claim 1 or 2, wherein the determining the SNR of the channel comprises:
determining the SNR of the channel according to the coefficient of the self-adaptive equalizer every second detection period;
or, every other first detection period, determining the SNR of the channel according to the hard decision error of the compensation signal output by the adaptive equalizer in the first detection period;
wherein the second detection period is less than the first detection period.
6. The method of claim 5, wherein the adaptive equalizer comprises: four filters, each of said filters having a plurality of taps, the coefficients of said adaptive equalizer comprising: tap coefficients for a plurality of taps for each of said filters; the determining the SNR of the channel according to the coefficient of the adaptive equalizer every second detection period includes:
respectively acquiring a tap coefficient sequence of a target tap of each filter every other second detection period, wherein the tap coefficient sequence comprises a plurality of tap coefficients obtained by sampling the tap coefficients of the target tap in a plurality of coefficient updating periods, the coefficient updating period is the period for updating the coefficients of the adaptive equalizer, and the coefficient updating period is less than or equal to the second detection period;
respectively calculating the oscillation power of each oscillation frequency point of a tap coefficient sequence of each filter in a frequency domain, wherein the tap coefficient sequence comprises a plurality of frequency points in the frequency domain, and at least two oscillation frequency points exist in the plurality of frequency points;
adding the oscillation powers of the tap coefficient sequences of the four filters at least two oscillation frequency points to obtain oscillation total power;
respectively calculating the total power of the tap coefficient sequence of each filter in the frequency domain;
adding the total power of the tap coefficient sequences of the four filters in the frequency domain to obtain the total power of the frequency domain;
and determining the SNR of the channel according to the power ratio of the oscillation total power to the frequency domain total power.
7. The method according to claim 6, wherein the second detection period is equal to the coefficient update period, the frequency domain includes N bins, and the tap coefficient sequence of the target tap of each filter includes: sampling in N +1 coefficient updating periods to obtain N +1 tap coefficients, wherein the N +1 tap coefficients are arranged according to the sequence from far to near of sampling time, and N is an integer greater than 1;
the calculating the oscillation power of each oscillation frequency point of the tap coefficient sequence of each filter in the frequency domain respectively comprises:
for the tap coefficient sequence of each filter, subtracting the (N +1) th tap coefficient from the 1 st tap coefficient to obtain the coefficient difference value delta omega of each tap coefficient sequence;
and determining a reference value of each oscillation frequency point of the tap coefficient sequence in a frequency domain according to the coefficient difference value delta omega, wherein the reference value d of the k-th frequency point of the tap coefficient sequence in the N frequency points satisfies the following conditions:
d=(Δω+d')ej2πk/N
wherein d' is a reference value determined in a previous second detection period, and k is a positive integer not greater than N;
and determining the power of the reference value as the oscillation power of the tap coefficient sequence at the oscillation frequency point.
8. The method according to claim 7, wherein there are 4 oscillating frequency points in the N frequency points, and the 4 oscillating frequency points are respectively: first, the
Figure FDA0002385712850000027
Individual frequency point, the first
Figure FDA0002385712850000028
Individual frequency point, the first
Figure FDA0002385712850000023
Individual frequency point, and
Figure FDA0002385712850000024
frequency points;
wherein t is the loop delay of the adaptive equalizer,
Figure FDA0002385712850000025
meaning that the rounding is done down,
Figure FDA0002385712850000026
indicating rounding up.
9. The method according to any one of claims 6 to 8, wherein the frequency domain comprises N frequency bins, and the tap coefficient sequence of each filter comprises: sampling in N +1 coefficient updating periods to obtain N +1 tap coefficients, wherein the N +1 tap coefficients are arranged according to the sequence from far to near of sampling time, and N is an integer greater than 1;
the calculating the total power of the tap coefficient sequence of each filter in the frequency domain respectively comprises:
for the tap coefficient sequence of each filter, subtracting the power of the (N +1) th tap coefficient from the power of the 1 st tap coefficient to obtain the power difference value of each tap coefficient sequence;
determining a third product of the power difference value and the N;
and adding the third product with the total power determined in the previous second detection period to obtain the total power of the tap coefficient sequence of the filter in the frequency domain in the current second detection period.
10. An apparatus for stepsize adjustment of an adaptive equalizer, the apparatus comprising:
a first determining module for determining RSOP of a channel in a data communication system;
a second determining module for determining the SNR of the channel;
and the step size adjusting module is used for adjusting the step size of the adaptive equalizer according to the RSOP and the SNR, wherein the adjusted step size of the adaptive equalizer is positively correlated with the RSOP and negatively correlated with the SNR.
11. The apparatus of claim 10, wherein the step size adjustment module comprises:
a first multiplication sub-module for determining a first product of a weight coefficient and the SNR;
a first difference determination submodule configured to determine a first difference obtained by subtracting the first product from the absolute value of the RSOP;
and the step length calculation submodule is used for adding the second product of the first difference and the proportional coefficient to the initial step length of the adaptive equalizer to obtain the adjusted step length of the adaptive equalizer.
12. The apparatus of claim 10 or 11, wherein the first determining module is configured to:
determining RSOP of the channel according to a compensation signal output by the adaptive equalizer in a first detection period every other first detection period, wherein the compensation signal is a signal output by the adaptive equalizer after processing a data signal transmitted in a data communication system;
or, determining the RSOP of the channel according to the coefficient of the adaptive equalizer every second detection period;
wherein the second detection period is less than the first detection period.
13. The apparatus of claim 12, wherein the compensation signal comprises: a first polarization state signal and a second polarization state signal; the first determining module includes:
the input submodule is used for constructing an input matrix by taking the first polarization state signal as a first row element and taking the second polarization state signal as a second row element;
the second multiplication submodule is used for multiplying the input matrix and a pseudo-inverse matrix of the input matrix to obtain a phase discrimination matrix, and the number of rows and the number of columns of the phase discrimination matrix are both 2;
a second difference determination submodule, configured to determine a second difference between an element in a first column of a second row and an element in a second column of the first row in the phase detection matrix;
and the RSOP determining submodule is used for determining the RSOP of the channel according to the second difference value.
14. The apparatus of claim 10 or 11, wherein the second determining module is configured to:
determining the SNR of the channel according to the coefficient of the self-adaptive equalizer every second detection period;
or, every other first detection period, determining the SNR of the channel according to the hard decision error of the compensation signal output by the adaptive equalizer in the first detection period;
wherein the second detection period is less than the first detection period.
15. The apparatus of claim 14, wherein the adaptive equalizer comprises: four filters, each of said filters having a plurality of taps, the coefficients of said adaptive equalizer comprising: tap coefficients for a plurality of taps for each of said filters; the second determining module includes:
the obtaining submodule is used for respectively obtaining a tap coefficient sequence of a target tap of each filter every other second detection period, wherein the tap coefficient sequence comprises a plurality of tap coefficients obtained by sampling the tap coefficients of the target tap in a plurality of coefficient updating periods, the coefficient updating period is the period of updating the coefficients of the adaptive equalizer, and the coefficient updating period is less than or equal to the second detection period;
the first calculation submodule is used for calculating the oscillation power of each oscillation frequency point of a tap coefficient sequence of each filter in a frequency domain, the tap coefficient sequence comprises a plurality of frequency points in the frequency domain, and at least two oscillation frequency points exist in the plurality of frequency points;
the first addition submodule is used for adding the oscillation power of the tap coefficient sequences of the four filters at least two oscillation frequency points to obtain the total oscillation power;
the second calculation submodule is used for respectively calculating the total power of the tap coefficient sequence of each filter in the frequency domain;
the second addition submodule adds the total power of the tap coefficient sequences of the four filters in the frequency domain to obtain the total power of the frequency domain;
and the SNR determination submodule is used for determining the SNR of the channel according to the power ratio of the total oscillation power to the total frequency domain power.
16. The apparatus according to claim 15, wherein the second detection period is equal to the coefficient update period, the frequency domain includes N bins, and the tap coefficient sequence of the target tap of each filter includes: sampling in N +1 coefficient updating periods to obtain N +1 tap coefficients, wherein the N +1 tap coefficients are arranged according to the sequence from far to near of sampling time, and N is an integer greater than 1;
the first computation submodule is configured to:
for the tap coefficient sequence of each filter, subtracting the (N +1) th tap coefficient from the 1 st tap coefficient to obtain the coefficient difference value delta omega of each tap coefficient sequence;
and determining a reference value of each oscillation frequency point of the tap coefficient sequence in a frequency domain according to the coefficient difference value delta omega, wherein the reference value d of the k-th frequency point of the tap coefficient sequence in the N frequency points satisfies the following conditions:
d=(Δω+d')ej2πk/N
wherein d' is a reference value determined in a previous second detection period, and k is a positive integer not greater than N;
and determining the power of the reference value as the oscillation power of the tap coefficient sequence at the oscillation frequency point.
17. The apparatus according to claim 16, wherein there are 4 oscillating frequency points in the N frequency points, and the 4 oscillating frequency points are respectively: first, the
Figure FDA0002385712850000041
Individual frequency point, the first
Figure FDA0002385712850000042
Individual frequency point, the first
Figure FDA0002385712850000043
Individual frequency point, and
Figure FDA0002385712850000044
frequency points;
wherein t is the loop delay of the adaptive equalizer,
Figure FDA0002385712850000045
meaning that the rounding is done down,
Figure FDA0002385712850000046
indicating rounding up.
18. The apparatus according to any one of claims 15 to 17, wherein the frequency domain comprises N frequency bins, and the tap coefficient sequence of each filter comprises: sampling in N +1 coefficient updating periods to obtain N +1 tap coefficients, wherein the N +1 tap coefficients are arranged according to the sequence from far to near of sampling time, and N is an integer greater than 1;
the second computation submodule is configured to:
for the tap coefficient sequence of each filter, subtracting the power of the (N +1) th tap coefficient from the power of the 1 st tap coefficient to obtain the power difference value of each tap coefficient sequence;
determining a third product of the power difference value and the N;
and adding the third product with the total power determined in the previous second detection period to obtain the total power of the tap coefficient sequence of the filter in the frequency domain in the current second detection period.
19. An apparatus for stepsize adjustment of an adaptive equalizer, the apparatus comprising: memory, processor and computer program stored on said memory and executable on said processor, said processor implementing, when executing said computer program, a method of step-size adjustment of an adaptive equalizer according to any one of claims 1 to 9.
20. A computer-readable storage medium having stored therein instructions which, when run on a computer, cause the computer to execute the method of step-size adjustment of an adaptive equalizer of any of claims 1 to 9.
21. A signal receiver, characterized in that the signal receiver comprises: an adaptive equalizer and a stepsize adjusting device according to any one of claims 10 to 18;
the adaptive equalizer is used for compensating the received data signal, and the step size adjusting device is used for adjusting the coefficient of the adaptive equalizer.
22. A data communication system, the system comprising: a signal transmitter and a signal receiver according to claim 21;
the signal transmitter is used for transmitting a data signal to the signal receiver through a channel;
the signal receiver is used for receiving the data signal and processing the received data signal.
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