CN113267658B - Alternating current channeling fault simulation verification circuit, device and method - Google Patents

Alternating current channeling fault simulation verification circuit, device and method Download PDF

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Publication number
CN113267658B
CN113267658B CN202110814003.9A CN202110814003A CN113267658B CN 113267658 B CN113267658 B CN 113267658B CN 202110814003 A CN202110814003 A CN 202110814003A CN 113267658 B CN113267658 B CN 113267658B
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resistor
capacitor
direct
inversion
current voltage
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CN113267658A (en
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张大兴
黄泽荣
甘晓瑜
蔡冰子
袁昊宇
尹星光
谢慧丽
张勇贤
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Huizhou Hongye Electric Power Co ltd
Huizhou Power Supply Bureau of Guangdong Power Grid Co Ltd
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Huizhou Hongye Electric Power Co ltd
Huizhou Power Supply Bureau of Guangdong Power Grid Co Ltd
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    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R1/00Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
    • G01R1/28Provision in measuring instruments for reference values, e.g. standard voltage, standard waveform
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere

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Abstract

The invention discloses a circuit, a device and a method for simulating and checking Alternating Current (AC) fleeing faults, wherein the circuit comprises a boost conversion module, an inversion control module and an inversion output module; the boost conversion module performs boost conversion on the input first direct-current voltage and outputs a second direct-current voltage; the inversion control module outputs corresponding inversion driving signals according to the received alternating current regulating instruction; and the inversion output module outputs alternating current voltage with corresponding magnitude to the direct current system to be tested after performing inversion processing on the second direct current voltage according to the inversion driving signal, and the alternating current voltage is used for performing channeling fault simulation test on the direct current system to be tested so as to verify the prompt result of the direct current system to be tested on the currently accessed alternating current voltage. By outputting continuously adjustable alternating voltage after performing boost conversion and inversion control on the direct current low voltage, the corresponding alternating voltage can be flexibly and accurately output as required to carry out channeling fault simulation verification on the direct current system to be tested, and the accuracy and reliability of alternating current channeling test are improved.

Description

Alternating current channeling fault simulation verification circuit, device and method
Technical Field
The invention relates to the technical field of power equipment, in particular to an alternating current channeling fault simulation calibration circuit, device and method.
Background
In an electric power system, reliable operation of a direct current system plays a crucial role in safety and stability of the whole system, for example, if an alternating current entering fault occurs in a transformer substation direct current system, the normal operation of the direct current system is damaged, and according to the operation requirement of a power grid, the transformer substation direct current system must have an alternating current entering warning function, namely, an accurate warning prompt can be performed on the alternating current entering fault.
In the existing alternating current fleeing test aiming at a direct current system, the 220V alternating current of the commercial power is directly connected into the direct current system so as to test whether the direct current system can give an alarm or not, the commercial power supply needs to be manually and temporarily connected during the test, the temporary wiring reliability is low, the operation risk is high, the condition that the fault cannot be correctly prompted due to the fact that the fleeing voltage is small can also occur, and therefore the accuracy and the reliability of the alternating current fleeing fault test are reduced.
Disclosure of Invention
In view of the above-mentioned deficiencies of the prior art, an object of the present invention is to provide an ac ingress fault simulation verification circuit, an apparatus and a method, which aim to solve the problem of low accuracy and reliability of ac ingress fault simulation verification of a dc system in the prior art.
The technical scheme of the invention is as follows:
an alternating current entering fault simulation calibration circuit is connected with a direct current system to be tested and comprises a boosting conversion module, an inversion control module and an inversion output module; the boost conversion module performs boost conversion on the input first direct-current voltage and then outputs a second direct-current voltage to the inversion output module; the inversion control module outputs a corresponding inversion driving signal to the inversion output module according to the received alternating current regulating instruction; and the inversion output module outputs alternating current voltage with corresponding magnitude to the direct current system to be tested after performing inversion processing on the second direct current voltage according to the inversion driving signal, wherein the alternating current voltage is used for performing a channeling fault simulation test on the direct current system to be tested so as to verify a prompt result of the direct current system to be tested on the currently accessed alternating current voltage.
In one embodiment, the boost conversion module comprises a pre-conversion driving unit and a boost output unit; the pre-conversion driving unit carries out continuous conduction mode pre-conversion on the input first direct-current voltage to generate a corresponding boosting driving signal to the boosting output unit; and the boosting output unit boosts the first direct-current voltage according to the boosting driving signal and then outputs the second direct-current voltage to the inversion output module.
In one embodiment, the inverting output module comprises a power conversion unit, an isolation output unit and a feedback unit; the power conversion unit switches corresponding switch states according to the received inversion driving signals so as to perform power conversion on the second direct-current voltage and then invert the second direct-current voltage to output alternating-current voltage with corresponding magnitude; the isolation output unit is used for carrying out filtering processing on the alternating-current voltage and then isolating and outputting the alternating-current voltage to the direct-current system to be tested; the feedback unit samples the alternating voltage and outputs a feedback signal to the inversion control module; the inversion control module is further used for adjusting the inversion driving signal according to the feedback signal.
In one embodiment, the pre-conversion driving unit comprises a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a sixth resistor, a seventh resistor, a first capacitor, a second capacitor, a third capacitor, a fourth capacitor, a fifth capacitor, a sixth capacitor, a seventh capacitor and a boost chip; one end of the first resistor is connected with one end of the second resistor and one end of the first capacitor, and the other end of the first resistor is grounded; the other end of the second resistor is connected with a pin 3 of the boosting chip and one end of a fourth capacitor; one end of the third resistor is connected with a first direct-current voltage signal end, and the other end of the third resistor is connected with one end of the second capacitor, one end of the fourth resistor and a pin 4 of the boost chip; the other end of the fourth resistor is grounded; one end of the fifth resistor is connected with one end of the third capacitor and the No. 2 pin of the boost chip, and the other end of the fifth resistor is grounded; one end of the sixth resistor is connected with one end of the fifth capacitor and the 5 th pin of the boost chip, and the other end of the sixth resistor is connected with one end of the sixth capacitor; one end of the seventh resistor is connected with the other end of the first capacitor and the first direct-current voltage signal end, and the other end of the seventh resistor is connected with the 7 th pin of the boost chip and one end of the seventh capacitor; the other end of the second capacitor, the other end of the third capacitor, the other end of the fourth capacitor, the other end of the fifth capacitor, the other end of the sixth capacitor and the other end of the seventh capacitor are all grounded.
In one embodiment, the boost output unit comprises an eighth resistor, a ninth resistor, a tenth resistor, an eleventh resistor, a twelfth resistor, a thirteenth resistor, a fourteenth resistor, a fifteenth resistor, an eighth capacitor, a ninth capacitor, a tenth capacitor, a first adjustable resistor, a first triode, a second triode, a first power tube, a second power tube and a first diode; one end of the eighth resistor is connected with the pre-conversion driving unit, and the other end of the eighth resistor is connected with the base electrode of the first triode and the base electrode of the second triode; one end of the ninth resistor is connected with one end of the tenth resistor, one end of the eleventh resistor, one end of the eighth capacitor and the pre-conversion driving unit, and the other end of the ninth resistor is grounded; the other end of the tenth resistor is connected with a second direct-current voltage signal end; the other end of the eleventh resistor is connected with a first fixed end of the first adjustable resistor; one end of the twelfth resistor is connected with the first direct-current voltage signal end, the collector of the first triode and the source of the second power tube, and the other end of the twelfth resistor is connected with one end of the ninth capacitor; one end of the thirteenth resistor is connected with the emitting electrode of the first triode, the collecting electrode of the second triode and the negative electrode of the first diode, and the other end of the thirteenth resistor is connected with the positive electrode of the first diode and one end of the fourteenth resistor; the other end of the fourteenth resistor is connected with the grid electrode of the first power tube and one end of the fifteenth resistor; the other end of the fifteenth resistor is connected with the source electrode of the first power tube and the ground; the other end of the eighth capacitor, the second fixed end of the first adjustable resistor, the control end of the first adjustable resistor, the emitter of the second triode, the other end of the ninth capacitor and one end of the tenth capacitor are all grounded; the other end of the tenth capacitor is connected with the drain electrode of the second power tube and a second direct-current voltage signal end; the drain electrode of the first power tube is connected with the grid electrode of the second power tube.
In one embodiment, the power conversion unit includes a sixteenth resistor, a seventeenth resistor, an eighteenth resistor, a nineteenth resistor, a twentieth resistor, a twenty-first resistor, a twenty-second resistor, a twenty-third resistor, a twenty-fourth resistor, a twenty-fifth resistor, a twenty-sixth resistor, a twenty-seventh resistor, a twenty-eighth resistor, an eleventh capacitor, a twelfth capacitor, a second diode, a third diode, a fourth diode, a fifth diode, a third power tube, a fourth power tube, a fifth power tube and a sixth power tube; one end of the sixteenth resistor is connected with a third inversion driving signal end and the cathode of the second diode, the other end of the sixteenth resistor is connected with the anode of the second diode and one end of the seventeenth resistor, and the other end of the seventeenth resistor is connected with one end of the eighteenth resistor and the grid of the third power tube; the other end of the eighteenth resistor is connected with the isolation output unit, one end of the nineteenth resistor is connected with a fourth inverse driving signal end and the cathode of the third diode, and the other end of the nineteenth resistor is connected with the anode of the third diode and one end of the twentieth resistor; the other end of the twentieth resistor is connected with one end of the twenty-first resistor and a grid electrode of the fourth power tube, and the other end of the twenty-first resistor is connected with an IFB end of the inversion control module; one end of the twenty-second resistor is connected with the cathode of the fourth diode and the first inversion driving signal end, and the other end of the twenty-second resistor is connected with the cathode of the fourth diode and one end of the twenty-third resistor; the other end of the twenty-third resistor is connected with one end of the twenty-fourth resistor and the grid electrode of the fifth power tube; the other end of the twenty-fourth resistor is connected with the source electrode of the fifth power tube and the drain electrode of the sixth power tube; one end of the twenty-fifth resistor is connected with the cathode of the fifth diode and the second inversion driving signal end, and the other end of the twenty-fifth resistor is connected with the anode of the fifth diode and one end of the twenty-sixth resistor; the other end of the twenty-sixth resistor is connected with one end of the twenty-seventh resistor and the grid electrode of the sixth power tube; the other end of the twenty-seventh resistor is connected with one end of the twenty-eighth resistor, the source electrode of the sixth power tube, one end of the twelfth capacitor and the IFB end of the inversion control module; the other end of the twenty-eighth resistor is grounded; one end of the eleventh capacitor is connected with a second direct-current voltage signal end, and the other end of the eleventh capacitor is connected with the IFB end of the inversion control module; the other end of the twelfth capacitor is connected with a second direct-current voltage signal end; the drain electrode of the third power tube is connected with a second direct-current voltage signal end, and the source electrode of the third power tube is connected with the drain electrode of the fourth power tube and a second control signal end; a source electrode of the fourth power tube is connected with an IFB end of the inversion control module; and the drain electrode of the fifth power tube is connected with a second direct-current voltage signal end.
In one embodiment, the isolation output unit comprises a first inductor, a second inductor, a thirteenth capacitor, a fourteenth capacitor, a fifteenth capacitor, a sixteenth capacitor, a seventeenth capacitor, a first output interface, a second output interface and a transformer; one end of the first inductor is connected with the power conversion unit, and the other end of the first inductor is connected with one end of the thirteenth capacitor, one end of the fourteenth capacitor, one end of the fifteenth capacitor, the 1 st end of the transformer and the feedback unit; one end of the second inductor is connected with a first control signal end, and the other end of the second inductor is connected with the other end of the thirteenth capacitor, the other end of the fourteenth capacitor, the other end of the fifteenth capacitor, the 2 nd end of the transformer and the feedback unit; one end of the sixteenth capacitor is connected with the 3 rd end of the transformer, and the other end of the sixteenth capacitor is connected with the first output interface; one end of the seventeenth capacitor is connected with the 4 th end of the transformer, and the other end of the seventeenth capacitor is connected with the second output interface.
In one embodiment, the feedback unit comprises a twenty-ninth resistor, a thirty-first resistor, a thirty-second resistor, a thirty-third resistor, a thirty-fourth resistor, an eighteenth capacitor, a nineteenth capacitor, a second adjustable resistor and a third adjustable resistor; one end of the twenty-ninth resistor is connected with the isolation output unit, and the other end of the twenty-ninth resistor is connected with one end of the thirty-first resistor, one end of the eighteenth capacitor and the VFB end of the inverter control module; the other end of the thirtieth resistor is grounded; the other end of the thirty-first resistor is connected with a first fixed end of the second adjustable resistor; one end of the thirty-second resistor is connected with the isolation output unit, and the other end of the thirty-second resistor is connected with one end of the thirty-third resistor; the other end of the thirty-third resistor is grounded; one end of the thirty-fourth resistor is connected with one end of the nineteenth capacitor and the VFB2 end of the inverter control module, and the other end of the thirty-fourth resistor is connected with the first fixed end of the third adjustable resistor; the other end of the eighteenth capacitor and the other end of the nineteenth capacitor are both grounded; the second fixed end and the control end of the second adjustable resistor are both grounded; and the second fixed end and the control end of the third adjustable resistor are both grounded.
Another embodiment of the present invention further provides an ac ingress fault simulation verification method, including:
the boost conversion module performs boost conversion on the input first direct-current voltage and outputs a second direct-current voltage to the inversion output module;
the inversion control module outputs a corresponding inversion driving signal to the inversion output module according to the received alternating current regulating instruction;
and the inversion output module outputs alternating current voltage with corresponding magnitude to the direct current system to be tested after performing inversion processing on the second direct current voltage according to the received inversion driving signal, wherein the alternating current voltage is used for performing a fault simulation test on the direct current system to be tested so as to verify a prompt result of the direct current system to be tested on the currently accessed alternating current voltage.
The invention further provides an alternating current channeling fault simulation verification device which comprises a shell, wherein a PCB is arranged in the shell, and the PCB is provided with the alternating current channeling fault simulation verification circuit.
Has the advantages that: compared with the prior art, the embodiment of the invention outputs continuously adjustable alternating voltage after boosting conversion and inversion control are carried out on the direct current low voltage, can flexibly and accurately output corresponding alternating voltage according to requirements to carry out channeling fault simulation verification on a direct current system to be tested, and improves the accuracy and reliability during alternating current channeling test. .
Drawings
The invention will be further described with reference to the accompanying drawings and examples, in which:
fig. 1 is a block diagram of an ac ingress fault simulation verification circuit according to an embodiment of the present invention;
fig. 2 is a circuit diagram of a boost converter module in an ac ingress fault simulation verification circuit according to an embodiment of the present invention;
fig. 3 is a block diagram of an inverter control module in an ac ingress fault simulation verification circuit according to an embodiment of the present invention;
fig. 4 is a circuit diagram of an inverter output module in an ac ingress fault simulation verification circuit according to an embodiment of the present invention;
fig. 5 is a circuit diagram of a voltage-stabilizing power supply module in an ac ingress fault simulation verification circuit according to an embodiment of the present invention;
fig. 6 is a flowchart of an ac ingress fault simulation verification method according to an embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and effects of the present invention clearer and clearer, the present invention is described in further detail below. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention. Embodiments of the present invention will be described below with reference to the accompanying drawings.
Referring to fig. 1, fig. 1 is a block diagram illustrating an embodiment of an ac ingress fault simulation verification circuit according to the present invention. As shown in fig. 1, the ac ingress fault simulation verification circuit is connected to a dc system 10 to be tested to test whether the dc system 10 to be tested can accurately prompt ac ingress, the ac ingress fault simulation verification circuit includes a boost conversion module 11, an inverter control module 12 and an inverter output module 13, wherein the boost conversion module 11, the inverter control module 12 and the inverter output module 13 are sequentially connected, and the inverter output module 13 is connected to the dc system 10 to be tested. The boost conversion module 11 performs boost conversion on the input first direct-current voltage and outputs a second direct-current voltage to the inversion output module 13; the inversion control module 12 outputs a corresponding inversion driving signal to the inversion output module 13 according to the received alternating current regulation instruction; and the inversion output module 13 outputs an ac voltage of a corresponding magnitude to the dc system 10 to be tested after performing inversion processing on the second dc voltage according to the inversion driving signal, where the ac voltage is used for performing a fault simulation test on the dc system 10 to be tested, so as to verify a prompt result of the dc system 10 to be tested on the currently accessed ac voltage.
In this embodiment, first, a boost conversion module 11 performs boost conversion on a low dc voltage in a circuit, that is, a first dc voltage, to obtain a second dc voltage available for a subsequent stage of inversion, specifically, the first dc voltage may be a battery voltage or an external dc power supply, when the boost conversion is performed to obtain the second dc voltage for inversion output, a user may input an ac adjustment command according to a test requirement to adjust the magnitude of the ac voltage output by inversion, specifically, the inversion control module 12 outputs a corresponding inversion driving signal to the inversion output module 13 according to the received ac adjustment command, controls the working state of the inversion output module 13 through the inversion driving signal to further perform inversion processing on the second dc voltage to obtain an ac voltage of a target magnitude, and then the ac voltage is connected to the dc system 10 to be tested, therefore, the fault simulation test of the direct current system to be tested 10 is carried out through the flexibly adjustable alternating voltage, whether the direct current system to be tested 10 can output a correct prompt result to the currently accessed alternating voltage is verified, the accurate alternating voltage can be output in a preset adjusting range according to the test requirement in the test process to carry out simulation verification, the test range is large, the condition of test leakage can be avoided, and the reliability and the accuracy are greatly improved.
Optionally, the preset adjustment range of the ac voltage is 5V to 25V, for example, a user may input a 10V ac adjustment instruction, that is, the target size of the ac voltage is 10V, so that the 10V ac voltage is connected to the dc system 10 to be tested to perform a channeling fault simulation test, so as to check whether the dc system 10 to be tested can output channeling alarm information, and verify whether the ac channeling fault prompting function of the dc system 10 to be tested normally works, when performing the specific adjustment, the ac adjustment instruction may be continuously adjusted, for example, the ac voltage is continuously adjusted in the preset adjustment range in a knob manner, or may also be adjusted in a fixed gear, for example, the preset adjustment range is divided into a plurality of gears according to a fixed step length or a non-fixed step length, and the user may adjust the size of the ac voltage by adjusting the gear, so as to implement ac adjustment of the fixed gear, specifically, the adjustment mode may be flexibly set according to actual requirements, which is not limited in this embodiment. The alternating current entering fault simulation verification circuit provided by the invention can flexibly and accurately output the alternating current voltage with the corresponding magnitude in the safety range to carry out fault simulation verification on the direct current system 10 to be tested, and effectively improves the safety and flexibility of the alternating current entering test.
In one embodiment, as shown in fig. 2, the boost converter module 11 includes a pre-conversion driving unit 111 and a boost output unit 112, wherein the pre-conversion driving unit 111 is connected with the boost output unit 112, and the boost output unit 112 is further connected with the inverter output module 13. The pre-conversion driving unit 111 performs continuous conduction mode pre-conversion on the input first direct-current voltage to generate a corresponding boosting driving signal to the boosting output unit 112; the boost output unit 112 boosts the first dc voltage according to the boost driving signal, and then outputs the second dc voltage to the inverter output module 13.
In this embodiment, the boost conversion module 11 performs continuous conduction mode pre-conversion on an input first direct current voltage (12V in this embodiment) by using the pre-conversion driving unit 111 to generate a corresponding boost driving signal to realize efficient continuous conduction mode step-up pre-conversion, controls the on-time of the power switch by relying on the instantaneous coil current to obtain a corresponding PWM boost driving signal, performs current mode boosting on the first direct current voltage by using the boost output unit 112 under the driving of the boost driving signal, boosts the input first direct current voltage to the maximum peak voltage of the alternating current output available for the subsequent inversion, that is, a second direct current voltage (60V in this embodiment), realizes efficient and stable current type boosting under the continuous conduction mode pre-conversion, and provides reliable direct current voltage for the subsequent alternating current voltage output, the accuracy of simulation and verification of the alternating current entering fault is ensured.
In one embodiment, as shown in fig. 3, the inverter control module 12 includes a feedback signal processing unit 121, an SPWM generator 122, a state controller 123, a display output unit 124 and a communication control unit 125, wherein the feedback signal processing unit 121 is connected to the SPWM generator 122, the SPWM generator 122 is connected to the inverter output module 13, and the state controller 123 is further connected to the display output unit 124 and the communication control unit 125. In this embodiment, the inversion control module 12 outputs the received feedback signal to the SPWM generator 122 through the feedback signal processing unit 121 to implement closed-loop control on the output inversion driving signal, the SPWM generator 122 is configured to output a corresponding inversion driving signal to the inversion output unit according to the received ac adjustment command, the state controller 123 implements state detection, dead time control, amplitude calculation control, soft start and protection functions thereof, the communication control unit 125 is configured to implement an external communication interface, the display output unit 124 is configured to implement an interface of a human-computer interface, and finally implements the inversion control module 12 having power start, ac output driving control and management, output information display and communication, and in specific implementation, the inversion control module 12 can implement high-precision inversion control by using a pure sine wave inversion generator chip with four-drive control, for example, a pure sine wave inverter generator chip with the model number EG8010 is used, and of course, other chips with the same function may be used in other embodiments, so that accurate output of the inverter driving signal may be achieved, which is not limited in this embodiment.
In one embodiment, as shown in fig. 4, the inverter output module 13 includes a power conversion unit 131, an isolation output unit 132, and a feedback unit 133, where the power conversion unit 131 is connected to the isolation output unit 132 and the inverter control module 12, the isolation output unit 132 is further connected to the dc system to be tested 10 and the feedback unit 133, and the feedback unit 133 is further connected to the inverter control module 12. The power conversion unit 131 switches the corresponding switch state according to the received inversion driving signal, so as to perform power conversion on the second direct-current voltage and then invert the second direct-current voltage to output an alternating-current voltage with a corresponding magnitude; the isolation output unit 132 performs filtering processing on the ac voltage and then isolates and outputs the ac voltage to the dc system 10 to be tested; the feedback unit 133 samples the ac voltage and outputs a feedback signal to the inverter control module 12; the inversion control module 12 is further configured to adjust the inversion driving signal according to the feedback signal.
In this embodiment, switching of the switching state of each power tube in the power conversion unit 131 is driven by the SPWM driving signal, so as to perform power conversion on the second dc voltage and then invert the converted second dc voltage to output ac voltage of a corresponding magnitude, and the ac voltage obtained by inversion is further subjected to filtering processing by the isolation output unit 132 and then isolated to output a safe output power frequency 50Hz/60Hz sine wave signal from which the PWM high-frequency modulation signal has been filtered, so as to output a stable, non-interfering ac voltage of a target magnitude to the dc system 10 to be tested, so as to perform stable and reliable ac breakthrough simulation verification on the dc system 10 to be tested, ensure that the dc system 10 to be tested can perform fault testing on ac voltages of different magnitudes, and improve the reliability of the test. In this embodiment, the feedback unit 133 further performs sampling feedback on the output ac voltage, and outputs a corresponding feedback signal to the inverter control module 12, so that the inverter control module 12 adjusts the inverter driving signal according to the received feedback signal, thereby implementing closed-loop control of the ac voltage and improving accuracy of the output voltage.
In an embodiment, please refer to fig. 2, the pre-conversion driving unit 111 includes a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, a seventh resistor R7, a first capacitor C1, a second capacitor C2, a third capacitor C3, a fourth capacitor C4, a fifth capacitor C5, a sixth capacitor C6, a seventh capacitor C7, and a boost chip U1; one end of the first resistor R1 is connected with one end of the second resistor R2 and one end of the first capacitor C1, and the other end of the first resistor R1 is grounded; the other end of the second resistor R2 is connected with the 3 rd pin of the boosting chip U1 and one end of a fourth capacitor C4; one end of the third resistor R3 is connected with a first direct-current voltage signal end +12V, and the other end of the third resistor R3 is connected with one end of the second capacitor C2, one end of the fourth resistor R4 and the 4 th pin of the boost chip U1; the other end of the fourth resistor R4 is grounded; one end of the fifth resistor R5 is connected with one end of the third capacitor C3 and the 2 nd pin of the boosting chip U1, and the other end of the fifth resistor R5 is grounded; one end of the sixth resistor R6 is connected with one end of the fifth capacitor C5 and the 5 th pin of the boost chip U1, and the other end of the sixth resistor R6 is connected with one end of the sixth capacitor C6; one end of the seventh resistor R7 is connected to the other end of the first capacitor C1 and the first dc voltage signal terminal +12V, and the other end of the seventh resistor R7 is connected to the 7 th pin of the boost chip U1 and one end of the seventh capacitor C7; the other end of the second capacitor C2, the other end of the third capacitor C3, the other end of the fourth capacitor C4, the other end of the fifth capacitor C5, the other end of the sixth capacitor C6 and the other end of the seventh capacitor C7 are all grounded.
The boost output unit 112 includes an eighth resistor R8, a ninth resistor R9, a tenth resistor R10, an eleventh resistor R11, a twelfth resistor R12, a thirteenth resistor R13, a fourteenth resistor R14, a fifteenth resistor R15, an eighth capacitor C8, a ninth capacitor C9, a tenth capacitor C10, a first adjustable resistor VR1, a first triode Q1, a second triode Q2, a first power tube M1, a second power tube M2, and a first diode D1; one end of the eighth resistor R8 is connected to the pre-conversion driving unit 111, specifically to the 8 th pin of the boost chip U1, and the other end of the eighth resistor R8 is connected to the base of the first transistor Q1 and the base of the second transistor Q2; one end of the ninth resistor R9 is connected to one end of a tenth resistor R10, one end of an eleventh resistor R11, one end of an eighth capacitor C8 and the pre-conversion driving unit 111, specifically connected to the 6 th pin of the boost chip U1, and the other end of the ninth resistor R9 is grounded; the other end of the tenth resistor R10 is connected with a second direct-current voltage signal end + 60V; the other end of the eleventh resistor R11 is connected to a first fixed end of the first adjustable resistor VR 1; one end of the twelfth resistor R12 is connected to the +12V of the first DC voltage signal terminal, the collector of the first triode Q1 and the source of the second power tube M2, and the other end of the twelfth resistor R12 is connected to one end of the ninth capacitor C9; one end of the thirteenth resistor R13 is connected to the emitter of the first triode Q1, the collector of the second triode Q2 and the cathode of the first diode D1, and the other end of the thirteenth resistor R13 is connected to the anode of the first diode D1 and one end of the fourteenth resistor R14; the other end of the fourteenth resistor R14 is connected to the gate of the first power transistor M1 and one end of a fifteenth resistor R15; the other end of the fifteenth resistor R15 is connected with the source of the first power tube M1 and the ground; the other end of the eighth capacitor C8, the second fixed end of the first adjustable resistor VR1, the control end of the first adjustable resistor VR1, the emitter of the second triode Q2, the other end of the ninth capacitor C9 and one end of the tenth capacitor C10 are all grounded; the other end of the tenth capacitor C10 is connected to the drain of the second power transistor M2 and a second dc voltage signal terminal + 60V; the drain of the first power transistor M1 is connected to the gate of the second power transistor M2.
In this embodiment, the pre-conversion driving unit 111 performs efficient driving continuous conduction mode step-up pre-conversion through a Boost chip U1, operates in a following Boost (Follower Boost) mode, controls the conduction time of a power switch depending on an instantaneous coil current, that is, outputs a corresponding PWM Boost driving signal, controls the frequency of an output switching tube in the Boost output unit 112 through the Boost driving signal to realize current mode Boost, and finally boosts an input 12V battery voltage or an input dc voltage to a 60V dc voltage available for later stage inversion, thereby providing a reliable dc voltage for the inversion output of the ac voltage and improving the reliability of fault simulation verification. Specifically, the boost chip U1 may be a boost chip U1 with a model number of NCP1654, and of course, in other embodiments, other chips with the same function may also be used, which is not limited in this embodiment.
In an embodiment, referring to fig. 4 again, the power conversion unit 131 includes a sixteenth resistor R16, a seventeenth resistor R17, an eighteenth resistor R18, a nineteenth resistor R19, a twentieth resistor R20, a twenty-first resistor R21, a twenty-second resistor R22, a twenty-third resistor R23, a twenty-fourth resistor R24, a twenty-fifth resistor R25, a twenty-sixth resistor R26, a twenty-seventh resistor R27, a twenty-eighth resistor R28, an eleventh capacitor C11, a twelfth capacitor C12, a second diode D2, a third diode D3, a fourth diode D4, a fifth diode D5, a third power tube M3, a fourth power tube M4, a fifth power tube M5, and a sixth power tube M6; one end of the sixteenth resistor R16 is connected to the third inverter driving signal terminal 2HO and the cathode of the second diode D2, the other end of the sixteenth resistor R16 is connected to the anode of the second diode D2 and one end of the seventeenth resistor R17, and the other end of the seventeenth resistor R17 is connected to one end of the eighteenth resistor R18 and the gate of the third power transistor M3; the other end of the eighteenth resistor R18 is connected to the isolation output unit 132, one end of the nineteenth resistor R19 is connected to the fourth inverse driving signal terminal 2LO and the cathode of the third diode D3, and the other end of the nineteenth resistor R19 is connected to the anode of the third diode D3 and one end of the twentieth resistor R20; the other end of the twentieth resistor R20 is connected to one end of the twenty-first resistor R21 and the gate of the fourth power transistor M4, and the other end of the twenty-first resistor R21 is connected to the IFB end of the inverter control module 12; one end of the twenty-second resistor R22 is connected to the cathode of the fourth diode D4 and the first inverter driving signal terminal 1HO, and the other end of the twenty-second resistor R22 is connected to the cathode of the fourth diode D4 and one end of a twenty-third resistor R23; the other end of the twenty-third resistor R23 is connected with one end of the twenty-fourth resistor R24 and the grid of a fifth power tube M5; the other end of the twenty-fourth resistor R24 is connected with the source electrode of the fifth power tube M5 and the drain electrode of the sixth power tube M6; one end of the twenty-fifth resistor R25 is connected to the cathode of the fifth diode D5 and the second inverter driving signal terminal 1LO, and the other end of the twenty-fifth resistor R25 is connected to the anode of the fifth diode D5 and one end of the twenty-sixth resistor R26; the other end of the twenty-sixth resistor R26 is connected with one end of the twenty-seventh resistor R27 and the grid of a sixth power tube M6; the other end of the twenty-seventh resistor R27 is connected to one end of the twenty-eighth resistor R28, the source of the sixth power transistor M6, one end of the twelfth capacitor C12 and the IFB end of the inverter control module 12; the other end of the twenty-eighth resistor R28 is grounded; one end of the eleventh capacitor C11 is connected to the second dc voltage signal terminal +60V, and the other end of the eleventh capacitor C11 is connected to the IFB terminal of the inverter control module 12; the other end of the twelfth capacitor C12 is connected with a second direct-current voltage signal end + 60V; the drain of the third power tube M3 is connected to the second dc voltage signal terminal +60V, and the source of the third power tube M3 is connected to the drain of the fourth power tube M4 and the second control signal terminal; the source of the fourth power tube M4 is connected to the IFB terminal of the inverter control module 12; the drain of the fifth power tube M5 is connected to the second dc voltage signal terminal + 60V.
In this embodiment, the power conversion unit 131 implements inversion power conversion by using a full-bridge low-on-resistance power tube, and four paths of SPWM driving signals output by the SPWM generator 122 respectively drive the switching states of the right arm upper tube, the right arm lower tube, the left arm upper tube, and the left arm lower tube, thereby implementing dc-ac power conversion, and inverting and outputting the 60V dc voltage to obtain an ac voltage with a corresponding magnitude to the isolation output unit 132, so as to be used as a fault signal source of the dc system 10 to be tested, perform an accurate and adjustable fault simulation test on the dc system 10 to be tested, avoid an operation risk when the high voltage of the utility power is temporarily connected, and improve the test reliability.
In one embodiment, with continued reference to fig. 4, the isolation output unit 132 includes a first inductor L1, a second inductor L2, a thirteenth capacitor C13, a fourteenth capacitor C14, a fifteenth capacitor C15, a sixteenth capacitor C16, a seventeenth capacitor C17, a first output interface J1, a second output interface J2, and a transformer T1; one end of the first inductor L1 is connected to the power conversion unit 131, specifically to the other end of the eighteenth resistor R18, and the other end of the first inductor L1 is connected to one end of the thirteenth capacitor C13, one end of the fourteenth capacitor C14, one end of the fifteenth capacitor C15, the 1 st end of the transformer T1, and the feedback unit 133; one end of the second inductor L2 is connected to a first control signal end, and the other end of the second inductor L2 is connected to the other end of the thirteenth capacitor C13, the other end of the fourteenth capacitor C14, the other end of the fifteenth capacitor C15, the 2 nd end of the transformer T1, and the feedback unit 133; one end of the sixteenth capacitor C16 is connected to the 3 rd end of the transformer T1, and the other end of the sixteenth capacitor C16 is connected to the first output interface J1; one end of the seventeenth capacitor C17 is connected to the 4 th end of the transformer T1, and the other end of the seventeenth capacitor C17 is connected to the second output interface J2.
In this embodiment, the transformer T1 employs a power frequency isolation transformer T1, and the isolation output unit 132 filters out a PWM high-frequency modulation signal in the ac voltage and safely outputs a power frequency 50Hz/60Hz sine wave electric quantity signal through an inductor, the power frequency isolation transformer T1, and a high-voltage filter capacitor, thereby effectively improving the anti-interference performance and safety of the ac voltage output.
In one embodiment, referring to fig. 4, the feedback unit 133 includes a twenty-ninth resistor R29, a thirty-third resistor R30, a thirty-first resistor R31, a thirty-second resistor R32, a thirty-third resistor R33, a thirty-fourth resistor R34, an eighteenth capacitor C18, a nineteenth capacitor C19, a second adjustable resistor VR2, and a third adjustable resistor VR 3; one end of the twenty-ninth resistor R29 is connected to the isolation output unit 132, specifically to the other end of the first inductor L1, and the other end of the twenty-ninth resistor R29 is connected to one end of the thirty-first resistor R30, one end of the thirty-first resistor R31, one end of the eighteenth capacitor C18, and the VFB end of the inverter control module 12; the other end of the thirtieth resistor R30 is grounded; the other end of the thirty-first resistor R31 is connected with a first fixed end of the second adjustable resistor VR 2; one end of the thirty-second resistor R32 is connected to the isolated output unit 132, specifically to the other end of the second inductor L2, and the other end of the thirty-second resistor R32 is connected to one end of the thirty-third resistor R33; the other end of the thirty-third resistor R33 is grounded; one end of the thirty-fourth resistor R34 is connected to one end of the nineteenth capacitor C19 and the VFB2 end of the inverter control module 12, and the other end of the thirty-fourth resistor R34 is connected to the first fixed end of the third adjustable resistor VR 3; the other end of the eighteenth capacitor C18 and the other end of the nineteenth capacitor C19 are both grounded; a second fixed end and a control end of the second adjustable resistor VR2 are both grounded; and the second fixed end and the control end of the third adjustable resistor VR3 are both grounded.
In this embodiment, for the ac voltage output by the inverter, the sampling resistors respectively sample the output voltages of the upper bridge arm and the lower bridge arm, and then output corresponding feedback signals to the feedback port of the inverter control module 12, so as to realize the collection and feedback of the output ac signals, so as to perform continuous closed-loop control on the output ac voltage, improve the stability and accuracy of the ac voltage output, and further ensure the accuracy of the fault signal source during the fault simulation test.
In an embodiment, as shown in fig. 5, the ac ingress fault simulation verification circuit provided by the present invention further includes a regulated power supply module (not numbered in the figure) for supplying power to a chip in the circuit, and the regulated power supply module performs regulated processing on the first dc voltage and outputs a supply voltage (5V in this embodiment) for supplying power, where the regulated power supply module specifically includes a thirty-fifth resistor R35, a thirty-sixth resistor R36, a thirty-seventh resistor R37, a twentieth capacitor C20, a twenty-first capacitor C21, a twenty-second capacitor C22, a third triode Q3, and a switch regulated chip U2; one end of the thirty-fifth resistor R35 is connected to the FANCTR end of the inverter control module 12, and the other end of the thirty-fifth resistor R35 is connected to one end of the thirty-sixth resistor R36 and the base of the third transistor Q3; the other end of the thirty-sixth resistor R36 is grounded; one end of the thirty-seventh resistor R37 is connected to the output end of the switching regulator chip U2, one end of the twenty-first capacitor C21 and the supply voltage signal end, and the other end of the thirty-seventh resistor R37 is connected to one end of the twenty-second capacitor C22 and the TFB end of the inverter control module 12; one end of the twentieth capacitor C20 is connected to the +12V direct-current voltage signal end and the input end of the switch voltage-stabilizing chip U2, and the other end of the twentieth capacitor C20, the other end of the twenty-first capacitor C21 and the other end of the twenty-second capacitor C22 are all grounded; the emitter of the third triode Q3 is grounded, and the collector of the third triode Q3 is connected with a first direct-current voltage signal end; the GND end of the switch voltage stabilization chip U2 is grounded.
In this embodiment, the regulated power supply module forms a signal detection unit through a fifteenth resistor R35, a thirty-sixth resistor R36 and a third triode Q3 to realize detection and feedback of a power input signal and an output signal, forms a switch control unit through a twentieth capacitor C20 and a switch voltage stabilization chip U2 to realize turning on and off of the power input to step down an input 12V voltage to 5V, and performs voltage stabilization and filtering through a twenty-first capacitor C21, a twenty-second capacitor C22 and a first resistor R1 to finally output a regulated power supply voltage of 5V as a working voltage during other periods such as chips in a circuit, thereby ensuring normal and stable operation of the circuit and improving stability of the ac fault analog verification circuit. Specifically, the switching regulator chip U2 may be a switching regulator chip U2 of a model LM2576, and of course, other chips having the same function may be used in other embodiments, which is not limited in this embodiment.
According to the embodiment, the alternating current entering fault simulation verification circuit provided by the invention outputs the continuously adjustable alternating current voltage after performing boost conversion and inversion control on the direct current low voltage, can flexibly and accurately output the corresponding alternating current voltage according to the requirement to perform entering fault simulation verification on the direct current system to be tested, and improves the accuracy and reliability during alternating current entering test.
Another embodiment of the present invention provides a method for simulating and checking an ac ingress fault, which is applied to a dc system to be tested, and as shown in fig. 6, the method includes the following steps:
s100, the boost conversion module performs boost conversion on the input first direct-current voltage and outputs a second direct-current voltage to the inversion output module;
s200, the inversion control module outputs corresponding inversion driving signals to the inversion output module according to the received alternating current regulating instruction;
and S300, the inversion output module outputs alternating-current voltage with corresponding magnitude to the direct-current system to be tested after performing inversion processing on the second direct-current voltage according to the received inversion driving signal, wherein the alternating-current voltage is used for performing a channeling fault simulation test on the direct-current system to be tested so as to verify a prompt result of the direct-current system to be tested on the currently accessed alternating-current voltage.
For a detailed implementation, please refer to the corresponding product embodiments, which are not described herein again. It should be noted that, a certain sequence does not necessarily exist between the above steps, and those skilled in the art can understand, according to the description of the embodiments of the present invention, that in different embodiments, the above steps may have different execution sequences, that is, may also be executed in parallel, may also be executed interchangeably, and the like.
Another embodiment of the present invention provides an ac ingress fault simulation verification apparatus, where the apparatus includes a housing, where a PCB is disposed in the housing, where the PCB is disposed with an ac ingress fault simulation verification circuit as described above, and the ac ingress fault simulation verification apparatus is connected to a dc system to be tested, and used as a fault signal source to simulate ingress of ac voltages of different magnitudes in the dc system to be tested, so as to verify whether the dc system to be tested can output correct prompt information to implement fault testing.
In summary, the ac ingress fault simulation verification circuit, apparatus and method disclosed in the present invention includes a boost conversion module, an inversion control module and an inversion output module; the boost conversion module performs boost conversion on the input first direct-current voltage and outputs a second direct-current voltage; the inversion control module outputs corresponding inversion driving signals according to the received alternating current regulating instruction; and the inversion output module outputs alternating current voltage with corresponding magnitude to the direct current system to be tested after performing inversion processing on the second direct current voltage according to the inversion driving signal, and the alternating current voltage is used for performing channeling fault simulation test on the direct current system to be tested so as to verify the prompt result of the direct current system to be tested on the currently accessed alternating current voltage. By outputting continuously adjustable alternating voltage after performing boost conversion and inversion control on the direct current low voltage, the corresponding alternating voltage can be flexibly and accurately output as required to carry out channeling fault simulation verification on the direct current system to be tested, and the accuracy and reliability of alternating current channeling test are improved.
Of course, it will be understood by those skilled in the art that all or part of the processes of the methods of the above embodiments may be implemented by instructing relevant hardware (such as a processor, a controller, etc.) through a computer program, which may be stored in a non-volatile computer-readable storage medium, and the computer program may include the processes of the above method embodiments when executed. The storage medium may be a memory, a magnetic disk, a floppy disk, a flash memory, an optical memory, etc.
It is to be understood that the invention is not limited to the examples described above, but that modifications and variations may be effected thereto by those of ordinary skill in the art in light of the foregoing description, and that all such modifications and variations are intended to be within the scope of the invention as defined by the appended claims.

Claims (8)

1. An alternating current entering fault simulation calibration circuit is connected with a direct current system to be tested and is characterized in that the alternating current entering fault simulation calibration circuit comprises a boost conversion module, an inversion control module and an inversion output module; the boost conversion module performs boost conversion on the input first direct-current voltage and then outputs a second direct-current voltage to the inversion output module; the inversion control module outputs a corresponding inversion driving signal to the inversion output module according to the received alternating current regulating instruction; the inversion output module outputs alternating current voltage with corresponding magnitude to the direct current system to be tested after performing inversion processing on the second direct current voltage according to the inversion driving signal, wherein the alternating current voltage is used for performing a channeling fault simulation test on the direct current system to be tested so as to verify a prompt result of the direct current system to be tested on the currently accessed alternating current voltage;
the boost conversion module comprises a pre-conversion driving unit and a boost output unit; the pre-conversion driving unit carries out continuous conduction mode pre-conversion on the input first direct-current voltage to generate a corresponding boosting driving signal to the boosting output unit; the boosting output unit boosts the first direct-current voltage according to the boosting driving signal and outputs the second direct-current voltage to the inversion output module;
the boost output unit comprises an eighth resistor, a ninth resistor, a tenth resistor, an eleventh resistor, a twelfth resistor, a thirteenth resistor, a fourteenth resistor, a fifteenth resistor, an eighth capacitor, a ninth capacitor, a tenth capacitor, a first adjustable resistor, a first triode, a second triode, a first power tube, a second power tube and a first diode; one end of the eighth resistor is connected with the pre-conversion driving unit, and the other end of the eighth resistor is connected with the base electrode of the first triode and the base electrode of the second triode; one end of the ninth resistor is connected with one end of the tenth resistor, one end of the eleventh resistor, one end of the eighth capacitor and the pre-conversion driving unit, and the other end of the ninth resistor is grounded; the other end of the tenth resistor is connected with a second direct-current voltage signal end; the other end of the eleventh resistor is connected with a first fixed end of the first adjustable resistor; one end of the twelfth resistor is connected with the first direct-current voltage signal end, the collector of the first triode and the source of the second power tube, and the other end of the twelfth resistor is connected with one end of the ninth capacitor; one end of the thirteenth resistor is connected with the emitting electrode of the first triode, the collecting electrode of the second triode and the negative electrode of the first diode, and the other end of the thirteenth resistor is connected with the positive electrode of the first diode and one end of the fourteenth resistor; the other end of the fourteenth resistor is connected with the grid electrode of the first power tube and one end of the fifteenth resistor; the other end of the fifteenth resistor is connected with the source electrode of the first power tube and the ground; the other end of the eighth capacitor, the second fixed end of the first adjustable resistor, the control end of the first adjustable resistor, the emitter of the second triode, the other end of the ninth capacitor and one end of the tenth capacitor are all grounded; the other end of the tenth capacitor is connected with the drain electrode of the second power tube and a second direct-current voltage signal end; the drain electrode of the first power tube is connected with the grid electrode of the second power tube.
2. The ac ingress fault simulation verification circuit of claim 1, wherein the inverting output module comprises a power conversion unit, an isolated output unit, and a feedback unit; the power conversion unit switches corresponding switch states according to the received inversion driving signals so as to perform power conversion on the second direct-current voltage and then invert the second direct-current voltage to output alternating-current voltage with corresponding magnitude; the isolation output unit is used for carrying out filtering processing on the alternating-current voltage and then isolating and outputting the alternating-current voltage to the direct-current system to be tested; the feedback unit samples the alternating voltage and outputs a feedback signal to the inversion control module; the inversion control module is further used for adjusting the inversion driving signal according to the feedback signal.
3. The alternating current channeling fault simulation verification circuit according to claim 1, wherein the pre-conversion driving unit comprises a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a sixth resistor, a seventh resistor, a first capacitor, a second capacitor, a third capacitor, a fourth capacitor, a fifth capacitor, a sixth capacitor, a seventh capacitor and a boost chip; one end of the first resistor is connected with one end of the second resistor and one end of the first capacitor, and the other end of the first resistor is grounded; the other end of the second resistor is connected with a pin 3 of the boosting chip and one end of a fourth capacitor; one end of the third resistor is connected with a first direct-current voltage signal end, and the other end of the third resistor is connected with one end of the second capacitor, one end of the fourth resistor and a pin 4 of the boost chip; the other end of the fourth resistor is grounded; one end of the fifth resistor is connected with one end of the third capacitor and the No. 2 pin of the boost chip, and the other end of the fifth resistor is grounded; one end of the sixth resistor is connected with one end of the fifth capacitor and the 5 th pin of the boost chip, and the other end of the sixth resistor is connected with one end of the sixth capacitor; one end of the seventh resistor is connected with the other end of the first capacitor and the first direct-current voltage signal end, and the other end of the seventh resistor is connected with the 7 th pin of the boost chip and one end of the seventh capacitor; the other end of the second capacitor, the other end of the third capacitor, the other end of the fourth capacitor, the other end of the fifth capacitor, the other end of the sixth capacitor and the other end of the seventh capacitor are all grounded; the model of the boosting chip is NCP 1654.
4. The ac ingress fault simulation verification circuit according to claim 2, wherein the power conversion unit includes a sixteenth resistor, a seventeenth resistor, an eighteenth resistor, a nineteenth resistor, a twentieth resistor, a twenty-first resistor, a twenty-second resistor, a twenty-third resistor, a twenty-fourth resistor, a twenty-fifth resistor, a twenty-sixth resistor, a twenty-seventh resistor, a twenty-eighth resistor, an eleventh capacitor, a twelfth capacitor, a second diode, a third diode, a fourth diode, a fifth diode, a third power tube, a fourth power tube, a fifth power tube, and a sixth power tube; one end of the sixteenth resistor is connected with a third inversion driving signal end and the cathode of the second diode, the other end of the sixteenth resistor is connected with the anode of the second diode and one end of the seventeenth resistor, and the other end of the seventeenth resistor is connected with one end of the eighteenth resistor and the grid of the third power tube; the other end of the eighteenth resistor is connected with the isolation output unit, one end of the nineteenth resistor is connected with a fourth inverse driving signal end and the cathode of the third diode, and the other end of the nineteenth resistor is connected with the anode of the third diode and one end of the twentieth resistor; the other end of the twentieth resistor is connected with one end of the twenty-first resistor and a grid electrode of the fourth power tube, and the other end of the twenty-first resistor is connected with an IFB end of the inversion control module; one end of the twenty-second resistor is connected with the cathode of the fourth diode and the first inversion driving signal end, and the other end of the twenty-second resistor is connected with the cathode of the fourth diode and one end of the twenty-third resistor; the other end of the twenty-third resistor is connected with one end of the twenty-fourth resistor and the grid electrode of the fifth power tube; the other end of the twenty-fourth resistor is connected with the source electrode of the fifth power tube and the drain electrode of the sixth power tube; one end of the twenty-fifth resistor is connected with the cathode of the fifth diode and the second inversion driving signal end, and the other end of the twenty-fifth resistor is connected with the anode of the fifth diode and one end of the twenty-sixth resistor; the other end of the twenty-sixth resistor is connected with one end of the twenty-seventh resistor and the grid electrode of the sixth power tube; the other end of the twenty-seventh resistor is connected with one end of the twenty-eighth resistor, the source electrode of the sixth power tube, one end of the twelfth capacitor and the IFB end of the inversion control module; the other end of the twenty-eighth resistor is grounded; one end of the eleventh capacitor is connected with a second direct-current voltage signal end, and the other end of the eleventh capacitor is connected with the IFB end of the inversion control module; the other end of the twelfth capacitor is connected with a second direct-current voltage signal end; the drain electrode of the third power tube is connected with a second direct-current voltage signal end, and the source electrode of the third power tube is connected with the drain electrode of the fourth power tube and a second control signal end; a source electrode of the fourth power tube is connected with an IFB end of the inversion control module; the drain electrode of the fifth power tube is connected with a second direct-current voltage signal end, and the inversion control module adopts a pure sine wave inversion generator chip with the model number of EG 8010.
5. The ac ingress fault simulation verification circuit of claim 2, wherein the isolated output unit comprises a first inductor, a second inductor, a thirteenth capacitor, a fourteenth capacitor, a fifteenth capacitor, a sixteenth capacitor, a seventeenth capacitor, a first output interface, a second output interface, and a transformer; one end of the first inductor is connected with the power conversion unit, and the other end of the first inductor is connected with one end of the thirteenth capacitor, one end of the fourteenth capacitor, one end of the fifteenth capacitor, the 1 st end of the transformer and the feedback unit; one end of the second inductor is connected with a first control signal end, and the other end of the second inductor is connected with the other end of the thirteenth capacitor, the other end of the fourteenth capacitor, the other end of the fifteenth capacitor, the 2 nd end of the transformer and the feedback unit; one end of the sixteenth capacitor is connected with the 3 rd end of the transformer, and the other end of the sixteenth capacitor is connected with the first output interface; one end of the seventeenth capacitor is connected with the 4 th end of the transformer, and the other end of the seventeenth capacitor is connected with the second output interface.
6. The ac ingress fault simulation verification circuit of claim 2, wherein the feedback unit comprises a twenty-ninth resistor, a thirty-third resistor, a thirty-first resistor, a thirty-second resistor, a thirty-third resistor, a thirty-fourth resistor, an eighteenth capacitor, a nineteenth capacitor, a second adjustable resistor, and a third adjustable resistor; one end of the twenty-ninth resistor is connected with the isolation output unit, and the other end of the twenty-ninth resistor is connected with one end of the thirty-first resistor, one end of the eighteenth capacitor and the VFB end of the inverter control module; the other end of the thirtieth resistor is grounded; the other end of the thirty-first resistor is connected with a first fixed end of the second adjustable resistor; one end of the thirty-second resistor is connected with the isolation output unit, and the other end of the thirty-second resistor is connected with one end of the thirty-third resistor; the other end of the thirty-third resistor is grounded; one end of the thirty-fourth resistor is connected with one end of the nineteenth capacitor and the VFB2 end of the inverter control module, and the other end of the thirty-fourth resistor is connected with the first fixed end of the third adjustable resistor; the other end of the eighteenth capacitor and the other end of the nineteenth capacitor are both grounded; the second fixed end and the control end of the second adjustable resistor are both grounded; and a second fixed end and a control end of the third adjustable resistor are both grounded, and the inversion control module adopts a pure sine wave inversion generator chip with the model of EG 8010.
7. An alternating current channeling fault simulation verification method is applied to a direct current system to be tested, and comprises the following steps:
the boost conversion module performs boost conversion on the input first direct-current voltage and outputs a second direct-current voltage to the inversion output module;
the inversion control module outputs a corresponding inversion driving signal to the inversion output module according to the received alternating current regulating instruction;
the inversion output module outputs alternating-current voltage with corresponding magnitude to the direct-current system to be tested after performing inversion processing on the second direct-current voltage according to the received inversion driving signal, wherein the alternating-current voltage is used for performing a channeling fault simulation test on the direct-current system to be tested so as to verify a prompt result of the direct-current system to be tested on the currently accessed alternating-current voltage;
the boost conversion module comprises a pre-conversion driving unit and a boost output unit; the pre-conversion driving unit carries out continuous conduction mode pre-conversion on the input first direct-current voltage to generate a corresponding boosting driving signal to the boosting output unit; the boosting output unit boosts the first direct-current voltage according to the boosting driving signal and outputs the second direct-current voltage to the inversion output module;
the boost output unit comprises an eighth resistor, a ninth resistor, a tenth resistor, an eleventh resistor, a twelfth resistor, a thirteenth resistor, a fourteenth resistor, a fifteenth resistor, an eighth capacitor, a ninth capacitor, a tenth capacitor, a first adjustable resistor, a first triode, a second triode, a first power tube, a second power tube and a first diode; one end of the eighth resistor is connected with the pre-conversion driving unit, and the other end of the eighth resistor is connected with the base electrode of the first triode and the base electrode of the second triode; one end of the ninth resistor is connected with one end of the tenth resistor, one end of the eleventh resistor, one end of the eighth capacitor and the pre-conversion driving unit, and the other end of the ninth resistor is grounded; the other end of the tenth resistor is connected with a second direct-current voltage signal end; the other end of the eleventh resistor is connected with a first fixed end of the first adjustable resistor; one end of the twelfth resistor is connected with the first direct-current voltage signal end, the collector of the first triode and the source of the second power tube, and the other end of the twelfth resistor is connected with one end of the ninth capacitor; one end of the thirteenth resistor is connected with the emitting electrode of the first triode, the collecting electrode of the second triode and the negative electrode of the first diode, and the other end of the thirteenth resistor is connected with the positive electrode of the first diode and one end of the fourteenth resistor; the other end of the fourteenth resistor is connected with the grid electrode of the first power tube and one end of the fifteenth resistor; the other end of the fifteenth resistor is connected with the source electrode of the first power tube and the ground; the other end of the eighth capacitor, the second fixed end of the first adjustable resistor, the control end of the first adjustable resistor, the emitter of the second triode, the other end of the ninth capacitor and one end of the tenth capacitor are all grounded; the other end of the tenth capacitor is connected with the drain electrode of the second power tube and a second direct-current voltage signal end; the drain electrode of the first power tube is connected with the grid electrode of the second power tube.
8. An alternating current ingress fault simulation verification device, comprising a housing, wherein a PCB board is arranged in the housing, characterized in that the PCB board is provided with an alternating current ingress fault simulation verification circuit as claimed in any one of claims 1 to 6.
CN202110814003.9A 2021-07-19 2021-07-19 Alternating current channeling fault simulation verification circuit, device and method Active CN113267658B (en)

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