CN113258538B - Power output protection method and circuit - Google Patents
Power output protection method and circuit Download PDFInfo
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- CN113258538B CN113258538B CN202110733431.9A CN202110733431A CN113258538B CN 113258538 B CN113258538 B CN 113258538B CN 202110733431 A CN202110733431 A CN 202110733431A CN 113258538 B CN113258538 B CN 113258538B
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
- H02H7/00—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions
- H02H7/10—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for converters; for rectifiers
- H02H7/12—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for converters; for rectifiers for static converters or rectifiers
- H02H7/125—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for converters; for rectifiers for static converters or rectifiers for rectifiers
- H02H7/1257—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for converters; for rectifiers for static converters or rectifiers for rectifiers responsive to short circuit or wrong polarity in output circuit
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
- H02H1/00—Details of emergency protective circuit arrangements
- H02H1/0007—Details of emergency protective circuit arrangements concerning the detecting means
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
- H02H3/00—Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition with or without subsequent reconnection ; integrated protection
- H02H3/08—Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition with or without subsequent reconnection ; integrated protection responsive to excess current
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Abstract
The embodiment of the application discloses a power output protection method and a circuit, wherein a current detection resistor is arranged on a power output loop, a first input end and a second input end of a control chip are respectively connected with two ends of a control switch, a third input end and a fourth input end of the control chip are respectively connected with two ends of the current detection resistor, a first output end of the control chip is connected with a control end of a power supply, and a second output end of the control chip is connected with a control end of the control switch; the method comprises the following steps: the control chip detects a first voltage and a second voltage; the first voltage is the voltage difference between two ends of the control switch, and the second voltage is the voltage difference between two ends of the current detection resistor; the control chip controls the output voltage of the power supply and controls the on or off of the switch according to the first voltage and the second voltage, and when the power supply output protection circuit has the problem of single-point short circuit, the control chip can enter a protection state in a targeted mode to meet the LPS (Low-pass power) authentication requirement of the power supply.
Description
Technical Field
The present application relates to the field of communications technologies, and in particular, to a power output protection method and circuit.
Background
At present, more and more Power supply products with a quick charging protocol are available in the market, and output current and voltage transmitted to a load can be Limited according to the protocol regulation for protecting charging equipment such as a mobile phone, so that a Power supply of a Limited Power Source (LPS) cannot cause electric shock or fire.
The current principle of limiting the output current is: the output current is detected by the voltage difference across the output current detection resistor and the output power is controlled by the primary PWM duty cycle. As shown in fig. 1, the AC-DC control chip directly detects the output current by checking the voltage difference across Rs, and controls the output power by the primary PWM duty ratio. When the Rs resistor is short-circuited, the AC-DC control chip can detect that the main power circuit has large power consumption, but when the Rs resistor of the output end cannot detect output current, the AC-DC control chip enters a protection state, and the maximum output current is limited by controlling the working state of the main power switch circuit. If the Rs resistor works normally, the AC-DC control chip limits the maximum output current by controlling the current flowing through the Rs resistor. However, the output power is controlled by indirectly judging whether the short circuit occurs through the primary PWM state, and the configuration needs to be performed according to different output voltages and different output powers, so that the control strategy is complex.
Disclosure of Invention
The embodiment of the application provides a power output protection method and circuit, and when a single-point short circuit problem occurs in the power output protection circuit, the power output protection circuit can enter a protection state in a targeted manner to meet the authentication requirement of a power LPS.
In a first aspect, an embodiment of the present application provides a power output protection method, which is applied to a power output protection circuit, where the power output protection circuit includes a power supply, a control switch, a current detection resistor, a control chip and an output port, the current detection resistor is disposed on a power output loop, a first input end and a second input end of the control chip are respectively connected to two ends of the control switch, a third input end and a fourth input end of the control chip are respectively connected to two ends of the current detection resistor, a first output end of the control chip is connected to a control end of the power supply, and a second output end of the control chip is connected to a control end of the control switch;
the method comprises the following steps:
the control chip detects a first voltage and a second voltage, wherein the first voltage is the voltage at two ends of the control switch, and the second voltage is the voltage at two ends of the current detection resistor;
the control chip controls the output voltage of the power supply and the on or off of the control switch according to the first voltage and the second voltage.
In a second aspect, a power output protection circuit provided in an embodiment of the present application includes a power supply, a control switch, a current detection resistor, a control chip, and an output port; the current detection resistor is arranged on a power supply output loop, a first input end and a second input end of the control chip are respectively connected with two ends of the control switch, a third input end and a fourth input end of the control chip are respectively connected with two ends of the current detection resistor, a first output end of the control chip is connected with a control end of the power supply, and a second output end of the control chip is connected with a control end of the control switch;
the control chip is used for detecting a first voltage and a second voltage, the first voltage is the voltage at two ends of the control switch, and the second voltage is the voltage at two ends of the current detection resistor;
the control chip is used for controlling the output voltage of the power supply and the on/off of the control switch according to the first voltage and the second voltage.
In a third aspect, an embodiment of the present application provides an electronic device, which includes the power output protection circuit described in the second aspect.
In a fourth aspect, the present application provides a computer-readable storage medium storing a computer program for electronic data exchange, wherein the computer program causes a computer to perform some or all of the steps described in the method of the first aspect.
In a fifth aspect, the present application provides a computer program product, where the computer program product includes a non-transitory computer-readable storage medium storing a computer program, where the computer program is operable to cause a computer to perform some or all of the steps described in the method according to the first aspect of the present application. The computer program product may be a software installation package.
Therefore, according to the power output protection method provided by the application, the control chip detects the first voltage and the second voltage; the first voltage is the voltage difference between two ends of the control switch, and the second voltage is the voltage difference between two ends of the current detection resistor; the control chip controls the output voltage of the power supply and controls the on or off of the switch according to the first voltage and the second voltage, and when the power supply output protection circuit has the problem of single-point short circuit, the control chip can enter a protection state in a targeted mode to meet the LPS (Low-pass power) authentication requirement of the power supply.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the embodiments will be briefly described below, and it is obvious that the drawings in the following description are some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings without creative efforts.
FIG. 1 is a schematic diagram of a prior art power output protection circuit;
fig. 2 is a schematic structural diagram of a power output protection circuit according to an embodiment of the present disclosure;
fig. 3 is a schematic structural diagram of another power output protection circuit provided in the embodiment of the present application;
fig. 4 is a schematic structural diagram of another power output protection circuit provided in the embodiment of the present application;
fig. 5 is a schematic structural diagram of a control chip provided in an embodiment of the present application;
fig. 6 is a schematic structural diagram of a successive approximation register SAR analog-to-digital converter ADC according to an embodiment of the present application;
fig. 7 is a schematic structural diagram of a first amplifying circuit according to an embodiment of the present disclosure;
fig. 8 is a schematic structural diagram of a second amplifying circuit according to an embodiment of the present disclosure;
fig. 9 is a schematic flowchart of a power output protection method according to an embodiment of the present application;
fig. 10 is a schematic flowchart of a process for determining a short circuit of a MOS transistor and/or a current detection resistor according to an embodiment of the present disclosure.
Detailed Description
In order to better understand the technical solutions of the present application, the following description is given for clarity and completeness in conjunction with the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only some embodiments of the present application, but not all embodiments. All other embodiments obtained by a person skilled in the art without making any inventive step on the basis of the description of the embodiments of the present application belong to the protection scope of the present application.
The terms "first," "second," and the like in the description and claims of the present application and in the above-described drawings are used for distinguishing between different objects and not for describing a particular order. Furthermore, the terms "include" and "have," as well as any variations thereof, are intended to cover non-exclusive inclusions. For example, a process, method, software, product, or apparatus that comprises a list of steps or elements is not limited to those listed but may include other steps or elements not listed or inherent to such process, method, product, or apparatus.
Reference herein to "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment can be included in at least one embodiment of the application. The appearances of the phrase in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments. It is explicitly and implicitly understood by one skilled in the art that the embodiments described herein can be combined with other embodiments.
The embodiments of the present application will be described with reference to the drawings, in which a dot at the intersection of intersecting wires indicates that the wires are connected, and a dot-free intersection indicates that the wires are not connected.
Referring to fig. 2, fig. 2 is a schematic structural diagram of a power output protection circuit according to an embodiment of the present disclosure, where the power output protection circuit includes a power supply 100, a control switch 200, a current detection resistor 300, a control chip 400, and an output port 500. Current detection resistance 300 sets up on the power output return circuit, control chip 400's first input and second input are connected respectively control switch 200's both ends, control chip 400's third input and fourth input are connected respectively current detection resistance 300's both ends, control chip 400's first output is connected power 100's control end, control chip 400's second output is connected control switch 200's control end.
Wherein, the power output loop comprises that the output end of the power supply 100 is grounded through the control switch 200, the output port 500 and the current detection resistor 300 in sequence.
Specifically, the first input end of the control chip 400 is connected to the input end of the control switch 200 and the output end of the power supply 100, the second input end of the control chip 400 is connected to the output end of the control switch 200 and the input end of the output port 500, the third input end of the control chip 400 is connected to one end of the current detection resistor 300 and the output end of the output port 500, the fourth input end of the control chip 400 is connected to the other end of the current detection resistor 300, the first output end of the control chip 400 is connected to the control end of the power supply 100, and the second output end of the control chip 400 is connected to the control end of the control switch 200.
Exemplarily, as shown in fig. 3, fig. 3 is a schematic structural diagram of another power output protection circuit provided in an embodiment of the present application, where the power output protection circuit includes a power supply 100, a control switch 200, a current detection resistor 300, a control chip 400, and an output port 500. Current detection resistance 300 sets up on the power output return circuit, control chip 400's first input and second input are connected respectively control switch 200's both ends, control chip 400's third input and fourth input are connected respectively current detection resistance 300's both ends, control chip 400's first output is connected power 100's control end, control chip 400's second output is connected control switch 200's control end.
Wherein, the power output loop comprises that the output end of the power supply 100 is grounded through the current detection resistor 300, the control switch 200 and the output port 500 in sequence.
Specifically, the first input end of the control chip 400 is connected to the input end of the control switch 200 and the one end of the circuit detection resistor 300, the second input end of the control chip 400 is connected to the output end of the control switch 200 and the input end of the output port 500, the third input end of the control chip 400 is connected to the other end of the current detection resistor 300 and the output end of the power supply 100, the fourth input end of the control chip 400 is connected to the one end of the current detection resistor 300 and the input end of the control switch 200, the first output end of the control chip 400 is connected to the control end of the power supply 100, and the second output end of the control chip 400 is connected to the control end of the control switch 200.
It is understood that the first input terminal and the fourth input terminal of the control chip 400 may be the same port. That is, the control chip 400 includes a first input terminal, a second input terminal and a third input terminal, the first input terminal is connected to the input terminal of the control switch 200 and one end of the current detection resistor 300, the second input terminal is connected to the output terminal of the control switch 200 and the input terminal of the output port 500, and the third input terminal is connected to the output terminal of the power supply 100 and the other end of the current detection resistor 300.
Exemplarily, as shown in fig. 4, fig. 4 is a schematic structural diagram of another power output protection circuit provided in the embodiment of the present application, and the power output protection circuit includes a power supply 100, a control switch 200, a current detection resistor 300, a control chip 400, and an output port 500. Current detection resistance 300 sets up on the power output return circuit, control chip 400's first input and second input are connected respectively control switch 200's both ends, control chip 400's third input and fourth input are connected respectively current detection resistance 300's both ends, control chip 400's first output is connected power 100's control end, control chip 400's second output is connected control switch 200's control end.
Wherein, the power output loop comprises that the output end of the power supply 100 is grounded through the control switch 200, the current detection resistor 300 and the output port 500 in sequence.
Specifically, the first input end of the control chip 400 is connected to the input end of the control switch 200 and the output end of the power supply 100, the second input end of the control chip 400 is connected to the output end of the control switch 200 and the one end of the current detection resistor 300, the third input end of the control chip 400 is connected to the one end of the current detection resistor 300 and the output end of the control switch 200, the fourth input end of the control chip 400 is connected to the other end of the current detection resistor 300 and the input end of the output port, the first output end of the control chip 400 is connected to the control end of the power supply 100, and the second output end of the control chip 400 is connected to the control end of the control switch 200.
It is understood that the second input and the third input of the control chip 400 may be the same port. That is, the control chip 400 includes a first input terminal, a second input terminal and a third input terminal, the first input terminal is respectively connected to the output terminal of the power supply 100 and the input terminal of the control switch 200, the second input terminal is respectively connected to the output terminal of the control switch 200 and one end of the current detection resistor 300, and the third input terminal is respectively connected to the other end of the current detection resistor 300 and the input terminal of the output port 500.
In the embodiment of the present application, the control chip 400 detects the output current accurately by detecting the voltage difference between the two terminals of the current detection resistor 300, and also detects the voltage difference between the two terminals of the control switch 200 (the MOS transistor has an on-resistance) to assist in detecting the output current. Since the control switch 200 and the current detection resistor are the current loop that must pass through and are connected in series, the output current flowing through the control switch 200 is the same as the output current flowing through the current detection resistor 300. When any device in the control switch 200 and the current detection resistor 300 is short-circuited, the current of the control switch 200 side and the current of the current detection resistor 300 side, which are detected by the control chip 400, are greatly different, so that the control chip 400 can enter a short-circuit protection state by taking the current as a judgment condition, the control switch 200 is controlled to be switched off or switched on by outputting a control signal, and the output voltage of the power supply 100 is regulated by voltage feedback, so that the output current and the output voltage of the power supply meet the requirements of LPS specifications.
The control switch 200 is an MOS transistor, which may be an N-channel MOS transistor or a P-channel MOS transistor, and may be specifically set according to an application scenario of the power output protection circuit, which is not limited in this application embodiment.
The control switch 200 in the present application may be another component or a switch circuit that can realize the same function as the MOS transistor.
The control Chip 400 may be an Integrated Circuit (IC) of a Micro Controller Unit (MCU) type with models of IP2726, IP2723T, and IP2712, or may be another type of System On Chip (SOC).
The power supply 100 may be an AC/DC power supply, a DC/DC power supply, a regulated power supply, a communication power supply, a module power supply, a variable frequency power supply, an inverter power supply, an AC regulated power supply, a DC regulated power supply, or the like, which is not limited in this embodiment of the present application.
The power output protection circuit provided by the application can be suitable for AC/DC and DC/DC power supplies, and compared with the prior art, the power output protection circuit can only be used for a low-power AC/DC power supply, and is wider in relative application range. The power output protection circuit provided by the application can be suitable for flyback converters, and is also suitable for switch power supply topologies such as forward converters, BUCK circuits, BOOST circuits and LLC resonant converters.
Optionally, as shown in fig. 5, the control chip 400 includes a first amplifying circuit 401, a second amplifying circuit 402, a first analog-to-digital converting circuit 403, a second analog-to-digital converting circuit 404, and an output control circuit 405;
a first input end of the first amplifying circuit 401 is connected to a first input end of the control chip 400, a second input end of the first amplifying circuit 401 is connected to a second input end of the control chip 400, an output end of the first amplifying circuit 401 is connected to an input end of the first analog-to-digital converting circuit 403, and an output end of the first analog-to-digital converting circuit 403 is connected to a first input end of the output control circuit 405; a first input end of the second amplifying circuit 402 is connected to a third input end of the control chip 400, a second input end of the second amplifying circuit 402 is connected to a fourth input end of the control chip 400, an output end of the second amplifying circuit 402 is connected to an input end of the second analog-to-digital converting circuit 404, and an output end of the second analog-to-digital converting circuit 404 is connected to a second input end of the output control circuit 405; the first output end of the output control circuit 405 is connected to the first output end of the control chip 400, and the second output end of the output control circuit 405 is connected to the second output end of the control chip 400.
The first analog-to-digital conversion circuit 403 is configured to sample the output current flowing through the control switch 200, and the second analog-to-digital conversion circuit 404 is configured to sample the output current flowing through the current detection resistor 300.
Further, the first Analog-to-Digital conversion circuit 403 and the second Analog-to-Digital conversion circuit 404 may employ a Successive Approximation Register (SAR) Analog-to-Digital Converter (ADC). The SAR ADC is also referred to as a binary search ADC. As shown in fig. 6, the SAR ADC includes a sample-and-hold circuit S/H, an accumulator, a comparator, a successive approximation register SAR, and a Digital-to-Analog Converter (DAC). The SAR ADC compares an analog input signal with an analog-to-digital conversion result obtained at the previous time through the DAC by using a high-speed high-precision comparator to obtain each Bit from a Most Significant Bit (MSB) to a Least Significant Bit (LSB), thereby converting each sampled analog signal of an output current into a digital signal of a plurality of bits.
In the embodiment of the present application, considering that the current detection resistor 300 generates system loss, the resistance of the current detection resistor 300 is generally selected to be smaller to reduce the loss. Meanwhile, in order to improve the sampling precision of the output current, the first amplifying circuit 401 is added to the previous stage of the first digital-to-analog conversion circuit 403 to amplify the sampling signal of the output current at the control switch 200; the second amplifying circuit 402 is added to a stage before the second analog-to-digital converting circuit 404 to amplify the sampled signal of the output current at the current detecting resistor 300.
Optionally, as shown in fig. 7, the first amplifying circuit 401 includes: a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a first transistor Q1 and a first operational amplifier U1, wherein, one end of the first resistor R1 is connected to the first input end of the first amplifying circuit 401, the other end of the first resistor R1 is respectively connected with the positive input end of the first operational amplifier U1 and one end of the third resistor R3, the other end of the third resistor R3 is connected to the collector of the first transistor Q1, the emitter of the first transistor Q1 is connected to one end of the second resistor R2 and the output end of the first amplifying circuit 401, the other end of the second resistor R2 is grounded, the base of the first transistor Q1 is connected with the output end of the first operational amplifier U1, one end of the fourth resistor R4 is connected to the second input terminal of the first amplifying circuit 401, the other end of the fourth resistor R4 is connected to the inverting input terminal of the first operational amplifier U1.
The voltages of the positive input terminal + and the negative input terminal-based on the first operational amplifier U1 are the same, so the voltage difference across the first resistor R1 is equal to the sampled voltage, and the current across the first resistor R1 is equal to the current across the second resistor R2, so the amplification factor of the current sampling signal is the ratio of the voltage across the second resistor R2 to the voltage across the first resistor R1, i.e., the current sampling signal is amplified to R2/R1.
In the embodiment of the present application, when the current detection resistor 300 is connected in series to the previous stage or the next stage of the control switch 200, that is, as shown in fig. 3 and 4, the circuit structures of the first amplification circuit 401 and the second amplification circuit 402 are the same.
Optionally, when the current detection resistor 300 is connected in series behind the output port 500, that is, with respect to fig. 2, as shown in fig. 8, the second amplifying circuit 402 includes: a fifth resistor R5, a sixth resistor R6, a seventh resistor R7, an eighth resistor R8, a second transistor Q2, a third transistor Q3, a fourth transistor Q4 and a second operational amplifier U2, wherein one end of the fifth resistor R5 is connected to the second input terminal of the second amplifier circuit 402, the other end of the fifth resistor R5 is connected to one end of the sixth resistor R6 and the inverting input terminal of the second operational amplifier U2, the other end of the sixth resistor R6 is connected to the emitter of the second transistor Q2, the base of the second transistor Q2 is connected to the output terminal of the second operational amplifier U2, the collector of the second transistor Q2 is connected to the collector of the third transistor Q3, the base of the third transistor Q3 and the base of the fourth transistor Q3, the emitter of the third transistor Q3 is connected to the emitter of the fourth transistor Q4 and the emitter of the second operational amplifier U2, a collector of the fourth transistor Q4 is connected to one end of the seventh resistor R7 and the output end of the second amplifying circuit 402, respectively, the other end of the seventh resistor R7 is grounded, one end of the eighth resistor R8 is connected to the first input end of the second amplifying circuit 402, and the other end of the eighth resistor R8 is connected to the positive input end of the operational amplifier U2.
The third transistor Q3 and the fourth transistor Q4 may be NPN transistors or PNP transistors. The emitter-reference (base-emitter) voltages of the third transistor Q3 and the fourth transistor Q4 are the same, and the base driving voltages are the same, so that a basic NPN mirror current source circuit is formed, and the current in the seventh resistor R7 is equal to the current in the fifth resistor R5, so that the amplification factor of the current sampling signal is the ratio of the voltage in the fifth resistor R5 to the voltage in the seventh resistor R7, that is, the current sampling signal is amplified to R5/R7.
In the embodiment of the present application, the output control circuit 405 is configured to determine whether the control switch 200 and/or the current detection resistor 300 is short-circuited according to a difference between the output current flowing through the control switch 200 and the output current flowing through the current detection resistor 300. When the difference between the output current flowing through the control switch 200 and the output current flowing through the current detection resistor 300 is large, that is, the control switch 200 and/or the current detection resistor 300 are short-circuited, the output control circuit 405 enters a short-circuit protection state, and outputs a control instruction to control the control switch 200 to be turned on or turned off, for example, when the control switch 200 is an N-channel MOS transistor, the output control circuit 405 outputs a low level to turn off the N-channel MOS transistor, so that the control switch 200 is turned off. Meanwhile, the output control circuit 405 outputs a control command to make the power supply 100 reduce the output voltage to a first voltage value, which is a preset output voltage meeting the LPS specification requirement.
It is understood that the specific manner of outputting the control command output by the control circuit 405 is determined by the control manner of the power supply, and the value of the first voltage value is also set according to the safety requirement of the power supply, which is not limited herein.
It can be seen that, in the output power protection circuit provided in the embodiment of the present application, the control chip 300 directly detects the output current flowing through the control switch 200 and the current detection circuit 300, and compared with the prior art in which the indirect output current of the output current is estimated by monitoring the change of the primary PWM, the output power protection circuit is faster and more accurate; in addition, the technical scheme that the control switch 200 and the current detection circuit 300 are mutually protected is adopted, the protection range is wider, the original devices of the power supply are used for detection and judgment, the detection circuit does not need to be additionally arranged, the cost is low, and the circuit is simple.
Referring to fig. 9, fig. 9 is a schematic flowchart of a power output protection method according to an embodiment of the present disclosure, applied to the power output protection circuits shown in fig. 2 to fig. 4. As shown in fig. 9, the method includes the following steps.
S910, the control chip detects a first voltage and a second voltage, wherein the first voltage is the voltage at two ends of the control switch, and the second voltage is the voltage at two ends of the current detection resistor.
Wherein the control switch 200 is a MOS transistor.
In the embodiment of the present application, the control switch 200 and the current detection resistor 300 are the indispensable path of the output current loop, and the MOS transistor and the current detection resistor 300 are in a series relationship, so the output currents passing through the MOS transistor and the current detection resistor 300 are the same. Since the on-resistance of the MOS transistor and the resistance of the current detection resistor 300 are known, the output current flowing through the MOS transistor and the current detection resistor 300 can be obtained by detecting the first voltage and the second voltage.
And S920, the control chip controls the output voltage of the power supply and the on/off of the control switch according to the first voltage and the second voltage.
The first voltage may reflect the magnitude of the output current flowing through the MOS transistor, and the second voltage may reflect the output current flowing through the current detection resistor 300. Since the output current flowing through the MOS transistor and the current detection resistor 300 are the same in magnitude, the output voltage of the power supply 100 and the on/off of the MOS transistor can be controlled according to the variation of the first voltage and the second voltage to ensure that the power supply 100 meets the LPS specification.
Optionally, the controlling chip controls the output voltage of the power supply and the on or off of the control switch according to the first voltage and the second voltage, and includes: the control chip judges whether the MOS transistor and/or the current detection resistor are short-circuited or not according to the first voltage and the second voltage; when the MOS transistor and/or the current detection resistor are short-circuited, the control chip controls the control switch to be in a closed state or an open state within a first time, and controls the power supply to output a first voltage value within the first time.
When the MOS transistor and the current detection resistor 300 are both in a normal state, the output currents flowing through the MOS transistor and the current detection resistor 300 are the same, so that the detected first voltage and the detected second voltage are within a preset range, and the ratio of the first voltage to the second voltage is also within the preset range. Therefore, when the first voltage and the second voltage are changed greatly or the ratio of the first voltage and the second voltage is changed greatly, it indicates that the MOS transistor and/or the current detection resistor 300 is short-circuited, and at this time, the control chip needs to perform a short-circuit protection state, and controls the MOS transistor to be turned off or turned on by outputting a control signal, and simultaneously adjusts the output voltage of the power supply 100 by voltage feedback, so that the output current and the output voltage of the power supply meet the LPS specification requirements.
Optionally, as shown in fig. 10, the determining, by the control chip, whether the MOS transistor and/or the current detection resistor is short-circuited according to the first voltage and the second voltage includes:
s101, the output control circuit checks whether the MOS transistor is in a conducting state;
s102, if the MOS transistor is in a conducting state, the output control circuit judges whether a first ratio is smaller than a first preset value, wherein the first ratio is the ratio of the first voltage to the second voltage;
s103, if the MOS transistor is in a cut-off state, the output control circuit judges whether the first voltage is smaller than a second preset value;
s104, if the first ratio is smaller than the first preset value or the first voltage is smaller than the second preset value, the output control circuit starts a first timer;
s105, the output control circuit judges whether the value of the first timer is larger than or equal to a first value;
s106, if the value of the first timer is larger than or equal to the first value, the output control circuit determines that the MOS transistor is short-circuited, and if the value of the first timer is smaller than the first value, the output control circuit initializes the first timer;
s107, if the first ratio is larger than or equal to the first preset value, the output control circuit judges whether the first ratio is larger than a third preset value;
s108, if the first ratio is larger than the third preset value, the output control circuit starts a second timer;
s109, the output control circuit judges whether the value of the second timer is larger than or equal to the first value;
and S110, if the value of the second timer is greater than or equal to the first value, the output control circuit determines that the current detection resistor is short-circuited, and if the value of the second timer is smaller than the first value, the output control circuit initializes the second timer.
When the power supply 100 starts to deliver output current and voltage to a load, the control chip firstly initializes the output power supply protection circuit, specifically: the control chip initializes the state of the SAR registers in the first analog-to-digital conversion circuit 403 and the second analog-to-digital conversion circuit 404; the resistance value of the current detection resistor 300 and the on-resistance of the MOS transistor are obtained at the same time, and the control switch is restored to the recorded original state (open or closed).
In the embodiment of the present application, whether the MOS transistor and/or the current detection resistor 300 is short-circuited can be determined by the voltage across the MOS transistor and the voltage across the current detection resistor 300. The basis for determining the short circuit of the MOS transistor and/or the current detection resistor 300 is different according to the different operating states of the MOS transistor. The MOS transistor and/or the current detection resistor 300 are short-circuited according to the following table 1.
TABLE 1
When the MOS transistor is in a conducting state, if a first ratio of the first voltage to the second voltage is smaller than a first preset value, and the duration of the first ratio smaller than the first preset value is larger than the first value, the MOS transistor is judged to be in a short circuit. When the MOS transistor is in an on state, if the first ratio of the first voltage to the second voltage is greater than the third preset value, and the duration of the first ratio greater than the third preset value is greater than the first value, it is determined that the current detection resistor 300 is short-circuited. When the MOS transistor is in a cut-off state, if the first voltage is smaller than a second preset value and the duration time of the first voltage smaller than the second preset value is larger than a first value, the MOS transistor is judged to be in a short circuit; since no current passes through the current detection resistor 300, it is impossible to detect whether the current detection resistor 300 is short-circuited, and it is necessary to determine when the MOS transistor is in a conducting state.
Further, the first preset value may be
The third preset value can be
The second preset value can be
Said
Is the output voltage of the power supply 100, the
Is the minimum on-resistance of the MOS transistor
Is the maximum on-resistance of the MOS transistor
And said
With reference to a data manual of the selected MOS transistor, the coefficients 80% and 120% are recommended values, and the present application can also flexibly take values according to sampling accuracy. The first value may be 5ms, 10ms, 15ms, 20ms, and the like, and the specific value may be set according to an actual application situation, which is not limited herein.
Specifically, after the control chip is initialized, whether the MOS transistor is in a conducting state is judged, and when the MOS transistor is in the conducting state, whether the MOS transistor is in a short circuit is judged through sampling data, namely, whether the MOS transistor is in a short circuit is judged according to the detected first voltage
And a second voltage
Judging whether the MOS transistor is short-circuited or not according to the following judgment basis:
if the above determination is true, that is, the first ratio is smaller than the first preset value, it is determined that the MOS transistor is short-circuited, and the output control circuit 405 may start the first timer in order to detect the duration of the short-circuit of the MOS transistor. In the first placeWhen the value of the timer is greater than or equal to the first value, it indicates that the power output protection circuit needs to enter a short-circuit protection state, the output control circuit 405 records the current state of the MOS transistor, and outputs a control command to control the MOS transistor to be in a cut-off state, and at the same time, controls the power supply 100 to regulate the output voltage to a first voltage value, for example, 5V. If the value of the first timer is smaller than or equal to the first value, the first timer is initialized, and whether the first ratio is smaller than a first preset value or not is continuously judged.
Further, if the first ratio is greater than or equal to the first predetermined value, the output control circuit 405 determines whether the current detection resistor 300 is short-circuited according to the determination result
And if the judgment is established, namely the first ratio is greater than the third preset value, starting a second timer. If the value of the second timer is greater than or equal to the first value, it indicates that the current detection resistor 300 is short-circuited, the power output protection circuit needs to enter a short-circuit protection state, the output control circuit 405 records the current state of the MOS transistor, and simultaneously outputs a control instruction to control the MOS transistor to be in a cut-off state, and simultaneously controls the power supply 100 to output voltage and regulate the voltage to the first voltage value. If the value of the second timer is smaller than the first value, the second timer is initialized, and whether the first ratio is larger than a third preset value or not is continuously judged.
Further, if the MOS transistor is in the off state, the output control circuit 405 determines whether the MOS transistor is short-circuited, according to the following criteria:
if the above determination is true, that is, the first voltage is smaller than the second preset value, the output control circuit 405 starts the first timer, if the value of the first timer is greater than or equal to the first value, it indicates that the MOS transistor is short-circuited, the power output protection circuit needs to enter a short-circuit protection state, the output control circuit 405 records the current state of the MOS transistor, and simultaneously outputs a control instruction to control the MOS transistor to be in a cut-off state and control the output voltage of the power supply 100 to be regulated to the first voltage value. If the first meterAnd when the value of the timer is smaller than the first value, initializing the first timer and continuously judging whether the first voltage is larger than the first value.
If the MOS transistor and/or the current detection resistor 300 is short-circuited, the power output protection circuit enters a short-circuit protection state and keeps N clock cycles, that is, the output control circuit 405 controls the MOS transistor to be in an off state and controls the output voltage of the power supply 100 to be adjusted to the first voltage value within the first time.
In the embodiment of the present application, the control switch 200 and the current detection resistor 300 are used to directly detect the dual output currents, and the two sets of current detection results are mutually used as a basis for determining whether the power output protection circuit has a single-point short circuit problem, and enter a protection state in a targeted manner to meet the LPS authentication requirement of the power supply.
It can be seen that the application provides a power output protection method, a control chip detects a first voltage and a second voltage; the first voltage is the voltage difference between two ends of the control switch, and the second voltage is the voltage difference between two ends of the current detection resistor; the control chip controls the output voltage of the power supply and controls the on or off of the switch according to the first voltage and the second voltage, and when the power supply output protection circuit has the problem of single-point short circuit, the control chip can enter a protection state in a targeted mode to meet the LPS (Low-pass power) authentication requirement of the power supply.
It is to be understood that reference to "at least one" in the embodiments of the present application means one or more, and "a plurality" means two or more. "and/or" describes the association relationship of the associated objects, meaning that there may be three relationships, e.g., a and/or B, which may mean: a exists alone, A and B exist simultaneously, and B exists alone, wherein A and B can be singular or plural. The character "/" generally indicates that the former and latter associated objects are in an "or" relationship. "at least one of the following" or similar expressions refer to any combination of these items, including any combination of the singular or plural items. For example, at least one (one) of a, b, or c, may represent: a, b, c, a-b, a-c, b-c, or a-b-c, wherein a, b, c may be single or multiple.
And, unless stated to the contrary, the embodiments of the present application refer to the ordinal numbers "first", "second", etc., for distinguishing a plurality of objects, and do not limit the sequence, timing, priority, or importance of the plurality of objects. For example, the first information and the second information are different information only for distinguishing them from each other, and do not indicate a difference in the contents, priority, transmission order, importance, or the like of the two kinds of information.
An embodiment of the present application further provides an electronic device, which includes the power output protection circuit shown in fig. 1.
Embodiments of the present application also provide a computer storage medium, wherein the computer storage medium stores a computer program for electronic data exchange, and the computer program enables a computer to execute part or all of the steps of any one of the methods as described in the above method embodiments.
Embodiments of the present application also provide a computer program product comprising a non-transitory computer readable storage medium storing a computer program operable to cause a computer to perform some or all of the steps of any of the methods as described in the above method embodiments. The computer program product may be a software installation package.
In the foregoing embodiments, the descriptions of the respective embodiments have respective emphasis, and for parts that are not described in detail in a certain embodiment, reference may be made to related descriptions of other embodiments.
In the several embodiments provided in the present application, it should be understood that the disclosed power output protection circuit may be implemented in other manners. For example, the embodiments of the power output protection circuit described above are merely illustrative, and for example, the components in the above circuits may also adopt other components with the same functions. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, circuits or components, and may be in an electrical or other form.
In addition, each circuit in the embodiments of the present application may be integrated in one circuit board, or each circuit may exist alone, or two or more circuits may be integrated in one circuit board.
The foregoing detailed description of the embodiments of the present application has been presented to illustrate the principles and implementations of the present application with specific examples, and the above description of the embodiments is only provided to help understand the present application and its core ideas; meanwhile, for a person skilled in the art, according to the idea of the present application, there may be variations in the specific embodiments and the application scope, and in view of the above, the content of the present specification should not be construed as a limitation to the present application.
Claims (13)
1. A power output protection method is characterized by being applied to a power output protection circuit, wherein the power output protection circuit comprises a power supply, a control switch, a current detection resistor, a control chip and an output port, the current detection resistor is arranged on a power output loop, a first input end and a second input end of the control chip are respectively connected with two ends of the control switch, a third input end and a fourth input end of the control chip are respectively connected with two ends of the current detection resistor, a first output end of the control chip is connected with a control end of the power supply, and a second output end of the control chip is connected with a control end of the control switch;
the method comprises the following steps:
the control chip detects a first voltage and a second voltage, wherein the first voltage is the voltage at two ends of the control switch, and the second voltage is the voltage at two ends of the current detection resistor;
the control chip controls the output voltage of the power supply and the on or off of the control switch according to the first voltage and the second voltage;
the control switch is an MOS transistor, and the control chip comprises an output control circuit; the control chip controls the output voltage of the power supply and the on or off of the control switch according to the first voltage and the second voltage, and comprises:
the output control circuit checks whether the MOS transistor is in a conducting state;
if the MOS transistor is in a conducting state, the output control circuit judges whether a first ratio is smaller than a first preset value, wherein the first ratio is the ratio of the first voltage to the second voltage;
if the MOS transistor is in a cut-off state, the output control circuit judges whether the first voltage is smaller than a second preset value;
if the first ratio is smaller than the first preset value or the first voltage is smaller than the second preset value, the output control circuit starts a first timer;
the output control circuit judges whether the value of the first timer is greater than or equal to a first value;
if the value of the first timer is greater than or equal to the first value, the output control circuit determines that the MOS transistor is short-circuited, and if the value of the first timer is less than the first value, the output control circuit initializes the first timer;
if the first ratio is greater than or equal to the first preset value, the output control circuit judges whether the first ratio is greater than a third preset value;
if the first ratio is larger than the third preset value, the output control circuit starts a second timer;
the output control circuit judges whether the value of the second timer is greater than or equal to the first value;
if the value of the second timer is greater than or equal to the first value, the output control circuit determines that the current detection resistor is short-circuited, and if the value of the second timer is smaller than the first value, the output control circuit initializes the second timer;
when the MOS transistor and/or the current detection resistor are short-circuited, the control chip controls the control switch to be in a closed state or an open state within a first time and controls the power supply to output a first voltage value within the first time.
2. The method according to claim 1, wherein the step of arranging the current detection resistor on the power output loop specifically comprises:
the power output loop comprises that the output end of the power supply is grounded through the control switch, the output port and the current detection resistor in sequence.
3. The method according to claim 1, wherein the step of arranging the current detection resistor on the power output loop specifically comprises:
the power output loop comprises that the output end of the power supply sequentially passes through the current detection resistor, the control switch and the output port and is grounded.
4. The method according to claim 1, wherein the step of arranging the current detection resistor on the power output loop specifically comprises:
the power output loop comprises that the output end of the power supply sequentially passes through the control switch, the current detection resistor and the output port to be grounded.
5. The method of claim 1, wherein the control chip further comprises a first amplification circuit, a second amplification circuit, a first analog-to-digital conversion circuit, and a second analog-to-digital conversion circuit;
a first input end of the first amplifying circuit is connected with a first input end of the control chip, a second input end of the first amplifying circuit is connected with a second input end of the control chip, an output end of the first amplifying circuit is connected with an input end of the first analog-to-digital conversion circuit, and an output end of the first analog-to-digital conversion circuit is connected with a first input end of the output control circuit;
a first input end of the second amplifying circuit is connected with a third input end of the control chip, a second input end of the second amplifying circuit is connected with a fourth input end of the control chip, an output end of the second amplifying circuit is connected with an input end of the second analog-to-digital conversion circuit, and an output end of the second analog-to-digital conversion circuit is connected with a second input end of the output control circuit;
the first output end of the output control circuit is connected with the first output end of the control chip, and the second output end of the output control circuit is connected with the second output end of the control chip.
6. The method of claim 5, wherein the first amplification circuit comprises: a first resistor, a second resistor, a third resistor, a fourth resistor, a first transistor, and a first operational amplifier,
the one end of first resistance is connected first amplifier circuit's first input, the other end of first resistance is connected respectively first operational amplifier's forward input with the one end of third resistance, the other end of third resistance is connected the collector of first transistor, the one end of second resistance with first amplifier circuit's output is connected respectively to the projecting pole of first transistor, the other end ground connection of second resistance, the base of first transistor is connected first operational amplifier's output, the one end of fourth resistance is connected first amplifier circuit's second input, the other end of fourth resistance is connected first operational amplifier's reverse input.
7. The method of claim 5, wherein the second amplification circuit comprises: a fifth resistor, a sixth resistor, a seventh resistor, an eighth resistor, a second transistor, a third transistor, a fourth transistor, and a second operational amplifier,
one end of the fifth resistor is connected to the second input terminal of the second amplifier circuit, the other end of the fifth resistor is connected to one end of the sixth resistor and the inverting input terminal of the second operational amplifier, respectively, the other end of the sixth resistor is connected to the emitter of the second transistor, the base of the second transistor is connected to the output terminal of the second operational amplifier, the collector of the second transistor is connected to the collector of the third transistor, the base of the third transistor and the base of the fourth transistor, the emitter of the third transistor is connected to the emitter of the fourth transistor and the VCC terminal of the second operational amplifier, respectively, the collector of the fourth transistor is connected to one end of the seventh resistor and the output terminal of the second amplifier circuit, respectively, the other end of the seventh resistor is grounded, and one end of the eighth resistor is connected to the first input terminal of the second amplifier circuit, the other end of the eighth resistor is connected with the positive input end of the operational amplifier.
8. A power output protection circuit is characterized by comprising a power supply, a control switch, a current detection resistor, a control chip and an output port, wherein the current detection resistor is arranged on a power output loop, a first input end and a second input end of the control chip are respectively connected with two ends of the control switch, a third input end and a fourth input end of the control chip are respectively connected with two ends of the current detection resistor, a first output end of the control chip is connected with a control end of the power supply, and a second output end of the control chip is connected with a control end of the control switch;
the control chip is used for detecting a first voltage and a second voltage, the first voltage is the voltage at two ends of the control switch, and the second voltage is the voltage at two ends of the current detection resistor;
the control chip is used for controlling the output voltage of the power supply and the on/off of the control switch according to the first voltage and the second voltage;
wherein, the control switch is a MOS transistor, the control chip includes an output control circuit, and in terms of controlling the output voltage of the power supply according to the first voltage and the second voltage, and the on or off of the control switch, the control chip is specifically configured to: the output control circuit checks whether the MOS transistor is in a conducting state;
if the MOS transistor is in a conducting state, the output control circuit judges whether a first ratio is smaller than a first preset value, wherein the first ratio is the ratio of the first voltage to the second voltage;
if the MOS transistor is in a cut-off state, the output control circuit judges whether the first voltage is smaller than a second preset value;
if the first ratio is smaller than the first preset value or the first voltage is smaller than the second preset value, the output control circuit starts a first timer;
the output control circuit judges whether the value of the first timer is greater than or equal to a first value;
if the value of the first timer is greater than or equal to the first value, the output control circuit determines that the MOS transistor is short-circuited, and if the value of the first timer is less than the first value, the output control circuit initializes the first timer;
if the first ratio is greater than or equal to the first preset value, the output control circuit judges whether the first ratio is greater than a third preset value;
if the first ratio is larger than the third preset value, the output control circuit starts a second timer;
the output control circuit judges whether the value of the second timer is greater than or equal to the first value;
if the value of the second timer is greater than or equal to the first value, the output control circuit determines that the current detection resistor is short-circuited, and if the value of the second timer is smaller than the first value, the output control circuit initializes the second timer;
when the MOS transistor and/or the current detection resistor are short-circuited, the control chip controls the control switch to be in a closed state or an open state within a first time and controls the power supply to output a first voltage value within the first time.
9. The circuit of claim 8, wherein the current detection resistor disposed on the power output loop comprises:
the power output loop comprises that the output end of the power supply is grounded through the control switch, the output port and the current detection resistor in sequence.
10. The circuit of claim 8, wherein the current detection resistor disposed on the power output loop comprises:
the power output loop comprises that the output end of the power supply sequentially passes through the current detection resistor, the control switch and the output port and is grounded.
11. The circuit of claim 8, wherein the current detection resistor disposed on the power output loop comprises:
the power output loop comprises that the output end of the power supply sequentially passes through the control switch, the current detection resistor and the output port to be grounded.
12. An electronic device, characterized in that the electronic device comprises a power output protection circuit according to any one of claims 8-11.
13. A computer-readable storage medium, characterized in that the computer-readable storage medium stores a computer program for electronic data exchange, wherein the computer program causes a computer to perform the steps of the method according to any one of claims 1-7.
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| Application Number | Priority Date | Filing Date | Title |
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| CN202110733431.9A CN113258538B (en) | 2021-06-30 | 2021-06-30 | Power output protection method and circuit |
| CN202111220125.1A CN115549033A (en) | 2021-06-30 | 2021-06-30 | Power output protection method and circuit, and related medium and program product |
| PCT/CN2021/104672 WO2023272751A1 (en) | 2021-06-30 | 2021-07-06 | Power source output protection method and circuit |
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| CN202110733431.9A CN113258538B (en) | 2021-06-30 | 2021-06-30 | Power output protection method and circuit |
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| CN202111220125.1A Division CN115549033A (en) | 2021-06-30 | 2021-06-30 | Power output protection method and circuit, and related medium and program product |
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| CN114743494B (en) * | 2022-04-27 | 2024-08-06 | 绵阳惠科光电科技有限公司 | Control circuit, driving device and display |
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| WO2023272751A1 (en) | 2023-01-05 |
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