CN113225125A - Airborne dual-band multifunctional satellite communication system based on VPX architecture - Google Patents
Airborne dual-band multifunctional satellite communication system based on VPX architecture Download PDFInfo
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- CN113225125A CN113225125A CN202110610581.0A CN202110610581A CN113225125A CN 113225125 A CN113225125 A CN 113225125A CN 202110610581 A CN202110610581 A CN 202110610581A CN 113225125 A CN113225125 A CN 113225125A
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B7/00—Radio transmission systems, i.e. using radiation field
- H04B7/14—Relay systems
- H04B7/15—Active relay systems
- H04B7/185—Space-based or airborne stations; Stations for satellite systems
- H04B7/1851—Systems using a satellite or space-based relay
- H04B7/18519—Operations control, administration or maintenance
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B7/00—Radio transmission systems, i.e. using radiation field
- H04B7/14—Relay systems
- H04B7/15—Active relay systems
- H04B7/185—Space-based or airborne stations; Stations for satellite systems
- H04B7/1851—Systems using a satellite or space-based relay
- H04B7/18513—Transmission in a satellite or space-based system
Abstract
The invention discloses an airborne dual-band multifunctional satellite communication system based on a VPX framework, and belongs to the technical field of satellite communication. The system comprises a motherboard module, a main control and service module, a power module, a first Ku channel module, a second Ku channel module, an S channel module, a clock and an intermediate frequency module, wherein the main control and service module, the power module, the first Ku channel module, the second Ku channel module, the S channel module, the clock and the intermediate frequency module are connected with the motherboard module, and the motherboard module is used for realizing bus transmission and high-speed data interconnection among the modules and providing an external interface. The invention has the advantages of standardization, generalization, high integration degree, stability, reliability, low cost, convenient operation, strong expandability and the like.
Description
Technical Field
The invention relates to the technical field of satellite communication, in particular to an airborne dual-band multifunctional satellite communication system based on a VPX framework.
Background
The satellite communication has the characteristics of multiple communication systems, complex communication service and the like, the conventional satellite communication device usually supports a single communication system and communication service, and the communication devices of various communication systems have the defects of poor compatibility, high repeatability, unmatched interfaces, low reliability, large volume and the like.
At present, satellite communication equipment is widely applied to various application environments such as sea, land, air and the like. The airborne application environment is rather harsh compared to the ground and shipboard application environments. The airborne satellite communication equipment is limited by various requirements such as narrow installation space on the aircraft, various aviation interfaces, complex transmission data protocols and the like, and has higher requirements on the airborne satellite communication equipment. Considering the reliability of the link, the satellite-communication link often includes various systems when being designed. In the past design experience, different satellite systems need different devices to be realized, which causes the problems of numerous devices related to satellite links, complex wiring relation, complex operation flow and the like. Meanwhile, the airborne application environment is considered, the space for installing the satellite communication equipment is often tight, and the application of the satellite communication equipment in the aviation environment is greatly limited by too many pieces of equipment.
Based on the above analysis, it is currently an urgent need to design and implement a miniaturized, multi-system, high-integration airborne satellite-satellite apparatus.
Disclosure of Invention
In view of the above, the present invention provides an airborne dual-band multifunctional satellite communication system based on a VPX architecture. The system has the advantages of strong reliability, high integration level, easy expansion and convenient use.
In order to achieve the purpose, the technical scheme adopted by the invention is as follows:
an airborne dual-band multifunctional satellite communication system based on VPX architecture comprises a main control and service module, a first Ku channel module, an S channel module and an intermediate frequency and clock module;
the main control and service module is used for providing an external interface and carrying out information processing, analyzing and processing IP control data received by an external network interface, extracting control information of each module, and sending the control information to the first Ku channel module, the S channel module, the intermediate frequency module and the clock module through the RS485 bus; in addition, the main control and service module is also used for converting the received two paths of optical signals into synchronous signals through IP-to-HDLC protocol conversion and respectively sending the synchronous signals to the first Ku channel module and the S channel module;
the first Ku channel module is used for realizing modulation and demodulation functions; the modulation function is to encode, modulate, channel framing and AD transform the synchronous data received by the main control and service unit, and convert the synchronous data into a c-frequency band radio frequency signal for output; the demodulation function converts the received c-frequency band signal into synchronous data through AD conversion, synchronization, demodulation and decoding and outputs the synchronous data to the main control and service unit;
the S channel module is used for processing services of an S frequency band, and carrying out modulation and demodulation of data, network access and network quit of a control terminal, voice AT signaling processing and packet service activation and forwarding on the received two-wire system voice and IP network data;
the intermediate frequency and clock module comprises a clock source submodule and a combiner submodule and provides a stable and reliable 100M clock for the main control and service module, the first Ku channel module, the S channel module, the radio frequency input port and the radio frequency output port; the combiner submodule is used for combining the radio frequencies sent by the Ku channel unit and the S channel unit into a radio frequency signal, outputting the radio frequency signal through a radio frequency cable, and respectively transmitting the received radio frequency signal to the Ku channel unit and the S channel unit;
the eighth pin of the main control and service module is connected with the second pin of the S channel module and is used for transmitting service IP data; a ninth pin of the main control and service module is respectively connected with a second pin of the first Ku channel module and a third pin of the S channel module and is used for transmitting RS485 monitoring bus data; a tenth pin of the master control and service module is connected with a ninth pin of the intermediate frequency and clock module and is used for transmitting SPI clock frequency offset control data; an eleventh pin of the main control and service module is connected with a first pin of the first Ku channel module and used for transmitting LVDS synchronous data;
a third pin of the intermediate frequency and clock module is connected with a fifth pin of the first Ku channel module, a seventh pin of the intermediate frequency and clock module is connected with a fifth pin of the S channel module, and the third pin and the fifth pin are both used for transmitting baseband signals; and a fourth pin of the intermediate frequency and clock module is connected with a fourth pin of the first Ku channel module and is used for transmitting a 100M reference clock signal.
The system further comprises a motherboard module, wherein the motherboard module is used for providing installation fixation and external signal interconnection of the main control and service module, the first Ku channel module, the S channel module, the intermediate frequency and clock module and the power module;
the first pin of the intermediate frequency and clock module is connected with the intermediate frequency receiving interface of the motherboard module, the second pin of the intermediate frequency and clock module is connected with the intermediate frequency sending interface of the motherboard module, and the fifth pin of the intermediate frequency and clock module is connected with the intermediate frequency testing interface of the motherboard module;
a first pin of the main control and service module is connected with an extravehicular monitoring interface of the motherboard module, a second pin of the main control and service module is connected with a station control IP interface of the motherboard module, a third pin of the main control and service module is connected with a Ku service multimode optical fiber interface of the motherboard module, a fourth pin of the main control and service module is connected with an S service multimode optical fiber interface of the motherboard module, a fifth pin of the main control and service module is connected with an inertial navigation interface of the motherboard module, and a sixth pin of the main control and service module is connected with a debugging interface of the motherboard module;
and a first pin of the S channel module is connected with an S voice interface of the motherboard module.
The device further comprises a second Ku channel module, wherein a third pin of the second Ku channel module is connected with a seventh pin of the main control and service module, and a second pin of the second Ku channel module is connected with a ninth pin of the main control and service module and used for transmitting RS485 monitoring bus data; the first pin of the second Ku channel module is connected with the twelfth pin of the main control and service module and used for transmitting LVDS synchronous data; a fourth pin of the second Ku channel module is connected with an eighth pin of the intermediate frequency and clock module and is used for transmitting baseband signals; and the fifth pin of the second Ku channel module is connected with the sixth pin of the intermediate frequency and clock module and is used for transmitting a 100M reference clock signal.
Further, the main control and service module comprises a first photoelectric conversion sub-module, a second photoelectric conversion sub-module, an IP conversion synchronization sub-module, a monitoring information analysis sub-module, an off-board monitoring sub-module, a channel monitoring sub-module, a clock management sub-module, a time B code analysis sub-module, a health management sub-module and a fan control sub-module;
a first pin of the monitoring information analysis submodule is connected with external station control IP information and is used for receiving control information from a station control computer; a second pin of the monitoring information analysis submodule is connected with a second pin of the time B code analysis submodule and is used for transmitting the time of the B code time service and reporting the time to the station control through the monitoring information analysis submodule; a third pin of the monitoring information analysis submodule is connected with a first pin of the clock management submodule and used for transmitting and sending clock offset adjustment information; a fourth pin of the monitoring information analysis submodule is connected with a first pin of the channel monitoring submodule and is used for transmitting monitoring information of a Ku channel and an S channel; a fifth pin of the monitoring information analysis submodule is connected with the extravehicular monitoring module and used for transmitting monitoring information of extravehicular equipment; a sixth pin of the monitoring information analysis submodule is connected with a second pin of the health management module and is used for transmitting health management reporting information;
a first pin of the first photoelectric conversion sub-module is connected with external Ku service optical fiber data and used for receiving Ku service information, and a second pin of the first photoelectric conversion module is connected with a first pin of the IP conversion synchronization sub-module and used for transmitting Ku service IP data;
and a first pin of the second photoelectric conversion module is connected with external S service optical fiber data and used for receiving S service information, and a second pin of the second photoelectric conversion module is used for sending S service IP data.
A first pin of the health management submodule is connected with an I2C health management data port of the first Ku channel module, the S channel module and the intermediate frequency and clock module; a second pin of the health management submodule is connected with a sixth pin of the monitoring information analysis submodule, and a third pin of the health management submodule is connected with a first pin of the fan control submodule;
and a second pin of the time B code analysis submodule is connected with a second pin of the monitoring information analysis module and used for reporting the time service information.
Further, the intermediate frequency and clock module comprises a clock source submodule, a power divider submodule, a splitter submodule and a combiner submodule;
a first pin of the clock source submodule is connected with a first Ku channel module and used for transmitting a 100M reference clock; a third pin and a fourth pin of the clock source submodule are respectively connected with a tenth pin and an eleventh pin of the power divider submodule and used for transmitting, receiving and sending a clock signal;
a first pin of the power divider submodule is connected with an external receiving intermediate frequency interface, a second pin of the power divider submodule is connected with a first Ku channel module and used for receiving an L-frequency-range intermediate frequency signal sent by the first Ku channel module, a fourth pin of the power divider submodule is connected with an S channel module and used for receiving an intermediate frequency signal sent by the S channel module, a seventh pin of the power divider submodule is connected with the S channel module and used for transmitting the intermediate frequency signal received by a terminal to the S channel module, and a ninth pin of the power divider submodule is connected with the first Ku channel module and used for transmitting the intermediate frequency signal received by the terminal to the first Ku channel module;
a first pin of the splitter sub-module is connected with a fifth pin of the power splitter sub-module, a second pin of the splitter sub-module is connected with a second pin of the combiner sub-module, and a third pin of the splitter sub-module is connected with an external intermediate frequency interface and is used for dividing intermediate frequency signals transmitted by the power splitter sub-module into two paths, wherein one path is transmitted to the combiner sub-module, and the other path is transmitted to the outside;
the first pin of the combiner submodule is connected with the sixth pin of the power divider submodule, the second pin of the combiner submodule is connected with the second pin of the splitter submodule, and the third pin of the combiner submodule is connected with an external intermediate frequency test interface and used for synthesizing a test receiving intermediate frequency signal coming out of the power divider submodule and a sending intermediate frequency signal coming out of the splitter into one path and sending the one path to the outside.
The invention adopts the technical scheme to produce the beneficial effects that:
1. the invention adopts a standard RS485 control bus, receives external IP management data through a main control and service module, and carries out unified configuration management on each slot position module. The network IP service data can be converted into synchronous data by externally receiving two paths of multimode fiber data, and the synchronous data is transmitted through a channel, so that the network IP service data transmission method has the characteristics of standardization, generalization and high integration.
2. The invention comprises two channel transmission modes: ku band channels and S band channels. Both channels can carry multiple types of traffic including data, video, voice, etc. Meanwhile, the two channels are independent from each other and can be used for mutual backup, so that the interface types are enriched, and the reliability and stability of system operation are greatly improved.
3. The invention comprises two Ku channel modules. The two Ku channel modules adopt a hot backup mode, and the switching of the two Ku channel modules is automatically controlled through software. Two channels simultaneously receive external intermediate frequency L wave band signals, and when one Ku channel module breaks down, the other Ku channel module can be automatically switched. The reliability and the stability of the equipment are greatly improved.
4. The invention has a complete health management function, and each module in the terminal has the health management function. The modules autonomously collect health state information, report the health information to the main control and business processing module through an I2C bus for aggregation and processing, and send the health information to an external monitoring display. The health management information covers various state information such as the temperature of each module, the supply voltage and current, the version number of software and hardware, the working state and the like.
Drawings
Fig. 1 is a circuit schematic of an embodiment of the invention.
Fig. 2 is a circuit schematic diagram of the master and service module of fig. 1.
Fig. 3 is a circuit schematic of the intermediate frequency and clock block of fig. 1.
Detailed Description
The present invention will be further described with reference to the accompanying drawings and specific embodiments.
An airborne dual-band multifunctional satellite communication device based on a VPX framework is characterized by comprising a motherboard module, a power module, a main control and service module, a Ku channel module 1, a Ku channel module 2, an S channel module, an intermediate frequency and a clock module, wherein the power module, the main control and service module, the Ku channel module 1, the Ku channel module 2, the S channel module, the intermediate frequency and the clock module are connected with the motherboard module; the Ku channel and the S channel in the device are mutually independent, and satellite communication services of two frequency bands can be provided at the same time. The two Ku channel modules adopt hot backup processing, and the switching of the two Ku channel modules is automatically controlled through software. The device also has a complete health management function, and each module in the terminal has the health management function. The modules autonomously collect health state information, report the health information to the main control and business processing module through an I2C bus for aggregation and processing, and send the health information to an external monitoring display.
The main control and service module is a main processing unit in the terminal and provides an external interface and an information processing function of the whole terminal. And analyzing and processing the IP control data received by the external network port, extracting control information of each module in the terminal, and controlling other modules through an RS485 bus. Meanwhile, the working states of other modules are collected, and the working states are framed and then sent to a terminal to be reported to an upper computer; in addition, the main control and service module receives two paths of optical signals outside the terminal, converts the optical signals into synchronous signals through IP-to-HDLC protocol conversion, and sends the synchronous signals to the channel module.
The main functions of the Ku channel module are modulation and demodulation. The modulation function encodes, modulates, channel frames and AD converts the synchronous data received by the main control and service unit, and converts the synchronous data into C frequency band radio frequency signals for output; the demodulation function converts the C frequency band radio frequency signal received by the terminal into synchronous data through AD conversion, synchronization, demodulation, decoding and the like, and outputs the synchronous data to the main control and service unit.
The function of the S channel module is the service processing function of the S frequency band. And processing two-wire system voice and IP network data accessed from the outside of the terminal, and performing the functions of modulation and demodulation of the data, network access and network exit control of the terminal, voice AT signaling processing and packet service activation and forwarding.
The intermediate frequency and clock module comprises a clock source module and a divider module, provides a stable and reliable 100M clock for other modules and a radio frequency input/output port in the terminal, simultaneously sends and combines radio frequencies of two Ku channel units and one S channel unit in the terminal into one radio frequency signal, outputs the radio frequency signal to the outside of the terminal through a radio frequency cable, and divides the radio frequency signal received by the outside of the terminal into three paths and transmits the radio frequency signal to the two Ku channel units and the S channel unit.
The power supply module receives 28V direct current power input from the outside of the terminal, performs DC/DC conversion, converts the power into 12V and 5V direct current voltage and outputs the voltage to other modules in the terminal through the motherboard.
The motherboard module provides the functions of mounting, fixing and signal interconnection of all modules in the terminal. Each module in the terminal is connected with the motherboard module through a VPX connector, and interconnection signals of each module in the terminal are transferred through the motherboard module. And simultaneously, the output signals of all the modules are also output to the terminal external connectors through cables.
Wherein, pin 1 of the intermediate frequency module is connected with an external intermediate frequency receiving interface through a motherboard module, pin 2 is connected with an external intermediate frequency transmitting interface through the motherboard module, and pin 5 of the intermediate frequency module is connected with an external intermediate frequency testing interface through the motherboard module;
the main control and service module has 1 pin connected with an external cabin monitoring interface through a motherboard module, 2 pins connected with an external station control IP interface through the motherboard module, 3 pins connected with an external Ku service multimode optical fiber interface through the motherboard module, 4 pins connected with an external S service multimode optical fiber interface through the motherboard module, 5 pins connected with an external inertial navigation interface through the motherboard module, and 6 pins connected with an external debugging interface through the motherboard module;
and the pin 1 of the S channel module is connected with an external S voice interface through the motherboard module.
The power module is characterized in that a pin 1 outputs positive 12V voltage, a pin 2 outputs positive 5V voltage, a pin 3 outputs positive 3.3V voltage, and the pins 3, 4 and 5 are respectively connected with power supply ends of the slot positions; a pin 5 of the power supply module is connected with an external power supply interface and receives external direct current 28V power supply;
the 7 pins of the main control and service module are respectively connected with the 4 pins of the power module, the 3 pins of the Ku channel module 1, the 3 pins of the Ku channel module 2, the 4 pins of the S channel module and the 10 pins of the intermediate frequency and clock module, and transmit I2C health management data;
the 8 pins of the main control and service module are connected with the 2 pins of the S channel module and transmit service IP data;
the 9 pins of the main control and service module are respectively connected with the 2 pins of the Ku channel module 1, the 2 pins of the Ku channel module 2 and the 3 pins of the S channel module, and transmit RS485 monitoring bus data;
the 10 pins of the master control and service module are connected with the 9 pins of the intermediate frequency and clock module and transmit SPI clock control data;
a pin 11 of the main control and service module is connected with a pin 1 of the Ku channel module 1, and a pin 12 of the main control and service module is connected with a pin 1 of the Ku channel module 2 and respectively transmits LVDS synchronous data;
the 3 pins of the intermediate frequency and clock module are connected with the 5 pins of the Ku channel module 1, the 8 pins are connected with the 4 pins of the Ku channel module 2, and the 7 pins are connected with the 5 pins of the S channel module and respectively transmit baseband signals;
and 4 pins of the intermediate frequency and clock module are connected with 4 pins of the Ku channel module 1, 6 pins of the intermediate frequency and clock module are connected with 5 pins of the Ku channel module 2, and 100M reference clock signals are respectively transmitted.
The main control and service module consists of a photoelectric conversion module 1, a photoelectric conversion module 2, an IP conversion synchronization module, a monitoring information analysis module, an extravehicular monitoring module, a channel monitoring module, a clock management module, a time B code analysis module, a health management module and a fan control module;
the monitoring information analysis module is connected with external station control IP information through pin 1, receives control information from a station control computer, is connected with a time B code analysis module through pin 2, receives time service time of the B code and reports the time service time to the station control, is connected with pin 1 of a clock management module through pin 3, sends clock frequency deviation adjustment information, is connected with pin 1 of a channel monitoring module through pin 4, sends and receives monitoring information of two Ku channels and one S channel module, is connected with an extravehicular monitoring module through pin 5, transmits monitoring information of extravehicular equipment, and is connected with pin 2 of a health management module through pin 6, and receives health management reporting information.
And a pin 1 of the photoelectric conversion module 1 is connected with external Ku service optical fiber data to receive Ku service information, and a pin 2 of the photoelectric conversion module is connected with a pin 1 of the IP conversion synchronization module to send Ku service IP data.
And a pin 1 of the photoelectric conversion module 2 is connected with external S service optical fiber data to receive S service information, and a pin 2 sends S service IP data.
The 1 pin of the health management module is connected with the I2C health management data port of other modules, the 2 pin is connected with the 6 pins of the monitoring analysis module, and the 3 pin is connected with the 1 pin of the fan control module.
And a pin 1 of the time B code analysis module is connected with an external inertial navigation time information interface to receive external time service information, and a pin 2 of the time B code analysis module is connected with a pin 2 of the monitoring analysis module to report the time service information.
The intermediate frequency and clock module consists of a clock source module, a power divider module, a splitter module, a combiner module and a health management module.
a pin 1 of the power divider module is connected with an external intermediate frequency receiving interface A, a pin 2 is connected with a Ku channel module 1, an L-frequency-band intermediate frequency signal sent by the Ku channel module 1 is received, a pin 3 is connected with the Ku channel module 2, the L-frequency-band intermediate frequency signal sent by the Ku channel module 2 is received, a pin 4 is connected with the S channel module, the intermediate frequency signal sent by the S channel module is received, a pin 7 is connected with the S channel module, a transmission terminal receives the intermediate frequency signal to the S channel module, a pin 8 is connected with the Ku channel module 2, the transmission terminal receives the intermediate frequency signal to the Ku channel module 2, a pin 9 is connected with the Ku channel module 1, and the transmission terminal receives the intermediate frequency signal to the Ku channel module 1;
and a pin 1 of the combiner module is connected with a pin 6 of the power divider module, a pin 2 of the combiner module is connected with a pin 2 of the splitter module, and a pin 3 of the combiner module is connected with an external intermediate frequency test interface C. Combining the test receiving intermediate frequency signal from the power divider module and the sending intermediate frequency signal from the splitter into one path and sending the path to the outside of the terminal;
and a pin 1 of the health management module is connected with the main control and service module and transmits health management information through an I2C bus.
As shown in fig. 1, an airborne dual-band multifunctional satellite communication device based on VPX architecture is composed of a motherboard module, a main control and service processing module, a power supply module, a Ku channel module 1, a Ku channel module 2, an S channel module, an intermediate frequency and clock module, and a standard 1ATR chassis.
The pin 1 of the intermediate frequency module is connected with an external intermediate frequency receiving interface A through a motherboard module, wherein A is a TNC type coaxial cable interface, and the type of the connector is TNC (ZS)/SMA-KFKG;
the pin 2 of the intermediate frequency module is connected with an external intermediate frequency transmission interface B through a motherboard module, the B is a TNC type coaxial cable interface, and the type of the connector is N (ZS)/SMA-KFKG;
the 3 feet of the intermediate frequency module are connected with an external intermediate frequency test interface C through a motherboard module, the C is an SMA type coaxial cable interface, and the type of the connector is SMA (ZS)/SMA-KFKG;
the pin 1 of the main control and service module is connected with an external cabin monitoring interface D through a motherboard module, wherein the D is an RS422 interface, and the model of the connector is J599/20JD35 SN;
the 2 feet of the main control and service module are connected with an external station control interface E through a motherboard module, wherein E is a kilomega network port, and the type of the connector is J599/20JC98 SN;
the 3 feet of the main control and service module are connected with an external Ku service interface F through a motherboard module, wherein the F is a multimode fiber interface, and the model of the connector is JYSK22N 02Z;
the 4 feet of the main control and service module are connected with an external S service interface G through a motherboard module, the G is a multimode fiber interface, and the model of the connector is JYSK22N 02Z;
the 5 feet of the main control and service module are connected with an external inertial navigation interface H through a motherboard module, wherein H is an RS422 interface, and the model of the connector is J599/20JC35 SN;
the 6 feet of the main control and service module are connected with an external debugging I through a motherboard module, an I interface comprises a gigabit network port, RS232, RS422 and other interface types, and the connector type is J599/20JE35 SN;
the pin 1 of the S channel module is connected with an external analog voice interface J through a motherboard module, the J telephone interface is a two-wire voice interface, and the connector model is J599/20JA35 SN;
the power module outputs +12V at the pin 1, +5V at the pin 2 and +3.3V at the pin 3, and is respectively connected with the power supply ends of the slots; the pin 5 of the power supply module is connected with an external power supply interface K, and the K interface connector is J599/20JB02 PN;
in this example, the main control and service module, the power module, the Ku channel module 1, the Ku channel module 2, the S channel module, the intermediate frequency module, and the clock module are all 6U standard size VPX board cards, and the plug (socket) connector model numbers are VPX-61T8 aaaa 8AAAG8-a (VPX-61Z8 468 IIJG8-a), VPXD-T8A8B8(VPXD-Z8A8B8), VPX-61T8 aaaa 8AAAD8-a (VPX-61Z8eIJ8IIJD8-a), VPX-61T 8AAAD8-a (VPX-61Z8eIJ IIJD8-a), VPX-61T8 aaaa 8-a (VPX-61Z 8Z 8-iia), and VPX-61T8 aadd 8-a (VPX-61Z8 jd 8-iia), and VPX-61 A8 aadd eIJ 25-a (VPX-3638-ddx-368 a).
The installation structure of the device is as follows: the whole machine is assembled by adopting a standard 1ATR case, 257mm (width) 200mm (height) 370mm (depth) (without a panel, a handle, an electric connector and a shock absorption frame), the case adopts a totally-enclosed aluminum plate assembling structure form and comprises a front panel, a rear panel, a cover plate, a bottom plate, a case bracket and the like, and the front panel of the case is provided with a medium-frequency receiving interface A, a medium-frequency transmitting interface B, a medium-frequency testing interface C, an extravehicular monitoring interface navigation plug D, a station control interface navigation plug E, Ku service multimode optical fiber interface navigation plug F, S service multimode optical fiber interface navigation plug G, an inertial navigation data interface navigation plug H, a debugging interface navigation plug I, S voice interface navigation plug J, an external power supply interface navigation plug K, a grounding column, a fuse interface, a power supply indicator lamp and the like.
In the above embodiment, pin 1 of the if and clock module is connected to the external if receiving interface a through the motherboard module, pin 2 is connected to the external if transmitting interface B through the motherboard module, and is used to transmit and receive L-band if signals and S-band signals and provide clock source for antenna radio frequency, pin 5 is connected to the external if receiving interface C through the motherboard module, and is used to transmit the if signals transmitted and received by the terminal, and can be observed by the spectrum monitoring device; the main control and service module has 1 pin connected to the outer cabin monitoring interface D via the mother board module, the monitoring data transmission between the cabin antenna and the power amplifier, 2 pins connected to the station control IP interface E via the mother board module for connecting the station control computer and transmitting the station monitoring information, 3 pins connected to the Ku service fiber interface F via the mother board module for transmitting the Ku frequency band service IP data, 4 pins connected to the Ku service fiber interface G via the mother board module for transmitting the S frequency band IP service information, 5 pins connected to the inertial navigation information interface H via the mother board module for transmitting the inertial navigation and time service information, and 6 pins connected to the debugging interface I via the mother board module for transmitting the debugging information such as debugging network port and serial port; the pin 1 of the S channel module is connected with an external S voice interface J through a motherboard module and is used for transmitting two-wire system voice data.
A pin 1 of the power module provides +12V voltage, a pin 2 provides +5V voltage, a pin 3 provides +3.3V voltage, and each pin is respectively connected with a power end of each slot position module; in addition, the 5 feet of the power supply module are connected with an external power supply interface K through the motherboard module and receive +28V DC power supply.
The 7 pins of the main control and service module are respectively connected with the 3 pins of the Ku channel module 1, the 3 pins of the Ku channel module 2, the 4 pins of the S channel module, the 10 pins of the intermediate frequency and clock module and the 4 pins of the power module, and the connection adopts an I2C bus interface for transmitting the health state information of each slot position module;
the 9 feet of the main control and service module are respectively connected with the 2 feet of the Ku channel module 1, the 2 feet of the Ku channel module 2 and the 3 feet of the S channel module, and the connection adopts an RS485 bus interface and is used for transmitting control and return data of the three channel modules;
the 8 pins of the main control and service module are connected with the 2 pins of the S channel module, and the connection adopts a gigabit Ethernet interface and is used for transmitting S frequency band IP service data;
the 11 pins of the main control and service module are connected with the 1 pin of the Ku channel module 2, and the connection adopts an LVDS interface and is used for transmitting Ku frequency band synchronous service data;
the 12 pins of the main control and service module are connected with the 1 pin of the Ku channel module 1, and the connection adopts an LVDS interface and is used for transmitting Ku frequency band synchronous service data;
the 10 pins of the master control and service module are connected with the 9 pins of the intermediate frequency and clock module, and the connection adopts an SPI interface and is used for transmitting clock frequency offset control data;
a pin 3 of the intermediate frequency and clock module is connected with a pin 5 of the Ku channel module 1, a pin 8 is connected with a pin 4 of the Ku channel module 2, and a pin 7 is connected with a pin 5 of the S channel module, so that analog baseband signals are transmitted and used for transmitting and receiving the analog baseband signals;
the 4 pins of the intermediate frequency and clock module are connected with the 4 pins of the Ku channel module 1, and the 6 pins are connected with the 5 pins of the Ku channel module 2, so that 100M reference clock signals are transmitted;
as shown in fig. 2, the main control and service module includes a monitoring information analysis module, a time B code analysis module, an extravehicular monitoring module, a channel monitoring module, a photoelectric conversion module, and a health management module.
And the monitoring information analysis module receives station monitoring information sent from the outside and analyzes the control information. Analyzing the extravehicular monitoring data, and sending the extravehicular monitoring data to extravehicular equipment through an RS422 interface by the extravehicular monitoring module; analyzing out channel monitoring data, and sending the channel monitoring data to the three-channel module through the RS 485; and analyzing clock management data, and sending the clock management data to the clock and intermediate frequency module through the SPI. Meanwhile, the monitoring information module periodically inquires the state information of the three channels in the extravehicular equipment and the terminal, and performs framing on the state information and reports the state information to the station for monitoring. The time B code analysis module receives externally sent B code time information through an RS422 interface, and sends correct time information to the station monitoring through analysis;
the two photoelectric conversion modules respectively receive Ku optical fiber service data and S optical fiber service data outside the terminal, the multimode optical fiber signals are converted into 1000BASE-X network port electric data, the Ku service data are further converted into synchronous data, and the synchronous data are sent to the two Ku channel modules through LVDS interfaces; and the S service network port data is transmitted to the S channel module through the bottom plate.
The health management module collects the health state of each module in the case at regular time through an I2C bus interface, packs and frames the health state, sends the health state to the monitoring information analysis module, and reports the health state to the station for monitoring.
The function modules are realized by an FPGA chip XC7Z045, two photoelectric conversion modules HTA8543, an STM32 series single chip microcomputer, a multi-path PHY chip 88E1111 and various interface chips, and the function modules have higher integration level.
As shown in fig. 3, the clock and intermediate frequency module is composed of a clock source module, a power divider module, a splitter module, a combiner module and a health management module.
The clock source module adopts OXK719D-S-GT-V @100M, and can output six paths of stable and reliable 100M clocks; the power divider module adopts DMJ01B20, integrates the functions of splitting and combining, can divide the externally received intermediate frequency signal into four paths for output, and combines the transmitting signals of the four paths of channels into one path of signal for transmitting. In addition, the module feeds two paths of 100M feed clocks from a clock source to the intermediate frequency receiving and transmitting ports respectively; the branching unit and the combiner module respectively adopt an XTPAS-13 dual-port module, and ports of the modules have higher isolation degree, so that crosstalk can be effectively prevented.
In a word, the invention adopts interfaces such as an RS485 interface, a high-speed synchronous data interface, an I2C bus, an IP data bus and the like which are interconnected based on a VPX framework, and supports two Ku channels and one S channel satellite communication system. The whole set of device is integrated in a standard 1ATR case, is suitable for integrated service communication in various complex environments such as earth stations, aircrafts, ships, vehicles and the like, has the advantages of standardization, universalization, high integration degree, stability, reliability, low cost, convenience in operation, strong expandability and the like, and is an important improvement on the prior art.
Claims (5)
1. An airborne dual-band multifunctional satellite communication system based on a VPX framework is characterized by comprising a main control and service module, a first Ku channel module, an S channel module and an intermediate frequency and clock module;
the eighth pin of the main control and service module is connected with the second pin of the S channel module and is used for transmitting service IP data; a ninth pin of the main control and service module is respectively connected with a second pin of the first Ku channel module and a third pin of the S channel module and is used for transmitting RS485 monitoring bus data; a tenth pin of the master control and service module is connected with a ninth pin of the intermediate frequency and clock module and is used for transmitting SPI clock frequency offset control data; an eleventh pin of the main control and service module is connected with a first pin of the first Ku channel module and used for transmitting LVDS synchronous data;
a third pin of the intermediate frequency and clock module is connected with a fifth pin of the first Ku channel module, a seventh pin of the intermediate frequency and clock module is connected with a fifth pin of the S channel module, and the third pin and the fifth pin are both used for transmitting baseband signals; and a fourth pin of the intermediate frequency and clock module is connected with a fourth pin of the first Ku channel module and is used for transmitting a 100M reference clock signal.
2. The airborne dual-band multifunctional satellite communication system based on the VPX architecture of claim 1, further comprising a motherboard module, wherein the motherboard module is used for providing installation fixation and external signal interconnection of the main control and service module, the first Ku channel module, the S channel module, the intermediate frequency and clock module and the power supply module;
the first pin of the intermediate frequency and clock module is connected with the intermediate frequency receiving interface of the motherboard module, the second pin of the intermediate frequency and clock module is connected with the intermediate frequency sending interface of the motherboard module, and the fifth pin of the intermediate frequency and clock module is connected with the intermediate frequency testing interface of the motherboard module;
a first pin of the main control and service module is connected with an extravehicular monitoring interface of the motherboard module, a second pin of the main control and service module is connected with a station control IP interface of the motherboard module, a third pin of the main control and service module is connected with a Ku service multimode optical fiber interface of the motherboard module, a fourth pin of the main control and service module is connected with an S service multimode optical fiber interface of the motherboard module, a fifth pin of the main control and service module is connected with an inertial navigation interface of the motherboard module, and a sixth pin of the main control and service module is connected with a debugging interface of the motherboard module;
and a first pin of the S channel module is connected with an S voice interface of the motherboard module.
3. The airborne dual-band multifunctional satellite communication system based on the VPX architecture of claim 1, further comprising a second Ku channel module, wherein a third pin of the second Ku channel module is connected with a seventh pin of the main control and service module, and a second pin of the second Ku channel module is connected with a ninth pin of the main control and service module and is used for transmitting RS485 monitoring bus data; the first pin of the second Ku channel module is connected with the twelfth pin of the main control and service module and used for transmitting LVDS synchronous data; a fourth pin of the second Ku channel module is connected with an eighth pin of the intermediate frequency and clock module and is used for transmitting baseband signals; and the fifth pin of the second Ku channel module is connected with the sixth pin of the intermediate frequency and clock module and is used for transmitting a 100M reference clock signal.
4. The on-board dual-band multifunctional satellite communication system based on the VPX architecture of claim 1, wherein the main control and service module comprises a first photoelectric conversion sub-module, a second photoelectric conversion sub-module, an IP conversion synchronization sub-module, a monitoring information analysis sub-module, an off-board monitoring sub-module, a channel monitoring sub-module, a clock management sub-module, a time B code analysis sub-module, a health management sub-module and a fan control sub-module;
a first pin of the monitoring information analysis submodule is connected with external station control IP information and is used for receiving control information from a station control computer; a second pin of the monitoring information analysis submodule is connected with a second pin of the time B code analysis submodule and is used for transmitting the time of the B code time service and reporting the time to the station control through the monitoring information analysis submodule; a third pin of the monitoring information analysis submodule is connected with a first pin of the clock management submodule and used for transmitting and sending clock offset adjustment information; a fourth pin of the monitoring information analysis submodule is connected with a first pin of the channel monitoring submodule and is used for transmitting monitoring information of a Ku channel and an S channel; a fifth pin of the monitoring information analysis submodule is connected with the extravehicular monitoring module and used for transmitting monitoring information of extravehicular equipment; a sixth pin of the monitoring information analysis submodule is connected with a second pin of the health management module and is used for transmitting health management reporting information;
a first pin of the first photoelectric conversion sub-module is connected with external Ku service optical fiber data and used for receiving Ku service information, and a second pin of the first photoelectric conversion module is connected with a first pin of the IP conversion synchronization sub-module and used for transmitting Ku service IP data;
and a first pin of the second photoelectric conversion module is connected with external S service optical fiber data and used for receiving S service information, and a second pin of the second photoelectric conversion module is used for sending S service IP data.
A first pin of the health management submodule is connected with an I2C health management data port of the first Ku channel module, the S channel module and the intermediate frequency and clock module; a second pin of the health management submodule is connected with a sixth pin of the monitoring information analysis submodule, and a third pin of the health management submodule is connected with a first pin of the fan control submodule;
and a second pin of the time B code analysis submodule is connected with a second pin of the monitoring information analysis module and used for reporting the time service information.
5. The VPX architecture-based on-board dual-band multifunctional satellite communication system of claim 1, wherein the if and clock module comprises a clock source sub-module, a power divider sub-module, a splitter sub-module and a combiner sub-module;
a first pin of the clock source submodule is connected with a first Ku channel module and used for transmitting a 100M reference clock; a third pin and a fourth pin of the clock source submodule are respectively connected with a tenth pin and an eleventh pin of the power divider submodule and used for transmitting, receiving and sending a clock signal;
a first pin of the power divider submodule is connected with an external receiving intermediate frequency interface, a second pin of the power divider submodule is connected with a first Ku channel module and used for receiving an L-frequency-range intermediate frequency signal sent by the first Ku channel module, a fourth pin of the power divider submodule is connected with an S channel module and used for receiving an intermediate frequency signal sent by the S channel module, a seventh pin of the power divider submodule is connected with the S channel module and used for transmitting the intermediate frequency signal received by a terminal to the S channel module, and a ninth pin of the power divider submodule is connected with the first Ku channel module and used for transmitting the intermediate frequency signal received by the terminal to the first Ku channel module;
a first pin of the splitter sub-module is connected with a fifth pin of the power splitter sub-module, a second pin of the splitter sub-module is connected with a second pin of the combiner sub-module, and a third pin of the splitter sub-module is connected with an external intermediate frequency interface and is used for dividing intermediate frequency signals transmitted by the power splitter sub-module into two paths, wherein one path is transmitted to the combiner sub-module, and the other path is transmitted to the outside;
the first pin of the combiner submodule is connected with the sixth pin of the power divider submodule, the second pin of the combiner submodule is connected with the second pin of the splitter submodule, and the third pin of the combiner submodule is connected with an external intermediate frequency test interface and used for synthesizing a test receiving intermediate frequency signal coming out of the power divider submodule and a sending intermediate frequency signal coming out of the splitter into one path and sending the one path to the outside.
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| CN114567899A (en) * | 2022-03-14 | 2022-05-31 | 中科南京移动通信与计算创新研究院 | Terminal detection device based on VPX framework and signal processing method |
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| CN114567899A (en) * | 2022-03-14 | 2022-05-31 | 中科南京移动通信与计算创新研究院 | Terminal detection device based on VPX framework and signal processing method |
| CN114567899B (en) * | 2022-03-14 | 2023-12-19 | 中科南京移动通信与计算创新研究院 | Terminal detection device and signal processing method based on VPX architecture |
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